
miv-rv32-dp-tx.elf:     file format elf32-littleriscv
miv-rv32-dp-tx.elf
architecture: riscv:rv32, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x80000000

Program Header:
    LOAD off    0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12
         filesz 0x000074d0 memsz 0x00008290 flags rwx

Sections:
Idx Name              Size      VMA       LMA       File off  Algn  Flags
  0 .entry            00000540  80000000  80000000  00001000  2**4  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .text             00006f70  80000540  80000540  00001540  2**4  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .sdata            00000020  800074b0  800074b0  000084b0  2**4  CONTENTS, ALLOC, LOAD, DATA
  3 .data             00000000  800074d0  800074d0  000084d0  2**4  CONTENTS, ALLOC, LOAD, DATA
  4 .sbss             000000a0  800074d0  800074d0  000084d0  2**4  ALLOC
  5 .bss              00000120  80007570  80007570  000084d0  2**4  ALLOC
  6 .heap             00000400  80007690  80007690  000084d0  2**4  ALLOC
  7 .stack            00000800  80007a90  80007a90  000084d0  2**4  ALLOC
  8 .riscv.attributes 00000026  00000000  00000000  000084d0  2**0  CONTENTS, READONLY
  9 .comment          00000051  00000000  00000000  000084f6  2**0  CONTENTS, READONLY
 10 .debug_line       0000af99  00000000  00000000  00008547  2**0  CONTENTS, READONLY, DEBUGGING
 11 .debug_info       0000721b  00000000  00000000  000134e0  2**0  CONTENTS, READONLY, DEBUGGING
 12 .debug_abbrev     000018df  00000000  00000000  0001a6fb  2**0  CONTENTS, READONLY, DEBUGGING
 13 .debug_aranges    000005f8  00000000  00000000  0001bfe0  2**3  CONTENTS, READONLY, DEBUGGING
 14 .debug_str        0000f4b7  00000000  00000000  0001c5d8  2**0  CONTENTS, READONLY, DEBUGGING
 15 .debug_ranges     000004e0  00000000  00000000  0002ba90  2**3  CONTENTS, READONLY, DEBUGGING
 16 .debug_macro      000046d1  00000000  00000000  0002bf70  2**0  CONTENTS, READONLY, DEBUGGING
 17 .debug_frame      00001684  00000000  00000000  00030644  2**2  CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
80000000 l    d  .entry	00000000 .entry
80000540 l    d  .text	00000000 .text
800074b0 l    d  .sdata	00000000 .sdata
800074d0 l    d  .data	00000000 .data
800074d0 l    d  .sbss	00000000 .sbss
80007570 l    d  .bss	00000000 .bss
80007690 l    d  .heap	00000000 .heap
80007a90 l    d  .stack	00000000 .stack
00000000 l    d  .riscv.attributes	00000000 .riscv.attributes
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .debug_line	00000000 .debug_line
00000000 l    d  .debug_info	00000000 .debug_info
00000000 l    d  .debug_abbrev	00000000 .debug_abbrev
00000000 l    d  .debug_aranges	00000000 .debug_aranges
00000000 l    d  .debug_str	00000000 .debug_str
00000000 l    d  .debug_ranges	00000000 .debug_ranges
00000000 l    d  .debug_macro	00000000 .debug_macro
00000000 l    d  .debug_frame	00000000 .debug_frame
00000000 l    df *ABS*	00000000 ./src/platform/miv_rv32_hal/miv_rv32_entry.o
80000540 l       .text	00000000 handle_reset
80000004 l       .entry	00000000 trap_entry
80000090 l       .entry	00000000 generic_trap_handler
80000010 l       .entry	00000000 sw_trap_entry
800000de l       .entry	00000000 vector_sw_trap_handler
80000020 l       .entry	00000000 tmr_trap_entry
80000124 l       .entry	00000000 vector_tmr_trap_handler
80000030 l       .entry	00000000 ext_trap_entry
8000016a l       .entry	00000000 vector_ext_trap_handler
80000044 l       .entry	00000000 MGEUI_trap_entry
800001b0 l       .entry	00000000 vector_MGEUI_trap_handler
80000048 l       .entry	00000000 MGECI_trap_entry
800001f6 l       .entry	00000000 vector_MGECI_trap_handler
8000005c l       .entry	00000000 MSYS_MIE22_trap_entry
800004b2 l       .entry	00000000 vector_SUBSYSR_IRQHandler
80000060 l       .entry	00000000 MSYS_MIE23_trap_entry
800003e0 l       .entry	00000000 vector_SUBSYS_IRQHandler
80000064 l       .entry	00000000 MSYS_MIE24_trap_entry
8000023c l       .entry	00000000 vector_MSYS_EI0_trap_handler
80000068 l       .entry	00000000 MSYS_MIE25_trap_entry
80000282 l       .entry	00000000 vector_MSYS_EI1_trap_handler
8000006c l       .entry	00000000 MSYS_MIE26_trap_entry
800002c8 l       .entry	00000000 vector_MSYS_EI2_trap_handler
80000070 l       .entry	00000000 MSYS_MIE27_trap_entry
8000030e l       .entry	00000000 vector_MSYS_EI3_trap_handler
80000074 l       .entry	00000000 MSYS_MIE28_trap_entry
80000354 l       .entry	00000000 vector_MSYS_EI4_trap_handler
80000078 l       .entry	00000000 MSYS_MIE29_trap_entry
8000039a l       .entry	00000000 vector_MSYS_EI5_trap_handler
8000007c l       .entry	00000000 MSYS_MIE30_trap_entry
80000426 l       .entry	00000000 vector_MSYS_EI6_trap_handler
80000080 l       .entry	00000000 MSYS_MIE31_trap_entry
8000046c l       .entry	00000000 vector_MSYS_EI7_trap_handler
800004f8 l       .entry	00000000 generic_restore
8000058c l       .text	00000000 ima_cores_setup
800005d2 l       .text	00000000 vector_address_not_matching
80000598 l       .text	00000000 generic_reset_handling
80000636 l       .text	00000000 block_copy
800005d4 l       .text	00000000 initializations
8000061a l       .text	00000000 zeroize_block
80000658 l       .text	00000000 block_copy_error
8000062a l       .text	00000000 zeroize_loop
80000646 l       .text	00000000 block_copy_loop
8000065a l       .text	00000000 block_copy_exit
00000000 l    df *ABS*	00000000 miv_rv32_hal.c
8000065c l     F .text	00000016 MRV_enable_interrupts
80000672 l     F .text	00000068 MRV_read_mtime
800006da l     F .text	00000018 MRV_clear_soft_irq
800074d0 l     O .sbss	00000008 g_systick_increment
800074d8 l     O .sbss	00000008 g_systick_cmp_value
800074e0 l     O .sbss	00000004 d_tick.2200
00000000 l    df *ABS*	00000000 miv_rv32_init.c
00000000 l    df *ABS*	00000000 miv_rv32_stubs.c
00000000 l    df *ABS*	00000000 miv_rv32_syscall.c
00000000 l    df *ABS*	00000000 hal_irq.c
80000bc8 l     F .text	00000016 MRV_enable_interrupts
80000bde l     F .text	00000022 MRV_disable_interrupts
00000000 l    df *ABS*	00000000 core_uart_apb.c
00000000 l    df *ABS*	00000000 core_i2c.c
80001132 l     F .text	00000030 enable_slave_if_required
00000000 l    df *ABS*	00000000 i2c_interrupt.c
800018c2 l     F .text	0000001e MRV_enable_local_irq
800018e0 l     F .text	0000001e MRV_disable_local_irq
00000000 l    df *ABS*	00000000 core_gpio.c
00000000 l    df *ABS*	00000000 AXI4-Lite.c
00000000 l    df *ABS*	00000000 imx334_corei2c.c
800074b0 l     O .sdata	00000004 sensor1_i2c
80007570 l     O .bss	00000040 tx_buffer
800074e4 l     O .sbss	00000002 write_length
800074e8 l     O .sbss	00000004 status
80001c94 l     F .text	000000e0 sensor_i2c_write
80001d74 l     F .text	000000a4 sensor_i2c_write_gain
00000000 l    df *ABS*	00000000 msdelay.c
00000000 l    df *ABS*	00000000 dp_cmd_common.c
00000000 l    df *ABS*	00000000 dp_cmd_tx.c
00000000 l    df *ABS*	00000000 main.c
80006a74 l     F .text	0000001e MRV_enable_local_irq
800074bc l     O .sdata	00000002 in_gain
80006ef0 l     F .text	00000038 auto_brightness
80006f28 l     F .text	000000e0 gain_cal
800032fc g     F .text	00000202 DPSourceStartVideo
00000800 g       *ABS*	00000000 STACK_SIZE
80001e78 g     F .text	00000b76 imx334_cam_reginit
80005c4c g     F .text	00000e28 vsw_pe
80007cb0 g       .sdata	00000000 __global_pointer$
800074d0 g       *ABS*	00000000 __data_load
80006a92 g     F .text	0000009e SysTick_Handler
80000cf2 g       .text	00000000 HW_get_8bit_reg_field
800074ec g     O .sbss	00000004 SourceCmdSta
80003278 g     F .text	00000084 DPSourceTxI2CRdCmd
800075f8 g     O .bss	00000002 bayer
800074f4 g     O .sbss	00000004 tps3_supported
800074d0 g       .sbss	00000000 __sbss_start
8000095a g     F .text	00000062 handle_local_ei_interrupts
800074fc g     O .sbss	00000004 lane_01_cr_done
80007504 g     O .sbss	00000004 reply_data_vs0
80000c56 g       .text	00000000 HW_set_32bit_reg
800074f8 g     O .sbss	00000004 timestamp
800075fc g     O .bss	00000008 g_gpio_out
80000c14 g     F .text	00000028 HAL_disable_interrupts
80007548 g     O .sbss	00000004 pe
800029ee g     F .text	0000004c gain_setting
80007604 g     O .bss	00000004 rx_ms_count1
80007008 g     F .text	00000016 memcpy
800074b0 g       .sdata	00000000 __sdata_start
80000b6a  w    F .text	0000000e MSYS_EI4_IRQHandler
80000c3c g     F .text	0000001a HAL_restore_interrupts
800074c4 g     O .sdata	00000004 R_constant
80007608 g     O .bss	00000008 g_uart
80000cd0 g       .text	00000000 HW_set_8bit_reg_field
80007520 g     O .sbss	00000004 reply_data_pe3
80000b32  w    F .text	0000000e SUBSYS_IRQHandler
800009bc g     F .text	00000118 handle_trap
80007534 g     O .sbss	00000004 reply_sw_0
80000b92  w    F .text	0000000e MSYS_EI6_IRQHandler
80002c78 g     F .text	00000402 DPSourceISR
80000bae  w    F .text	0000000e SUBSYSR_IRQHandler
800034fe g     F .text	0000161c link_training
80002aa4 g     F .text	00000032 write_dp
800074c8 g     O .sdata	00000004 G_constant
800006f2 g     F .text	00000158 MRV_systick_config
80000b16  w    F .text	0000000e MGECI_IRQHandler
80001162 g     F .text	00000760 I2C_isr
80007500 g     O .sbss	00000004 lane_23_cr_done
80007a90 g       .heap	00000000 _heap_end
80007030 g     O .text	00000040 local_irq_handler_table
80000ba0  w    F .text	0000000e MSYS_EI7_IRQHandler
80007524 g     O .sbss	00000004 reply_pe_0
80007690 g       .bss	00000000 __bss_end
80000ad4 g     F .text	0000001a _init
80002a70 g     F .text	00000034 read_dp
80007564 g     O .sbss	00000004 rx_tmr_done
80000cc4 g       .text	00000000 HW_set_8bit_reg
80000cca g       .text	00000000 HW_get_8bit_reg
80000b40  w    F .text	0000000e MSYS_EI1_IRQHandler
800074b8 g     O .sdata	00000004 iter
8000750c g     O .sbss	00000004 reply_data_vs2
80007570 g       .sbss	00000000 __sbss_end
80000c5e g       .text	00000000 HW_set_32bit_reg_field
800075f0 g     O .bss	00000004 irq_value
80007560 g     O .sbss	00000004 timerdone
80007610 g     O .bss	00000004 g_ms_count
80007614 g     O .bss	00000004 rx_ms_count
800075f4 g     O .bss	00000004 MSA_VALUE
800074cc g     O .sdata	00000004 B_constant
80008290 g       .stack	00000000 __stack_top
80007558 g     O .sbss	00000004 reply_data_eq_23
00000400 g       *ABS*	00000000 HEAP_SIZE
8000307a g     F .text	000000c0 DPSourceTxWrCmd
80000e52 g     F .text	00000098 UART_send
80007514 g     O .sbss	00000004 reply_data_pe0
80000000 g       .entry	00000000 _start
8000084a g     F .text	000000fa handle_m_timer_interrupt
80002bf6 g     F .text	00000082 config_init
800074b0 g       *ABS*	00000000 __sdata_load
800074d0 g       .data	00000000 __data_end
8000753c g     O .sbss	00000004 reply_sw_2
800074f0 g     O .sbss	00000004 SourceCmdTx
80000c80 g       .text	00000000 HW_get_32bit_reg_field
8000755c g     O .sbss	00000004 SPEED
8000194e g     F .text	00000120 GPIO_init
80007530 g     O .sbss	00000004 reply_pe_3
8000751c g     O .sbss	00000004 reply_data_pe2
800075b0 g     O .bss	00000040 SourceWrBytes
80007618 g     O .bss	00000004 g_10ms_count
80007570 g       .bss	00000000 __bss_start
80000c00 g     F .text	00000014 HAL_enable_interrupts
8000701e g     F .text	00000010 memset
80006b4c g     F .text	000003a4 main
80002ad6 g     F .text	00000120 DPSourceInit
800074b4 g     O .sdata	00000004 seq_rst
80000b78  w    F .text	0000000e MSYS_EI5_IRQHandler
80007550 g     O .sbss	00000004 reply_data_cr_23
800018fe g     F .text	00000028 I2C_enable_irq
80000b24  w    F .text	0000000e MGEUI_IRQHandler
80002a3a g     F .text	00000036 msdelay
80007544 g     O .sbss	00000004 vs
80000c90 g       .text	00000000 HW_get_16bit_reg
800074d0 g       .sdata	00000000 __sdata_end
80001e18 g     F .text	00000060 imx334_cam_init
80007a90 g       .heap	00000000 __heap_end
80007528 g     O .sbss	00000004 reply_pe_1
80007568 g     O .sbss	00000004 second_constant
80000aee g     F .text	0000000e _fini
8000313a g     F .text	000000c8 DPSourceTxI2CWrCmd
80007510 g     O .sbss	00000004 reply_data_vs3
80000c96 g       .text	00000000 HW_set_16bit_reg_field
80000b4e  w    F .text	0000000e MSYS_EI2_IRQHandler
80007a90 g       .stack	00000000 __stack_bottom
80000afc  w    F .text	0000000c Software_IRQHandler
80007508 g     O .sbss	00000004 reply_data_vs1
80007690 g       .heap	00000000 __heap_start
80000eea g     F .text	000000f6 I2C_init
800010ea g     F .text	00000048 I2C_wait_complete
80001c74 g     F .text	00000020 axi4litewrite
80007518 g     O .sbss	00000004 reply_data_pe1
80007690 g       .bss	00000000 _end
80000b86  w    F .text	0000000c Reserved_IRQHandler
80001926 g     F .text	00000028 I2C_disable_irq
8000761c g     O .bss	00000004 a
8000754c g     O .sbss	00000004 reply_data_cr_01
80000cfe g     F .text	00000154 UART_init
80000c5a g       .text	00000000 HW_get_32bit_reg
80000bbc g     F .text	0000000c _exit
8000756c g     O .sbss	00000004 process_data
80000c8a g       .text	00000000 HW_set_16bit_reg
80007538 g     O .sbss	00000004 reply_sw_1
8000752c g     O .sbss	00000004 reply_pe_2
80007540 g     O .sbss	00000004 reply_sw_3
80000b5c  w    F .text	0000000e MSYS_EI3_IRQHandler
80000b08  w    F .text	0000000e External_IRQHandler
80007620 g     O .bss	00000004 g_10ms_count1
800074d0 g       .data	00000000 __data_start
80007554 g     O .sbss	00000004 reply_data_eq_01
80003202 g     F .text	00000076 DPSourceTxRdCmd
80007624 g     O .bss	0000006c g_i2c_instance_cam1
80004b1a g     F .text	00001132 update_speed
80000944 g     F .text	00000016 handle_m_soft_interrupt
80000cb8 g       .text	00000000 HW_get_16bit_reg_field
80001a6e g     F .text	00000206 GPIO_set_output
80000fe0 g     F .text	0000010a I2C_write
80006b30 g     F .text	0000001c MSYS_EI0_IRQHandler
800074c0 g     O .sdata	00000004 g_state



Disassembly of section .entry:

80000000 <_start>:
_start():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:113

  .section      .entry, "ax"
  .globl _start

_start:
  j handle_reset
80000000:	5400006f          	j	80000540 <handle_reset>

80000004 <trap_entry>:
trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:124
   at the jump and you can at least look at mcause, mepc and get some hints
   about the crash. */
trap_entry:
.option push
.option norvc
j generic_trap_handler
80000004:	08c0006f          	j	80000090 <generic_trap_handler>
	...

80000010 <sw_trap_entry>:
sw_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:130
.option pop
  .word 0
  .word 0

sw_trap_entry:
  j vector_sw_trap_handler
80000010:	a0f9                	j	800000de <vector_sw_trap_handler>
	...

80000020 <tmr_trap_entry>:
tmr_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:139
  .word 0
  .word 0
  .word 0

tmr_trap_entry:
  j vector_tmr_trap_handler
80000020:	a211                	j	80000124 <vector_tmr_trap_handler>
	...

80000030 <ext_trap_entry>:
ext_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:148
  .word 0
  .word 0
  .word 0

ext_trap_entry:
  j vector_ext_trap_handler
80000030:	aa2d                	j	8000016a <vector_ext_trap_handler>
	...

80000044 <MGEUI_trap_entry>:
MGEUI_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:159
  .word 0
  .word 0

#ifndef MIV_LEGACY_RV32
MGEUI_trap_entry:
  j vector_MGEUI_trap_handler
80000044:	a2b5                	j	800001b0 <vector_MGEUI_trap_handler>
	...

80000048 <MGECI_trap_entry>:
MGECI_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:165
#ifdef __riscv_compressed
  .2byte 0
#endif

MGECI_trap_entry:
  j vector_MGECI_trap_handler
80000048:	a27d                	j	800001f6 <vector_MGECI_trap_handler>
	...

8000005c <MSYS_MIE22_trap_entry>:
MSYS_MIE22_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:177
  .word 0

#ifndef MIV_RV32_V3_0
MSYS_MIE22_trap_entry:
#ifndef MIV_RV32_V3_0 
  j vector_SUBSYSR_IRQHandler
8000005c:	a999                	j	800004b2 <vector_SUBSYSR_IRQHandler>
	...

80000060 <MSYS_MIE23_trap_entry>:
MSYS_MIE23_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:184
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE23_trap_entry:
  j vector_SUBSYS_IRQHandler
80000060:	a641                	j	800003e0 <vector_SUBSYS_IRQHandler>
	...

80000064 <MSYS_MIE24_trap_entry>:
MSYS_MIE24_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:191
  .2byte 0
#endif
#endif /*MIV_RV32_V3_0*/

MSYS_MIE24_trap_entry:
  j vector_MSYS_EI0_trap_handler
80000064:	aae1                	j	8000023c <vector_MSYS_EI0_trap_handler>
	...

80000068 <MSYS_MIE25_trap_entry>:
MSYS_MIE25_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:197
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE25_trap_entry:
  j vector_MSYS_EI1_trap_handler
80000068:	ac29                	j	80000282 <vector_MSYS_EI1_trap_handler>
	...

8000006c <MSYS_MIE26_trap_entry>:
MSYS_MIE26_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:203
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE26_trap_entry:
  j vector_MSYS_EI2_trap_handler
8000006c:	acb1                	j	800002c8 <vector_MSYS_EI2_trap_handler>
	...

80000070 <MSYS_MIE27_trap_entry>:
MSYS_MIE27_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:209
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE27_trap_entry:
  j vector_MSYS_EI3_trap_handler
80000070:	ac79                	j	8000030e <vector_MSYS_EI3_trap_handler>
	...

80000074 <MSYS_MIE28_trap_entry>:
MSYS_MIE28_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:215
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE28_trap_entry:
  j vector_MSYS_EI4_trap_handler
80000074:	a4c5                	j	80000354 <vector_MSYS_EI4_trap_handler>
	...

80000078 <MSYS_MIE29_trap_entry>:
MSYS_MIE29_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:221
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE29_trap_entry:
  j vector_MSYS_EI5_trap_handler
80000078:	a60d                	j	8000039a <vector_MSYS_EI5_trap_handler>
	...

8000007c <MSYS_MIE30_trap_entry>:
MSYS_MIE30_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:228
  .2byte 0
#endif

MSYS_MIE30_trap_entry:
#ifndef MIV_RV32_V3_0
  j vector_MSYS_EI6_trap_handler
8000007c:	a66d                	j	80000426 <vector_MSYS_EI6_trap_handler>
	...

80000080 <MSYS_MIE31_trap_entry>:
MSYS_MIE31_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:238
  .2byte 0
#endif

#ifndef MIV_RV32_V3_0
MSYS_MIE31_trap_entry:
  j vector_MSYS_EI7_trap_handler
80000080:	a6f5                	j	8000046c <vector_MSYS_EI7_trap_handler>
80000082:	0000                	unimp
80000084:	00000013          	nop
80000088:	00000013          	nop
8000008c:	00000013          	nop

80000090 <generic_trap_handler>:
generic_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:247
#endif /* MIV_RV32_V3_0 */
#endif /* MIV_LEGACY_RV32 */

.align 4
generic_trap_handler:
  STORE_CONTEXT
80000090:	7119                	addi	sp,sp,-128
80000092:	c006                	sw	ra,0(sp)
80000094:	c20a                	sw	sp,4(sp)
80000096:	c40e                	sw	gp,8(sp)
80000098:	c612                	sw	tp,12(sp)
8000009a:	c816                	sw	t0,16(sp)
8000009c:	ca1a                	sw	t1,20(sp)
8000009e:	cc1e                	sw	t2,24(sp)
800000a0:	ce22                	sw	s0,28(sp)
800000a2:	d026                	sw	s1,32(sp)
800000a4:	d22a                	sw	a0,36(sp)
800000a6:	d42e                	sw	a1,40(sp)
800000a8:	d632                	sw	a2,44(sp)
800000aa:	d836                	sw	a3,48(sp)
800000ac:	da3a                	sw	a4,52(sp)
800000ae:	dc3e                	sw	a5,56(sp)
800000b0:	de42                	sw	a6,60(sp)
800000b2:	c0c6                	sw	a7,64(sp)
800000b4:	c2ca                	sw	s2,68(sp)
800000b6:	c4ce                	sw	s3,72(sp)
800000b8:	c6d2                	sw	s4,76(sp)
800000ba:	c8d6                	sw	s5,80(sp)
800000bc:	cada                	sw	s6,84(sp)
800000be:	ccde                	sw	s7,88(sp)
800000c0:	cee2                	sw	s8,92(sp)
800000c2:	d0e6                	sw	s9,96(sp)
800000c4:	d2ea                	sw	s10,100(sp)
800000c6:	d4ee                	sw	s11,104(sp)
800000c8:	d6f2                	sw	t3,108(sp)
800000ca:	d8f6                	sw	t4,112(sp)
800000cc:	dafa                	sw	t5,116(sp)
800000ce:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:248
  csrr a0, mcause
800000d0:	34202573          	csrr	a0,mcause
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:249
  csrr a1, mepc
800000d4:	341025f3          	csrr	a1,mepc
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:250
  jal handle_trap
800000d8:	0e5000ef          	jal	ra,800009bc <handle_trap>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:251
  j generic_restore
800000dc:	a931                	j	800004f8 <generic_restore>

800000de <vector_sw_trap_handler>:
vector_sw_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:254

vector_sw_trap_handler:
  STORE_CONTEXT
800000de:	7119                	addi	sp,sp,-128
800000e0:	c006                	sw	ra,0(sp)
800000e2:	c20a                	sw	sp,4(sp)
800000e4:	c40e                	sw	gp,8(sp)
800000e6:	c612                	sw	tp,12(sp)
800000e8:	c816                	sw	t0,16(sp)
800000ea:	ca1a                	sw	t1,20(sp)
800000ec:	cc1e                	sw	t2,24(sp)
800000ee:	ce22                	sw	s0,28(sp)
800000f0:	d026                	sw	s1,32(sp)
800000f2:	d22a                	sw	a0,36(sp)
800000f4:	d42e                	sw	a1,40(sp)
800000f6:	d632                	sw	a2,44(sp)
800000f8:	d836                	sw	a3,48(sp)
800000fa:	da3a                	sw	a4,52(sp)
800000fc:	dc3e                	sw	a5,56(sp)
800000fe:	de42                	sw	a6,60(sp)
80000100:	c0c6                	sw	a7,64(sp)
80000102:	c2ca                	sw	s2,68(sp)
80000104:	c4ce                	sw	s3,72(sp)
80000106:	c6d2                	sw	s4,76(sp)
80000108:	c8d6                	sw	s5,80(sp)
8000010a:	cada                	sw	s6,84(sp)
8000010c:	ccde                	sw	s7,88(sp)
8000010e:	cee2                	sw	s8,92(sp)
80000110:	d0e6                	sw	s9,96(sp)
80000112:	d2ea                	sw	s10,100(sp)
80000114:	d4ee                	sw	s11,104(sp)
80000116:	d6f2                	sw	t3,108(sp)
80000118:	d8f6                	sw	t4,112(sp)
8000011a:	dafa                	sw	t5,116(sp)
8000011c:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:255
  jal handle_m_soft_interrupt
8000011e:	027000ef          	jal	ra,80000944 <handle_m_soft_interrupt>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:256
  j generic_restore
80000122:	aed9                	j	800004f8 <generic_restore>

80000124 <vector_tmr_trap_handler>:
vector_tmr_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:259

vector_tmr_trap_handler:
  STORE_CONTEXT
80000124:	7119                	addi	sp,sp,-128
80000126:	c006                	sw	ra,0(sp)
80000128:	c20a                	sw	sp,4(sp)
8000012a:	c40e                	sw	gp,8(sp)
8000012c:	c612                	sw	tp,12(sp)
8000012e:	c816                	sw	t0,16(sp)
80000130:	ca1a                	sw	t1,20(sp)
80000132:	cc1e                	sw	t2,24(sp)
80000134:	ce22                	sw	s0,28(sp)
80000136:	d026                	sw	s1,32(sp)
80000138:	d22a                	sw	a0,36(sp)
8000013a:	d42e                	sw	a1,40(sp)
8000013c:	d632                	sw	a2,44(sp)
8000013e:	d836                	sw	a3,48(sp)
80000140:	da3a                	sw	a4,52(sp)
80000142:	dc3e                	sw	a5,56(sp)
80000144:	de42                	sw	a6,60(sp)
80000146:	c0c6                	sw	a7,64(sp)
80000148:	c2ca                	sw	s2,68(sp)
8000014a:	c4ce                	sw	s3,72(sp)
8000014c:	c6d2                	sw	s4,76(sp)
8000014e:	c8d6                	sw	s5,80(sp)
80000150:	cada                	sw	s6,84(sp)
80000152:	ccde                	sw	s7,88(sp)
80000154:	cee2                	sw	s8,92(sp)
80000156:	d0e6                	sw	s9,96(sp)
80000158:	d2ea                	sw	s10,100(sp)
8000015a:	d4ee                	sw	s11,104(sp)
8000015c:	d6f2                	sw	t3,108(sp)
8000015e:	d8f6                	sw	t4,112(sp)
80000160:	dafa                	sw	t5,116(sp)
80000162:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:260
  jal handle_m_timer_interrupt
80000164:	6e6000ef          	jal	ra,8000084a <handle_m_timer_interrupt>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:261
  j generic_restore
80000168:	ae41                	j	800004f8 <generic_restore>

8000016a <vector_ext_trap_handler>:
vector_ext_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:264

vector_ext_trap_handler:
  STORE_CONTEXT
8000016a:	7119                	addi	sp,sp,-128
8000016c:	c006                	sw	ra,0(sp)
8000016e:	c20a                	sw	sp,4(sp)
80000170:	c40e                	sw	gp,8(sp)
80000172:	c612                	sw	tp,12(sp)
80000174:	c816                	sw	t0,16(sp)
80000176:	ca1a                	sw	t1,20(sp)
80000178:	cc1e                	sw	t2,24(sp)
8000017a:	ce22                	sw	s0,28(sp)
8000017c:	d026                	sw	s1,32(sp)
8000017e:	d22a                	sw	a0,36(sp)
80000180:	d42e                	sw	a1,40(sp)
80000182:	d632                	sw	a2,44(sp)
80000184:	d836                	sw	a3,48(sp)
80000186:	da3a                	sw	a4,52(sp)
80000188:	dc3e                	sw	a5,56(sp)
8000018a:	de42                	sw	a6,60(sp)
8000018c:	c0c6                	sw	a7,64(sp)
8000018e:	c2ca                	sw	s2,68(sp)
80000190:	c4ce                	sw	s3,72(sp)
80000192:	c6d2                	sw	s4,76(sp)
80000194:	c8d6                	sw	s5,80(sp)
80000196:	cada                	sw	s6,84(sp)
80000198:	ccde                	sw	s7,88(sp)
8000019a:	cee2                	sw	s8,92(sp)
8000019c:	d0e6                	sw	s9,96(sp)
8000019e:	d2ea                	sw	s10,100(sp)
800001a0:	d4ee                	sw	s11,104(sp)
800001a2:	d6f2                	sw	t3,108(sp)
800001a4:	d8f6                	sw	t4,112(sp)
800001a6:	dafa                	sw	t5,116(sp)
800001a8:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:268
#ifdef MIV_LEGACY_RV32
  jal handle_m_ext_interrupt
#else
  jal External_IRQHandler
800001aa:	15f000ef          	jal	ra,80000b08 <External_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:270
#endif /* MIV_LEGACY_RV32 */
  j generic_restore
800001ae:	a6a9                	j	800004f8 <generic_restore>

800001b0 <vector_MGEUI_trap_handler>:
vector_MGEUI_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:274

#ifndef MIV_LEGACY_RV32
vector_MGEUI_trap_handler:
  STORE_CONTEXT
800001b0:	7119                	addi	sp,sp,-128
800001b2:	c006                	sw	ra,0(sp)
800001b4:	c20a                	sw	sp,4(sp)
800001b6:	c40e                	sw	gp,8(sp)
800001b8:	c612                	sw	tp,12(sp)
800001ba:	c816                	sw	t0,16(sp)
800001bc:	ca1a                	sw	t1,20(sp)
800001be:	cc1e                	sw	t2,24(sp)
800001c0:	ce22                	sw	s0,28(sp)
800001c2:	d026                	sw	s1,32(sp)
800001c4:	d22a                	sw	a0,36(sp)
800001c6:	d42e                	sw	a1,40(sp)
800001c8:	d632                	sw	a2,44(sp)
800001ca:	d836                	sw	a3,48(sp)
800001cc:	da3a                	sw	a4,52(sp)
800001ce:	dc3e                	sw	a5,56(sp)
800001d0:	de42                	sw	a6,60(sp)
800001d2:	c0c6                	sw	a7,64(sp)
800001d4:	c2ca                	sw	s2,68(sp)
800001d6:	c4ce                	sw	s3,72(sp)
800001d8:	c6d2                	sw	s4,76(sp)
800001da:	c8d6                	sw	s5,80(sp)
800001dc:	cada                	sw	s6,84(sp)
800001de:	ccde                	sw	s7,88(sp)
800001e0:	cee2                	sw	s8,92(sp)
800001e2:	d0e6                	sw	s9,96(sp)
800001e4:	d2ea                	sw	s10,100(sp)
800001e6:	d4ee                	sw	s11,104(sp)
800001e8:	d6f2                	sw	t3,108(sp)
800001ea:	d8f6                	sw	t4,112(sp)
800001ec:	dafa                	sw	t5,116(sp)
800001ee:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:275
  jal MGEUI_IRQHandler
800001f0:	135000ef          	jal	ra,80000b24 <MGEUI_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:276
  j generic_restore
800001f4:	a611                	j	800004f8 <generic_restore>

800001f6 <vector_MGECI_trap_handler>:
vector_MGECI_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:279

vector_MGECI_trap_handler:
  STORE_CONTEXT
800001f6:	7119                	addi	sp,sp,-128
800001f8:	c006                	sw	ra,0(sp)
800001fa:	c20a                	sw	sp,4(sp)
800001fc:	c40e                	sw	gp,8(sp)
800001fe:	c612                	sw	tp,12(sp)
80000200:	c816                	sw	t0,16(sp)
80000202:	ca1a                	sw	t1,20(sp)
80000204:	cc1e                	sw	t2,24(sp)
80000206:	ce22                	sw	s0,28(sp)
80000208:	d026                	sw	s1,32(sp)
8000020a:	d22a                	sw	a0,36(sp)
8000020c:	d42e                	sw	a1,40(sp)
8000020e:	d632                	sw	a2,44(sp)
80000210:	d836                	sw	a3,48(sp)
80000212:	da3a                	sw	a4,52(sp)
80000214:	dc3e                	sw	a5,56(sp)
80000216:	de42                	sw	a6,60(sp)
80000218:	c0c6                	sw	a7,64(sp)
8000021a:	c2ca                	sw	s2,68(sp)
8000021c:	c4ce                	sw	s3,72(sp)
8000021e:	c6d2                	sw	s4,76(sp)
80000220:	c8d6                	sw	s5,80(sp)
80000222:	cada                	sw	s6,84(sp)
80000224:	ccde                	sw	s7,88(sp)
80000226:	cee2                	sw	s8,92(sp)
80000228:	d0e6                	sw	s9,96(sp)
8000022a:	d2ea                	sw	s10,100(sp)
8000022c:	d4ee                	sw	s11,104(sp)
8000022e:	d6f2                	sw	t3,108(sp)
80000230:	d8f6                	sw	t4,112(sp)
80000232:	dafa                	sw	t5,116(sp)
80000234:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:280
  jal MGECI_IRQHandler
80000236:	0e1000ef          	jal	ra,80000b16 <MGECI_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:281
  j generic_restore
8000023a:	ac7d                	j	800004f8 <generic_restore>

8000023c <vector_MSYS_EI0_trap_handler>:
vector_MSYS_EI0_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:284

vector_MSYS_EI0_trap_handler:
  STORE_CONTEXT
8000023c:	7119                	addi	sp,sp,-128
8000023e:	c006                	sw	ra,0(sp)
80000240:	c20a                	sw	sp,4(sp)
80000242:	c40e                	sw	gp,8(sp)
80000244:	c612                	sw	tp,12(sp)
80000246:	c816                	sw	t0,16(sp)
80000248:	ca1a                	sw	t1,20(sp)
8000024a:	cc1e                	sw	t2,24(sp)
8000024c:	ce22                	sw	s0,28(sp)
8000024e:	d026                	sw	s1,32(sp)
80000250:	d22a                	sw	a0,36(sp)
80000252:	d42e                	sw	a1,40(sp)
80000254:	d632                	sw	a2,44(sp)
80000256:	d836                	sw	a3,48(sp)
80000258:	da3a                	sw	a4,52(sp)
8000025a:	dc3e                	sw	a5,56(sp)
8000025c:	de42                	sw	a6,60(sp)
8000025e:	c0c6                	sw	a7,64(sp)
80000260:	c2ca                	sw	s2,68(sp)
80000262:	c4ce                	sw	s3,72(sp)
80000264:	c6d2                	sw	s4,76(sp)
80000266:	c8d6                	sw	s5,80(sp)
80000268:	cada                	sw	s6,84(sp)
8000026a:	ccde                	sw	s7,88(sp)
8000026c:	cee2                	sw	s8,92(sp)
8000026e:	d0e6                	sw	s9,96(sp)
80000270:	d2ea                	sw	s10,100(sp)
80000272:	d4ee                	sw	s11,104(sp)
80000274:	d6f2                	sw	t3,108(sp)
80000276:	d8f6                	sw	t4,112(sp)
80000278:	dafa                	sw	t5,116(sp)
8000027a:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:285
  jal MSYS_EI0_IRQHandler
8000027c:	0b5060ef          	jal	ra,80006b30 <MSYS_EI0_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:286
  j generic_restore
80000280:	aca5                	j	800004f8 <generic_restore>

80000282 <vector_MSYS_EI1_trap_handler>:
vector_MSYS_EI1_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:289

vector_MSYS_EI1_trap_handler:
  STORE_CONTEXT
80000282:	7119                	addi	sp,sp,-128
80000284:	c006                	sw	ra,0(sp)
80000286:	c20a                	sw	sp,4(sp)
80000288:	c40e                	sw	gp,8(sp)
8000028a:	c612                	sw	tp,12(sp)
8000028c:	c816                	sw	t0,16(sp)
8000028e:	ca1a                	sw	t1,20(sp)
80000290:	cc1e                	sw	t2,24(sp)
80000292:	ce22                	sw	s0,28(sp)
80000294:	d026                	sw	s1,32(sp)
80000296:	d22a                	sw	a0,36(sp)
80000298:	d42e                	sw	a1,40(sp)
8000029a:	d632                	sw	a2,44(sp)
8000029c:	d836                	sw	a3,48(sp)
8000029e:	da3a                	sw	a4,52(sp)
800002a0:	dc3e                	sw	a5,56(sp)
800002a2:	de42                	sw	a6,60(sp)
800002a4:	c0c6                	sw	a7,64(sp)
800002a6:	c2ca                	sw	s2,68(sp)
800002a8:	c4ce                	sw	s3,72(sp)
800002aa:	c6d2                	sw	s4,76(sp)
800002ac:	c8d6                	sw	s5,80(sp)
800002ae:	cada                	sw	s6,84(sp)
800002b0:	ccde                	sw	s7,88(sp)
800002b2:	cee2                	sw	s8,92(sp)
800002b4:	d0e6                	sw	s9,96(sp)
800002b6:	d2ea                	sw	s10,100(sp)
800002b8:	d4ee                	sw	s11,104(sp)
800002ba:	d6f2                	sw	t3,108(sp)
800002bc:	d8f6                	sw	t4,112(sp)
800002be:	dafa                	sw	t5,116(sp)
800002c0:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:290
  jal MSYS_EI1_IRQHandler
800002c2:	07f000ef          	jal	ra,80000b40 <MSYS_EI1_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:291
  j generic_restore
800002c6:	ac0d                	j	800004f8 <generic_restore>

800002c8 <vector_MSYS_EI2_trap_handler>:
vector_MSYS_EI2_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:294

vector_MSYS_EI2_trap_handler:
  STORE_CONTEXT
800002c8:	7119                	addi	sp,sp,-128
800002ca:	c006                	sw	ra,0(sp)
800002cc:	c20a                	sw	sp,4(sp)
800002ce:	c40e                	sw	gp,8(sp)
800002d0:	c612                	sw	tp,12(sp)
800002d2:	c816                	sw	t0,16(sp)
800002d4:	ca1a                	sw	t1,20(sp)
800002d6:	cc1e                	sw	t2,24(sp)
800002d8:	ce22                	sw	s0,28(sp)
800002da:	d026                	sw	s1,32(sp)
800002dc:	d22a                	sw	a0,36(sp)
800002de:	d42e                	sw	a1,40(sp)
800002e0:	d632                	sw	a2,44(sp)
800002e2:	d836                	sw	a3,48(sp)
800002e4:	da3a                	sw	a4,52(sp)
800002e6:	dc3e                	sw	a5,56(sp)
800002e8:	de42                	sw	a6,60(sp)
800002ea:	c0c6                	sw	a7,64(sp)
800002ec:	c2ca                	sw	s2,68(sp)
800002ee:	c4ce                	sw	s3,72(sp)
800002f0:	c6d2                	sw	s4,76(sp)
800002f2:	c8d6                	sw	s5,80(sp)
800002f4:	cada                	sw	s6,84(sp)
800002f6:	ccde                	sw	s7,88(sp)
800002f8:	cee2                	sw	s8,92(sp)
800002fa:	d0e6                	sw	s9,96(sp)
800002fc:	d2ea                	sw	s10,100(sp)
800002fe:	d4ee                	sw	s11,104(sp)
80000300:	d6f2                	sw	t3,108(sp)
80000302:	d8f6                	sw	t4,112(sp)
80000304:	dafa                	sw	t5,116(sp)
80000306:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:295
  jal MSYS_EI2_IRQHandler
80000308:	047000ef          	jal	ra,80000b4e <MSYS_EI2_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:296
  j generic_restore
8000030c:	a2f5                	j	800004f8 <generic_restore>

8000030e <vector_MSYS_EI3_trap_handler>:
vector_MSYS_EI3_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:299

vector_MSYS_EI3_trap_handler:
  STORE_CONTEXT
8000030e:	7119                	addi	sp,sp,-128
80000310:	c006                	sw	ra,0(sp)
80000312:	c20a                	sw	sp,4(sp)
80000314:	c40e                	sw	gp,8(sp)
80000316:	c612                	sw	tp,12(sp)
80000318:	c816                	sw	t0,16(sp)
8000031a:	ca1a                	sw	t1,20(sp)
8000031c:	cc1e                	sw	t2,24(sp)
8000031e:	ce22                	sw	s0,28(sp)
80000320:	d026                	sw	s1,32(sp)
80000322:	d22a                	sw	a0,36(sp)
80000324:	d42e                	sw	a1,40(sp)
80000326:	d632                	sw	a2,44(sp)
80000328:	d836                	sw	a3,48(sp)
8000032a:	da3a                	sw	a4,52(sp)
8000032c:	dc3e                	sw	a5,56(sp)
8000032e:	de42                	sw	a6,60(sp)
80000330:	c0c6                	sw	a7,64(sp)
80000332:	c2ca                	sw	s2,68(sp)
80000334:	c4ce                	sw	s3,72(sp)
80000336:	c6d2                	sw	s4,76(sp)
80000338:	c8d6                	sw	s5,80(sp)
8000033a:	cada                	sw	s6,84(sp)
8000033c:	ccde                	sw	s7,88(sp)
8000033e:	cee2                	sw	s8,92(sp)
80000340:	d0e6                	sw	s9,96(sp)
80000342:	d2ea                	sw	s10,100(sp)
80000344:	d4ee                	sw	s11,104(sp)
80000346:	d6f2                	sw	t3,108(sp)
80000348:	d8f6                	sw	t4,112(sp)
8000034a:	dafa                	sw	t5,116(sp)
8000034c:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:300
  jal MSYS_EI3_IRQHandler
8000034e:	00f000ef          	jal	ra,80000b5c <MSYS_EI3_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:301
  j generic_restore
80000352:	a25d                	j	800004f8 <generic_restore>

80000354 <vector_MSYS_EI4_trap_handler>:
vector_MSYS_EI4_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:304

vector_MSYS_EI4_trap_handler:
  STORE_CONTEXT
80000354:	7119                	addi	sp,sp,-128
80000356:	c006                	sw	ra,0(sp)
80000358:	c20a                	sw	sp,4(sp)
8000035a:	c40e                	sw	gp,8(sp)
8000035c:	c612                	sw	tp,12(sp)
8000035e:	c816                	sw	t0,16(sp)
80000360:	ca1a                	sw	t1,20(sp)
80000362:	cc1e                	sw	t2,24(sp)
80000364:	ce22                	sw	s0,28(sp)
80000366:	d026                	sw	s1,32(sp)
80000368:	d22a                	sw	a0,36(sp)
8000036a:	d42e                	sw	a1,40(sp)
8000036c:	d632                	sw	a2,44(sp)
8000036e:	d836                	sw	a3,48(sp)
80000370:	da3a                	sw	a4,52(sp)
80000372:	dc3e                	sw	a5,56(sp)
80000374:	de42                	sw	a6,60(sp)
80000376:	c0c6                	sw	a7,64(sp)
80000378:	c2ca                	sw	s2,68(sp)
8000037a:	c4ce                	sw	s3,72(sp)
8000037c:	c6d2                	sw	s4,76(sp)
8000037e:	c8d6                	sw	s5,80(sp)
80000380:	cada                	sw	s6,84(sp)
80000382:	ccde                	sw	s7,88(sp)
80000384:	cee2                	sw	s8,92(sp)
80000386:	d0e6                	sw	s9,96(sp)
80000388:	d2ea                	sw	s10,100(sp)
8000038a:	d4ee                	sw	s11,104(sp)
8000038c:	d6f2                	sw	t3,108(sp)
8000038e:	d8f6                	sw	t4,112(sp)
80000390:	dafa                	sw	t5,116(sp)
80000392:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:305
  jal MSYS_EI4_IRQHandler
80000394:	7d6000ef          	jal	ra,80000b6a <MSYS_EI4_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:306
  j generic_restore
80000398:	a285                	j	800004f8 <generic_restore>

8000039a <vector_MSYS_EI5_trap_handler>:
vector_MSYS_EI5_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:309

vector_MSYS_EI5_trap_handler:
  STORE_CONTEXT
8000039a:	7119                	addi	sp,sp,-128
8000039c:	c006                	sw	ra,0(sp)
8000039e:	c20a                	sw	sp,4(sp)
800003a0:	c40e                	sw	gp,8(sp)
800003a2:	c612                	sw	tp,12(sp)
800003a4:	c816                	sw	t0,16(sp)
800003a6:	ca1a                	sw	t1,20(sp)
800003a8:	cc1e                	sw	t2,24(sp)
800003aa:	ce22                	sw	s0,28(sp)
800003ac:	d026                	sw	s1,32(sp)
800003ae:	d22a                	sw	a0,36(sp)
800003b0:	d42e                	sw	a1,40(sp)
800003b2:	d632                	sw	a2,44(sp)
800003b4:	d836                	sw	a3,48(sp)
800003b6:	da3a                	sw	a4,52(sp)
800003b8:	dc3e                	sw	a5,56(sp)
800003ba:	de42                	sw	a6,60(sp)
800003bc:	c0c6                	sw	a7,64(sp)
800003be:	c2ca                	sw	s2,68(sp)
800003c0:	c4ce                	sw	s3,72(sp)
800003c2:	c6d2                	sw	s4,76(sp)
800003c4:	c8d6                	sw	s5,80(sp)
800003c6:	cada                	sw	s6,84(sp)
800003c8:	ccde                	sw	s7,88(sp)
800003ca:	cee2                	sw	s8,92(sp)
800003cc:	d0e6                	sw	s9,96(sp)
800003ce:	d2ea                	sw	s10,100(sp)
800003d0:	d4ee                	sw	s11,104(sp)
800003d2:	d6f2                	sw	t3,108(sp)
800003d4:	d8f6                	sw	t4,112(sp)
800003d6:	dafa                	sw	t5,116(sp)
800003d8:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:310
  jal MSYS_EI5_IRQHandler
800003da:	79e000ef          	jal	ra,80000b78 <MSYS_EI5_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:311
  j generic_restore
800003de:	aa29                	j	800004f8 <generic_restore>

800003e0 <vector_SUBSYS_IRQHandler>:
vector_SUBSYS_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:314

vector_SUBSYS_IRQHandler:
  STORE_CONTEXT
800003e0:	7119                	addi	sp,sp,-128
800003e2:	c006                	sw	ra,0(sp)
800003e4:	c20a                	sw	sp,4(sp)
800003e6:	c40e                	sw	gp,8(sp)
800003e8:	c612                	sw	tp,12(sp)
800003ea:	c816                	sw	t0,16(sp)
800003ec:	ca1a                	sw	t1,20(sp)
800003ee:	cc1e                	sw	t2,24(sp)
800003f0:	ce22                	sw	s0,28(sp)
800003f2:	d026                	sw	s1,32(sp)
800003f4:	d22a                	sw	a0,36(sp)
800003f6:	d42e                	sw	a1,40(sp)
800003f8:	d632                	sw	a2,44(sp)
800003fa:	d836                	sw	a3,48(sp)
800003fc:	da3a                	sw	a4,52(sp)
800003fe:	dc3e                	sw	a5,56(sp)
80000400:	de42                	sw	a6,60(sp)
80000402:	c0c6                	sw	a7,64(sp)
80000404:	c2ca                	sw	s2,68(sp)
80000406:	c4ce                	sw	s3,72(sp)
80000408:	c6d2                	sw	s4,76(sp)
8000040a:	c8d6                	sw	s5,80(sp)
8000040c:	cada                	sw	s6,84(sp)
8000040e:	ccde                	sw	s7,88(sp)
80000410:	cee2                	sw	s8,92(sp)
80000412:	d0e6                	sw	s9,96(sp)
80000414:	d2ea                	sw	s10,100(sp)
80000416:	d4ee                	sw	s11,104(sp)
80000418:	d6f2                	sw	t3,108(sp)
8000041a:	d8f6                	sw	t4,112(sp)
8000041c:	dafa                	sw	t5,116(sp)
8000041e:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:315
  jal SUBSYS_IRQHandler
80000420:	712000ef          	jal	ra,80000b32 <SUBSYS_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:316
  j generic_restore
80000424:	a8d1                	j	800004f8 <generic_restore>

80000426 <vector_MSYS_EI6_trap_handler>:
vector_MSYS_EI6_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:320

#ifndef MIV_RV32_V3_0
vector_MSYS_EI6_trap_handler:
  STORE_CONTEXT
80000426:	7119                	addi	sp,sp,-128
80000428:	c006                	sw	ra,0(sp)
8000042a:	c20a                	sw	sp,4(sp)
8000042c:	c40e                	sw	gp,8(sp)
8000042e:	c612                	sw	tp,12(sp)
80000430:	c816                	sw	t0,16(sp)
80000432:	ca1a                	sw	t1,20(sp)
80000434:	cc1e                	sw	t2,24(sp)
80000436:	ce22                	sw	s0,28(sp)
80000438:	d026                	sw	s1,32(sp)
8000043a:	d22a                	sw	a0,36(sp)
8000043c:	d42e                	sw	a1,40(sp)
8000043e:	d632                	sw	a2,44(sp)
80000440:	d836                	sw	a3,48(sp)
80000442:	da3a                	sw	a4,52(sp)
80000444:	dc3e                	sw	a5,56(sp)
80000446:	de42                	sw	a6,60(sp)
80000448:	c0c6                	sw	a7,64(sp)
8000044a:	c2ca                	sw	s2,68(sp)
8000044c:	c4ce                	sw	s3,72(sp)
8000044e:	c6d2                	sw	s4,76(sp)
80000450:	c8d6                	sw	s5,80(sp)
80000452:	cada                	sw	s6,84(sp)
80000454:	ccde                	sw	s7,88(sp)
80000456:	cee2                	sw	s8,92(sp)
80000458:	d0e6                	sw	s9,96(sp)
8000045a:	d2ea                	sw	s10,100(sp)
8000045c:	d4ee                	sw	s11,104(sp)
8000045e:	d6f2                	sw	t3,108(sp)
80000460:	d8f6                	sw	t4,112(sp)
80000462:	dafa                	sw	t5,116(sp)
80000464:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:321
  jal MSYS_EI6_IRQHandler
80000466:	72c000ef          	jal	ra,80000b92 <MSYS_EI6_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:322
  j generic_restore
8000046a:	a079                	j	800004f8 <generic_restore>

8000046c <vector_MSYS_EI7_trap_handler>:
vector_MSYS_EI7_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:325

vector_MSYS_EI7_trap_handler:
  STORE_CONTEXT
8000046c:	7119                	addi	sp,sp,-128
8000046e:	c006                	sw	ra,0(sp)
80000470:	c20a                	sw	sp,4(sp)
80000472:	c40e                	sw	gp,8(sp)
80000474:	c612                	sw	tp,12(sp)
80000476:	c816                	sw	t0,16(sp)
80000478:	ca1a                	sw	t1,20(sp)
8000047a:	cc1e                	sw	t2,24(sp)
8000047c:	ce22                	sw	s0,28(sp)
8000047e:	d026                	sw	s1,32(sp)
80000480:	d22a                	sw	a0,36(sp)
80000482:	d42e                	sw	a1,40(sp)
80000484:	d632                	sw	a2,44(sp)
80000486:	d836                	sw	a3,48(sp)
80000488:	da3a                	sw	a4,52(sp)
8000048a:	dc3e                	sw	a5,56(sp)
8000048c:	de42                	sw	a6,60(sp)
8000048e:	c0c6                	sw	a7,64(sp)
80000490:	c2ca                	sw	s2,68(sp)
80000492:	c4ce                	sw	s3,72(sp)
80000494:	c6d2                	sw	s4,76(sp)
80000496:	c8d6                	sw	s5,80(sp)
80000498:	cada                	sw	s6,84(sp)
8000049a:	ccde                	sw	s7,88(sp)
8000049c:	cee2                	sw	s8,92(sp)
8000049e:	d0e6                	sw	s9,96(sp)
800004a0:	d2ea                	sw	s10,100(sp)
800004a2:	d4ee                	sw	s11,104(sp)
800004a4:	d6f2                	sw	t3,108(sp)
800004a6:	d8f6                	sw	t4,112(sp)
800004a8:	dafa                	sw	t5,116(sp)
800004aa:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:326
  jal MSYS_EI7_IRQHandler
800004ac:	6f4000ef          	jal	ra,80000ba0 <MSYS_EI7_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:327
  j generic_restore
800004b0:	a0a1                	j	800004f8 <generic_restore>

800004b2 <vector_SUBSYSR_IRQHandler>:
vector_SUBSYSR_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:331


vector_SUBSYSR_IRQHandler:
  STORE_CONTEXT
800004b2:	7119                	addi	sp,sp,-128
800004b4:	c006                	sw	ra,0(sp)
800004b6:	c20a                	sw	sp,4(sp)
800004b8:	c40e                	sw	gp,8(sp)
800004ba:	c612                	sw	tp,12(sp)
800004bc:	c816                	sw	t0,16(sp)
800004be:	ca1a                	sw	t1,20(sp)
800004c0:	cc1e                	sw	t2,24(sp)
800004c2:	ce22                	sw	s0,28(sp)
800004c4:	d026                	sw	s1,32(sp)
800004c6:	d22a                	sw	a0,36(sp)
800004c8:	d42e                	sw	a1,40(sp)
800004ca:	d632                	sw	a2,44(sp)
800004cc:	d836                	sw	a3,48(sp)
800004ce:	da3a                	sw	a4,52(sp)
800004d0:	dc3e                	sw	a5,56(sp)
800004d2:	de42                	sw	a6,60(sp)
800004d4:	c0c6                	sw	a7,64(sp)
800004d6:	c2ca                	sw	s2,68(sp)
800004d8:	c4ce                	sw	s3,72(sp)
800004da:	c6d2                	sw	s4,76(sp)
800004dc:	c8d6                	sw	s5,80(sp)
800004de:	cada                	sw	s6,84(sp)
800004e0:	ccde                	sw	s7,88(sp)
800004e2:	cee2                	sw	s8,92(sp)
800004e4:	d0e6                	sw	s9,96(sp)
800004e6:	d2ea                	sw	s10,100(sp)
800004e8:	d4ee                	sw	s11,104(sp)
800004ea:	d6f2                	sw	t3,108(sp)
800004ec:	d8f6                	sw	t4,112(sp)
800004ee:	dafa                	sw	t5,116(sp)
800004f0:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:332
  jal SUBSYSR_IRQHandler
800004f2:	6bc000ef          	jal	ra,80000bae <SUBSYSR_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:333
  j generic_restore
800004f6:	a009                	j	800004f8 <generic_restore>

800004f8 <generic_restore>:
generic_restore():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:339

#endif /*MIV_RV32_V3_0*/
#endif /* MIV_LEGACY_RV32 */

generic_restore:
  LREG x1, 0 * REGBYTES(sp)
800004f8:	4082                	lw	ra,0(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:340
  LREG x2, 1 * REGBYTES(sp)
800004fa:	4112                	lw	sp,4(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:341
  LREG x3, 2 * REGBYTES(sp)
800004fc:	41a2                	lw	gp,8(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:342
  LREG x4, 3 * REGBYTES(sp)
800004fe:	4232                	lw	tp,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:343
  LREG x5, 4 * REGBYTES(sp)
80000500:	42c2                	lw	t0,16(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:344
  LREG x6, 5 * REGBYTES(sp)
80000502:	4352                	lw	t1,20(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:345
  LREG x7, 6 * REGBYTES(sp)
80000504:	43e2                	lw	t2,24(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:346
  LREG x8, 7 * REGBYTES(sp)
80000506:	4472                	lw	s0,28(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:347
  LREG x9, 8 * REGBYTES(sp)
80000508:	5482                	lw	s1,32(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:348
  LREG x10, 9 * REGBYTES(sp)
8000050a:	5512                	lw	a0,36(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:349
  LREG x11, 10 * REGBYTES(sp)
8000050c:	55a2                	lw	a1,40(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:350
  LREG x12, 11 * REGBYTES(sp)
8000050e:	5632                	lw	a2,44(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:351
  LREG x13, 12 * REGBYTES(sp)
80000510:	56c2                	lw	a3,48(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:352
  LREG x14, 13 * REGBYTES(sp)
80000512:	5752                	lw	a4,52(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:353
  LREG x15, 14 * REGBYTES(sp)
80000514:	57e2                	lw	a5,56(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:354
  LREG x16, 15 * REGBYTES(sp)
80000516:	5872                	lw	a6,60(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:355
  LREG x17, 16 * REGBYTES(sp)
80000518:	4886                	lw	a7,64(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:356
  LREG x18, 17 * REGBYTES(sp)
8000051a:	4916                	lw	s2,68(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:357
  LREG x19, 18 * REGBYTES(sp)
8000051c:	49a6                	lw	s3,72(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:358
  LREG x20, 19 * REGBYTES(sp)
8000051e:	4a36                	lw	s4,76(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:359
  LREG x21, 20 * REGBYTES(sp)
80000520:	4ac6                	lw	s5,80(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:360
  LREG x22, 21 * REGBYTES(sp)
80000522:	4b56                	lw	s6,84(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:361
  LREG x23, 22 * REGBYTES(sp)
80000524:	4be6                	lw	s7,88(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:362
  LREG x24, 23 * REGBYTES(sp)
80000526:	4c76                	lw	s8,92(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:363
  LREG x25, 24 * REGBYTES(sp)
80000528:	5c86                	lw	s9,96(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:364
  LREG x26, 25 * REGBYTES(sp)
8000052a:	5d16                	lw	s10,100(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:365
  LREG x27, 26 * REGBYTES(sp)
8000052c:	5da6                	lw	s11,104(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:366
  LREG x28, 27 * REGBYTES(sp)
8000052e:	5e36                	lw	t3,108(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:367
  LREG x29, 28 * REGBYTES(sp)
80000530:	5ec6                	lw	t4,112(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:368
  LREG x30, 29 * REGBYTES(sp)
80000532:	5f56                	lw	t5,116(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:369
  LREG x31, 30 * REGBYTES(sp)
80000534:	5fe6                	lw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:408
  flw	f30, 61*REGBYTES(sp)
  flw	f31, 62*REGBYTES(sp)
  #endif /* __riscv_flen */
  #endif /* MIV_FP_CONTEXT_SAVE */

  addi sp, sp, SP_SHIFT_OFFSET*REGBYTES
80000536:	6109                	addi	sp,sp,128
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:409
  mret
80000538:	30200073          	mret
8000053c:	0000                	unimp
	...

Disassembly of section .text:

80000540 <handle_reset>:
handle_reset():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:418
/* Ensure instructions are not relaxed, since gp is not yet set */
.option push
.option norelax

#ifndef MIV_RV32_V3_0
  csrwi mstatus, 0
80000540:	30005073          	csrwi	mstatus,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:419
  csrwi mie, 0
80000544:	30405073          	csrwi	mie,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:420
  la ra, _start
80000548:	00000097          	auipc	ra,0x0
8000054c:	ab808093          	addi	ra,ra,-1352 # 80000000 <_start>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:424

/* Clearnig this to be on safer side as RTL doesnt seem to clear it on reset. */
#ifndef MIV_LEGACY_RV32
  li t0, MTIMEH_ADDR
80000550:	0200c2b7          	lui	t0,0x200c
80000554:	ffc28293          	addi	t0,t0,-4 # 200bffc <STACK_SIZE+0x200b7fc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:425
  sw x0, 0(t0)
80000558:	0002a023          	sw	zero,0(t0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:428
#endif

  csrr t0, misa
8000055c:	301022f3          	csrr	t0,misa
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:429
  andi t0, t0, A_EXTENSION_MASK
80000560:	0012f293          	andi	t0,t0,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:430
  bnez t0, ima_cores_setup          /* Jump to IMA core handling */
80000564:	02029463          	bnez	t0,8000058c <ima_cores_setup>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:438
/* For MIV_RV32 cores the mtvec exception base address is fixed at Reset vector
   address + 0x4. Check the mode bits. */
/* In the MIV_RV32 v3.1, the MTVEC exception base address is WARL, and can be 
   configured by the user at runtime */

  csrr t0, mtvec
80000568:	305022f3          	csrr	t0,mtvec
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:439
  andi t0, t0, MTVEC_MODE_BIT_MASK
8000056c:	0032f293          	andi	t0,t0,3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:440
  li t1, MTVEC_VECTORED_MODE_VAL
80000570:	4305                	li	t1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:441
  bne t0, t1, ima_cores_setup        /* Jump to IMA core handling */
80000572:	00629d63          	bne	t0,t1,8000058c <ima_cores_setup>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:445

  /* When mode = 1 => this is vectored mode on MIV_RV32 core.
     Verify that the trap_handler address matches the configuration in MTVEC */
  csrr t0, mtvec
80000576:	305022f3          	csrr	t0,mtvec
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:446
  andi t0, t0, 0xFFFFFFFC
8000057a:	ffc2f293          	andi	t0,t0,-4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:447
  la t1, trap_entry
8000057e:	00000317          	auipc	t1,0x0
80000582:	a8630313          	addi	t1,t1,-1402 # 80000004 <trap_entry>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:448
  bne t0, t1, vector_address_not_matching
80000586:	04629663          	bne	t0,t1,800005d2 <vector_address_not_matching>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:449
  j generic_reset_handling
8000058a:	a039                	j	80000598 <generic_reset_handling>

8000058c <ima_cores_setup>:
ima_cores_setup():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:476
  bne t0, t1, vector_address_not_matching
  j generic_reset_handling
#endif /*MIV_RV32_V3_0*/

ima_cores_setup:
  la t0, trap_entry
8000058c:	00000297          	auipc	t0,0x0
80000590:	a7828293          	addi	t0,t0,-1416 # 80000004 <trap_entry>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:482

#ifdef MIV_LEGACY_RV32_VECTORED_INTERRUPTS
  addi t0, t0, 0x01 /* Set the mode bit for IMA cores.
                       For both MIV_RV32 v3.1 and v3.0 cores this is done by configurator. */
#endif
  csrw mtvec, t0
80000594:	30529073          	csrw	mtvec,t0

80000598 <generic_reset_handling>:
generic_reset_handling():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:487

generic_reset_handling:
/* Copy sdata section first so that the gp is set and linker relaxation can be
   used */
    la a4, __sdata_load
80000598:	00007717          	auipc	a4,0x7
8000059c:	f1870713          	addi	a4,a4,-232 # 800074b0 <__sdata_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:488
    la a5, __sdata_start
800005a0:	00007797          	auipc	a5,0x7
800005a4:	f1078793          	addi	a5,a5,-240 # 800074b0 <__sdata_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:489
    la a6, __sdata_end
800005a8:	00007817          	auipc	a6,0x7
800005ac:	f2880813          	addi	a6,a6,-216 # 800074d0 <__data_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:490
    beq a4, a5, 1f     /* Exit if source and dest are same */
800005b0:	00f70863          	beq	a4,a5,800005c0 <generic_reset_handling+0x28>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:491
    beq a5, a6, 1f     /* Exit if section start and end addresses are same */
800005b4:	01078663          	beq	a5,a6,800005c0 <generic_reset_handling+0x28>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:492
    call block_copy
800005b8:	00000097          	auipc	ra,0x0
800005bc:	07e080e7          	jalr	126(ra) # 80000636 <block_copy>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:496

1:
  /* initialize global pointer */
  la gp, __global_pointer$
800005c0:	00007197          	auipc	gp,0x7
800005c4:	6f018193          	addi	gp,gp,1776 # 80007cb0 <__global_pointer$>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:513
  csrw mstatus, t1

  lui t0, 0x0
  fscsr t0
#endif
  call initializations
800005c8:	2031                	jal	800005d4 <initializations>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:515
  /* Initialize stack pointer */
  la sp, __stack_top
800005ca:	5e018113          	addi	sp,gp,1504 # 80008290 <__stack_top>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:518

  /* Jump into C code */
  j _init
800005ce:	5060006f          	j	80000ad4 <_init>

800005d2 <vector_address_not_matching>:
vector_address_not_matching():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:523

/* Error: trap_entry is not at the expected address of reset_vector+mtvec offset
   as configured in the MIV_RV32 core vectored mode */
vector_address_not_matching:
  ebreak
800005d2:	9002                	ebreak

800005d4 <initializations>:
initializations():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:527

initializations:
/* Initialize the .bss section */
    mv t0, ra           /* Store ra for future use */
800005d4:	8286                	mv	t0,ra
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:528
    la  a5, __bss_start
800005d6:	8c018793          	addi	a5,gp,-1856 # 80007570 <__sbss_end>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:529
    la  a6, __bss_end
800005da:	9e018813          	addi	a6,gp,-1568 # 80007690 <__bss_end>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:530
    beq a5, a6, 1f     /* Section start and end address are the same */
800005de:	01078363          	beq	a5,a6,800005e4 <initializations+0x10>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:531
    call zeroize_block
800005e2:	2825                	jal	8000061a <zeroize_block>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:535

1:
/* Initialize the .sbss section */
    la  a5, __sbss_start
800005e4:	82018793          	addi	a5,gp,-2016 # 800074d0 <__data_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:536
    la  a6, __sbss_end
800005e8:	8c018813          	addi	a6,gp,-1856 # 80007570 <__sbss_end>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:537
    beq a5, a6, 1f     /* Section start and end address are the same */
800005ec:	01078a63          	beq	a5,a6,80000600 <initializations+0x2c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:538
    call zeroize_block
800005f0:	202d                	jal	8000061a <zeroize_block>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:541

/* Clear heap */
    la  a5, __heap_start
800005f2:	9e018793          	addi	a5,gp,-1568 # 80007690 <__bss_end>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:542
    la  a6, __heap_end
800005f6:	de018813          	addi	a6,gp,-544 # 80007a90 <__heap_end>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:543
    beq a5, a6, 1f     /* Section start and end address are the same */
800005fa:	01078363          	beq	a5,a6,80000600 <initializations+0x2c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:544
    call zeroize_block
800005fe:	2831                	jal	8000061a <zeroize_block>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:548

1:
/* Copy data section */
    la  a4, __data_load
80000600:	82018713          	addi	a4,gp,-2016 # 800074d0 <__data_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:549
    la  a5, __data_start
80000604:	82018793          	addi	a5,gp,-2016 # 800074d0 <__data_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:550
    la  a6, __data_end
80000608:	82018813          	addi	a6,gp,-2016 # 800074d0 <__data_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:551
    beq a4, a5, 1f     /* Exit early if source and dest are same */
8000060c:	00f70563          	beq	a4,a5,80000616 <initializations+0x42>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:552
    beq a5, a6, 1f     /* Section start and end addresses are the same */
80000610:	01078363          	beq	a5,a6,80000616 <initializations+0x42>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:553
    call block_copy
80000614:	200d                	jal	80000636 <block_copy>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:556

1:
    mv ra, t0           /* Retrieve ra */
80000616:	8096                	mv	ra,t0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:557
    ret
80000618:	8082                	ret

8000061a <zeroize_block>:
zeroize_block():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:560

zeroize_block:
    bltu a6, a5, block_copy_error   /* Error. End address is less than start */
8000061a:	02f86f63          	bltu	a6,a5,80000658 <block_copy_error>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:561
    or a7, a6, a5                   /* Check if start or end is unalined */
8000061e:	00f868b3          	or	a7,a6,a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:562
    andi a7, a7, 0x03u
80000622:	0038f893          	andi	a7,a7,3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:563
    bgtz a7, block_copy_error       /* Unaligned addresses error*/
80000626:	03104963          	bgtz	a7,80000658 <block_copy_error>

8000062a <zeroize_loop>:
zeroize_loop():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:565
zeroize_loop:
    sw x0, 0(a5)
8000062a:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:566
    add a5, a5, __SIZEOF_POINTER__
8000062e:	0791                	addi	a5,a5,4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:567
    blt a5, a6, zeroize_loop
80000630:	ff07cde3          	blt	a5,a6,8000062a <zeroize_loop>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:568
    ret
80000634:	8082                	ret

80000636 <block_copy>:
block_copy():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:571

block_copy:
    bltu a6, a5, block_copy_error   /* Error. End address is less than start */
80000636:	02f86163          	bltu	a6,a5,80000658 <block_copy_error>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:572
    or a7, a6, a5                   /* Check if start or end is unalined */
8000063a:	00f868b3          	or	a7,a6,a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:573
    andi a7, a7, 0x03u
8000063e:	0038f893          	andi	a7,a7,3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:574
    bgtz a7, block_copy_error       /* Unaligned addresses error*/
80000642:	01104b63          	bgtz	a7,80000658 <block_copy_error>

80000646 <block_copy_loop>:
block_copy_loop():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:576
block_copy_loop:
    lw a7, 0(a4)
80000646:	00072883          	lw	a7,0(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:577
    sw a7, 0(a5)
8000064a:	0117a023          	sw	a7,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:578
    addi a5, a5, 0x04
8000064e:	0791                	addi	a5,a5,4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:579
    addi a4, a4, 0x04
80000650:	0711                	addi	a4,a4,4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:580
    blt a5, a6, block_copy_loop
80000652:	ff07cae3          	blt	a5,a6,80000646 <block_copy_loop>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:581
    j block_copy_exit
80000656:	a011                	j	8000065a <block_copy_exit>

80000658 <block_copy_error>:
block_copy_error():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:584

block_copy_error:
    j block_copy_error
80000658:	a001                	j	80000658 <block_copy_error>

8000065a <block_copy_exit>:
block_copy_exit():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_entry.S:587

block_copy_exit:
    ret
8000065a:	8082                	ret

8000065c <MRV_enable_interrupts>:
MRV_enable_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:649

  @return
  This functions returns the CORE_GPR_DED_RESET_REG bit value.
 */
static inline void MRV_enable_interrupts(void)
{
8000065c:	1101                	addi	sp,sp,-32
8000065e:	ce22                	sw	s0,28(sp)
80000660:	1000                	addi	s0,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:650
    set_csr(mstatus, MSTATUS_MIE);
80000662:	300467f3          	csrrsi	a5,mstatus,8
80000666:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:651
}
8000066a:	0001                	nop
8000066c:	4472                	lw	s0,28(sp)
8000066e:	6105                	addi	sp,sp,32
80000670:	8082                	ret

80000672 <MRV_read_mtime>:
MRV_read_mtime():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:717

/***************************************************************************//**
  The MRV_read_mtime() function returns the current MTIME register value.
 */
static inline uint64_t MRV_read_mtime(void)
{
80000672:	1101                	addi	sp,sp,-32
80000674:	ce22                	sw	s0,28(sp)
80000676:	1000                	addi	s0,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:718
    volatile uint32_t hi = 0u;
80000678:	fe042623          	sw	zero,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:719
    volatile uint32_t lo = 0u;
8000067c:	fe042423          	sw	zero,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:724 (discriminator 1)

    /* when mtime lower word is 0xFFFFFFFF, there will be rollover and
     * returned value could be wrong. */
    do {
        hi = MTIMEH;
80000680:	0200c537          	lui	a0,0x200c
80000684:	1571                	addi	a0,a0,-4
80000686:	4108                	lw	a0,0(a0)
80000688:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:725 (discriminator 1)
        lo = MTIME;
8000068c:	0200c537          	lui	a0,0x200c
80000690:	1561                	addi	a0,a0,-8
80000692:	4108                	lw	a0,0(a0)
80000694:	fea42423          	sw	a0,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:726 (discriminator 1)
    } while(hi != MTIMEH);
80000698:	0200c537          	lui	a0,0x200c
8000069c:	1571                	addi	a0,a0,-4
8000069e:	00052883          	lw	a7,0(a0) # 200c000 <STACK_SIZE+0x200b800>
800006a2:	fec42503          	lw	a0,-20(s0)
800006a6:	fca89de3          	bne	a7,a0,80000680 <MRV_read_mtime+0xe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:728

    return((((uint64_t)MTIMEH) << 32u) | lo);
800006aa:	0200c537          	lui	a0,0x200c
800006ae:	1571                	addi	a0,a0,-4
800006b0:	4108                	lw	a0,0(a0)
800006b2:	832a                	mv	t1,a0
800006b4:	4381                	li	t2,0
800006b6:	00031813          	slli	a6,t1,0x0
800006ba:	4781                	li	a5,0
800006bc:	fe842503          	lw	a0,-24(s0)
800006c0:	86aa                	mv	a3,a0
800006c2:	4701                	li	a4,0
800006c4:	00d7e5b3          	or	a1,a5,a3
800006c8:	00e86633          	or	a2,a6,a4
800006cc:	87ae                	mv	a5,a1
800006ce:	8832                	mv	a6,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:729
}
800006d0:	853e                	mv	a0,a5
800006d2:	85c2                	mv	a1,a6
800006d4:	4472                	lw	s0,28(sp)
800006d6:	6105                	addi	sp,sp,32
800006d8:	8082                	ret

800006da <MRV_clear_soft_irq>:
MRV_clear_soft_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:763

  @return
  This function does not return any value.
 */
static inline void MRV_clear_soft_irq(void)
{
800006da:	1141                	addi	sp,sp,-16
800006dc:	c622                	sw	s0,12(sp)
800006de:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:768
#ifdef MIV_LEGACY_RV32
    MSIP = 0x00u;   /* clear soft interrupt */
#else
    /* Clear soft IRQ on MIV_RV32 processor */
    SUBSYS->soft_reg &= ~SUBSYS_SOFT_IRQ;
800006e0:	6799                	lui	a5,0x6
800006e2:	5398                	lw	a4,32(a5)
800006e4:	6799                	lui	a5,0x6
800006e6:	9b75                	andi	a4,a4,-3
800006e8:	d398                	sw	a4,32(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.h:770
#endif
}
800006ea:	0001                	nop
800006ec:	4432                	lw	s0,12(sp)
800006ee:	0141                	addi	sp,sp,16
800006f0:	8082                	ret

800006f2 <MRV_systick_config>:
MRV_systick_config():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:163

/*------------------------------------------------------------------------------
 * Configure the machine timer to generate an interrupt.
 */
uint32_t MRV_systick_config(uint64_t ticks)
{
800006f2:	7139                	addi	sp,sp,-64
800006f4:	de06                	sw	ra,60(sp)
800006f6:	dc22                	sw	s0,56(sp)
800006f8:	da4a                	sw	s2,52(sp)
800006fa:	d84e                	sw	s3,48(sp)
800006fc:	0080                	addi	s0,sp,64
800006fe:	fca42423          	sw	a0,-56(s0)
80000702:	fcb42623          	sw	a1,-52(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:164
    uint32_t ret_val = ERROR;
80000706:	4785                	li	a5,1
80000708:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:165
    uint64_t remainder = ticks;
8000070c:	fc842783          	lw	a5,-56(s0)
80000710:	fcc42803          	lw	a6,-52(s0)
80000714:	fef42023          	sw	a5,-32(s0)
80000718:	ff042223          	sw	a6,-28(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:166
    g_systick_increment = 0U;
8000071c:	82018793          	addi	a5,gp,-2016 # 800074d0 <__data_load>
80000720:	4681                	li	a3,0
80000722:	4701                	li	a4,0
80000724:	c394                	sw	a3,0(a5)
80000726:	c3d8                	sw	a4,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:167
    g_systick_cmp_value = 0U;
80000728:	82818793          	addi	a5,gp,-2008 # 800074d8 <g_systick_cmp_value>
8000072c:	c394                	sw	a3,0(a5)
8000072e:	c3d8                	sw	a4,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:169

    while (remainder >= MTIME_PRESCALER)
80000730:	a085                	j	80000790 <MRV_systick_config+0x9e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:171
    {
        remainder -= MTIME_PRESCALER;
80000732:	020057b7          	lui	a5,0x2005
80000736:	439c                	lw	a5,0(a5)
80000738:	833e                	mv	t1,a5
8000073a:	4381                	li	t2,0
8000073c:	fe042683          	lw	a3,-32(s0)
80000740:	fe442703          	lw	a4,-28(s0)
80000744:	406687b3          	sub	a5,a3,t1
80000748:	863e                	mv	a2,a5
8000074a:	00c6b633          	sltu	a2,a3,a2
8000074e:	40770833          	sub	a6,a4,t2
80000752:	40c80733          	sub	a4,a6,a2
80000756:	883a                	mv	a6,a4
80000758:	fef42023          	sw	a5,-32(s0)
8000075c:	ff042223          	sw	a6,-28(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:172
        g_systick_increment++;
80000760:	82018793          	addi	a5,gp,-2016 # 800074d0 <__data_load>
80000764:	0047a803          	lw	a6,4(a5) # 2005004 <STACK_SIZE+0x2004804>
80000768:	439c                	lw	a5,0(a5)
8000076a:	4585                	li	a1,1
8000076c:	4601                	li	a2,0
8000076e:	00b786b3          	add	a3,a5,a1
80000772:	8536                	mv	a0,a3
80000774:	00f53533          	sltu	a0,a0,a5
80000778:	00c80733          	add	a4,a6,a2
8000077c:	00e507b3          	add	a5,a0,a4
80000780:	873e                	mv	a4,a5
80000782:	87b6                	mv	a5,a3
80000784:	883a                	mv	a6,a4
80000786:	82018713          	addi	a4,gp,-2016 # 800074d0 <__data_load>
8000078a:	c31c                	sw	a5,0(a4)
8000078c:	01072223          	sw	a6,4(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:169
    while (remainder >= MTIME_PRESCALER)
80000790:	020057b7          	lui	a5,0x2005
80000794:	439c                	lw	a5,0(a5)
80000796:	8e3e                	mv	t3,a5
80000798:	4e81                	li	t4,0
8000079a:	fe442783          	lw	a5,-28(s0)
8000079e:	8776                	mv	a4,t4
800007a0:	00e7ec63          	bltu	a5,a4,800007b8 <MRV_systick_config+0xc6>
800007a4:	fe442783          	lw	a5,-28(s0)
800007a8:	8776                	mv	a4,t4
800007aa:	f8e794e3          	bne	a5,a4,80000732 <MRV_systick_config+0x40>
800007ae:	fe042783          	lw	a5,-32(s0)
800007b2:	8772                	mv	a4,t3
800007b4:	f6e7ffe3          	bgeu	a5,a4,80000732 <MRV_systick_config+0x40>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:175
    }

    g_systick_cmp_value = g_systick_increment + MRV_read_mtime();
800007b8:	3d6d                	jal	80000672 <MRV_read_mtime>
800007ba:	86aa                	mv	a3,a0
800007bc:	872e                	mv	a4,a1
800007be:	82018793          	addi	a5,gp,-2016 # 800074d0 <__data_load>
800007c2:	438c                	lw	a1,0(a5)
800007c4:	43d0                	lw	a2,4(a5)
800007c6:	00b687b3          	add	a5,a3,a1
800007ca:	853e                	mv	a0,a5
800007cc:	00d53533          	sltu	a0,a0,a3
800007d0:	00c70833          	add	a6,a4,a2
800007d4:	01050733          	add	a4,a0,a6
800007d8:	883a                	mv	a6,a4
800007da:	82818713          	addi	a4,gp,-2008 # 800074d8 <g_systick_cmp_value>
800007de:	c31c                	sw	a5,0(a4)
800007e0:	01072223          	sw	a6,4(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:177

    if (g_systick_increment > 0U)
800007e4:	82018793          	addi	a5,gp,-2016 # 800074d0 <__data_load>
800007e8:	4394                	lw	a3,0(a5)
800007ea:	43d8                	lw	a4,4(a5)
800007ec:	87b6                	mv	a5,a3
800007ee:	8fd9                	or	a5,a5,a4
800007f0:	c7a1                	beqz	a5,80000838 <MRV_systick_config+0x146>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:179
    {
        WRITE_MTIMECMP(g_systick_cmp_value);
800007f2:	020047b7          	lui	a5,0x2004
800007f6:	0791                	addi	a5,a5,4
800007f8:	577d                	li	a4,-1
800007fa:	c398                	sw	a4,0(a5)
800007fc:	82818793          	addi	a5,gp,-2008 # 800074d8 <g_systick_cmp_value>
80000800:	0047a803          	lw	a6,4(a5) # 2004004 <STACK_SIZE+0x2003804>
80000804:	439c                	lw	a5,0(a5)
80000806:	02004737          	lui	a4,0x2004
8000080a:	c31c                	sw	a5,0(a4)
8000080c:	82818793          	addi	a5,gp,-2008 # 800074d8 <g_systick_cmp_value>
80000810:	0047a803          	lw	a6,4(a5)
80000814:	439c                	lw	a5,0(a5)
80000816:	00085913          	srli	s2,a6,0x0
8000081a:	4981                	li	s3,0
8000081c:	020047b7          	lui	a5,0x2004
80000820:	0791                	addi	a5,a5,4
80000822:	874a                	mv	a4,s2
80000824:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:180
        set_csr(mie, MIP_MTIP);
80000826:	08000793          	li	a5,128
8000082a:	3047a7f3          	csrrs	a5,mie,a5
8000082e:	fcf42e23          	sw	a5,-36(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:181
        MRV_enable_interrupts();
80000832:	352d                	jal	8000065c <MRV_enable_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:182
        ret_val = SUCCESS;
80000834:	fe042623          	sw	zero,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:185
    }

    return ret_val;
80000838:	fec42783          	lw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:186
}
8000083c:	853e                	mv	a0,a5
8000083e:	50f2                	lw	ra,60(sp)
80000840:	5462                	lw	s0,56(sp)
80000842:	5952                	lw	s2,52(sp)
80000844:	59c2                	lw	s3,48(sp)
80000846:	6121                	addi	sp,sp,64
80000848:	8082                	ret

8000084a <handle_m_timer_interrupt>:
handle_m_timer_interrupt():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:192

/*------------------------------------------------------------------------------
 * RISC-V interrupt handler for machine timer interrupts.
 */
void handle_m_timer_interrupt(void)
{
8000084a:	7179                	addi	sp,sp,-48
8000084c:	d606                	sw	ra,44(sp)
8000084e:	d422                	sw	s0,40(sp)
80000850:	d24a                	sw	s2,36(sp)
80000852:	d04e                	sw	s3,32(sp)
80000854:	1800                	addi	s0,sp,48
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:193
    clear_csr(mie, MIP_MTIP);
80000856:	08000793          	li	a5,128
8000085a:	3047b7f3          	csrrc	a5,mie,a5
8000085e:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:195

    uint64_t mtime_at_irq = MRV_read_mtime();
80000862:	3d01                	jal	80000672 <MRV_read_mtime>
80000864:	fea42023          	sw	a0,-32(s0)
80000868:	feb42223          	sw	a1,-28(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:201

#ifndef NDEBUG
    static volatile uint32_t d_tick = 0u;
#endif

    while(g_systick_cmp_value < (mtime_at_irq + MTIME_DELTA)) {
8000086c:	a099                	j	800008b2 <handle_m_timer_interrupt+0x68>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:202
        g_systick_cmp_value = g_systick_cmp_value + g_systick_increment;
8000086e:	82818793          	addi	a5,gp,-2008 # 800074d8 <g_systick_cmp_value>
80000872:	0047a803          	lw	a6,4(a5) # 2004004 <STACK_SIZE+0x2003804>
80000876:	439c                	lw	a5,0(a5)
80000878:	82018713          	addi	a4,gp,-2016 # 800074d0 <__data_load>
8000087c:	430c                	lw	a1,0(a4)
8000087e:	4350                	lw	a2,4(a4)
80000880:	00b786b3          	add	a3,a5,a1
80000884:	8536                	mv	a0,a3
80000886:	00f53533          	sltu	a0,a0,a5
8000088a:	00c80733          	add	a4,a6,a2
8000088e:	00e507b3          	add	a5,a0,a4
80000892:	873e                	mv	a4,a5
80000894:	87b6                	mv	a5,a3
80000896:	883a                	mv	a6,a4
80000898:	82818713          	addi	a4,gp,-2008 # 800074d8 <g_systick_cmp_value>
8000089c:	c31c                	sw	a5,0(a4)
8000089e:	01072223          	sw	a6,4(a4) # 2004004 <STACK_SIZE+0x2003804>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:205

#ifndef NDEBUG
        d_tick += 1;
800008a2:	83018793          	addi	a5,gp,-2000 # 800074e0 <d_tick.2200>
800008a6:	439c                	lw	a5,0(a5)
800008a8:	00178713          	addi	a4,a5,1
800008ac:	83018793          	addi	a5,gp,-2000 # 800074e0 <d_tick.2200>
800008b0:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:201
    while(g_systick_cmp_value < (mtime_at_irq + MTIME_DELTA)) {
800008b2:	fe042783          	lw	a5,-32(s0)
800008b6:	fe442803          	lw	a6,-28(s0)
800008ba:	4595                	li	a1,5
800008bc:	4601                	li	a2,0
800008be:	00b786b3          	add	a3,a5,a1
800008c2:	8536                	mv	a0,a3
800008c4:	00f53533          	sltu	a0,a0,a5
800008c8:	00c80733          	add	a4,a6,a2
800008cc:	00e507b3          	add	a5,a0,a4
800008d0:	873e                	mv	a4,a5
800008d2:	82818793          	addi	a5,gp,-2008 # 800074d8 <g_systick_cmp_value>
800008d6:	0047a803          	lw	a6,4(a5)
800008da:	439c                	lw	a5,0(a5)
800008dc:	85ba                	mv	a1,a4
800008de:	8642                	mv	a2,a6
800008e0:	f8b667e3          	bltu	a2,a1,8000086e <handle_m_timer_interrupt+0x24>
800008e4:	85ba                	mv	a1,a4
800008e6:	8642                	mv	a2,a6
800008e8:	00c59563          	bne	a1,a2,800008f2 <handle_m_timer_interrupt+0xa8>
800008ec:	8736                	mv	a4,a3
800008ee:	f8e7e0e3          	bltu	a5,a4,8000086e <handle_m_timer_interrupt+0x24>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:223
     * If you are running the program using the debugger and halt the CPU at a 
     * breakpoint, MTIME will continue to increment and interrupts will be 
     * missed; resulting in d_tick > 1.
     */

    WRITE_MTIMECMP(g_systick_cmp_value);
800008f2:	020047b7          	lui	a5,0x2004
800008f6:	0791                	addi	a5,a5,4
800008f8:	577d                	li	a4,-1
800008fa:	c398                	sw	a4,0(a5)
800008fc:	82818793          	addi	a5,gp,-2008 # 800074d8 <g_systick_cmp_value>
80000900:	0047a803          	lw	a6,4(a5) # 2004004 <STACK_SIZE+0x2003804>
80000904:	439c                	lw	a5,0(a5)
80000906:	02004737          	lui	a4,0x2004
8000090a:	c31c                	sw	a5,0(a4)
8000090c:	82818793          	addi	a5,gp,-2008 # 800074d8 <g_systick_cmp_value>
80000910:	0047a803          	lw	a6,4(a5)
80000914:	439c                	lw	a5,0(a5)
80000916:	00085913          	srli	s2,a6,0x0
8000091a:	4981                	li	s3,0
8000091c:	020047b7          	lui	a5,0x2004
80000920:	0791                	addi	a5,a5,4
80000922:	874a                	mv	a4,s2
80000924:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:225

    SysTick_Handler();
80000926:	16c060ef          	jal	ra,80006a92 <SysTick_Handler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:227

    set_csr(mie, MIP_MTIP);
8000092a:	08000793          	li	a5,128
8000092e:	3047a7f3          	csrrs	a5,mie,a5
80000932:	fcf42e23          	sw	a5,-36(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:228
}
80000936:	0001                	nop
80000938:	50b2                	lw	ra,44(sp)
8000093a:	5422                	lw	s0,40(sp)
8000093c:	5912                	lw	s2,36(sp)
8000093e:	5982                	lw	s3,32(sp)
80000940:	6145                	addi	sp,sp,48
80000942:	8082                	ret

80000944 <handle_m_soft_interrupt>:
handle_m_soft_interrupt():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:231

void handle_m_soft_interrupt(void)
{
80000944:	1141                	addi	sp,sp,-16
80000946:	c606                	sw	ra,12(sp)
80000948:	c422                	sw	s0,8(sp)
8000094a:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:232
    Software_IRQHandler();
8000094c:	2a45                	jal	80000afc <Software_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:233
    MRV_clear_soft_irq();
8000094e:	3371                	jal	800006da <MRV_clear_soft_irq>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:234
}
80000950:	0001                	nop
80000952:	40b2                	lw	ra,12(sp)
80000954:	4422                	lw	s0,8(sp)
80000956:	0141                	addi	sp,sp,16
80000958:	8082                	ret

8000095a <handle_local_ei_interrupts>:
handle_local_ei_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:305

/*------------------------------------------------------------------------------
 * Jump to interrupt table containing local interrupts
 */
void handle_local_ei_interrupts(uint8_t irq_no)
{
8000095a:	7139                	addi	sp,sp,-64
8000095c:	de06                	sw	ra,60(sp)
8000095e:	dc22                	sw	s0,56(sp)
80000960:	0080                	addi	s0,sp,64
80000962:	87aa                	mv	a5,a0
80000964:	fcf407a3          	sb	a5,-49(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:306
    uint64_t mhart_id = read_csr(mhartid);
80000968:	f14027f3          	csrr	a5,mhartid
8000096c:	fef42623          	sw	a5,-20(s0)
80000970:	fec42783          	lw	a5,-20(s0)
80000974:	fef42023          	sw	a5,-32(s0)
80000978:	fe042223          	sw	zero,-28(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:307
    ASSERT(irq_no <= MIV_LOCAL_IRQ_MAX)
8000097c:	fcf44703          	lbu	a4,-49(s0)
80000980:	47fd                	li	a5,31
80000982:	00e7f363          	bgeu	a5,a4,80000988 <handle_local_ei_interrupts+0x2e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:307 (discriminator 1)
80000986:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:308
    ASSERT(irq_no >= MIV_LOCAL_IRQ_MIN)
80000988:	fcf44703          	lbu	a4,-49(s0)
8000098c:	47bd                	li	a5,15
8000098e:	00e7e363          	bltu	a5,a4,80000994 <handle_local_ei_interrupts+0x3a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:308 (discriminator 1)
80000992:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:310

    uint8_t ei_no = (uint8_t)(irq_no - MIV_LOCAL_IRQ_MIN);
80000994:	fcf44783          	lbu	a5,-49(s0)
80000998:	17c1                	addi	a5,a5,-16
8000099a:	fcf40fa3          	sb	a5,-33(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:311
    (*local_irq_handler_table[ei_no])();
8000099e:	fdf44783          	lbu	a5,-33(s0)
800009a2:	00006717          	auipc	a4,0x6
800009a6:	68e70713          	addi	a4,a4,1678 # 80007030 <local_irq_handler_table>
800009aa:	078a                	slli	a5,a5,0x2
800009ac:	97ba                	add	a5,a5,a4
800009ae:	439c                	lw	a5,0(a5)
800009b0:	9782                	jalr	a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:312
}
800009b2:	0001                	nop
800009b4:	50f2                	lw	ra,60(sp)
800009b6:	5462                	lw	s0,56(sp)
800009b8:	6121                	addi	sp,sp,64
800009ba:	8082                	ret

800009bc <handle_trap>:
handle_trap():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:320

/*------------------------------------------------------------------------------
 * Trap handler. This function is invoked in the non-vectored mode.
 */
void handle_trap(uintptr_t mcause, uintptr_t mepc)
{   
800009bc:	711d                	addi	sp,sp,-96
800009be:	ce86                	sw	ra,92(sp)
800009c0:	cca2                	sw	s0,88(sp)
800009c2:	1080                	addi	s0,sp,96
800009c4:	faa42623          	sw	a0,-84(s0)
800009c8:	fab42423          	sw	a1,-88(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:321
    uint64_t is_interrupt = mcause & MCAUSE_INT;
800009cc:	fac42703          	lw	a4,-84(s0)
800009d0:	87ba                	mv	a5,a4
800009d2:	4801                	li	a6,0
800009d4:	80000737          	lui	a4,0x80000
800009d8:	8f7d                	and	a4,a4,a5
800009da:	fee42423          	sw	a4,-24(s0)
800009de:	00087793          	andi	a5,a6,0
800009e2:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:323

    if (is_interrupt)
800009e6:	fe842783          	lw	a5,-24(s0)
800009ea:	fec42703          	lw	a4,-20(s0)
800009ee:	8fd9                	or	a5,a5,a4
800009f0:	cfa5                	beqz	a5,80000a68 <handle_trap+0xac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:326
    {
#ifndef MIV_LEGACY_RV32
        if (((mcause & MCAUSE_CAUSE) >= MIV_LOCAL_IRQ_MIN) && ((mcause & MCAUSE_CAUSE) <= MIV_LOCAL_IRQ_MAX))
800009f2:	fac42703          	lw	a4,-84(s0)
800009f6:	800007b7          	lui	a5,0x80000
800009fa:	ff07c793          	xori	a5,a5,-16
800009fe:	8ff9                	and	a5,a5,a4
80000a00:	c385                	beqz	a5,80000a20 <handle_trap+0x64>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:326 (discriminator 1)
80000a02:	fac42703          	lw	a4,-84(s0)
80000a06:	800007b7          	lui	a5,0x80000
80000a0a:	fe07c793          	xori	a5,a5,-32
80000a0e:	8ff9                	and	a5,a5,a4
80000a10:	eb81                	bnez	a5,80000a20 <handle_trap+0x64>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:328
        {
            handle_local_ei_interrupts((uint8_t)(mcause & MCAUSE_CAUSE));
80000a12:	fac42783          	lw	a5,-84(s0)
80000a16:	0ff7f793          	andi	a5,a5,255
80000a1a:	853e                	mv	a0,a5
80000a1c:	3f3d                	jal	8000095a <handle_local_ei_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:405
        __asm__("ebreak");
#else
        _exit(1 + mcause);
#endif  /* NDEBUG */
    }
}
80000a1e:	a075                	j	80000aca <handle_trap+0x10e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:330
        else if ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT)
80000a20:	fac42703          	lw	a4,-84(s0)
80000a24:	800007b7          	lui	a5,0x80000
80000a28:	fff7c793          	not	a5,a5
80000a2c:	8f7d                	and	a4,a4,a5
80000a2e:	47ad                	li	a5,11
80000a30:	00f71463          	bne	a4,a5,80000a38 <handle_trap+0x7c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:336
            External_IRQHandler();
80000a34:	28d1                	jal	80000b08 <External_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:405
}
80000a36:	a851                	j	80000aca <handle_trap+0x10e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:341
        else if ((mcause & MCAUSE_CAUSE) == IRQ_M_SOFT)
80000a38:	fac42703          	lw	a4,-84(s0)
80000a3c:	800007b7          	lui	a5,0x80000
80000a40:	fff7c793          	not	a5,a5
80000a44:	8f7d                	and	a4,a4,a5
80000a46:	478d                	li	a5,3
80000a48:	00f71463          	bne	a4,a5,80000a50 <handle_trap+0x94>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:343
            handle_m_soft_interrupt();
80000a4c:	3de5                	jal	80000944 <handle_m_soft_interrupt>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:405
}
80000a4e:	a8b5                	j	80000aca <handle_trap+0x10e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:345
        else if ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)
80000a50:	fac42703          	lw	a4,-84(s0)
80000a54:	800007b7          	lui	a5,0x80000
80000a58:	fff7c793          	not	a5,a5
80000a5c:	8f7d                	and	a4,a4,a5
80000a5e:	479d                	li	a5,7
80000a60:	06f71563          	bne	a4,a5,80000aca <handle_trap+0x10e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:347
            handle_m_timer_interrupt();
80000a64:	33dd                	jal	8000084a <handle_m_timer_interrupt>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:405
}
80000a66:	a095                	j	80000aca <handle_trap+0x10e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:382
         uintptr_t mip      = read_csr(mip);
80000a68:	344027f3          	csrr	a5,mip
80000a6c:	fef42223          	sw	a5,-28(s0)
80000a70:	fe442783          	lw	a5,-28(s0)
80000a74:	fef42023          	sw	a5,-32(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:385
         uintptr_t mtval = read_csr(mtval);
80000a78:	343027f3          	csrr	a5,mtval
80000a7c:	fcf42e23          	sw	a5,-36(s0)
80000a80:	fdc42783          	lw	a5,-36(s0)
80000a84:	fcf42c23          	sw	a5,-40(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:388
         uintptr_t mtvec    = read_csr(mtvec);
80000a88:	305027f3          	csrr	a5,mtvec
80000a8c:	fcf42a23          	sw	a5,-44(s0)
80000a90:	fd442783          	lw	a5,-44(s0)
80000a94:	fcf42823          	sw	a5,-48(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:391
         uintptr_t mscratch = read_csr(mscratch);
80000a98:	340027f3          	csrr	a5,mscratch
80000a9c:	fcf42623          	sw	a5,-52(s0)
80000aa0:	fcc42783          	lw	a5,-52(s0)
80000aa4:	fcf42423          	sw	a5,-56(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:394
         uintptr_t mstatus  = read_csr(mstatus);
80000aa8:	300027f3          	csrr	a5,mstatus
80000aac:	fcf42223          	sw	a5,-60(s0)
80000ab0:	fc442783          	lw	a5,-60(s0)
80000ab4:	fcf42023          	sw	a5,-64(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:397
         uintptr_t mmepc  = read_csr(mepc);
80000ab8:	341027f3          	csrr	a5,mepc
80000abc:	faf42e23          	sw	a5,-68(s0)
80000ac0:	fbc42783          	lw	a5,-68(s0)
80000ac4:	faf42c23          	sw	a5,-72(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:400
        __asm__("ebreak");
80000ac8:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_hal.c:405
}
80000aca:	0001                	nop
80000acc:	40f6                	lw	ra,92(sp)
80000ace:	4466                	lw	s0,88(sp)
80000ad0:	6125                	addi	sp,sp,96
80000ad2:	8082                	ret

80000ad4 <_init>:
_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_init.c:21
#endif

extern int main(void);

void _init(void)
{
80000ad4:	1101                	addi	sp,sp,-32
80000ad6:	ce06                	sw	ra,28(sp)
80000ad8:	cc22                	sw	s0,24(sp)
80000ada:	1000                	addi	s0,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_init.c:27
    /* This function is a placeholder for the case where some more hardware
     * specific initializations are required before jumping into the application
     * code. You can implement it here. */

    /* Jump to the application code after all initializations are completed */
    int code = 0;
80000adc:	fe042623          	sw	zero,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_init.c:29

    code = main();
80000ae0:	06c060ef          	jal	ra,80006b4c <main>
80000ae4:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_init.c:30
    _exit(code);
80000ae8:	fec42503          	lw	a0,-20(s0)
80000aec:	28c1                	jal	80000bbc <_exit>

80000aee <_fini>:
_fini():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_init.c:36
}

/* Function called after main() finishes */
void
_fini(void)
{
80000aee:	1141                	addi	sp,sp,-16
80000af0:	c622                	sw	s0,12(sp)
80000af2:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_init.c:37
}
80000af4:	0001                	nop
80000af6:	4432                	lw	s0,12(sp)
80000af8:	0141                	addi	sp,sp,16
80000afa:	8082                	ret

80000afc <Software_IRQHandler>:
Software_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:23
#ifdef __cplusplus
extern "C" {
#endif

__attribute__((weak)) void Software_IRQHandler(void)
{
80000afc:	1141                	addi	sp,sp,-16
80000afe:	c606                	sw	ra,12(sp)
80000b00:	c422                	sw	s0,8(sp)
80000b02:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:24
    _exit(10);
80000b04:	4529                	li	a0,10
80000b06:	285d                	jal	80000bbc <_exit>

80000b08 <External_IRQHandler>:
External_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:195
    return(0U); /* Default handler */
}

#else
__attribute__((weak)) void External_IRQHandler(void)
{
80000b08:	1141                	addi	sp,sp,-16
80000b0a:	c622                	sw	s0,12(sp)
80000b0c:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:196
}
80000b0e:	0001                	nop
80000b10:	4432                	lw	s0,12(sp)
80000b12:	0141                	addi	sp,sp,16
80000b14:	8082                	ret

80000b16 <MGECI_IRQHandler>:
MGECI_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:198
__attribute__((weak)) void MGECI_IRQHandler(void)
{
80000b16:	1141                	addi	sp,sp,-16
80000b18:	c622                	sw	s0,12(sp)
80000b1a:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:199
}
80000b1c:	0001                	nop
80000b1e:	4432                	lw	s0,12(sp)
80000b20:	0141                	addi	sp,sp,16
80000b22:	8082                	ret

80000b24 <MGEUI_IRQHandler>:
MGEUI_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:201
__attribute__((weak)) void MGEUI_IRQHandler(void)
{
80000b24:	1141                	addi	sp,sp,-16
80000b26:	c622                	sw	s0,12(sp)
80000b28:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:202
}
80000b2a:	0001                	nop
80000b2c:	4432                	lw	s0,12(sp)
80000b2e:	0141                	addi	sp,sp,16
80000b30:	8082                	ret

80000b32 <SUBSYS_IRQHandler>:
SUBSYS_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:204
__attribute__((weak)) void SUBSYS_IRQHandler(void)
{
80000b32:	1141                	addi	sp,sp,-16
80000b34:	c622                	sw	s0,12(sp)
80000b36:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:205
}
80000b38:	0001                	nop
80000b3a:	4432                	lw	s0,12(sp)
80000b3c:	0141                	addi	sp,sp,16
80000b3e:	8082                	ret

80000b40 <MSYS_EI1_IRQHandler>:
MSYS_EI1_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:210
__attribute__((weak)) void MSYS_EI0_IRQHandler(void)
{
}
__attribute__((weak)) void MSYS_EI1_IRQHandler(void)
{
80000b40:	1141                	addi	sp,sp,-16
80000b42:	c622                	sw	s0,12(sp)
80000b44:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:211
}
80000b46:	0001                	nop
80000b48:	4432                	lw	s0,12(sp)
80000b4a:	0141                	addi	sp,sp,16
80000b4c:	8082                	ret

80000b4e <MSYS_EI2_IRQHandler>:
MSYS_EI2_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:213
__attribute__((weak)) void MSYS_EI2_IRQHandler(void)
{
80000b4e:	1141                	addi	sp,sp,-16
80000b50:	c622                	sw	s0,12(sp)
80000b52:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:214
}
80000b54:	0001                	nop
80000b56:	4432                	lw	s0,12(sp)
80000b58:	0141                	addi	sp,sp,16
80000b5a:	8082                	ret

80000b5c <MSYS_EI3_IRQHandler>:
MSYS_EI3_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:216
__attribute__((weak)) void MSYS_EI3_IRQHandler(void)
{
80000b5c:	1141                	addi	sp,sp,-16
80000b5e:	c622                	sw	s0,12(sp)
80000b60:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:217
}
80000b62:	0001                	nop
80000b64:	4432                	lw	s0,12(sp)
80000b66:	0141                	addi	sp,sp,16
80000b68:	8082                	ret

80000b6a <MSYS_EI4_IRQHandler>:
MSYS_EI4_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:219
__attribute__((weak)) void MSYS_EI4_IRQHandler(void)
{
80000b6a:	1141                	addi	sp,sp,-16
80000b6c:	c622                	sw	s0,12(sp)
80000b6e:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:220
}
80000b70:	0001                	nop
80000b72:	4432                	lw	s0,12(sp)
80000b74:	0141                	addi	sp,sp,16
80000b76:	8082                	ret

80000b78 <MSYS_EI5_IRQHandler>:
MSYS_EI5_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:222
__attribute__((weak)) void MSYS_EI5_IRQHandler(void)
{
80000b78:	1141                	addi	sp,sp,-16
80000b7a:	c622                	sw	s0,12(sp)
80000b7c:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:223
}
80000b7e:	0001                	nop
80000b80:	4432                	lw	s0,12(sp)
80000b82:	0141                	addi	sp,sp,16
80000b84:	8082                	ret

80000b86 <Reserved_IRQHandler>:
Reserved_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:225
__attribute__((weak)) void Reserved_IRQHandler(void)
{
80000b86:	1141                	addi	sp,sp,-16
80000b88:	c606                	sw	ra,12(sp)
80000b8a:	c422                	sw	s0,8(sp)
80000b8c:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:226
    _exit(10);
80000b8e:	4529                	li	a0,10
80000b90:	2035                	jal	80000bbc <_exit>

80000b92 <MSYS_EI6_IRQHandler>:
MSYS_EI6_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:230
}
#ifndef MIV_RV32_V3_0 /* For MIV_RV32 v3.0 */
__attribute__((weak)) void MSYS_EI6_IRQHandler(void)
{
80000b92:	1141                	addi	sp,sp,-16
80000b94:	c622                	sw	s0,12(sp)
80000b96:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:231
}
80000b98:	0001                	nop
80000b9a:	4432                	lw	s0,12(sp)
80000b9c:	0141                	addi	sp,sp,16
80000b9e:	8082                	ret

80000ba0 <MSYS_EI7_IRQHandler>:
MSYS_EI7_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:233
__attribute__((weak)) void MSYS_EI7_IRQHandler(void)
{
80000ba0:	1141                	addi	sp,sp,-16
80000ba2:	c622                	sw	s0,12(sp)
80000ba4:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:234
}
80000ba6:	0001                	nop
80000ba8:	4432                	lw	s0,12(sp)
80000baa:	0141                	addi	sp,sp,16
80000bac:	8082                	ret

80000bae <SUBSYSR_IRQHandler>:
SUBSYSR_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:236
__attribute__((weak)) void SUBSYSR_IRQHandler(void)
{
80000bae:	1141                	addi	sp,sp,-16
80000bb0:	c622                	sw	s0,12(sp)
80000bb2:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:237
}
80000bb4:	0001                	nop
80000bb6:	4432                	lw	s0,12(sp)
80000bb8:	0141                	addi	sp,sp,16
80000bba:	8082                	ret

80000bbc <_exit>:
_exit():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_syscall.c:142
#ifdef GDB_TESTING
void __attribute__((optimize("O0"))) _exit(int code)
#else
void _exit(int code)
#endif
{
80000bbc:	1101                	addi	sp,sp,-32
80000bbe:	ce22                	sw	s0,28(sp)
80000bc0:	1000                	addi	s0,sp,32
80000bc2:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/miv_rv32_hal/miv_rv32_syscall.c:150 (discriminator 1)

    write(STDERR_FILENO, message, strlen(message));
    write_hex(STDERR_FILENO, code);
#endif

    while (1){};
80000bc6:	a001                	j	80000bc6 <_exit+0xa>

80000bc8 <MRV_enable_interrupts>:
MRV_enable_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:649

  @return
  This functions returns the CORE_GPR_DED_RESET_REG bit value.
 */
static inline void MRV_enable_interrupts(void)
{
80000bc8:	1101                	addi	sp,sp,-32
80000bca:	ce22                	sw	s0,28(sp)
80000bcc:	1000                	addi	s0,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:650
    set_csr(mstatus, MSTATUS_MIE);
80000bce:	300467f3          	csrrsi	a5,mstatus,8
80000bd2:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:651
}
80000bd6:	0001                	nop
80000bd8:	4472                	lw	s0,28(sp)
80000bda:	6105                	addi	sp,sp,32
80000bdc:	8082                	ret

80000bde <MRV_disable_interrupts>:
MRV_disable_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:663

  @return
  This functions returns the CORE_GPR_DED_RESET_REG bit value.
 */
static inline void MRV_disable_interrupts(void)
{
80000bde:	1101                	addi	sp,sp,-32
80000be0:	ce22                	sw	s0,28(sp)
80000be2:	1000                	addi	s0,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:664
    clear_csr(mstatus, MSTATUS_MPIE);
80000be4:	08000793          	li	a5,128
80000be8:	3007b7f3          	csrrc	a5,mstatus,a5
80000bec:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:665
    clear_csr(mstatus, MSTATUS_MIE);
80000bf0:	300477f3          	csrrci	a5,mstatus,8
80000bf4:	fef42423          	sw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:666
}
80000bf8:	0001                	nop
80000bfa:	4472                	lw	s0,28(sp)
80000bfc:	6105                	addi	sp,sp,32
80000bfe:	8082                	ret

80000c00 <HAL_enable_interrupts>:
HAL_enable_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hal_irq.c:22
#endif

/*------------------------------------------------------------------------------
 * 
 */
void HAL_enable_interrupts(void) {
80000c00:	1141                	addi	sp,sp,-16
80000c02:	c606                	sw	ra,12(sp)
80000c04:	c422                	sw	s0,8(sp)
80000c06:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hal_irq.c:23
    MRV_enable_interrupts();
80000c08:	37c1                	jal	80000bc8 <MRV_enable_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hal_irq.c:24
}
80000c0a:	0001                	nop
80000c0c:	40b2                	lw	ra,12(sp)
80000c0e:	4422                	lw	s0,8(sp)
80000c10:	0141                	addi	sp,sp,16
80000c12:	8082                	ret

80000c14 <HAL_disable_interrupts>:
HAL_disable_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hal_irq.c:29

/*------------------------------------------------------------------------------
 * 
 */
psr_t HAL_disable_interrupts(void) {
80000c14:	1101                	addi	sp,sp,-32
80000c16:	ce06                	sw	ra,28(sp)
80000c18:	cc22                	sw	s0,24(sp)
80000c1a:	1000                	addi	s0,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hal_irq.c:31
    psr_t psr;
    psr = read_csr(mstatus);
80000c1c:	300027f3          	csrr	a5,mstatus
80000c20:	fef42623          	sw	a5,-20(s0)
80000c24:	fec42783          	lw	a5,-20(s0)
80000c28:	fef42423          	sw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hal_irq.c:32
    MRV_disable_interrupts();
80000c2c:	3f4d                	jal	80000bde <MRV_disable_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hal_irq.c:33
    return(psr);
80000c2e:	fe842783          	lw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hal_irq.c:34
}
80000c32:	853e                	mv	a0,a5
80000c34:	40f2                	lw	ra,28(sp)
80000c36:	4462                	lw	s0,24(sp)
80000c38:	6105                	addi	sp,sp,32
80000c3a:	8082                	ret

80000c3c <HAL_restore_interrupts>:
HAL_restore_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hal_irq.c:39

/*------------------------------------------------------------------------------
 * 
 */
void HAL_restore_interrupts(psr_t saved_psr) {
80000c3c:	1101                	addi	sp,sp,-32
80000c3e:	ce22                	sw	s0,28(sp)
80000c40:	1000                	addi	s0,sp,32
80000c42:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hal_irq.c:40
    write_csr(mstatus, saved_psr);
80000c46:	fec42783          	lw	a5,-20(s0)
80000c4a:	30079073          	csrw	mstatus,a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hal_irq.c:41
}
80000c4e:	0001                	nop
80000c50:	4472                	lw	s0,28(sp)
80000c52:	6105                	addi	sp,sp,32
80000c54:	8082                	ret

80000c56 <HW_set_32bit_reg>:
HW_set_32bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:39
 *
 * a0:   addr_t reg_addr
 * a1:   uint32_t value
 */
HW_set_32bit_reg:
    sw a1, 0(a0)
80000c56:	c10c                	sw	a1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:40
    ret
80000c58:	8082                	ret

80000c5a <HW_get_32bit_reg>:
HW_get_32bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:51
 * a0:   addr_t reg_addr

 * @return          32 bits value read from the peripheral register.
 */
HW_get_32bit_reg:
    lw a0, 0(a0)
80000c5a:	4108                	lw	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:52
    ret
80000c5c:	8082                	ret

80000c5e <HW_set_32bit_reg_field>:
HW_set_32bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:64
 * a1:   int_fast8_t shift
 * a2:   uint32_t mask
 * a3:   uint32_t value
 */
HW_set_32bit_reg_field:
    mv t3, a3
80000c5e:	8e36                	mv	t3,a3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:65
    sll t3, t3, a1
80000c60:	00be1e33          	sll	t3,t3,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:66
    and  t3, t3, a2
80000c64:	00ce7e33          	and	t3,t3,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:67
    lw t1, 0(a0)
80000c68:	00052303          	lw	t1,0(a0) # 200c000 <STACK_SIZE+0x200b800>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:68
    mv t2, a2
80000c6c:	83b2                	mv	t2,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:69
    not t2, t2
80000c6e:	fff3c393          	not	t2,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:70
    and t1, t1, t2
80000c72:	00737333          	and	t1,t1,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:71
    or t1, t1, t3
80000c76:	01c36333          	or	t1,t1,t3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:72
    sw t1, 0(a0)
80000c7a:	00652023          	sw	t1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:73
    ret
80000c7e:	8082                	ret

80000c80 <HW_get_32bit_reg_field>:
HW_get_32bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:87
 *
 * @return          32 bits value containing the register field value specified
 *                  as parameter.
 */
HW_get_32bit_reg_field:
    lw a0, 0(a0)
80000c80:	4108                	lw	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:88
    and a0, a0, a2
80000c82:	8d71                	and	a0,a0,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:89
    srl a0, a0, a1
80000c84:	00b55533          	srl	a0,a0,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:90
    ret
80000c88:	8082                	ret

80000c8a <HW_set_16bit_reg>:
HW_set_16bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:100
 *
 * a0:   addr_t reg_addr
 * a1:   uint_fast16_t value
 */
HW_set_16bit_reg:
    sh a1, 0(a0)
80000c8a:	00b51023          	sh	a1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:101
    ret
80000c8e:	8082                	ret

80000c90 <HW_get_16bit_reg>:
HW_get_16bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:112
 * a0:   addr_t reg_addr

 * @return          16 bits value read from the peripheral register.
 */
HW_get_16bit_reg:
    lh a0, (a0)
80000c90:	00051503          	lh	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:113
    ret
80000c94:	8082                	ret

80000c96 <HW_set_16bit_reg_field>:
HW_set_16bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:126
 * a2:   uint_fast16_t mask
 * a3:   uint_fast16_t value
 * @param value     Value to be written in the specified field.
 */
HW_set_16bit_reg_field:
    mv t3, a3
80000c96:	8e36                	mv	t3,a3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:127
    sll t3, t3, a1
80000c98:	00be1e33          	sll	t3,t3,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:128
    and  t3, t3, a2
80000c9c:	00ce7e33          	and	t3,t3,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:129
    lh t1, 0(a0)
80000ca0:	00051303          	lh	t1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:130
    mv t2, a2
80000ca4:	83b2                	mv	t2,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:131
    not t2, t2
80000ca6:	fff3c393          	not	t2,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:132
    and t1, t1, t2
80000caa:	00737333          	and	t1,t1,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:133
    or t1, t1, t3
80000cae:	01c36333          	or	t1,t1,t3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:134
    sh t1, 0(a0)
80000cb2:	00651023          	sh	t1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:135
    ret
80000cb6:	8082                	ret

80000cb8 <HW_get_16bit_reg_field>:
HW_get_16bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:149
 *
 * @return          16 bits value containing the register field value specified
 *                  as parameter.
 */
HW_get_16bit_reg_field:
    lh a0, 0(a0)
80000cb8:	00051503          	lh	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:150
    and a0, a0, a2
80000cbc:	8d71                	and	a0,a0,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:151
    srl a0, a0, a1
80000cbe:	00b55533          	srl	a0,a0,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:152
    ret
80000cc2:	8082                	ret

80000cc4 <HW_set_8bit_reg>:
HW_set_8bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:162
 *
 * a0:   addr_t reg_addr
 * a1:   uint_fast8_t value
 */
HW_set_8bit_reg:
    sb a1, 0(a0)
80000cc4:	00b50023          	sb	a1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:163
    ret
80000cc8:	8082                	ret

80000cca <HW_get_8bit_reg>:
HW_get_8bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:174
 * a0:   addr_t reg_addr

 * @return          8 bits value read from the peripheral register.
 */
HW_get_8bit_reg:
    lb a0, 0(a0)
80000cca:	00050503          	lb	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:175
    ret
80000cce:	8082                	ret

80000cd0 <HW_set_8bit_reg_field>:
HW_set_8bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:187
 * a1:   int_fast8_t shift
 * a2:   uint_fast8_t mask
 * a3:   uint_fast8_t value
 */
HW_set_8bit_reg_field:
    mv t3, a3
80000cd0:	8e36                	mv	t3,a3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:188
    sll t3, t3, a1
80000cd2:	00be1e33          	sll	t3,t3,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:189
    and  t3, t3, a2
80000cd6:	00ce7e33          	and	t3,t3,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:190
    lb t1, 0(a0)
80000cda:	00050303          	lb	t1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:191
    mv t2, a2
80000cde:	83b2                	mv	t2,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:192
    not t2, t2
80000ce0:	fff3c393          	not	t2,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:193
    and t1, t1, t2
80000ce4:	00737333          	and	t1,t1,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:194
    or t1, t1, t3
80000ce8:	01c36333          	or	t1,t1,t3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:195
    sb t1, 0(a0)
80000cec:	00650023          	sb	t1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:196
    ret
80000cf0:	8082                	ret

80000cf2 <HW_get_8bit_reg_field>:
HW_get_8bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:210
 *
 * @return          8 bits value containing the register field value specified
 *                  as parameter.
 */
HW_get_8bit_reg_field:
    lb a0, 0(a0)
80000cf2:	00050503          	lb	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:211
    and a0, a0, a2
80000cf6:	8d71                	and	a0,a0,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:212
    srl a0, a0, a1
80000cf8:	00b55533          	srl	a0,a0,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/hal/hw_reg_access.S:213
    ret
80000cfc:	8082                	ret

80000cfe <UART_init>:
UART_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:46
    UART_instance_t * this_uart,
    addr_t base_addr,
    uint16_t baud_value,
    uint8_t line_config
)
{
80000cfe:	7179                	addi	sp,sp,-48
80000d00:	d606                	sw	ra,44(sp)
80000d02:	d422                	sw	s0,40(sp)
80000d04:	1800                	addi	s0,sp,48
80000d06:	fca42e23          	sw	a0,-36(s0)
80000d0a:	fcb42c23          	sw	a1,-40(s0)
80000d0e:	87b2                	mv	a5,a2
80000d10:	8736                	mv	a4,a3
80000d12:	fcf41b23          	sh	a5,-42(s0)
80000d16:	87ba                	mv	a5,a4
80000d18:	fcf40aa3          	sb	a5,-43(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:49
    uint8_t rx_full;
    
    HAL_ASSERT( this_uart != NULL_INSTANCE )
80000d1c:	fdc42783          	lw	a5,-36(s0)
80000d20:	e391                	bnez	a5,80000d24 <UART_init+0x26>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:49 (discriminator 1)
80000d22:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:50
    HAL_ASSERT( line_config <= MAX_LINE_CONFIG )
80000d24:	fd544703          	lbu	a4,-43(s0)
80000d28:	479d                	li	a5,7
80000d2a:	00e7f363          	bgeu	a5,a4,80000d30 <UART_init+0x32>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:50 (discriminator 1)
80000d2e:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:51
    HAL_ASSERT( baud_value <= MAX_BAUD_VALUE )
80000d30:	fd645703          	lhu	a4,-42(s0)
80000d34:	6789                	lui	a5,0x2
80000d36:	00f76363          	bltu	a4,a5,80000d3c <UART_init+0x3e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:51 (discriminator 1)
80000d3a:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:53

    if( ( this_uart != NULL_INSTANCE ) &&
80000d3c:	fdc42783          	lw	a5,-36(s0)
80000d40:	10078463          	beqz	a5,80000e48 <UART_init+0x14a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:53 (discriminator 1)
80000d44:	fd544703          	lbu	a4,-43(s0)
80000d48:	479d                	li	a5,7
80000d4a:	0ee7ef63          	bltu	a5,a4,80000e48 <UART_init+0x14a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:54
        ( line_config <= MAX_LINE_CONFIG ) &&
80000d4e:	fd645703          	lhu	a4,-42(s0)
80000d52:	6789                	lui	a5,0x2
80000d54:	0ef77a63          	bgeu	a4,a5,80000e48 <UART_init+0x14a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:60
        ( baud_value <= MAX_BAUD_VALUE ) )
    {
        /*
         * Store lower 8-bits of baud value in CTRL1.
         */
        HAL_set_8bit_reg( base_addr, CTRL1, (uint_fast8_t)(baud_value &
80000d58:	fd842783          	lw	a5,-40(s0)
80000d5c:	00878713          	addi	a4,a5,8 # 2008 <STACK_SIZE+0x1808>
80000d60:	fd645783          	lhu	a5,-42(s0)
80000d64:	0ff7f793          	andi	a5,a5,255
80000d68:	85be                	mv	a1,a5
80000d6a:	853a                	mv	a0,a4
80000d6c:	3fa1                	jal	80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:67
    
        /*
         * Extract higher 5-bits of baud value and store in higher 5-bits 
         * of CTRL2, along with line configuration in lower 3 three bits.
         */
        HAL_set_8bit_reg( base_addr, CTRL2, (uint_fast8_t)line_config | 
80000d6e:	fd842783          	lw	a5,-40(s0)
80000d72:	00c78693          	addi	a3,a5,12
80000d76:	fd544703          	lbu	a4,-43(s0)
80000d7a:	fd645783          	lhu	a5,-42(s0)
80000d7e:	8795                	srai	a5,a5,0x5
80000d80:	7f87f793          	andi	a5,a5,2040
80000d84:	8fd9                	or	a5,a5,a4
80000d86:	85be                	mv	a1,a5
80000d88:	8536                	mv	a0,a3
80000d8a:	3f2d                	jal	80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:71
                                           (uint_fast8_t)((baud_value &
                                   BAUDVALUE_MSB) >> BAUDVALUE_SHIFT ) );
    
        this_uart->base_address = base_addr;
80000d8c:	fdc42783          	lw	a5,-36(s0)
80000d90:	fd842703          	lw	a4,-40(s0)
80000d94:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:77
#ifndef NDEBUG
        {
            uint8_t  config;
            uint8_t  temp;
            uint16_t baud_val;
            baud_val = HAL_get_8bit_reg( this_uart->base_address, CTRL1 );
80000d96:	fdc42783          	lw	a5,-36(s0)
80000d9a:	439c                	lw	a5,0(a5)
80000d9c:	07a1                	addi	a5,a5,8
80000d9e:	853e                	mv	a0,a5
80000da0:	372d                	jal	80000cca <HW_get_8bit_reg>
80000da2:	87aa                	mv	a5,a0
80000da4:	fef41623          	sh	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:78
            config =  HAL_get_8bit_reg( this_uart->base_address, CTRL2 );
80000da8:	fdc42783          	lw	a5,-36(s0)
80000dac:	439c                	lw	a5,0(a5)
80000dae:	07b1                	addi	a5,a5,12
80000db0:	853e                	mv	a0,a5
80000db2:	3f21                	jal	80000cca <HW_get_8bit_reg>
80000db4:	87aa                	mv	a5,a0
80000db6:	fef405a3          	sb	a5,-21(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:82
            /*
             * To resolve operator precedence between & and <<
             */
            temp =  ( config  &  (uint8_t)(CTRL2_BAUDVALUE_MASK ) );
80000dba:	feb44783          	lbu	a5,-21(s0)
80000dbe:	9be1                	andi	a5,a5,-8
80000dc0:	fef40523          	sb	a5,-22(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:83
            baud_val |= (uint16_t)( (uint16_t)(temp) << BAUDVALUE_SHIFT );
80000dc4:	fea44783          	lbu	a5,-22(s0)
80000dc8:	07c2                	slli	a5,a5,0x10
80000dca:	83c1                	srli	a5,a5,0x10
80000dcc:	0796                	slli	a5,a5,0x5
80000dce:	01079713          	slli	a4,a5,0x10
80000dd2:	8341                	srli	a4,a4,0x10
80000dd4:	fec45783          	lhu	a5,-20(s0)
80000dd8:	8fd9                	or	a5,a5,a4
80000dda:	fef41623          	sh	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:84
            config &= (uint8_t)(~CTRL2_BAUDVALUE_MASK);
80000dde:	feb44783          	lbu	a5,-21(s0)
80000de2:	8b9d                	andi	a5,a5,7
80000de4:	fef405a3          	sb	a5,-21(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:85
            HAL_ASSERT( baud_val == baud_value );
80000de8:	fec45703          	lhu	a4,-20(s0)
80000dec:	fd645783          	lhu	a5,-42(s0)
80000df0:	00f70363          	beq	a4,a5,80000df6 <UART_init+0xf8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:85 (discriminator 1)
80000df4:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:86
            HAL_ASSERT( config == line_config );
80000df6:	feb44703          	lbu	a4,-21(s0)
80000dfa:	fd544783          	lbu	a5,-43(s0)
80000dfe:	00f70363          	beq	a4,a5,80000e04 <UART_init+0x106>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:86 (discriminator 1)
80000e02:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:94
        
        /*
         * Flush the receive FIFO of data that may have been received before the
         * driver was initialized.
         */
        rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) &
80000e04:	fdc42783          	lw	a5,-36(s0)
80000e08:	439c                	lw	a5,0(a5)
80000e0a:	07c1                	addi	a5,a5,16
80000e0c:	853e                	mv	a0,a5
80000e0e:	3d75                	jal	80000cca <HW_get_8bit_reg>
80000e10:	87aa                	mv	a5,a0
80000e12:	8b89                	andi	a5,a5,2
80000e14:	fef407a3          	sb	a5,-17(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:96
                                                    STATUS_RXFULL_MASK;
        while ( rx_full )
80000e18:	a00d                	j	80000e3a <UART_init+0x13c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:98
        {
            HAL_get_8bit_reg( this_uart->base_address, RXDATA );
80000e1a:	fdc42783          	lw	a5,-36(s0)
80000e1e:	439c                	lw	a5,0(a5)
80000e20:	0791                	addi	a5,a5,4
80000e22:	853e                	mv	a0,a5
80000e24:	355d                	jal	80000cca <HW_get_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:99
            rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) &
80000e26:	fdc42783          	lw	a5,-36(s0)
80000e2a:	439c                	lw	a5,0(a5)
80000e2c:	07c1                	addi	a5,a5,16
80000e2e:	853e                	mv	a0,a5
80000e30:	3d69                	jal	80000cca <HW_get_8bit_reg>
80000e32:	87aa                	mv	a5,a0
80000e34:	8b89                	andi	a5,a5,2
80000e36:	fef407a3          	sb	a5,-17(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:96
        while ( rx_full )
80000e3a:	fef44783          	lbu	a5,-17(s0)
80000e3e:	fff1                	bnez	a5,80000e1a <UART_init+0x11c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:106
        }

        /*
         * Clear status of the UART instance.
         */
        this_uart->status = (uint8_t)0;
80000e40:	fdc42783          	lw	a5,-36(s0)
80000e44:	00078223          	sb	zero,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:108
    }
}
80000e48:	0001                	nop
80000e4a:	50b2                	lw	ra,44(sp)
80000e4c:	5422                	lw	s0,40(sp)
80000e4e:	6145                	addi	sp,sp,48
80000e50:	8082                	ret

80000e52 <UART_send>:
UART_send():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:121
(
    UART_instance_t * this_uart,
    const uint8_t * tx_buffer,
    size_t tx_size
)
{
80000e52:	7179                	addi	sp,sp,-48
80000e54:	d606                	sw	ra,44(sp)
80000e56:	d422                	sw	s0,40(sp)
80000e58:	1800                	addi	s0,sp,48
80000e5a:	fca42e23          	sw	a0,-36(s0)
80000e5e:	fcb42c23          	sw	a1,-40(s0)
80000e62:	fcc42a23          	sw	a2,-44(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:125
    size_t char_idx;
    uint8_t tx_ready;

    HAL_ASSERT( this_uart != NULL_INSTANCE )
80000e66:	fdc42783          	lw	a5,-36(s0)
80000e6a:	e391                	bnez	a5,80000e6e <UART_send+0x1c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:125 (discriminator 1)
80000e6c:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:126
    HAL_ASSERT( tx_buffer != NULL_BUFFER )
80000e6e:	fd842783          	lw	a5,-40(s0)
80000e72:	e391                	bnez	a5,80000e76 <UART_send+0x24>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:126 (discriminator 1)
80000e74:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:127
    HAL_ASSERT( tx_size > 0 )
80000e76:	fd442783          	lw	a5,-44(s0)
80000e7a:	e391                	bnez	a5,80000e7e <UART_send+0x2c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:127 (discriminator 1)
80000e7c:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:129
      
    if( (this_uart != NULL_INSTANCE) &&
80000e7e:	fdc42783          	lw	a5,-36(s0)
80000e82:	cfb9                	beqz	a5,80000ee0 <UART_send+0x8e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:129 (discriminator 1)
80000e84:	fd842783          	lw	a5,-40(s0)
80000e88:	cfa1                	beqz	a5,80000ee0 <UART_send+0x8e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:130
        (tx_buffer != NULL_BUFFER)   &&
80000e8a:	fd442783          	lw	a5,-44(s0)
80000e8e:	cba9                	beqz	a5,80000ee0 <UART_send+0x8e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:133
        (tx_size > (size_t)0) )
    {
        for ( char_idx = (size_t)0; char_idx < tx_size; char_idx++ )
80000e90:	fe042623          	sw	zero,-20(s0)
80000e94:	a081                	j	80000ed4 <UART_send+0x82>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:137 (discriminator 1)
        {
            /* Wait for UART to become ready to transmit. */
            do {
                tx_ready = HAL_get_8bit_reg( this_uart->base_address, STATUS ) &
80000e96:	fdc42783          	lw	a5,-36(s0)
80000e9a:	439c                	lw	a5,0(a5)
80000e9c:	07c1                	addi	a5,a5,16
80000e9e:	853e                	mv	a0,a5
80000ea0:	352d                	jal	80000cca <HW_get_8bit_reg>
80000ea2:	87aa                	mv	a5,a0
80000ea4:	8b85                	andi	a5,a5,1
80000ea6:	fef405a3          	sb	a5,-21(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:139 (discriminator 1)
                                                              STATUS_TXRDY_MASK;
            } while ( !tx_ready );
80000eaa:	feb44783          	lbu	a5,-21(s0)
80000eae:	d7e5                	beqz	a5,80000e96 <UART_send+0x44>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:141 (discriminator 2)
            /* Send next character in the buffer. */
            HAL_set_8bit_reg( this_uart->base_address, TXDATA,
80000eb0:	fdc42783          	lw	a5,-36(s0)
80000eb4:	4394                	lw	a3,0(a5)
80000eb6:	fd842703          	lw	a4,-40(s0)
80000eba:	fec42783          	lw	a5,-20(s0)
80000ebe:	97ba                	add	a5,a5,a4
80000ec0:	0007c783          	lbu	a5,0(a5)
80000ec4:	85be                	mv	a1,a5
80000ec6:	8536                	mv	a0,a3
80000ec8:	3bf5                	jal	80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:133 (discriminator 2)
        for ( char_idx = (size_t)0; char_idx < tx_size; char_idx++ )
80000eca:	fec42783          	lw	a5,-20(s0)
80000ece:	0785                	addi	a5,a5,1
80000ed0:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:133 (discriminator 1)
80000ed4:	fec42703          	lw	a4,-20(s0)
80000ed8:	fd442783          	lw	a5,-44(s0)
80000edc:	faf76de3          	bltu	a4,a5,80000e96 <UART_send+0x44>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:145
                              (uint_fast8_t)tx_buffer[char_idx] );
        }
    }
}
80000ee0:	0001                	nop
80000ee2:	50b2                	lw	ra,44(sp)
80000ee4:	5422                	lw	s0,40(sp)
80000ee6:	6145                	addi	sp,sp,48
80000ee8:	8082                	ret

80000eea <I2C_init>:
I2C_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:100
    i2c_instance_t * this_i2c,
    addr_t base_address,
    uint8_t ser_address,
    i2c_clock_divider_t ser_clock_speed
)
{
80000eea:	7179                	addi	sp,sp,-48
80000eec:	d606                	sw	ra,44(sp)
80000eee:	d422                	sw	s0,40(sp)
80000ef0:	1800                	addi	s0,sp,48
80000ef2:	fca42e23          	sw	a0,-36(s0)
80000ef6:	fcb42c23          	sw	a1,-40(s0)
80000efa:	87b2                	mv	a5,a2
80000efc:	fcd42823          	sw	a3,-48(s0)
80000f00:	fcf40ba3          	sb	a5,-41(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:102
    psr_t saved_psr;
    uint_fast16_t clock_speed = (uint_fast16_t)ser_clock_speed;
80000f04:	fd042783          	lw	a5,-48(s0)
80000f08:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:108
    
    /*
     * We need to disable ints while doing this as there is no guarantee we
     * have not been called already and the ISR is active.
     */
    saved_psr = HAL_disable_interrupts();
80000f0c:	3321                	jal	80000c14 <HAL_disable_interrupts>
80000f0e:	fea42423          	sw	a0,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:116
     * Initialize all items of the this_i2c data structure to zero. This
     * initializes all state variables to their init value. It relies on
     * the fact that NO_TRANSACTION, I2C_SUCCESS and I2C_RELEASE_BUS all
     * have an actual value of zero.
     */
    memset(this_i2c, 0, sizeof(i2c_instance_t));
80000f12:	06c00613          	li	a2,108
80000f16:	4581                	li	a1,0
80000f18:	fdc42503          	lw	a0,-36(s0)
80000f1c:	102060ef          	jal	ra,8000701e <memset>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:121
    
    /*
     * Set base address of I2C hardware used by this instance.
     */
    this_i2c->base_address = base_address;
80000f20:	fdc42783          	lw	a5,-36(s0)
80000f24:	fd842703          	lw	a4,-40(s0)
80000f28:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:126

    /*
     * Update Serial address of the device
     */
    this_i2c->ser_address = ((uint_fast8_t)ser_address << 1u);
80000f2a:	fd744783          	lbu	a5,-41(s0)
80000f2e:	00179713          	slli	a4,a5,0x1
80000f32:	fdc42783          	lw	a5,-36(s0)
80000f36:	c3d8                	sw	a4,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:131
    
    /*
     * Configure hardware.
     */
    HAL_set_8bit_reg_field(this_i2c->base_address, ENS1, 0x00); /* Reset I2C hardware. */
80000f38:	fdc42783          	lw	a5,-36(s0)
80000f3c:	439c                	lw	a5,0(a5)
80000f3e:	4681                	li	a3,0
80000f40:	04000613          	li	a2,64
80000f44:	4599                	li	a1,6
80000f46:	853e                	mv	a0,a5
80000f48:	3361                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:132
    HAL_set_8bit_reg_field(this_i2c->base_address, ENS1, 0x01); /* set enable bit */
80000f4a:	fdc42783          	lw	a5,-36(s0)
80000f4e:	439c                	lw	a5,0(a5)
80000f50:	4685                	li	a3,1
80000f52:	04000613          	li	a2,64
80000f56:	4599                	li	a1,6
80000f58:	853e                	mv	a0,a5
80000f5a:	3b9d                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:133
    HAL_set_8bit_reg_field(this_i2c->base_address, CR2, ( (clock_speed >> 2) & 0x01) );
80000f5c:	fdc42783          	lw	a5,-36(s0)
80000f60:	4398                	lw	a4,0(a5)
80000f62:	fec42783          	lw	a5,-20(s0)
80000f66:	8389                	srli	a5,a5,0x2
80000f68:	8b85                	andi	a5,a5,1
80000f6a:	86be                	mv	a3,a5
80000f6c:	08000613          	li	a2,128
80000f70:	459d                	li	a1,7
80000f72:	853a                	mv	a0,a4
80000f74:	3bb1                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:134
    HAL_set_8bit_reg_field(this_i2c->base_address, CR1, ( (clock_speed >> 1) & 0x01) );
80000f76:	fdc42783          	lw	a5,-36(s0)
80000f7a:	4398                	lw	a4,0(a5)
80000f7c:	fec42783          	lw	a5,-20(s0)
80000f80:	8385                	srli	a5,a5,0x1
80000f82:	8b85                	andi	a5,a5,1
80000f84:	86be                	mv	a3,a5
80000f86:	4609                	li	a2,2
80000f88:	4585                	li	a1,1
80000f8a:	853a                	mv	a0,a4
80000f8c:	3391                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:135
    HAL_set_8bit_reg_field(this_i2c->base_address, CR0, ( clock_speed & 0x01) );
80000f8e:	fdc42783          	lw	a5,-36(s0)
80000f92:	4398                	lw	a4,0(a5)
80000f94:	fec42783          	lw	a5,-20(s0)
80000f98:	8b85                	andi	a5,a5,1
80000f9a:	86be                	mv	a3,a5
80000f9c:	4605                	li	a2,1
80000f9e:	4581                	li	a1,0
80000fa0:	853a                	mv	a0,a4
80000fa2:	333d                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:137

    HAL_set_8bit_reg(this_i2c->base_address, ADDRESS, this_i2c->ser_address);
80000fa4:	fdc42783          	lw	a5,-36(s0)
80000fa8:	439c                	lw	a5,0(a5)
80000faa:	00c78713          	addi	a4,a5,12
80000fae:	fdc42783          	lw	a5,-36(s0)
80000fb2:	43dc                	lw	a5,4(a5)
80000fb4:	85be                	mv	a1,a5
80000fb6:	853a                	mv	a0,a4
80000fb8:	3331                	jal	80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:138
    HAL_set_8bit_reg(this_i2c->base_address, ADDRESS1, this_i2c->ser_address);
80000fba:	fdc42783          	lw	a5,-36(s0)
80000fbe:	439c                	lw	a5,0(a5)
80000fc0:	01c78713          	addi	a4,a5,28
80000fc4:	fdc42783          	lw	a5,-36(s0)
80000fc8:	43dc                	lw	a5,4(a5)
80000fca:	85be                	mv	a1,a5
80000fcc:	853a                	mv	a0,a4
80000fce:	39dd                	jal	80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:143
    
    /*
     * Finally safe to enable interrupts.
     */
    HAL_restore_interrupts( saved_psr );
80000fd0:	fe842503          	lw	a0,-24(s0)
80000fd4:	31a5                	jal	80000c3c <HAL_restore_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:144
}
80000fd6:	0001                	nop
80000fd8:	50b2                	lw	ra,44(sp)
80000fda:	5422                	lw	s0,40(sp)
80000fdc:	6145                	addi	sp,sp,48
80000fde:	8082                	ret

80000fe0 <I2C_write>:
I2C_write():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:211
    uint8_t serial_addr,
    const uint8_t * write_buffer,
    uint16_t write_size,
    uint8_t options
)
{
80000fe0:	7179                	addi	sp,sp,-48
80000fe2:	d606                	sw	ra,44(sp)
80000fe4:	d422                	sw	s0,40(sp)
80000fe6:	1800                	addi	s0,sp,48
80000fe8:	fca42e23          	sw	a0,-36(s0)
80000fec:	87ae                	mv	a5,a1
80000fee:	fcc42a23          	sw	a2,-44(s0)
80000ff2:	fcf40da3          	sb	a5,-37(s0)
80000ff6:	87b6                	mv	a5,a3
80000ff8:	fcf41c23          	sh	a5,-40(s0)
80000ffc:	87ba                	mv	a5,a4
80000ffe:	fcf40d23          	sb	a5,-38(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:215
    psr_t saved_psr;
    volatile uint8_t stat_ctrl;

    saved_psr = HAL_disable_interrupts();
80001002:	3909                	jal	80000c14 <HAL_disable_interrupts>
80001004:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:218

    /* Update the transaction only when there is no transaction going on I2C */
    if( this_i2c->transaction == NO_TRANSACTION)
80001008:	fdc42783          	lw	a5,-36(s0)
8000100c:	00c7c783          	lbu	a5,12(a5)
80001010:	e791                	bnez	a5,8000101c <I2C_write+0x3c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:220
    {
      this_i2c->transaction = MASTER_WRITE_TRANSACTION;
80001012:	fdc42783          	lw	a5,-36(s0)
80001016:	4705                	li	a4,1
80001018:	00e78623          	sb	a4,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:224
    }

    /* Update the Pending transaction information so that transaction can restarted */
    this_i2c->pending_transaction = MASTER_WRITE_TRANSACTION ;
8000101c:	fdc42783          	lw	a5,-36(s0)
80001020:	4705                	li	a4,1
80001022:	06e78523          	sb	a4,106(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:227

    /* Update target address */
    this_i2c->target_addr = (uint_fast8_t)serial_addr << 1u;
80001026:	fdb44783          	lbu	a5,-37(s0)
8000102a:	00179713          	slli	a4,a5,0x1
8000102e:	fdc42783          	lw	a5,-36(s0)
80001032:	c798                	sw	a4,8(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:228
    this_i2c->dir = WRITE_DIR;
80001034:	fdc42783          	lw	a5,-36(s0)
80001038:	0207a223          	sw	zero,36(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:229
    this_i2c->master_tx_buffer = write_buffer;
8000103c:	fdc42783          	lw	a5,-36(s0)
80001040:	fd442703          	lw	a4,-44(s0)
80001044:	cf98                	sw	a4,24(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:230
    this_i2c->master_tx_size = write_size;
80001046:	fd845703          	lhu	a4,-40(s0)
8000104a:	fdc42783          	lw	a5,-36(s0)
8000104e:	cfd8                	sw	a4,28(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:231
    this_i2c->master_tx_idx = 0u;
80001050:	fdc42783          	lw	a5,-36(s0)
80001054:	0207a023          	sw	zero,32(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:234

    /* Set I2C status in progress */
    this_i2c->master_status = I2C_IN_PROGRESS;
80001058:	fdc42783          	lw	a5,-36(s0)
8000105c:	4705                	li	a4,1
8000105e:	dbd8                	sw	a4,52(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:235
    this_i2c->options = options;
80001060:	fdc42783          	lw	a5,-36(s0)
80001064:	fda44703          	lbu	a4,-38(s0)
80001068:	00e78a23          	sb	a4,20(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:237

    if(I2C_IN_PROGRESS == this_i2c->slave_status)
8000106c:	fdc42783          	lw	a5,-36(s0)
80001070:	4bf8                	lw	a4,84(a5)
80001072:	4785                	li	a5,1
80001074:	00f71863          	bne	a4,a5,80001084 <I2C_write+0xa4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:239
    {
        this_i2c->is_transaction_pending = 1u;
80001078:	fdc42783          	lw	a5,-36(s0)
8000107c:	4705                	li	a4,1
8000107e:	06e784a3          	sb	a4,105(a5)
80001082:	a811                	j	80001096 <I2C_write+0xb6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:243
    }
    else
    {
        HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x01u);
80001084:	fdc42783          	lw	a5,-36(s0)
80001088:	439c                	lw	a5,0(a5)
8000108a:	4685                	li	a3,1
8000108c:	02000613          	li	a2,32
80001090:	4595                	li	a1,5
80001092:	853e                	mv	a0,a5
80001094:	3935                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:251
    /*
     * Clear interrupts if required (depends on repeated starts).
     * Since the Bus is on hold, only then prior status needs to
     * be cleared.
     */
    if ( I2C_HOLD_BUS == this_i2c->bus_status )
80001096:	fdc42783          	lw	a5,-36(s0)
8000109a:	0687c703          	lbu	a4,104(a5)
8000109e:	4785                	li	a5,1
800010a0:	00f71a63          	bne	a4,a5,800010b4 <I2C_write+0xd4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:253
    {
        HAL_set_8bit_reg_field(this_i2c->base_address, SI, 0x00u);
800010a4:	fdc42783          	lw	a5,-36(s0)
800010a8:	439c                	lw	a5,0(a5)
800010aa:	4681                	li	a3,0
800010ac:	4621                	li	a2,8
800010ae:	458d                	li	a1,3
800010b0:	853e                	mv	a0,a5
800010b2:	3939                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:256
    }

    stat_ctrl = HAL_get_8bit_reg( this_i2c->base_address, STATUS);
800010b4:	fdc42783          	lw	a5,-36(s0)
800010b8:	439c                	lw	a5,0(a5)
800010ba:	0791                	addi	a5,a5,4
800010bc:	853e                	mv	a0,a5
800010be:	3131                	jal	80000cca <HW_get_8bit_reg>
800010c0:	87aa                	mv	a5,a0
800010c2:	fef405a3          	sb	a5,-21(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:257
    stat_ctrl = stat_ctrl;  /* Avoids lint warning. */
800010c6:	feb44783          	lbu	a5,-21(s0)
800010ca:	0ff7f793          	andi	a5,a5,255
800010ce:	fef405a3          	sb	a5,-21(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:260

    /* Enable the interrupt. ( Re-enable) */
    I2C_enable_irq( this_i2c );
800010d2:	fdc42503          	lw	a0,-36(s0)
800010d6:	029000ef          	jal	ra,800018fe <I2C_enable_irq>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:262

    HAL_restore_interrupts( saved_psr );
800010da:	fec42503          	lw	a0,-20(s0)
800010de:	3eb9                	jal	80000c3c <HAL_restore_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:263
}
800010e0:	0001                	nop
800010e2:	50b2                	lw	ra,44(sp)
800010e4:	5422                	lw	s0,40(sp)
800010e6:	6145                	addi	sp,sp,48
800010e8:	8082                	ret

800010ea <I2C_wait_complete>:
I2C_wait_complete():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:442
i2c_status_t I2C_wait_complete
(
    i2c_instance_t * this_i2c,
    uint32_t timeout_ms
)
{
800010ea:	7179                	addi	sp,sp,-48
800010ec:	d606                	sw	ra,44(sp)
800010ee:	d422                	sw	s0,40(sp)
800010f0:	1800                	addi	s0,sp,48
800010f2:	fca42e23          	sw	a0,-36(s0)
800010f6:	fcb42c23          	sw	a1,-40(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:451
     * Because we have no idea of what CPU we are supposed to be running on
     * we need to guard this write to the timeout value to avoid ISR/user code
     * interaction issues. Checking the status below should be fine as only a
     * single byte should change in that.
     */
    saved_psr = HAL_disable_interrupts();
800010fa:	3e29                	jal	80000c14 <HAL_disable_interrupts>
800010fc:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:452
    this_i2c->master_timeout_ms = timeout_ms;
80001100:	fdc42783          	lw	a5,-36(s0)
80001104:	fd842703          	lw	a4,-40(s0)
80001108:	df98                	sw	a4,56(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:453
    HAL_restore_interrupts( saved_psr );
8000110a:	fec42503          	lw	a0,-20(s0)
8000110e:	363d                	jal	80000c3c <HAL_restore_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:457 (discriminator 1)

    /* Run the loop until state returns I2C_FAILED  or I2C_SUCESS*/
    do {
        i2c_status = this_i2c->master_status;
80001110:	fdc42783          	lw	a5,-36(s0)
80001114:	5bdc                	lw	a5,52(a5)
80001116:	fef42423          	sw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:458 (discriminator 1)
    } while(I2C_IN_PROGRESS == i2c_status);
8000111a:	fe842703          	lw	a4,-24(s0)
8000111e:	4785                	li	a5,1
80001120:	fef708e3          	beq	a4,a5,80001110 <I2C_wait_complete+0x26>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:459
    return i2c_status;
80001124:	fe842783          	lw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:460
}
80001128:	853e                	mv	a0,a5
8000112a:	50b2                	lw	ra,44(sp)
8000112c:	5422                	lw	s0,40(sp)
8000112e:	6145                	addi	sp,sp,48
80001130:	8082                	ret

80001132 <enable_slave_if_required>:
enable_slave_if_required():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:668
 */
static void enable_slave_if_required
(
    i2c_instance_t * this_i2c
)
{
80001132:	1101                	addi	sp,sp,-32
80001134:	ce06                	sw	ra,28(sp)
80001136:	cc22                	sw	s0,24(sp)
80001138:	1000                	addi	s0,sp,32
8000113a:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:673
    /*
     * This function is only called from within the ISR and so does not need
     * guarding on the register access.
     */
    if( 0 != this_i2c->is_slave_enabled )
8000113e:	fec42783          	lw	a5,-20(s0)
80001142:	0607c783          	lbu	a5,96(a5)
80001146:	cb89                	beqz	a5,80001158 <enable_slave_if_required+0x26>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:675
    {
        HAL_set_8bit_reg_field( this_i2c->base_address, AA, 0x01u );
80001148:	fec42783          	lw	a5,-20(s0)
8000114c:	439c                	lw	a5,0(a5)
8000114e:	4685                	li	a3,1
80001150:	4611                	li	a2,4
80001152:	4589                	li	a1,2
80001154:	853e                	mv	a0,a5
80001156:	3ead                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:677
    }
}
80001158:	0001                	nop
8000115a:	40f2                	lw	ra,28(sp)
8000115c:	4462                	lw	s0,24(sp)
8000115e:	6105                	addi	sp,sp,32
80001160:	8082                	ret

80001162 <I2C_isr>:
I2C_isr():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:772
 */
void I2C_isr
(
    i2c_instance_t * this_i2c
)
{
80001162:	7179                	addi	sp,sp,-48
80001164:	d606                	sw	ra,44(sp)
80001166:	d422                	sw	s0,40(sp)
80001168:	d226                	sw	s1,36(sp)
8000116a:	1800                	addi	s0,sp,48
8000116c:	fca42e23          	sw	a0,-36(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:776
    volatile uint8_t status;
    uint8_t data;
    uint8_t hold_bus;
    uint8_t clear_irq = 1u;
80001170:	4785                	li	a5,1
80001172:	fef407a3          	sb	a5,-17(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:778

    status = HAL_get_8bit_reg( this_i2c->base_address, STATUS);
80001176:	fdc42783          	lw	a5,-36(s0)
8000117a:	439c                	lw	a5,0(a5)
8000117c:	0791                	addi	a5,a5,4
8000117e:	853e                	mv	a0,a5
80001180:	36a9                	jal	80000cca <HW_get_8bit_reg>
80001182:	87aa                	mv	a5,a0
80001184:	fef403a3          	sb	a5,-25(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:780
    
    switch( status )
80001188:	fe744783          	lbu	a5,-25(s0)
8000118c:	0ff7f793          	andi	a5,a5,255
80001190:	17e1                	addi	a5,a5,-8
80001192:	0d800713          	li	a4,216
80001196:	68f76663          	bltu	a4,a5,80001822 <I2C_isr+0x6c0>
8000119a:	00279713          	slli	a4,a5,0x2
8000119e:	00006797          	auipc	a5,0x6
800011a2:	ed278793          	addi	a5,a5,-302 # 80007070 <local_irq_handler_table+0x40>
800011a6:	97ba                	add	a5,a5,a4
800011a8:	4398                	lw	a4,0(a5)
800011aa:	00006797          	auipc	a5,0x6
800011ae:	ec678793          	addi	a5,a5,-314 # 80007070 <local_irq_handler_table+0x40>
800011b2:	97ba                	add	a5,a5,a4
800011b4:	8782                	jr	a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:786
    {
        /************** MASTER TRANSMITTER / RECEIVER *******************/
      
        case ST_START: /* start has been xmt'd */
        case ST_RESTART: /* repeated start has been xmt'd */
            HAL_set_8bit_reg_field( this_i2c->base_address, STA, 0x00u);
800011b6:	fdc42783          	lw	a5,-36(s0)
800011ba:	439c                	lw	a5,0(a5)
800011bc:	4681                	li	a3,0
800011be:	02000613          	li	a2,32
800011c2:	4595                	li	a1,5
800011c4:	853e                	mv	a0,a5
800011c6:	3629                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:787
            HAL_set_8bit_reg( this_i2c->base_address, DATA, this_i2c->target_addr); /* write call address */
800011c8:	fdc42783          	lw	a5,-36(s0)
800011cc:	439c                	lw	a5,0(a5)
800011ce:	00878713          	addi	a4,a5,8
800011d2:	fdc42783          	lw	a5,-36(s0)
800011d6:	479c                	lw	a5,8(a5)
800011d8:	85be                	mv	a1,a5
800011da:	853a                	mv	a0,a4
800011dc:	34e5                	jal	80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:788
            HAL_set_8bit_reg_field( this_i2c->base_address, DIR, this_i2c->dir); /* set direction bit */
800011de:	fdc42783          	lw	a5,-36(s0)
800011e2:	439c                	lw	a5,0(a5)
800011e4:	00878713          	addi	a4,a5,8
800011e8:	fdc42783          	lw	a5,-36(s0)
800011ec:	53dc                	lw	a5,36(a5)
800011ee:	86be                	mv	a3,a5
800011f0:	4605                	li	a2,1
800011f2:	4581                	li	a1,0
800011f4:	853a                	mv	a0,a4
800011f6:	3ce9                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:789
            if(this_i2c->dir == WRITE_DIR)
800011f8:	fdc42783          	lw	a5,-36(s0)
800011fc:	53dc                	lw	a5,36(a5)
800011fe:	e791                	bnez	a5,8000120a <I2C_isr+0xa8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:791
            {
                 this_i2c->master_tx_idx = 0u;
80001200:	fdc42783          	lw	a5,-36(s0)
80001204:	0207a023          	sw	zero,32(a5)
80001208:	a029                	j	80001212 <I2C_isr+0xb0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:795
            }
            else
            {
                 this_i2c->master_rx_idx = 0u;
8000120a:	fdc42783          	lw	a5,-36(s0)
8000120e:	0207a823          	sw	zero,48(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:803
            /*
             * Clear the pending transaction. This condition will be true if the slave 
             * has acquired the bus to carry out pending master transaction which 
             * it had received during its slave transmission or reception mode. 
             */
            if(this_i2c->is_transaction_pending)
80001212:	fdc42783          	lw	a5,-36(s0)
80001216:	0697c783          	lbu	a5,105(a5)
8000121a:	c789                	beqz	a5,80001224 <I2C_isr+0xc2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:805
            {
                this_i2c->is_transaction_pending = 0u;
8000121c:	fdc42783          	lw	a5,-36(s0)
80001220:	060784a3          	sb	zero,105(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:812

            /*
             * Make sure to update proper transaction after master START
             * or RESTART
             */
            if(this_i2c->transaction != this_i2c->pending_transaction)
80001224:	fdc42783          	lw	a5,-36(s0)
80001228:	00c7c703          	lbu	a4,12(a5)
8000122c:	fdc42783          	lw	a5,-36(s0)
80001230:	06a7c783          	lbu	a5,106(a5)
80001234:	64f70063          	beq	a4,a5,80001874 <I2C_isr+0x712>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:814
            {
                this_i2c->transaction = this_i2c->pending_transaction;
80001238:	fdc42783          	lw	a5,-36(s0)
8000123c:	06a7c703          	lbu	a4,106(a5)
80001240:	fdc42783          	lw	a5,-36(s0)
80001244:	00e78623          	sb	a4,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:816
            }
            break;
80001248:	a535                	j	80001874 <I2C_isr+0x712>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:820
            
        case ST_LOST_ARB:
              /* Set start bit.  Let's keep trying!  Don't give up! */
              HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x01u);
8000124a:	fdc42783          	lw	a5,-36(s0)
8000124e:	439c                	lw	a5,0(a5)
80001250:	4685                	li	a3,1
80001252:	02000613          	li	a2,32
80001256:	4595                	li	a1,5
80001258:	853e                	mv	a0,a5
8000125a:	3c9d                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:821
              break;
8000125c:	a53d                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:830
              break;

        /******************* MASTER TRANSMITTER *************************/
        case ST_SLAW_NACK:
            /* SLA+W has been transmitted; not ACK has been received - let's stop. */
            HAL_set_8bit_reg_field(this_i2c->base_address, STO, 0x01u);
8000125e:	fdc42783          	lw	a5,-36(s0)
80001262:	439c                	lw	a5,0(a5)
80001264:	4685                	li	a3,1
80001266:	4641                	li	a2,16
80001268:	4591                	li	a1,4
8000126a:	853e                	mv	a0,a5
8000126c:	3495                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:831
            this_i2c->master_status = I2C_FAILED;
8000126e:	fdc42783          	lw	a5,-36(s0)
80001272:	4709                	li	a4,2
80001274:	dbd8                	sw	a4,52(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:832
            this_i2c->transaction = NO_TRANSACTION;
80001276:	fdc42783          	lw	a5,-36(s0)
8000127a:	00078623          	sb	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:833
            enable_slave_if_required(this_i2c);
8000127e:	fdc42503          	lw	a0,-36(s0)
80001282:	3d45                	jal	80001132 <enable_slave_if_required>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:834
            break;
80001284:	a519                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:839
            
        case ST_SLAW_ACK:
        case ST_TX_DATA_ACK:
            /* data byte has been xmt'd with ACK, time to send stop bit or repeated start. */
            if (this_i2c->master_tx_idx < this_i2c->master_tx_size)
80001286:	fdc42783          	lw	a5,-36(s0)
8000128a:	5398                	lw	a4,32(a5)
8000128c:	fdc42783          	lw	a5,-36(s0)
80001290:	4fdc                	lw	a5,28(a5)
80001292:	02f77863          	bgeu	a4,a5,800012c2 <I2C_isr+0x160>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:841
            {    
                HAL_set_8bit_reg(this_i2c->base_address, DATA, (uint_fast8_t)this_i2c->master_tx_buffer[this_i2c->master_tx_idx++]);
80001296:	fdc42783          	lw	a5,-36(s0)
8000129a:	439c                	lw	a5,0(a5)
8000129c:	00878513          	addi	a0,a5,8
800012a0:	fdc42783          	lw	a5,-36(s0)
800012a4:	4f98                	lw	a4,24(a5)
800012a6:	fdc42783          	lw	a5,-36(s0)
800012aa:	539c                	lw	a5,32(a5)
800012ac:	00178613          	addi	a2,a5,1
800012b0:	fdc42683          	lw	a3,-36(s0)
800012b4:	d290                	sw	a2,32(a3)
800012b6:	97ba                	add	a5,a5,a4
800012b8:	0007c783          	lbu	a5,0(a5)
800012bc:	85be                	mv	a1,a5
800012be:	3419                	jal	80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:873
                    I2C_disable_irq( this_i2c );
                    clear_irq = 0u;
                }
                this_i2c->master_status = I2C_SUCCESS;
            }
            break;
800012c0:	a3e9                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:843
            else if ( this_i2c->transaction == MASTER_RANDOM_READ_TRANSACTION )
800012c2:	fdc42783          	lw	a5,-36(s0)
800012c6:	00c7c703          	lbu	a4,12(a5)
800012ca:	478d                	li	a5,3
800012cc:	02f71063          	bne	a4,a5,800012ec <I2C_isr+0x18a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:847
                 this_i2c->dir = READ_DIR;
800012d0:	fdc42783          	lw	a5,-36(s0)
800012d4:	4705                	li	a4,1
800012d6:	d3d8                	sw	a4,36(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:848
                 HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x01u);
800012d8:	fdc42783          	lw	a5,-36(s0)
800012dc:	439c                	lw	a5,0(a5)
800012de:	4685                	li	a3,1
800012e0:	02000613          	li	a2,32
800012e4:	4595                	li	a1,5
800012e6:	853e                	mv	a0,a5
800012e8:	32e5                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:873
            break;
800012ea:	a345                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:856
                this_i2c->transaction = NO_TRANSACTION;
800012ec:	fdc42783          	lw	a5,-36(s0)
800012f0:	00078623          	sb	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:857
                hold_bus = this_i2c->options & I2C_HOLD_BUS;
800012f4:	fdc42783          	lw	a5,-36(s0)
800012f8:	0147c783          	lbu	a5,20(a5)
800012fc:	8b85                	andi	a5,a5,1
800012fe:	fef40723          	sb	a5,-18(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:860
                this_i2c->bus_status  = hold_bus;
80001302:	fdc42783          	lw	a5,-36(s0)
80001306:	fee44703          	lbu	a4,-18(s0)
8000130a:	06e78423          	sb	a4,104(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:861
                if ( hold_bus == 0u )
8000130e:	fee44783          	lbu	a5,-18(s0)
80001312:	ef89                	bnez	a5,8000132c <I2C_isr+0x1ca>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:863
                    HAL_set_8bit_reg_field(this_i2c->base_address, STO, 0x01u);  /*xmt stop condition */
80001314:	fdc42783          	lw	a5,-36(s0)
80001318:	439c                	lw	a5,0(a5)
8000131a:	4685                	li	a3,1
8000131c:	4641                	li	a2,16
8000131e:	4591                	li	a1,4
80001320:	853e                	mv	a0,a5
80001322:	327d                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:864
                    enable_slave_if_required(this_i2c);
80001324:	fdc42503          	lw	a0,-36(s0)
80001328:	3529                	jal	80001132 <enable_slave_if_required>
8000132a:	a031                	j	80001336 <I2C_isr+0x1d4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:868
                    I2C_disable_irq( this_i2c );
8000132c:	fdc42503          	lw	a0,-36(s0)
80001330:	2bdd                	jal	80001926 <I2C_disable_irq>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:869
                    clear_irq = 0u;
80001332:	fe0407a3          	sb	zero,-17(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:871
                this_i2c->master_status = I2C_SUCCESS;
80001336:	fdc42783          	lw	a5,-36(s0)
8000133a:	0207aa23          	sw	zero,52(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:873
            break;
8000133e:	a3b1                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:881
            /* data byte SENT, ACK to be received
             * In fact, this means we've received a NACK (This may not be 
             * obvious, but if we've rec'd an ACK then we would be in state 
             * 0x28!) hence, let's send a stop bit
             */
            HAL_set_8bit_reg_field(this_i2c->base_address, STO, 0x01u);/* xmt stop condition */
80001340:	fdc42783          	lw	a5,-36(s0)
80001344:	439c                	lw	a5,0(a5)
80001346:	4685                	li	a3,1
80001348:	4641                	li	a2,16
8000134a:	4591                	li	a1,4
8000134c:	853e                	mv	a0,a5
8000134e:	3249                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:882
            this_i2c->master_status = I2C_FAILED;
80001350:	fdc42783          	lw	a5,-36(s0)
80001354:	4709                	li	a4,2
80001356:	dbd8                	sw	a4,52(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:888

            /*
             * Set the transaction back to NO_TRANSACTION to allow user to do further
             * transaction
             */
            this_i2c->transaction = NO_TRANSACTION;
80001358:	fdc42783          	lw	a5,-36(s0)
8000135c:	00078623          	sb	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:889
            enable_slave_if_required(this_i2c);
80001360:	fdc42503          	lw	a0,-36(s0)
80001364:	33f9                	jal	80001132 <enable_slave_if_required>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:890
            break;
80001366:	a315                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:899
      /* STATUS codes 08H, 10H, 38H are all covered in MTX mode */
        case ST_SLAR_ACK: /* SLA+R tx'ed. */
            /* Let's make sure we ACK the first data byte received (set AA bit in CTRL) unless
             * the next byte is the last byte of the read transaction.
             */
            if(this_i2c->master_rx_size > 1u)
80001368:	fdc42783          	lw	a5,-36(s0)
8000136c:	57d8                	lw	a4,44(a5)
8000136e:	4785                	li	a5,1
80001370:	00e7fb63          	bgeu	a5,a4,80001386 <I2C_isr+0x224>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:901
            {
                HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x01u);
80001374:	fdc42783          	lw	a5,-36(s0)
80001378:	439c                	lw	a5,0(a5)
8000137a:	4685                	li	a3,1
8000137c:	4611                	li	a2,4
8000137e:	4589                	li	a1,2
80001380:	853e                	mv	a0,a5
80001382:	32b9                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:914
                HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x01u);
                HAL_set_8bit_reg_field(this_i2c->base_address, STO, 0x01u);
                this_i2c->master_status = I2C_SUCCESS;
                this_i2c->transaction = NO_TRANSACTION;
            }
            break;
80001384:	a319                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:903
            else if(1u == this_i2c->master_rx_size)
80001386:	fdc42783          	lw	a5,-36(s0)
8000138a:	57d8                	lw	a4,44(a5)
8000138c:	4785                	li	a5,1
8000138e:	00f71b63          	bne	a4,a5,800013a4 <I2C_isr+0x242>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:905
                HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x00u);
80001392:	fdc42783          	lw	a5,-36(s0)
80001396:	439c                	lw	a5,0(a5)
80001398:	4681                	li	a3,0
8000139a:	4611                	li	a2,4
8000139c:	4589                	li	a1,2
8000139e:	853e                	mv	a0,a5
800013a0:	3a05                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:914
            break;
800013a2:	a1e5                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:909
                HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x01u);
800013a4:	fdc42783          	lw	a5,-36(s0)
800013a8:	439c                	lw	a5,0(a5)
800013aa:	4685                	li	a3,1
800013ac:	4611                	li	a2,4
800013ae:	4589                	li	a1,2
800013b0:	853e                	mv	a0,a5
800013b2:	3a39                	jal	80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:910
                HAL_set_8bit_reg_field(this_i2c->base_address, STO, 0x01u);
800013b4:	fdc42783          	lw	a5,-36(s0)
800013b8:	439c                	lw	a5,0(a5)
800013ba:	4685                	li	a3,1
800013bc:	4641                	li	a2,16
800013be:	4591                	li	a1,4
800013c0:	853e                	mv	a0,a5
800013c2:	90fff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:911
                this_i2c->master_status = I2C_SUCCESS;
800013c6:	fdc42783          	lw	a5,-36(s0)
800013ca:	0207aa23          	sw	zero,52(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:912
                this_i2c->transaction = NO_TRANSACTION;
800013ce:	fdc42783          	lw	a5,-36(s0)
800013d2:	00078623          	sb	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:914
            break;
800013d6:	a955                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:917
            
        case ST_SLAR_NACK: /* SLA+R tx'ed; let's release the bus (send a stop condition) */
            HAL_set_8bit_reg_field(this_i2c->base_address, STO, 0x01u);
800013d8:	fdc42783          	lw	a5,-36(s0)
800013dc:	439c                	lw	a5,0(a5)
800013de:	4685                	li	a3,1
800013e0:	4641                	li	a2,16
800013e2:	4591                	li	a1,4
800013e4:	853e                	mv	a0,a5
800013e6:	8ebff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:918
            this_i2c->master_status = I2C_FAILED;
800013ea:	fdc42783          	lw	a5,-36(s0)
800013ee:	4709                	li	a4,2
800013f0:	dbd8                	sw	a4,52(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:924

            /*
             * Set the transaction back to NO_TRANSACTION to allow user to do further
             * transaction
             */
            this_i2c->transaction = NO_TRANSACTION;
800013f2:	fdc42783          	lw	a5,-36(s0)
800013f6:	00078623          	sb	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:925
            enable_slave_if_required(this_i2c);
800013fa:	fdc42503          	lw	a0,-36(s0)
800013fe:	3b15                	jal	80001132 <enable_slave_if_required>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:926
            break;
80001400:	a169                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:930
          
        case ST_RX_DATA_ACK: /* Data byte received, ACK returned */
            /* First, get the data */
            this_i2c->master_rx_buffer[this_i2c->master_rx_idx++] = HAL_get_8bit_reg(this_i2c->base_address, DATA);
80001402:	fdc42783          	lw	a5,-36(s0)
80001406:	439c                	lw	a5,0(a5)
80001408:	00878593          	addi	a1,a5,8
8000140c:	fdc42783          	lw	a5,-36(s0)
80001410:	5798                	lw	a4,40(a5)
80001412:	fdc42783          	lw	a5,-36(s0)
80001416:	5b9c                	lw	a5,48(a5)
80001418:	00178613          	addi	a2,a5,1
8000141c:	fdc42683          	lw	a3,-36(s0)
80001420:	da90                	sw	a2,48(a3)
80001422:	00f704b3          	add	s1,a4,a5
80001426:	852e                	mv	a0,a1
80001428:	8a3ff0ef          	jal	ra,80000cca <HW_get_8bit_reg>
8000142c:	87aa                	mv	a5,a0
8000142e:	00f48023          	sb	a5,0(s1)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:931
            if( this_i2c->master_rx_idx >= (this_i2c->master_rx_size - 1u))
80001432:	fdc42783          	lw	a5,-36(s0)
80001436:	5b98                	lw	a4,48(a5)
80001438:	fdc42783          	lw	a5,-36(s0)
8000143c:	57dc                	lw	a5,44(a5)
8000143e:	17fd                	addi	a5,a5,-1
80001440:	42f76c63          	bltu	a4,a5,80001878 <I2C_isr+0x716>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:935
            {
                /* If we're at the second last byte, let's set AA to 0 so
                 * we return a NACK at the last byte. */
                HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x00u);
80001444:	fdc42783          	lw	a5,-36(s0)
80001448:	439c                	lw	a5,0(a5)
8000144a:	4681                	li	a3,0
8000144c:	4611                	li	a2,4
8000144e:	4589                	li	a1,2
80001450:	853e                	mv	a0,a5
80001452:	87fff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:937
            }
            break;
80001456:	a10d                	j	80001878 <I2C_isr+0x716>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:941
            
        case ST_RX_DATA_NACK: /* Data byte received, NACK returned */
            /* Get the data, then send a stop condition */
            this_i2c->master_rx_buffer[this_i2c->master_rx_idx] = HAL_get_8bit_reg(this_i2c->base_address, DATA);
80001458:	fdc42783          	lw	a5,-36(s0)
8000145c:	439c                	lw	a5,0(a5)
8000145e:	00878693          	addi	a3,a5,8
80001462:	fdc42783          	lw	a5,-36(s0)
80001466:	5798                	lw	a4,40(a5)
80001468:	fdc42783          	lw	a5,-36(s0)
8000146c:	5b9c                	lw	a5,48(a5)
8000146e:	00f704b3          	add	s1,a4,a5
80001472:	8536                	mv	a0,a3
80001474:	857ff0ef          	jal	ra,80000cca <HW_get_8bit_reg>
80001478:	87aa                	mv	a5,a0
8000147a:	00f48023          	sb	a5,0(s1)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:943
          
            hold_bus = this_i2c->options & I2C_HOLD_BUS; 
8000147e:	fdc42783          	lw	a5,-36(s0)
80001482:	0147c783          	lbu	a5,20(a5)
80001486:	8b85                	andi	a5,a5,1
80001488:	fef40723          	sb	a5,-18(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:946

            /* Store the information of current I2C bus status in the bus_status*/
            this_i2c->bus_status  = hold_bus;
8000148c:	fdc42783          	lw	a5,-36(s0)
80001490:	fee44703          	lbu	a4,-18(s0)
80001494:	06e78423          	sb	a4,104(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:947
            if ( hold_bus == 0u )
80001498:	fee44783          	lbu	a5,-18(s0)
8000149c:	ef91                	bnez	a5,800014b8 <I2C_isr+0x356>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:949
            { 
                HAL_set_8bit_reg_field(this_i2c->base_address, STO, 0x01u);  /*xmt stop condition */
8000149e:	fdc42783          	lw	a5,-36(s0)
800014a2:	439c                	lw	a5,0(a5)
800014a4:	4685                	li	a3,1
800014a6:	4641                	li	a2,16
800014a8:	4591                	li	a1,4
800014aa:	853e                	mv	a0,a5
800014ac:	825ff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:952

                /* Bus is released, now we can start listening to bus, if it is slave */
                   enable_slave_if_required(this_i2c);
800014b0:	fdc42503          	lw	a0,-36(s0)
800014b4:	39bd                	jal	80001132 <enable_slave_if_required>
800014b6:	a031                	j	800014c2 <I2C_isr+0x360>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:956
            }
            else
            {
                I2C_disable_irq( this_i2c );
800014b8:	fdc42503          	lw	a0,-36(s0)
800014bc:	21ad                	jal	80001926 <I2C_disable_irq>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:957
                clear_irq = 0u;
800014be:	fe0407a3          	sb	zero,-17(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:963
            }
            /*
             * Set the transaction back to NO_TRANSACTION to allow user to do further
             * transaction
             */
            this_i2c->transaction = NO_TRANSACTION;
800014c2:	fdc42783          	lw	a5,-36(s0)
800014c6:	00078623          	sb	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:964
            this_i2c->master_status = I2C_SUCCESS;
800014ca:	fdc42783          	lw	a5,-36(s0)
800014ce:	0207aa23          	sw	zero,52(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:965
            break;
800014d2:	ae65                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:970
        
        /******************** SLAVE RECEIVER **************************/
        case ST_GCA_NACK: /* NACK after, GCA addressing */
        case ST_SLA_NACK: /* Re-enable AA (assert ack) bit for future transmissions */
            HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x01u);
800014d4:	fdc42783          	lw	a5,-36(s0)
800014d8:	439c                	lw	a5,0(a5)
800014da:	4685                	li	a3,1
800014dc:	4611                	li	a2,4
800014de:	4589                	li	a1,2
800014e0:	853e                	mv	a0,a5
800014e2:	feeff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:972

            this_i2c->transaction = NO_TRANSACTION;
800014e6:	fdc42783          	lw	a5,-36(s0)
800014ea:	00078623          	sb	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:973
            this_i2c->slave_status = I2C_SUCCESS;
800014ee:	fdc42783          	lw	a5,-36(s0)
800014f2:	0407aa23          	sw	zero,84(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:976
            
            /* Check if transaction was pending. If yes, set the START bit */
            if(this_i2c->is_transaction_pending)
800014f6:	fdc42783          	lw	a5,-36(s0)
800014fa:	0697c783          	lbu	a5,105(a5)
800014fe:	36078f63          	beqz	a5,8000187c <I2C_isr+0x71a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:978
            {
                HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x01u);
80001502:	fdc42783          	lw	a5,-36(s0)
80001506:	439c                	lw	a5,0(a5)
80001508:	4685                	li	a3,1
8000150a:	02000613          	li	a2,32
8000150e:	4595                	li	a1,5
80001510:	853e                	mv	a0,a5
80001512:	fbeff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:980
            }
            break;
80001516:	a69d                	j	8000187c <I2C_isr+0x71a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:988
        case ST_SLV_LA: /* Arbitr. lost (SLA rec'd) */
            /*
             *  We lost arbitration and either the GCE or our address was the
             *  one received so pend the master operation we were starting.
             */
            this_i2c->is_transaction_pending = 1u;
80001518:	fdc42783          	lw	a5,-36(s0)
8000151c:	4705                	li	a4,1
8000151e:	06e784a3          	sb	a4,105(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:993
            /* Fall through to normal ST processing as we are now in slave mode */

        case ST_GCA: /* General call address received, ACK returned */
        case ST_SLAVE_SLAW: /* SLA+W received, ACK returned */
            this_i2c->transaction = WRITE_SLAVE_TRANSACTION;
80001522:	fdc42783          	lw	a5,-36(s0)
80001526:	4711                	li	a4,4
80001528:	00e78623          	sb	a4,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:994
            this_i2c->slave_rx_idx = 0u;
8000152c:	fdc42783          	lw	a5,-36(s0)
80001530:	0407a823          	sw	zero,80(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:995
            this_i2c->random_read_addr = 0u;
80001534:	fdc42783          	lw	a5,-36(s0)
80001538:	0007a823          	sw	zero,16(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1000
            /*
             * If Start Bit is set clear it, but store that information since it is because of
             * pending transaction
             */
            if(HAL_get_8bit_reg_field(this_i2c->base_address, STA))
8000153c:	fdc42783          	lw	a5,-36(s0)
80001540:	439c                	lw	a5,0(a5)
80001542:	02000613          	li	a2,32
80001546:	4595                	li	a1,5
80001548:	853e                	mv	a0,a5
8000154a:	fa8ff0ef          	jal	ra,80000cf2 <HW_get_8bit_reg_field>
8000154e:	87aa                	mv	a5,a0
80001550:	c385                	beqz	a5,80001570 <I2C_isr+0x40e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1002
            {
                HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x00u);
80001552:	fdc42783          	lw	a5,-36(s0)
80001556:	439c                	lw	a5,0(a5)
80001558:	4681                	li	a3,0
8000155a:	02000613          	li	a2,32
8000155e:	4595                	li	a1,5
80001560:	853e                	mv	a0,a5
80001562:	f6eff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1003
                this_i2c->is_transaction_pending = 1u;
80001566:	fdc42783          	lw	a5,-36(s0)
8000156a:	4705                	li	a4,1
8000156c:	06e784a3          	sb	a4,105(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1005
            }
            this_i2c->slave_status = I2C_IN_PROGRESS;
80001570:	fdc42783          	lw	a5,-36(s0)
80001574:	4705                	li	a4,1
80001576:	cbf8                	sw	a4,84(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1011
#ifdef INCLUDE_SLA_IN_RX_PAYLOAD
            /* Fall through to put address as first byte in payload buffer */
#else
            /* Only break from this case if the slave address must NOT be included at the
             * beginning of the received write data. */
            break;
80001578:	ae09                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1015
#endif            
        case ST_GCA_ACK: /* DATA received; ACK sent after GCA */
        case ST_RDATA: /* DATA received; must clear DATA register */
            if((this_i2c->slave_rx_buffer != (uint8_t *)0)
8000157a:	fdc42783          	lw	a5,-36(s0)
8000157e:	47bc                	lw	a5,72(a5)
80001580:	cfb1                	beqz	a5,800015dc <I2C_isr+0x47a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1016
               && (this_i2c->slave_rx_idx < this_i2c->slave_rx_size))
80001582:	fdc42783          	lw	a5,-36(s0)
80001586:	4bb8                	lw	a4,80(a5)
80001588:	fdc42783          	lw	a5,-36(s0)
8000158c:	47fc                	lw	a5,76(a5)
8000158e:	04f77763          	bgeu	a4,a5,800015dc <I2C_isr+0x47a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1018
            {
                data = HAL_get_8bit_reg(this_i2c->base_address, DATA);
80001592:	fdc42783          	lw	a5,-36(s0)
80001596:	439c                	lw	a5,0(a5)
80001598:	07a1                	addi	a5,a5,8
8000159a:	853e                	mv	a0,a5
8000159c:	f2eff0ef          	jal	ra,80000cca <HW_get_8bit_reg>
800015a0:	87aa                	mv	a5,a0
800015a2:	fef406a3          	sb	a5,-19(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1019
                this_i2c->slave_rx_buffer[this_i2c->slave_rx_idx++] = data;
800015a6:	fdc42783          	lw	a5,-36(s0)
800015aa:	47b8                	lw	a4,72(a5)
800015ac:	fdc42783          	lw	a5,-36(s0)
800015b0:	4bbc                	lw	a5,80(a5)
800015b2:	00178613          	addi	a2,a5,1
800015b6:	fdc42683          	lw	a3,-36(s0)
800015ba:	cab0                	sw	a2,80(a3)
800015bc:	97ba                	add	a5,a5,a4
800015be:	fed44703          	lbu	a4,-19(s0)
800015c2:	00e78023          	sb	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1028
                {
                    /* Ignore the slave address byte in the random read address
                       computation in the case where INCLUDE_SLA_IN_RX_PAYLOAD
                       is defined. */
#endif
                    this_i2c->random_read_addr = (this_i2c->random_read_addr << 8) + data;
800015c6:	fdc42783          	lw	a5,-36(s0)
800015ca:	4b9c                	lw	a5,16(a5)
800015cc:	00879713          	slli	a4,a5,0x8
800015d0:	fed44783          	lbu	a5,-19(s0)
800015d4:	973e                	add	a4,a4,a5
800015d6:	fdc42783          	lw	a5,-36(s0)
800015da:	cb98                	sw	a4,16(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1034
#ifdef INCLUDE_SLA_IN_RX_PAYLOAD
                }
#endif
            }
            
            if(this_i2c->slave_rx_idx >= this_i2c->slave_rx_size)
800015dc:	fdc42783          	lw	a5,-36(s0)
800015e0:	4bb8                	lw	a4,80(a5)
800015e2:	fdc42783          	lw	a5,-36(s0)
800015e6:	47fc                	lw	a5,76(a5)
800015e8:	28f76c63          	bltu	a4,a5,80001880 <I2C_isr+0x71e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1037
            {
                /* Rx buffer is full. NACK next received byte. */
                HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x00u); 
800015ec:	fdc42783          	lw	a5,-36(s0)
800015f0:	439c                	lw	a5,0(a5)
800015f2:	4681                	li	a3,0
800015f4:	4611                	li	a2,4
800015f6:	4589                	li	a1,2
800015f8:	853e                	mv	a0,a5
800015fa:	ed6ff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1039
            }
            break;
800015fe:	a449                	j	80001880 <I2C_isr+0x71e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1047
            /* STOP or repeated START occurred. */
            /* We cannot be sure if the transaction has actually completed as
             * this hardware state reports that either a STOP or repeated START
             * condition has occurred. We assume that this is a repeated START
             * if the transaction was a write from the master to this point.*/
            if ( this_i2c->transaction == WRITE_SLAVE_TRANSACTION )
80001600:	fdc42783          	lw	a5,-36(s0)
80001604:	00c7c703          	lbu	a4,12(a5)
80001608:	4791                	li	a5,4
8000160a:	08f71563          	bne	a4,a5,80001694 <I2C_isr+0x532>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1049
            {
                if ( this_i2c->slave_rx_idx == this_i2c->slave_mem_offset_length )
8000160e:	fdc42783          	lw	a5,-36(s0)
80001612:	4bb8                	lw	a4,80(a5)
80001614:	fdc42783          	lw	a5,-36(s0)
80001618:	4fbc                	lw	a5,88(a5)
8000161a:	00f71863          	bne	a4,a5,8000162a <I2C_isr+0x4c8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1051
                {
                    this_i2c->slave_tx_idx = this_i2c->random_read_addr;
8000161e:	fdc42783          	lw	a5,-36(s0)
80001622:	4b98                	lw	a4,16(a5)
80001624:	fdc42783          	lw	a5,-36(s0)
80001628:	c3f8                	sw	a4,68(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1054
                }
                /* Call the slave's write transaction handler if it exists. */
                if ( this_i2c->slave_write_handler != 0u )
8000162a:	fdc42783          	lw	a5,-36(s0)
8000162e:	4ffc                	lw	a5,92(a5)
80001630:	cba1                	beqz	a5,80001680 <I2C_isr+0x51e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1057
                {
                    i2c_slave_handler_ret_t h_ret;
                    h_ret = this_i2c->slave_write_handler( this_i2c, this_i2c->slave_rx_buffer, (uint16_t)this_i2c->slave_rx_idx );
80001632:	fdc42783          	lw	a5,-36(s0)
80001636:	4ff4                	lw	a3,92(a5)
80001638:	fdc42783          	lw	a5,-36(s0)
8000163c:	47b8                	lw	a4,72(a5)
8000163e:	fdc42783          	lw	a5,-36(s0)
80001642:	4bbc                	lw	a5,80(a5)
80001644:	07c2                	slli	a5,a5,0x10
80001646:	83c1                	srli	a5,a5,0x10
80001648:	863e                	mv	a2,a5
8000164a:	85ba                	mv	a1,a4
8000164c:	fdc42503          	lw	a0,-36(s0)
80001650:	9682                	jalr	a3
80001652:	fea42423          	sw	a0,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1058
                    if ( I2C_REENABLE_SLAVE_RX == h_ret )
80001656:	fe842783          	lw	a5,-24(s0)
8000165a:	e789                	bnez	a5,80001664 <I2C_isr+0x502>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1064
                    {
                        /* There is a small risk that the write handler could
                         * call I2C_disable_slave() but return
                         * I2C_REENABLE_SLAVE_RX in error so we only enable
                         * ACKs if still in slave mode. */
                         enable_slave_if_required(this_i2c);
8000165c:	fdc42503          	lw	a0,-36(s0)
80001660:	3cc9                	jal	80001132 <enable_slave_if_required>
80001662:	a081                	j	800016a2 <I2C_isr+0x540>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1068
                    }
                    else
                    {
                        HAL_set_8bit_reg_field( this_i2c->base_address, AA, 0x0u );
80001664:	fdc42783          	lw	a5,-36(s0)
80001668:	439c                	lw	a5,0(a5)
8000166a:	4681                	li	a3,0
8000166c:	4611                	li	a2,4
8000166e:	4589                	li	a1,2
80001670:	853e                	mv	a0,a5
80001672:	e5eff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1072
                        /* Clear slave mode flag as well otherwise in mixed
                         * master/slave applications, the AA bit will get set by
                         * subsequent master operations. */
                        this_i2c->is_slave_enabled = 0u;
80001676:	fdc42783          	lw	a5,-36(s0)
8000167a:	06078023          	sb	zero,96(a5)
8000167e:	a015                	j	800016a2 <I2C_isr+0x540>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1078
                    }
                }
                else
                {
                    /* Re-enable address acknowledge in case we were ready to nack the next received byte. */
                    HAL_set_8bit_reg_field( this_i2c->base_address, AA, 0x01u );
80001680:	fdc42783          	lw	a5,-36(s0)
80001684:	439c                	lw	a5,0(a5)
80001686:	4685                	li	a3,1
80001688:	4611                	li	a2,4
8000168a:	4589                	li	a1,2
8000168c:	853e                	mv	a0,a5
8000168e:	e42ff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
80001692:	a801                	j	800016a2 <I2C_isr+0x540>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1087
            {
                /*
                 * Reset slave_tx_idx so that a subsequent read will result in the slave's
                 * transmit buffer being sent from the first byte.
                 */
                this_i2c->slave_tx_idx = 0u;
80001694:	fdc42783          	lw	a5,-36(s0)
80001698:	0407a223          	sw	zero,68(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1093
                /*
                 * See if we need to re-enable acknowledgement as some error conditions, such
                 * as a master prematurely ending a transfer, can see us get here with AA set
                 * to 0 which will disable slave operation if we are not careful.
                 */
                enable_slave_if_required(this_i2c);
8000169c:	fdc42503          	lw	a0,-36(s0)
800016a0:	3c49                	jal	80001132 <enable_slave_if_required>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1097
            }

            /* Mark any previous master write transaction as complete. */
            this_i2c->slave_status = I2C_SUCCESS;
800016a2:	fdc42783          	lw	a5,-36(s0)
800016a6:	0407aa23          	sw	zero,84(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1100
            
            /* Check if transaction was pending. If yes, set the START bit */
            if(this_i2c->is_transaction_pending)
800016aa:	fdc42783          	lw	a5,-36(s0)
800016ae:	0697c783          	lbu	a5,105(a5)
800016b2:	cb99                	beqz	a5,800016c8 <I2C_isr+0x566>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1102
            {
                HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x01u);
800016b4:	fdc42783          	lw	a5,-36(s0)
800016b8:	439c                	lw	a5,0(a5)
800016ba:	4685                	li	a3,1
800016bc:	02000613          	li	a2,32
800016c0:	4595                	li	a1,5
800016c2:	853e                	mv	a0,a5
800016c4:	e0cff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1109

            /*
             * Set the transaction back to NO_TRANSACTION to allow user to do further
             * transaction
             */
            this_i2c->transaction = NO_TRANSACTION;
800016c8:	fdc42783          	lw	a5,-36(s0)
800016cc:	00078623          	sb	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1111

            break;
800016d0:	aa6d                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1118
        case ST_SLV_RST: /* SMBUS ONLY: timeout state. must clear interrupt */
            /*
             * Set the transaction back to NO_TRANSACTION to allow user to do further
             * transaction.
             */
            this_i2c->transaction = NO_TRANSACTION;
800016d2:	fdc42783          	lw	a5,-36(s0)
800016d6:	00078623          	sb	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1123
            /*
             * Reset slave_tx_idx so that a subsequent read will result in the slave's
             * transmit buffer being sent from the first byte.
             */
            this_i2c->slave_tx_idx = 0u;
800016da:	fdc42783          	lw	a5,-36(s0)
800016de:	0407a223          	sw	zero,68(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1127
            /*
             * Clear status to I2C_FAILED only if there was an operation in progress.
             */
            if(I2C_IN_PROGRESS == this_i2c->slave_status)
800016e2:	fdc42783          	lw	a5,-36(s0)
800016e6:	4bf8                	lw	a4,84(a5)
800016e8:	4785                	li	a5,1
800016ea:	00f71663          	bne	a4,a5,800016f6 <I2C_isr+0x594>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1129
            {
                this_i2c->slave_status = I2C_FAILED;
800016ee:	fdc42783          	lw	a5,-36(s0)
800016f2:	4709                	li	a4,2
800016f4:	cbf8                	sw	a4,84(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1132
            }

            enable_slave_if_required(this_i2c); /* Make sure AA is set correctly */
800016f6:	fdc42503          	lw	a0,-36(s0)
800016fa:	3c25                	jal	80001132 <enable_slave_if_required>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1134

            break;
800016fc:	a279                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1140
            
        /****************** SLAVE TRANSMITTER **************************/
        case ST_SLAVE_SLAR_ACK: /* SLA+R received, ACK returned */
        case ST_SLARW_LA:       /* Arbitration lost, and: */
        case ST_RACK:           /* Data tx'ed, ACK received */
            if ( status == ST_SLAVE_SLAR_ACK )
800016fe:	fe744783          	lbu	a5,-25(s0)
80001702:	0ff7f713          	andi	a4,a5,255
80001706:	0a800793          	li	a5,168
8000170a:	04f71963          	bne	a4,a5,8000175c <I2C_isr+0x5fa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1142
            {
                this_i2c->transaction = READ_SLAVE_TRANSACTION;
8000170e:	fdc42783          	lw	a5,-36(s0)
80001712:	4715                	li	a4,5
80001714:	00e78623          	sb	a4,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1143
                this_i2c->random_read_addr = 0u;
80001718:	fdc42783          	lw	a5,-36(s0)
8000171c:	0007a823          	sw	zero,16(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1144
                this_i2c->slave_status = I2C_IN_PROGRESS;
80001720:	fdc42783          	lw	a5,-36(s0)
80001724:	4705                	li	a4,1
80001726:	cbf8                	sw	a4,84(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1148
                /* If Start Bit is set clear it, but store that information since it is because of
                 * pending transaction
                 */
                if(HAL_get_8bit_reg_field(this_i2c->base_address, STA))
80001728:	fdc42783          	lw	a5,-36(s0)
8000172c:	439c                	lw	a5,0(a5)
8000172e:	02000613          	li	a2,32
80001732:	4595                	li	a1,5
80001734:	853e                	mv	a0,a5
80001736:	dbcff0ef          	jal	ra,80000cf2 <HW_get_8bit_reg_field>
8000173a:	87aa                	mv	a5,a0
8000173c:	c385                	beqz	a5,8000175c <I2C_isr+0x5fa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1150
                {
                    HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x00u);
8000173e:	fdc42783          	lw	a5,-36(s0)
80001742:	439c                	lw	a5,0(a5)
80001744:	4681                	li	a3,0
80001746:	02000613          	li	a2,32
8000174a:	4595                	li	a1,5
8000174c:	853e                	mv	a0,a5
8000174e:	d82ff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1151
                    this_i2c->is_transaction_pending = 1u;
80001752:	fdc42783          	lw	a5,-36(s0)
80001756:	4705                	li	a4,1
80001758:	06e784a3          	sb	a4,105(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1154
                 }
            }
            if (this_i2c->slave_tx_idx >= this_i2c->slave_tx_size)
8000175c:	fdc42783          	lw	a5,-36(s0)
80001760:	43f8                	lw	a4,68(a5)
80001762:	fdc42783          	lw	a5,-36(s0)
80001766:	43bc                	lw	a5,64(a5)
80001768:	00f76c63          	bltu	a4,a5,80001780 <I2C_isr+0x61e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1158
            {
                /* Ensure 0xFF is returned to the master when the slave specifies
                 * an empty transmit buffer. */
                HAL_set_8bit_reg(this_i2c->base_address, DATA, 0xFFu);
8000176c:	fdc42783          	lw	a5,-36(s0)
80001770:	439c                	lw	a5,0(a5)
80001772:	07a1                	addi	a5,a5,8
80001774:	0ff00593          	li	a1,255
80001778:	853e                	mv	a0,a5
8000177a:	d4aff0ef          	jal	ra,80000cc4 <HW_set_8bit_reg>
8000177e:	a03d                	j	800017ac <I2C_isr+0x64a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1163
            }
            else
            {
                /* Load the data the data byte to be sent to the master. */
                HAL_set_8bit_reg(this_i2c->base_address, DATA, (uint_fast8_t)this_i2c->slave_tx_buffer[this_i2c->slave_tx_idx++]);
80001780:	fdc42783          	lw	a5,-36(s0)
80001784:	439c                	lw	a5,0(a5)
80001786:	00878513          	addi	a0,a5,8
8000178a:	fdc42783          	lw	a5,-36(s0)
8000178e:	5fd8                	lw	a4,60(a5)
80001790:	fdc42783          	lw	a5,-36(s0)
80001794:	43fc                	lw	a5,68(a5)
80001796:	00178613          	addi	a2,a5,1
8000179a:	fdc42683          	lw	a3,-36(s0)
8000179e:	c2f0                	sw	a2,68(a3)
800017a0:	97ba                	add	a5,a5,a4
800017a2:	0007c783          	lbu	a5,0(a5)
800017a6:	85be                	mv	a1,a5
800017a8:	d1cff0ef          	jal	ra,80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1166
            }
            /* Determine if this is the last data byte to send to the master. */
            if (this_i2c->slave_tx_idx >= this_i2c->slave_tx_size) /* last byte? */
800017ac:	fdc42783          	lw	a5,-36(s0)
800017b0:	43f8                	lw	a4,68(a5)
800017b2:	fdc42783          	lw	a5,-36(s0)
800017b6:	43bc                	lw	a5,64(a5)
800017b8:	0cf76663          	bltu	a4,a5,80001884 <I2C_isr+0x722>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1168
            {
                 HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x00u); 
800017bc:	fdc42783          	lw	a5,-36(s0)
800017c0:	439c                	lw	a5,0(a5)
800017c2:	4681                	li	a3,0
800017c4:	4611                	li	a2,4
800017c6:	4589                	li	a1,2
800017c8:	853e                	mv	a0,a5
800017ca:	d06ff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1171
                /* Next read transaction will result in slave's transmit buffer
                 * being sent from the first byte. */
                this_i2c->slave_tx_idx = 0u;
800017ce:	fdc42783          	lw	a5,-36(s0)
800017d2:	0407a223          	sw	zero,68(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1173
            }
            break;
800017d6:	a07d                	j	80001884 <I2C_isr+0x722>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1180
        case ST_SLAVE_RNACK:    /* Data byte has been transmitted; not-ACK has been received. */
        case ST_FINAL: /* Last Data byte tx'ed, ACK received */
            /* We assume that the transaction will be stopped by the master.
             * Reset slave_tx_idx so that a subsequent read will result in the slave's
             * transmit buffer being sent from the first byte. */
            this_i2c->slave_tx_idx = 0u;
800017d8:	fdc42783          	lw	a5,-36(s0)
800017dc:	0407a223          	sw	zero,68(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1181
            HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x01u); 
800017e0:	fdc42783          	lw	a5,-36(s0)
800017e4:	439c                	lw	a5,0(a5)
800017e6:	4685                	li	a3,1
800017e8:	4611                	li	a2,4
800017ea:	4589                	li	a1,2
800017ec:	853e                	mv	a0,a5
800017ee:	ce2ff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1184

            /*  Mark previous state as complete */
            this_i2c->slave_status = I2C_SUCCESS;
800017f2:	fdc42783          	lw	a5,-36(s0)
800017f6:	0407aa23          	sw	zero,84(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1186
            /* Check if transaction was pending. If yes, set the START bit */
            if(this_i2c->is_transaction_pending)
800017fa:	fdc42783          	lw	a5,-36(s0)
800017fe:	0697c783          	lbu	a5,105(a5)
80001802:	cb99                	beqz	a5,80001818 <I2C_isr+0x6b6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1188
            {
                HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x01u);
80001804:	fdc42783          	lw	a5,-36(s0)
80001808:	439c                	lw	a5,0(a5)
8000180a:	4685                	li	a3,1
8000180c:	02000613          	li	a2,32
80001810:	4595                	li	a1,5
80001812:	853e                	mv	a0,a5
80001814:	cbcff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1194
            }
            /*
             * Set the transaction back to NO_TRANSACTION to allow user to do further
             * transaction
             */
            this_i2c->transaction = NO_TRANSACTION;
80001818:	fdc42783          	lw	a5,-36(s0)
8000181c:	00078623          	sb	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1196

            break;
80001820:	a0ad                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1205
        case ST_RESET_ACTIVATED:
        case ST_BUS_ERROR: /* Bus error during MST or selected slave modes */
        default:
            /* Some undefined state has encountered. Clear Start bit to make
             * sure, next good transaction happen */
            HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x00u);
80001822:	fdc42783          	lw	a5,-36(s0)
80001826:	439c                	lw	a5,0(a5)
80001828:	4681                	li	a3,0
8000182a:	02000613          	li	a2,32
8000182e:	4595                	li	a1,5
80001830:	853e                	mv	a0,a5
80001832:	c9eff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1210
            /*
             * Set the transaction back to NO_TRANSACTION to allow user to do further
             * transaction.
             */
            this_i2c->transaction = NO_TRANSACTION;
80001836:	fdc42783          	lw	a5,-36(s0)
8000183a:	00078623          	sb	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1215
            /*
             * Reset slave_tx_idx so that a subsequent read will result in the slave's
             * transmit buffer being sent from the first byte.
             */
            this_i2c->slave_tx_idx = 0u;
8000183e:	fdc42783          	lw	a5,-36(s0)
80001842:	0407a223          	sw	zero,68(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1219
            /*
             * Clear statuses to I2C_FAILED only if there was an operation in progress.
             */
            if(I2C_IN_PROGRESS == this_i2c->master_status)
80001846:	fdc42783          	lw	a5,-36(s0)
8000184a:	5bd8                	lw	a4,52(a5)
8000184c:	4785                	li	a5,1
8000184e:	00f71663          	bne	a4,a5,8000185a <I2C_isr+0x6f8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1221
            {
                this_i2c->master_status = I2C_FAILED;
80001852:	fdc42783          	lw	a5,-36(s0)
80001856:	4709                	li	a4,2
80001858:	dbd8                	sw	a4,52(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1224
            }

            if(I2C_IN_PROGRESS == this_i2c->slave_status)
8000185a:	fdc42783          	lw	a5,-36(s0)
8000185e:	4bf8                	lw	a4,84(a5)
80001860:	4785                	li	a5,1
80001862:	02f71363          	bne	a4,a5,80001888 <I2C_isr+0x726>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1226
            {
                this_i2c->slave_status = I2C_FAILED;
80001866:	fdc42783          	lw	a5,-36(s0)
8000186a:	4709                	li	a4,2
8000186c:	cbf8                	sw	a4,84(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1229
            }

            break;
8000186e:	a829                	j	80001888 <I2C_isr+0x726>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:825
              break;
80001870:	0001                	nop
80001872:	a821                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:816
            break;
80001874:	0001                	nop
80001876:	a811                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:937
            break;
80001878:	0001                	nop
8000187a:	a801                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:980
            break;
8000187c:	0001                	nop
8000187e:	a031                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1039
            break;
80001880:	0001                	nop
80001882:	a021                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1173
            break;
80001884:	0001                	nop
80001886:	a011                	j	8000188a <I2C_isr+0x728>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1229
            break;
80001888:	0001                	nop
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1232
    }
    
    if ( clear_irq )
8000188a:	fef44783          	lbu	a5,-17(s0)
8000188e:	cb91                	beqz	a5,800018a2 <I2C_isr+0x740>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1235
    {
        /* clear interrupt. */
        HAL_set_8bit_reg_field(this_i2c->base_address, SI, 0x00u);
80001890:	fdc42783          	lw	a5,-36(s0)
80001894:	439c                	lw	a5,0(a5)
80001896:	4681                	li	a3,0
80001898:	4621                	li	a2,8
8000189a:	458d                	li	a1,3
8000189c:	853e                	mv	a0,a5
8000189e:	c32ff0ef          	jal	ra,80000cd0 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1240
    }
    
    /* Read the status register to ensure the last I2C registers write took place
     * in a system built around a bus making use of posted writes. */
    status = HAL_get_8bit_reg( this_i2c->base_address, STATUS);
800018a2:	fdc42783          	lw	a5,-36(s0)
800018a6:	439c                	lw	a5,0(a5)
800018a8:	0791                	addi	a5,a5,4
800018aa:	853e                	mv	a0,a5
800018ac:	c1eff0ef          	jal	ra,80000cca <HW_get_8bit_reg>
800018b0:	87aa                	mv	a5,a0
800018b2:	fef403a3          	sb	a5,-25(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1241
}
800018b6:	0001                	nop
800018b8:	50b2                	lw	ra,44(sp)
800018ba:	5422                	lw	s0,40(sp)
800018bc:	5492                	lw	s1,36(sp)
800018be:	6145                	addi	sp,sp,48
800018c0:	8082                	ret

800018c2 <MRV_enable_local_irq>:
MRV_enable_local_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:619
{
800018c2:	7179                	addi	sp,sp,-48
800018c4:	d622                	sw	s0,44(sp)
800018c6:	1800                	addi	s0,sp,48
800018c8:	fca42e23          	sw	a0,-36(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:620
    set_csr(mie, mask);
800018cc:	fdc42783          	lw	a5,-36(s0)
800018d0:	3047a7f3          	csrrs	a5,mie,a5
800018d4:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:621
}
800018d8:	0001                	nop
800018da:	5432                	lw	s0,44(sp)
800018dc:	6145                	addi	sp,sp,48
800018de:	8082                	ret

800018e0 <MRV_disable_local_irq>:
MRV_disable_local_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:633
{
800018e0:	7179                	addi	sp,sp,-48
800018e2:	d622                	sw	s0,44(sp)
800018e4:	1800                	addi	s0,sp,48
800018e6:	fca42e23          	sw	a0,-36(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:634
    clear_csr(mie, mask);
800018ea:	fdc42783          	lw	a5,-36(s0)
800018ee:	3047b7f3          	csrrc	a5,mie,a5
800018f2:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:635
}
800018f6:	0001                	nop
800018f8:	5432                	lw	s0,44(sp)
800018fa:	6145                	addi	sp,sp,48
800018fc:	8082                	ret

800018fe <I2C_enable_irq>:
I2C_enable_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:19
/*------------------------------------------------------------------------------
 * This function must be modified to enable interrupts generated from the
 * CoreI2C instance identified as parameter.
 */
void I2C_enable_irq( i2c_instance_t * this_i2c )
{
800018fe:	1101                	addi	sp,sp,-32
80001900:	ce06                	sw	ra,28(sp)
80001902:	cc22                	sw	s0,24(sp)
80001904:	1000                	addi	s0,sp,32
80001906:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:20
    if(this_i2c == &g_i2c_instance_cam1)
8000190a:	fec42703          	lw	a4,-20(s0)
8000190e:	97418793          	addi	a5,gp,-1676 # 80007624 <g_i2c_instance_cam1>
80001912:	00f71563          	bne	a4,a5,8000191c <I2C_enable_irq+0x1e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:22
    {
        MRV_enable_local_irq(MRV32_MSYS_EIE0_IRQn);
80001916:	01000537          	lui	a0,0x1000
8000191a:	3765                	jal	800018c2 <MRV_enable_local_irq>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:24
    }
}
8000191c:	0001                	nop
8000191e:	40f2                	lw	ra,28(sp)
80001920:	4462                	lw	s0,24(sp)
80001922:	6105                	addi	sp,sp,32
80001924:	8082                	ret

80001926 <I2C_disable_irq>:
I2C_disable_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:31
/*------------------------------------------------------------------------------
 * This function must be modified to disable interrupts generated from the
 * CoreI2C instance identified as parameter.
 */
void I2C_disable_irq( i2c_instance_t * this_i2c )
{
80001926:	1101                	addi	sp,sp,-32
80001928:	ce06                	sw	ra,28(sp)
8000192a:	cc22                	sw	s0,24(sp)
8000192c:	1000                	addi	s0,sp,32
8000192e:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:32
    if(this_i2c == &g_i2c_instance_cam1)
80001932:	fec42703          	lw	a4,-20(s0)
80001936:	97418793          	addi	a5,gp,-1676 # 80007624 <g_i2c_instance_cam1>
8000193a:	00f71563          	bne	a4,a5,80001944 <I2C_disable_irq+0x1e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:34
       {
           MRV_disable_local_irq(MRV32_MSYS_EIE0_IRQn);
8000193e:	01000537          	lui	a0,0x1000
80001942:	3f79                	jal	800018e0 <MRV_disable_local_irq>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:36
       }
}
80001944:	0001                	nop
80001946:	40f2                	lw	ra,28(sp)
80001948:	4462                	lw	s0,24(sp)
8000194a:	6105                	addi	sp,sp,32
8000194c:	8082                	ret

8000194e <GPIO_init>:
GPIO_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:37
(
    gpio_instance_t *   this_gpio,
    addr_t              base_addr,
    gpio_apb_width_t    bus_width
)
{
8000194e:	7179                	addi	sp,sp,-48
80001950:	d606                	sw	ra,44(sp)
80001952:	d422                	sw	s0,40(sp)
80001954:	1800                	addi	s0,sp,48
80001956:	fca42e23          	sw	a0,-36(s0)
8000195a:	fcb42c23          	sw	a1,-40(s0)
8000195e:	fcc42a23          	sw	a2,-44(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:38
    uint8_t i = 0;
80001962:	fe0407a3          	sb	zero,-17(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:39
    addr_t cfg_reg_addr = base_addr;
80001966:	fd842783          	lw	a5,-40(s0)
8000196a:	fef42423          	sw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:41
    
    this_gpio->base_addr = base_addr;
8000196e:	fdc42783          	lw	a5,-36(s0)
80001972:	fd842703          	lw	a4,-40(s0)
80001976:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:42
    this_gpio->apb_bus_width = bus_width;
80001978:	fdc42783          	lw	a5,-36(s0)
8000197c:	fd442703          	lw	a4,-44(s0)
80001980:	c3d8                	sw	a4,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:45
    
    /* Clear configuration. */
    for( i = 0, cfg_reg_addr = base_addr; i < NB_OF_GPIO; ++i )
80001982:	fe0407a3          	sb	zero,-17(s0)
80001986:	fd842783          	lw	a5,-40(s0)
8000198a:	fef42423          	sw	a5,-24(s0)
8000198e:	a005                	j	800019ae <GPIO_init+0x60>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:47 (discriminator 3)
    {
        HW_set_8bit_reg( cfg_reg_addr, 0 );
80001990:	4581                	li	a1,0
80001992:	fe842503          	lw	a0,-24(s0)
80001996:	b2eff0ef          	jal	ra,80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:48 (discriminator 3)
        cfg_reg_addr += 4;
8000199a:	fe842783          	lw	a5,-24(s0)
8000199e:	0791                	addi	a5,a5,4
800019a0:	fef42423          	sw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:45 (discriminator 3)
    for( i = 0, cfg_reg_addr = base_addr; i < NB_OF_GPIO; ++i )
800019a4:	fef44783          	lbu	a5,-17(s0)
800019a8:	0785                	addi	a5,a5,1
800019aa:	fef407a3          	sb	a5,-17(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:45 (discriminator 1)
800019ae:	fef44703          	lbu	a4,-17(s0)
800019b2:	47fd                	li	a5,31
800019b4:	fce7fee3          	bgeu	a5,a4,80001990 <GPIO_init+0x42>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:51
    }
    /* Clear any pending interrupts */
    switch( this_gpio->apb_bus_width )
800019b8:	fdc42783          	lw	a5,-36(s0)
800019bc:	43dc                	lw	a5,4(a5)
800019be:	4705                	li	a4,1
800019c0:	02e78063          	beq	a5,a4,800019e0 <GPIO_init+0x92>
800019c4:	c7a9                	beqz	a5,80001a0e <GPIO_init+0xc0>
800019c6:	4709                	li	a4,2
800019c8:	08e79c63          	bne	a5,a4,80001a60 <GPIO_init+0x112>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:54
    {
        case GPIO_APB_32_BITS_BUS:
            HAL_set_32bit_reg( this_gpio->base_addr, IRQ, CLEAR_ALL_IRQ32 );
800019cc:	fdc42783          	lw	a5,-36(s0)
800019d0:	439c                	lw	a5,0(a5)
800019d2:	08078793          	addi	a5,a5,128
800019d6:	55fd                	li	a1,-1
800019d8:	853e                	mv	a0,a5
800019da:	a7cff0ef          	jal	ra,80000c56 <HW_set_32bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:55
            break;
800019de:	a059                	j	80001a64 <GPIO_init+0x116>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:58
            
        case GPIO_APB_16_BITS_BUS:
            HAL_set_16bit_reg( this_gpio->base_addr, IRQ0, (uint16_t)CLEAR_ALL_IRQ16 );
800019e0:	fdc42783          	lw	a5,-36(s0)
800019e4:	439c                	lw	a5,0(a5)
800019e6:	08078713          	addi	a4,a5,128
800019ea:	67c1                	lui	a5,0x10
800019ec:	fff78593          	addi	a1,a5,-1 # ffff <STACK_SIZE+0xf7ff>
800019f0:	853a                	mv	a0,a4
800019f2:	a98ff0ef          	jal	ra,80000c8a <HW_set_16bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:59
            HAL_set_16bit_reg( this_gpio->base_addr, IRQ1, (uint16_t)CLEAR_ALL_IRQ16 );
800019f6:	fdc42783          	lw	a5,-36(s0)
800019fa:	439c                	lw	a5,0(a5)
800019fc:	08478713          	addi	a4,a5,132
80001a00:	67c1                	lui	a5,0x10
80001a02:	fff78593          	addi	a1,a5,-1 # ffff <STACK_SIZE+0xf7ff>
80001a06:	853a                	mv	a0,a4
80001a08:	a82ff0ef          	jal	ra,80000c8a <HW_set_16bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:60
            break;
80001a0c:	a8a1                	j	80001a64 <GPIO_init+0x116>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:63
            
        case GPIO_APB_8_BITS_BUS:
            HAL_set_8bit_reg( this_gpio->base_addr, IRQ0, (uint8_t)CLEAR_ALL_IRQ8 );
80001a0e:	fdc42783          	lw	a5,-36(s0)
80001a12:	439c                	lw	a5,0(a5)
80001a14:	08078793          	addi	a5,a5,128
80001a18:	0ff00593          	li	a1,255
80001a1c:	853e                	mv	a0,a5
80001a1e:	aa6ff0ef          	jal	ra,80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:64
            HAL_set_8bit_reg( this_gpio->base_addr, IRQ1, (uint8_t)CLEAR_ALL_IRQ8 );
80001a22:	fdc42783          	lw	a5,-36(s0)
80001a26:	439c                	lw	a5,0(a5)
80001a28:	08478793          	addi	a5,a5,132
80001a2c:	0ff00593          	li	a1,255
80001a30:	853e                	mv	a0,a5
80001a32:	a92ff0ef          	jal	ra,80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:65
            HAL_set_8bit_reg( this_gpio->base_addr, IRQ2, (uint8_t)CLEAR_ALL_IRQ8 );
80001a36:	fdc42783          	lw	a5,-36(s0)
80001a3a:	439c                	lw	a5,0(a5)
80001a3c:	08878793          	addi	a5,a5,136
80001a40:	0ff00593          	li	a1,255
80001a44:	853e                	mv	a0,a5
80001a46:	a7eff0ef          	jal	ra,80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:66
            HAL_set_8bit_reg( this_gpio->base_addr, IRQ3, (uint8_t)CLEAR_ALL_IRQ8 );
80001a4a:	fdc42783          	lw	a5,-36(s0)
80001a4e:	439c                	lw	a5,0(a5)
80001a50:	08c78793          	addi	a5,a5,140
80001a54:	0ff00593          	li	a1,255
80001a58:	853e                	mv	a0,a5
80001a5a:	a6aff0ef          	jal	ra,80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:67
            break;
80001a5e:	a019                	j	80001a64 <GPIO_init+0x116>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:70 (discriminator 1)
            
        default:
            HAL_ASSERT(0);
80001a60:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:71 (discriminator 1)
            break;
80001a62:	0001                	nop
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:73
    }
}
80001a64:	0001                	nop
80001a66:	50b2                	lw	ra,44(sp)
80001a68:	5422                	lw	s0,40(sp)
80001a6a:	6145                	addi	sp,sp,48
80001a6c:	8082                	ret

80001a6e <GPIO_set_output>:
GPIO_set_output():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:232
(
    gpio_instance_t *   this_gpio,
    gpio_id_t           port_id,
    uint8_t             value
)
{
80001a6e:	7179                	addi	sp,sp,-48
80001a70:	d606                	sw	ra,44(sp)
80001a72:	d422                	sw	s0,40(sp)
80001a74:	1800                	addi	s0,sp,48
80001a76:	fca42e23          	sw	a0,-36(s0)
80001a7a:	fcb42c23          	sw	a1,-40(s0)
80001a7e:	87b2                	mv	a5,a2
80001a80:	fcf40ba3          	sb	a5,-41(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:233
    HAL_ASSERT( port_id < NB_OF_GPIO );
80001a84:	fd842703          	lw	a4,-40(s0)
80001a88:	47fd                	li	a5,31
80001a8a:	00e7f363          	bgeu	a5,a4,80001a90 <GPIO_set_output+0x22>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:233 (discriminator 1)
80001a8e:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:236
    
            
    switch( this_gpio->apb_bus_width )
80001a90:	fdc42783          	lw	a5,-36(s0)
80001a94:	43dc                	lw	a5,4(a5)
80001a96:	4705                	li	a4,1
80001a98:	08e78663          	beq	a5,a4,80001b24 <GPIO_set_output+0xb6>
80001a9c:	12078263          	beqz	a5,80001bc0 <GPIO_set_output+0x152>
80001aa0:	4709                	li	a4,2
80001aa2:	1ae79d63          	bne	a5,a4,80001c5c <GPIO_set_output+0x1ee>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:242
    {
        case GPIO_APB_32_BITS_BUS:
            {
                uint32_t outputs_state;
                
                outputs_state = HAL_get_32bit_reg( this_gpio->base_addr, GPIO_OUT );
80001aa6:	fdc42783          	lw	a5,-36(s0)
80001aaa:	439c                	lw	a5,0(a5)
80001aac:	0a078793          	addi	a5,a5,160
80001ab0:	853e                	mv	a0,a5
80001ab2:	9a8ff0ef          	jal	ra,80000c5a <HW_get_32bit_reg>
80001ab6:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:243
                if ( 0 == value )
80001aba:	fd744783          	lbu	a5,-41(s0)
80001abe:	ef99                	bnez	a5,80001adc <GPIO_set_output+0x6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:245
                {
                    outputs_state &= ~(1 << port_id);
80001ac0:	fd842783          	lw	a5,-40(s0)
80001ac4:	4705                	li	a4,1
80001ac6:	00f717b3          	sll	a5,a4,a5
80001aca:	fff7c793          	not	a5,a5
80001ace:	873e                	mv	a4,a5
80001ad0:	fec42783          	lw	a5,-20(s0)
80001ad4:	8ff9                	and	a5,a5,a4
80001ad6:	fef42623          	sw	a5,-20(s0)
80001ada:	a821                	j	80001af2 <GPIO_set_output+0x84>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:249
                }
                else
                {
                    outputs_state |= 1 << port_id;
80001adc:	fd842783          	lw	a5,-40(s0)
80001ae0:	4705                	li	a4,1
80001ae2:	00f717b3          	sll	a5,a4,a5
80001ae6:	873e                	mv	a4,a5
80001ae8:	fec42783          	lw	a5,-20(s0)
80001aec:	8fd9                	or	a5,a5,a4
80001aee:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:251
                }
                HAL_set_32bit_reg( this_gpio->base_addr, GPIO_OUT, outputs_state );
80001af2:	fdc42783          	lw	a5,-36(s0)
80001af6:	439c                	lw	a5,0(a5)
80001af8:	0a078793          	addi	a5,a5,160
80001afc:	fec42583          	lw	a1,-20(s0)
80001b00:	853e                	mv	a0,a5
80001b02:	954ff0ef          	jal	ra,80000c56 <HW_set_32bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:260
                 * the expected value may indicate that some of the GPIOs may not exist due to
                 * the number of GPIOs selected in the CoreGPIO hardware flow configuration.
                 * It may also indicate that the base address or APB bus width passed as
                 * parameter to the GPIO_init() function do not match the hardware design.
                 */
                HAL_ASSERT( HAL_get_32bit_reg( this_gpio->base_addr, GPIO_OUT ) == outputs_state );
80001b06:	fdc42783          	lw	a5,-36(s0)
80001b0a:	439c                	lw	a5,0(a5)
80001b0c:	0a078793          	addi	a5,a5,160
80001b10:	853e                	mv	a0,a5
80001b12:	948ff0ef          	jal	ra,80000c5a <HW_get_32bit_reg>
80001b16:	872a                	mv	a4,a0
80001b18:	fec42783          	lw	a5,-20(s0)
80001b1c:	14e78263          	beq	a5,a4,80001c60 <GPIO_set_output+0x1f2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:260 (discriminator 1)
80001b20:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:262 (discriminator 1)
            }
            break;
80001b22:	aa3d                	j	80001c60 <GPIO_set_output+0x1f2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:267
            
        case GPIO_APB_16_BITS_BUS:
            {
                uint16_t outputs_state;
                uint32_t gpio_out_reg_addr = this_gpio->base_addr + GPIO_OUT_REG_OFFSET + ((port_id >> 4) * 4);
80001b24:	fdc42783          	lw	a5,-36(s0)
80001b28:	4398                	lw	a4,0(a5)
80001b2a:	fd842783          	lw	a5,-40(s0)
80001b2e:	8391                	srli	a5,a5,0x4
80001b30:	078a                	slli	a5,a5,0x2
80001b32:	97ba                	add	a5,a5,a4
80001b34:	0a078793          	addi	a5,a5,160
80001b38:	fef42223          	sw	a5,-28(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:269
                
                outputs_state = HW_get_16bit_reg( gpio_out_reg_addr );
80001b3c:	fe442503          	lw	a0,-28(s0)
80001b40:	950ff0ef          	jal	ra,80000c90 <HW_get_16bit_reg>
80001b44:	87aa                	mv	a5,a0
80001b46:	fef41523          	sh	a5,-22(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:270
                if ( 0 == value )
80001b4a:	fd744783          	lbu	a5,-41(s0)
80001b4e:	e795                	bnez	a5,80001b7a <GPIO_set_output+0x10c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:272
                {
                    outputs_state &= ~(1 << (port_id & 0x0F));
80001b50:	fd842783          	lw	a5,-40(s0)
80001b54:	8bbd                	andi	a5,a5,15
80001b56:	4705                	li	a4,1
80001b58:	00f717b3          	sll	a5,a4,a5
80001b5c:	07c2                	slli	a5,a5,0x10
80001b5e:	87c1                	srai	a5,a5,0x10
80001b60:	fff7c793          	not	a5,a5
80001b64:	01079713          	slli	a4,a5,0x10
80001b68:	8741                	srai	a4,a4,0x10
80001b6a:	fea41783          	lh	a5,-22(s0)
80001b6e:	8ff9                	and	a5,a5,a4
80001b70:	07c2                	slli	a5,a5,0x10
80001b72:	87c1                	srai	a5,a5,0x10
80001b74:	fef41523          	sh	a5,-22(s0)
80001b78:	a00d                	j	80001b9a <GPIO_set_output+0x12c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:276
                }
                else
                {
                    outputs_state |= 1 << (port_id & 0x0F);
80001b7a:	fd842783          	lw	a5,-40(s0)
80001b7e:	8bbd                	andi	a5,a5,15
80001b80:	4705                	li	a4,1
80001b82:	00f717b3          	sll	a5,a4,a5
80001b86:	01079713          	slli	a4,a5,0x10
80001b8a:	8741                	srai	a4,a4,0x10
80001b8c:	fea41783          	lh	a5,-22(s0)
80001b90:	8fd9                	or	a5,a5,a4
80001b92:	07c2                	slli	a5,a5,0x10
80001b94:	87c1                	srai	a5,a5,0x10
80001b96:	fef41523          	sh	a5,-22(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:278
                }
                HW_set_16bit_reg( gpio_out_reg_addr, outputs_state );
80001b9a:	fea45783          	lhu	a5,-22(s0)
80001b9e:	85be                	mv	a1,a5
80001ba0:	fe442503          	lw	a0,-28(s0)
80001ba4:	8e6ff0ef          	jal	ra,80000c8a <HW_set_16bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:287
                 * the expected value may indicate that some of the GPIOs may not exist due to
                 * the number of GPIOs selected in the CoreGPIO hardware flow configuration.
                 * It may also indicate that the base address or APB bus width passed as
                 * parameter to the GPIO_init() function do not match the hardware design.
                 */
                HAL_ASSERT( HW_get_16bit_reg( gpio_out_reg_addr ) == outputs_state );
80001ba8:	fe442503          	lw	a0,-28(s0)
80001bac:	8e4ff0ef          	jal	ra,80000c90 <HW_get_16bit_reg>
80001bb0:	87aa                	mv	a5,a0
80001bb2:	873e                	mv	a4,a5
80001bb4:	fea45783          	lhu	a5,-22(s0)
80001bb8:	0ae78663          	beq	a5,a4,80001c64 <GPIO_set_output+0x1f6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:287 (discriminator 1)
80001bbc:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:289 (discriminator 1)
            }
            break;
80001bbe:	a05d                	j	80001c64 <GPIO_set_output+0x1f6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:294
            
        case GPIO_APB_8_BITS_BUS:
            {
                uint8_t outputs_state;
                uint32_t gpio_out_reg_addr = this_gpio->base_addr + GPIO_OUT_REG_OFFSET + ((port_id >> 3) * 4);
80001bc0:	fdc42783          	lw	a5,-36(s0)
80001bc4:	4398                	lw	a4,0(a5)
80001bc6:	fd842783          	lw	a5,-40(s0)
80001bca:	838d                	srli	a5,a5,0x3
80001bcc:	078a                	slli	a5,a5,0x2
80001bce:	97ba                	add	a5,a5,a4
80001bd0:	0a078793          	addi	a5,a5,160
80001bd4:	fef42023          	sw	a5,-32(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:296
                
                outputs_state = HW_get_8bit_reg( gpio_out_reg_addr );
80001bd8:	fe042503          	lw	a0,-32(s0)
80001bdc:	8eeff0ef          	jal	ra,80000cca <HW_get_8bit_reg>
80001be0:	87aa                	mv	a5,a0
80001be2:	fef404a3          	sb	a5,-23(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:297
                if ( 0 == value )
80001be6:	fd744783          	lbu	a5,-41(s0)
80001bea:	e795                	bnez	a5,80001c16 <GPIO_set_output+0x1a8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:299
                {
                    outputs_state &= ~(1 << (port_id & 0x07));
80001bec:	fd842783          	lw	a5,-40(s0)
80001bf0:	8b9d                	andi	a5,a5,7
80001bf2:	4705                	li	a4,1
80001bf4:	00f717b3          	sll	a5,a4,a5
80001bf8:	07e2                	slli	a5,a5,0x18
80001bfa:	87e1                	srai	a5,a5,0x18
80001bfc:	fff7c793          	not	a5,a5
80001c00:	01879713          	slli	a4,a5,0x18
80001c04:	8761                	srai	a4,a4,0x18
80001c06:	fe940783          	lb	a5,-23(s0)
80001c0a:	8ff9                	and	a5,a5,a4
80001c0c:	07e2                	slli	a5,a5,0x18
80001c0e:	87e1                	srai	a5,a5,0x18
80001c10:	fef404a3          	sb	a5,-23(s0)
80001c14:	a00d                	j	80001c36 <GPIO_set_output+0x1c8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:303
                }
                else
                {
                    outputs_state |= 1 << (port_id & 0x07);
80001c16:	fd842783          	lw	a5,-40(s0)
80001c1a:	8b9d                	andi	a5,a5,7
80001c1c:	4705                	li	a4,1
80001c1e:	00f717b3          	sll	a5,a4,a5
80001c22:	01879713          	slli	a4,a5,0x18
80001c26:	8761                	srai	a4,a4,0x18
80001c28:	fe940783          	lb	a5,-23(s0)
80001c2c:	8fd9                	or	a5,a5,a4
80001c2e:	07e2                	slli	a5,a5,0x18
80001c30:	87e1                	srai	a5,a5,0x18
80001c32:	fef404a3          	sb	a5,-23(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:305
                }
                HW_set_8bit_reg( gpio_out_reg_addr, outputs_state );
80001c36:	fe944783          	lbu	a5,-23(s0)
80001c3a:	85be                	mv	a1,a5
80001c3c:	fe042503          	lw	a0,-32(s0)
80001c40:	884ff0ef          	jal	ra,80000cc4 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:314
                 * the expected value may indicate that some of the GPIOs may not exist due to
                 * the number of GPIOs selected in the CoreGPIO hardware flow configuration.
                 * It may also indicate that the base address or APB bus width passed as
                 * parameter to the GPIO_init() function do not match the hardware design.
                 */
                HAL_ASSERT( HW_get_8bit_reg( gpio_out_reg_addr ) == outputs_state );
80001c44:	fe042503          	lw	a0,-32(s0)
80001c48:	882ff0ef          	jal	ra,80000cca <HW_get_8bit_reg>
80001c4c:	87aa                	mv	a5,a0
80001c4e:	873e                	mv	a4,a5
80001c50:	fe944783          	lbu	a5,-23(s0)
80001c54:	00e78a63          	beq	a5,a4,80001c68 <GPIO_set_output+0x1fa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:314 (discriminator 1)
80001c58:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:316 (discriminator 1)
            }
            break;
80001c5a:	a039                	j	80001c68 <GPIO_set_output+0x1fa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:319 (discriminator 1)
            
        default:
            HAL_ASSERT(0);
80001c5c:	9002                	ebreak
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:320 (discriminator 1)
            break;
80001c5e:	a031                	j	80001c6a <GPIO_set_output+0x1fc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:262
            break;
80001c60:	0001                	nop
80001c62:	a021                	j	80001c6a <GPIO_set_output+0x1fc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:289
            break;
80001c64:	0001                	nop
80001c66:	a011                	j	80001c6a <GPIO_set_output+0x1fc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:316
            break;
80001c68:	0001                	nop
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:322
    }
}
80001c6a:	0001                	nop
80001c6c:	50b2                	lw	ra,44(sp)
80001c6e:	5422                	lw	s0,40(sp)
80001c70:	6145                	addi	sp,sp,48
80001c72:	8082                	ret

80001c74 <axi4litewrite>:
axi4litewrite():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreAXI4-Lite/AXI4-Lite.c:22
	//data = (uint32_t)(*(volatile int*) address);
return data;
}

 volatile void axi4litewrite(uint32_t address,uint32_t data)
 {
80001c74:	1101                	addi	sp,sp,-32
80001c76:	ce22                	sw	s0,28(sp)
80001c78:	1000                	addi	s0,sp,32
80001c7a:	fea42623          	sw	a0,-20(s0)
80001c7e:	feb42423          	sw	a1,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreAXI4-Lite/AXI4-Lite.c:24

 	*(volatile int*) address = data;
80001c82:	fec42783          	lw	a5,-20(s0)
80001c86:	fe842703          	lw	a4,-24(s0)
80001c8a:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/platform/drivers/fpga_ip/CoreAXI4-Lite/AXI4-Lite.c:26

 }
80001c8c:	0001                	nop
80001c8e:	4472                	lw	s0,28(sp)
80001c90:	6105                	addi	sp,sp,32
80001c92:	8082                	ret

80001c94 <sensor_i2c_write>:
sensor_i2c_write():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:13

static uint8_t tx_buffer[64];
static uint16_t write_length;
static i2c_status_t status;

static i2c_status_t sensor_i2c_write(uint8_t i2c_ch_sel, uint16_t data_reg, uint8_t data) {
80001c94:	1101                	addi	sp,sp,-32
80001c96:	ce06                	sw	ra,28(sp)
80001c98:	cc22                	sw	s0,24(sp)
80001c9a:	1000                	addi	s0,sp,32
80001c9c:	87aa                	mv	a5,a0
80001c9e:	86ae                	mv	a3,a1
80001ca0:	8732                	mv	a4,a2
80001ca2:	fef407a3          	sb	a5,-17(s0)
80001ca6:	87b6                	mv	a5,a3
80001ca8:	fef41623          	sh	a5,-20(s0)
80001cac:	87ba                	mv	a5,a4
80001cae:	fef40723          	sb	a5,-18(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:14
	tx_buffer[0] = data_reg >> 8;
80001cb2:	fec45783          	lhu	a5,-20(s0)
80001cb6:	83a1                	srli	a5,a5,0x8
80001cb8:	07c2                	slli	a5,a5,0x10
80001cba:	83c1                	srli	a5,a5,0x10
80001cbc:	0ff7f713          	andi	a4,a5,255
80001cc0:	8c018793          	addi	a5,gp,-1856 # 80007570 <__sbss_end>
80001cc4:	00e78023          	sb	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:15
	tx_buffer[1] = data_reg & 0xff;
80001cc8:	fec45783          	lhu	a5,-20(s0)
80001ccc:	0ff7f713          	andi	a4,a5,255
80001cd0:	8c018793          	addi	a5,gp,-1856 # 80007570 <__sbss_end>
80001cd4:	00e780a3          	sb	a4,1(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:16
	tx_buffer[2] = data;// >> 8;
80001cd8:	8c018793          	addi	a5,gp,-1856 # 80007570 <__sbss_end>
80001cdc:	fee44703          	lbu	a4,-18(s0)
80001ce0:	00e78123          	sb	a4,2(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:17
	write_length = sizeof(data_reg) + sizeof(data);
80001ce4:	83418793          	addi	a5,gp,-1996 # 800074e4 <write_length>
80001ce8:	470d                	li	a4,3
80001cea:	00e79023          	sh	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:20


		I2C_write(sensor1_i2c, IMX334_1_DEV_REG, (const uint8_t *) tx_buffer,
80001cee:	00005797          	auipc	a5,0x5
80001cf2:	7c278793          	addi	a5,a5,1986 # 800074b0 <__sdata_load>
80001cf6:	4388                	lw	a0,0(a5)
80001cf8:	83418793          	addi	a5,gp,-1996 # 800074e4 <write_length>
80001cfc:	0007d783          	lhu	a5,0(a5)
80001d00:	4701                	li	a4,0
80001d02:	86be                	mv	a3,a5
80001d04:	8c018613          	addi	a2,gp,-1856 # 80007570 <__sbss_end>
80001d08:	45e9                	li	a1,26
80001d0a:	ad6ff0ef          	jal	ra,80000fe0 <I2C_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:22
					write_length, I2C_RELEASE_BUS );
			status = I2C_wait_complete(sensor1_i2c, I2C_NO_TIMEOUT );
80001d0e:	00005797          	auipc	a5,0x5
80001d12:	7a278793          	addi	a5,a5,1954 # 800074b0 <__sdata_load>
80001d16:	439c                	lw	a5,0(a5)
80001d18:	4581                	li	a1,0
80001d1a:	853e                	mv	a0,a5
80001d1c:	bceff0ef          	jal	ra,800010ea <I2C_wait_complete>
80001d20:	872a                	mv	a4,a0
80001d22:	83818793          	addi	a5,gp,-1992 # 800074e8 <status>
80001d26:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:24

			tx_buffer[0] = data_reg >> 8;
80001d28:	fec45783          	lhu	a5,-20(s0)
80001d2c:	83a1                	srli	a5,a5,0x8
80001d2e:	07c2                	slli	a5,a5,0x10
80001d30:	83c1                	srli	a5,a5,0x10
80001d32:	0ff7f713          	andi	a4,a5,255
80001d36:	8c018793          	addi	a5,gp,-1856 # 80007570 <__sbss_end>
80001d3a:	00e78023          	sb	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:25
			tx_buffer[1] = data_reg & 0xff;
80001d3e:	fec45783          	lhu	a5,-20(s0)
80001d42:	0ff7f713          	andi	a4,a5,255
80001d46:	8c018793          	addi	a5,gp,-1856 # 80007570 <__sbss_end>
80001d4a:	00e780a3          	sb	a4,1(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:26
			tx_buffer[2] = data;
80001d4e:	8c018793          	addi	a5,gp,-1856 # 80007570 <__sbss_end>
80001d52:	fee44703          	lbu	a4,-18(s0)
80001d56:	00e78123          	sb	a4,2(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:27
			write_length = sizeof(data_reg) + sizeof(data);
80001d5a:	83418793          	addi	a5,gp,-1996 # 800074e4 <write_length>
80001d5e:	470d                	li	a4,3
80001d60:	00e79023          	sh	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:29

	return status;
80001d64:	83818793          	addi	a5,gp,-1992 # 800074e8 <status>
80001d68:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:30
}
80001d6a:	853e                	mv	a0,a5
80001d6c:	40f2                	lw	ra,28(sp)
80001d6e:	4462                	lw	s0,24(sp)
80001d70:	6105                	addi	sp,sp,32
80001d72:	8082                	ret

80001d74 <sensor_i2c_write_gain>:
sensor_i2c_write_gain():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:32

static i2c_status_t sensor_i2c_write_gain(uint8_t i2c_ch_sel, uint16_t data_reg, uint8_t data) {
80001d74:	1101                	addi	sp,sp,-32
80001d76:	ce06                	sw	ra,28(sp)
80001d78:	cc22                	sw	s0,24(sp)
80001d7a:	1000                	addi	s0,sp,32
80001d7c:	87aa                	mv	a5,a0
80001d7e:	86ae                	mv	a3,a1
80001d80:	8732                	mv	a4,a2
80001d82:	fef407a3          	sb	a5,-17(s0)
80001d86:	87b6                	mv	a5,a3
80001d88:	fef41623          	sh	a5,-20(s0)
80001d8c:	87ba                	mv	a5,a4
80001d8e:	fef40723          	sb	a5,-18(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:34

    tx_buffer[0] = data_reg >> 8;
80001d92:	fec45783          	lhu	a5,-20(s0)
80001d96:	83a1                	srli	a5,a5,0x8
80001d98:	07c2                	slli	a5,a5,0x10
80001d9a:	83c1                	srli	a5,a5,0x10
80001d9c:	0ff7f713          	andi	a4,a5,255
80001da0:	8c018793          	addi	a5,gp,-1856 # 80007570 <__sbss_end>
80001da4:	00e78023          	sb	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:35
    tx_buffer[1] = data_reg & 0xff;
80001da8:	fec45783          	lhu	a5,-20(s0)
80001dac:	0ff7f713          	andi	a4,a5,255
80001db0:	8c018793          	addi	a5,gp,-1856 # 80007570 <__sbss_end>
80001db4:	00e780a3          	sb	a4,1(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:36
    tx_buffer[2] = data;// >> 8;
80001db8:	8c018793          	addi	a5,gp,-1856 # 80007570 <__sbss_end>
80001dbc:	fee44703          	lbu	a4,-18(s0)
80001dc0:	00e78123          	sb	a4,2(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:37
    write_length = sizeof(data_reg) + sizeof(data);
80001dc4:	83418793          	addi	a5,gp,-1996 # 800074e4 <write_length>
80001dc8:	470d                	li	a4,3
80001dca:	00e79023          	sh	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:39

    I2C_write(sensor1_i2c, IMX334_1_DEV_REG, (const uint8_t *) tx_buffer,write_length, I2C_RELEASE_BUS );
80001dce:	00005797          	auipc	a5,0x5
80001dd2:	6e278793          	addi	a5,a5,1762 # 800074b0 <__sdata_load>
80001dd6:	4388                	lw	a0,0(a5)
80001dd8:	83418793          	addi	a5,gp,-1996 # 800074e4 <write_length>
80001ddc:	0007d783          	lhu	a5,0(a5)
80001de0:	4701                	li	a4,0
80001de2:	86be                	mv	a3,a5
80001de4:	8c018613          	addi	a2,gp,-1856 # 80007570 <__sbss_end>
80001de8:	45e9                	li	a1,26
80001dea:	9f6ff0ef          	jal	ra,80000fe0 <I2C_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:40
    status = I2C_wait_complete(sensor1_i2c, I2C_NO_TIMEOUT );
80001dee:	00005797          	auipc	a5,0x5
80001df2:	6c278793          	addi	a5,a5,1730 # 800074b0 <__sdata_load>
80001df6:	439c                	lw	a5,0(a5)
80001df8:	4581                	li	a1,0
80001dfa:	853e                	mv	a0,a5
80001dfc:	aeeff0ef          	jal	ra,800010ea <I2C_wait_complete>
80001e00:	872a                	mv	a4,a0
80001e02:	83818793          	addi	a5,gp,-1992 # 800074e8 <status>
80001e06:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:42

    return status;
80001e08:	83818793          	addi	a5,gp,-1992 # 800074e8 <status>
80001e0c:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:43
}
80001e0e:	853e                	mv	a0,a5
80001e10:	40f2                	lw	ra,28(sp)
80001e12:	4462                	lw	s0,24(sp)
80001e14:	6105                	addi	sp,sp,32
80001e16:	8082                	ret

80001e18 <imx334_cam_init>:
imx334_cam_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:45
void imx334_cam_init()
{
80001e18:	1141                	addi	sp,sp,-16
80001e1a:	c606                	sw	ra,12(sp)
80001e1c:	c422                	sw	s0,8(sp)
80001e1e:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:46
	I2C_init( sensor1_i2c, COREI2C_IMX1_BASE_ADDR, IMX334_1_DEV_REG, I2C_PCLK_DIV_256 );
80001e20:	00005797          	auipc	a5,0x5
80001e24:	69078793          	addi	a5,a5,1680 # 800074b0 <__sdata_load>
80001e28:	439c                	lw	a5,0(a5)
80001e2a:	4681                	li	a3,0
80001e2c:	4669                	li	a2,26
80001e2e:	710035b7          	lui	a1,0x71003
80001e32:	853e                	mv	a0,a5
80001e34:	8b6ff0ef          	jal	ra,80000eea <I2C_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:47
	GPIO_set_output(&g_gpio_out, CAM1_RST, 0u);
80001e38:	4601                	li	a2,0
80001e3a:	45a1                	li	a1,8
80001e3c:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80001e40:	313d                	jal	80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:48
	msdelay(100);
80001e42:	06400513          	li	a0,100
80001e46:	3f5000ef          	jal	ra,80002a3a <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:49
	GPIO_set_output(&g_gpio_out, CAM1_RST, 1u); // Bring camera out of reset
80001e4a:	4605                	li	a2,1
80001e4c:	45a1                	li	a1,8
80001e4e:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80001e52:	3931                	jal	80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:50
	msdelay(100);
80001e54:	06400513          	li	a0,100
80001e58:	3e3000ef          	jal	ra,80002a3a <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:51
	GPIO_set_output(&g_gpio_out, CAM_CLK_EN, 1u); //Enable Cam clock from FPGA
80001e5c:	4605                	li	a2,1
80001e5e:	45a5                	li	a1,9
80001e60:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80001e64:	3129                	jal	80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:52
	msdelay(100);
80001e66:	06400513          	li	a0,100
80001e6a:	3d1000ef          	jal	ra,80002a3a <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:53
}
80001e6e:	0001                	nop
80001e70:	40b2                	lw	ra,12(sp)
80001e72:	4422                	lw	s0,8(sp)
80001e74:	0141                	addi	sp,sp,16
80001e76:	8082                	ret

80001e78 <imx334_cam_reginit>:
imx334_cam_reginit():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:56

void imx334_cam_reginit( uint8_t i2c_ch_sel)
{
80001e78:	7179                	addi	sp,sp,-48
80001e7a:	d606                	sw	ra,44(sp)
80001e7c:	d422                	sw	s0,40(sp)
80001e7e:	1800                	addi	s0,sp,48
80001e80:	87aa                	mv	a5,a0
80001e82:	fcf40fa3          	sb	a5,-33(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:59
	uint32_t i;

	sensor_i2c_write(i2c_ch_sel, 0x3000, 0x01);// STANDBY MODE enabled
80001e86:	fdf44783          	lbu	a5,-33(s0)
80001e8a:	4605                	li	a2,1
80001e8c:	658d                	lui	a1,0x3
80001e8e:	853e                	mv	a0,a5
80001e90:	3511                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:60
	sensor_i2c_write(i2c_ch_sel, 0x3018, 0x04);//WINMODE
80001e92:	fdf44703          	lbu	a4,-33(s0)
80001e96:	4611                	li	a2,4
80001e98:	678d                	lui	a5,0x3
80001e9a:	01878593          	addi	a1,a5,24 # 3018 <STACK_SIZE+0x2818>
80001e9e:	853a                	mv	a0,a4
80001ea0:	3bd5                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:61
	sensor_i2c_write(i2c_ch_sel, 0x3030, 0xCA);//VMAX
80001ea2:	fdf44703          	lbu	a4,-33(s0)
80001ea6:	0ca00613          	li	a2,202
80001eaa:	678d                	lui	a5,0x3
80001eac:	03078593          	addi	a1,a5,48 # 3030 <STACK_SIZE+0x2830>
80001eb0:	853a                	mv	a0,a4
80001eb2:	33cd                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:62
	sensor_i2c_write(i2c_ch_sel, 0x3031, 0x08);//VMAX
80001eb4:	fdf44703          	lbu	a4,-33(s0)
80001eb8:	4621                	li	a2,8
80001eba:	678d                	lui	a5,0x3
80001ebc:	03178593          	addi	a1,a5,49 # 3031 <STACK_SIZE+0x2831>
80001ec0:	853a                	mv	a0,a4
80001ec2:	3bc9                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:63
	sensor_i2c_write(i2c_ch_sel, 0x3032, 0x00);//VMAX
80001ec4:	fdf44703          	lbu	a4,-33(s0)
80001ec8:	4601                	li	a2,0
80001eca:	678d                	lui	a5,0x3
80001ecc:	03278593          	addi	a1,a5,50 # 3032 <STACK_SIZE+0x2832>
80001ed0:	853a                	mv	a0,a4
80001ed2:	33c9                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:64
	sensor_i2c_write(i2c_ch_sel, 0x3034, 0x4C);//HMAX
80001ed4:	fdf44703          	lbu	a4,-33(s0)
80001ed8:	04c00613          	li	a2,76
80001edc:	678d                	lui	a5,0x3
80001ede:	03478593          	addi	a1,a5,52 # 3034 <STACK_SIZE+0x2834>
80001ee2:	853a                	mv	a0,a4
80001ee4:	3b45                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:65
	sensor_i2c_write(i2c_ch_sel, 0x3035, 0x04);//HMAX
80001ee6:	fdf44703          	lbu	a4,-33(s0)
80001eea:	4611                	li	a2,4
80001eec:	678d                	lui	a5,0x3
80001eee:	03578593          	addi	a1,a5,53 # 3035 <STACK_SIZE+0x2835>
80001ef2:	853a                	mv	a0,a4
80001ef4:	3345                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:67
#if CAM_CONFIG_4K_1_2M
	sensor_i2c_write(i2c_ch_sel, 0x302C, 0x30);//TRIM_START
80001ef6:	fdf44703          	lbu	a4,-33(s0)
80001efa:	03000613          	li	a2,48
80001efe:	678d                	lui	a5,0x3
80001f00:	02c78593          	addi	a1,a5,44 # 302c <STACK_SIZE+0x282c>
80001f04:	853a                	mv	a0,a4
80001f06:	3379                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:68
	sensor_i2c_write(i2c_ch_sel, 0x302D, 0x00);//TRIM_START
80001f08:	fdf44703          	lbu	a4,-33(s0)
80001f0c:	4601                	li	a2,0
80001f0e:	678d                	lui	a5,0x3
80001f10:	02d78593          	addi	a1,a5,45 # 302d <STACK_SIZE+0x282d>
80001f14:	853a                	mv	a0,a4
80001f16:	3bbd                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:69
	sensor_i2c_write(i2c_ch_sel, 0x302E, 0x00);//HNUM
80001f18:	fdf44703          	lbu	a4,-33(s0)
80001f1c:	4601                	li	a2,0
80001f1e:	678d                	lui	a5,0x3
80001f20:	02e78593          	addi	a1,a5,46 # 302e <STACK_SIZE+0x282e>
80001f24:	853a                	mv	a0,a4
80001f26:	33bd                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:70
	sensor_i2c_write(i2c_ch_sel, 0x302F, 0x0F);//HNUM
80001f28:	fdf44703          	lbu	a4,-33(s0)
80001f2c:	463d                	li	a2,15
80001f2e:	678d                	lui	a5,0x3
80001f30:	02f78593          	addi	a1,a5,47 # 302f <STACK_SIZE+0x282f>
80001f34:	853a                	mv	a0,a4
80001f36:	3bb9                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:71
	sensor_i2c_write(i2c_ch_sel, 0x3074, 0xB0);//AREA3_ST_ADR_1
80001f38:	fdf44703          	lbu	a4,-33(s0)
80001f3c:	0b000613          	li	a2,176
80001f40:	678d                	lui	a5,0x3
80001f42:	07478593          	addi	a1,a5,116 # 3074 <STACK_SIZE+0x2874>
80001f46:	853a                	mv	a0,a4
80001f48:	33b1                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:72
	sensor_i2c_write(i2c_ch_sel, 0x3075, 0x00);//AREA3_ST_ADR_1
80001f4a:	fdf44703          	lbu	a4,-33(s0)
80001f4e:	4601                	li	a2,0
80001f50:	678d                	lui	a5,0x3
80001f52:	07578593          	addi	a1,a5,117 # 3075 <STACK_SIZE+0x2875>
80001f56:	853a                	mv	a0,a4
80001f58:	3b35                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:73
	sensor_i2c_write(i2c_ch_sel, 0x308E, 0xB1);//AREA3_ST_ADR_2
80001f5a:	fdf44703          	lbu	a4,-33(s0)
80001f5e:	0b100613          	li	a2,177
80001f62:	678d                	lui	a5,0x3
80001f64:	08e78593          	addi	a1,a5,142 # 308e <STACK_SIZE+0x288e>
80001f68:	853a                	mv	a0,a4
80001f6a:	332d                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:74
	sensor_i2c_write(i2c_ch_sel, 0x308F, 0x00);//AREA3_ST_ADR_2
80001f6c:	fdf44703          	lbu	a4,-33(s0)
80001f70:	4601                	li	a2,0
80001f72:	678d                	lui	a5,0x3
80001f74:	08f78593          	addi	a1,a5,143 # 308f <STACK_SIZE+0x288f>
80001f78:	853a                	mv	a0,a4
80001f7a:	3b29                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:75
	sensor_i2c_write(i2c_ch_sel, 0x3076, 0x70);//AREA3_WIDTH_1
80001f7c:	fdf44703          	lbu	a4,-33(s0)
80001f80:	07000613          	li	a2,112
80001f84:	678d                	lui	a5,0x3
80001f86:	07678593          	addi	a1,a5,118 # 3076 <STACK_SIZE+0x2876>
80001f8a:	853a                	mv	a0,a4
80001f8c:	3321                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:76
	sensor_i2c_write(i2c_ch_sel, 0x3077, 0x08);//AREA3_WIDTH_1
80001f8e:	fdf44703          	lbu	a4,-33(s0)
80001f92:	4621                	li	a2,8
80001f94:	678d                	lui	a5,0x3
80001f96:	07778593          	addi	a1,a5,119 # 3077 <STACK_SIZE+0x2877>
80001f9a:	853a                	mv	a0,a4
80001f9c:	39e5                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:77
	sensor_i2c_write(i2c_ch_sel, 0x3090, 0x70);//AREA3_WIDTH_2
80001f9e:	fdf44703          	lbu	a4,-33(s0)
80001fa2:	07000613          	li	a2,112
80001fa6:	678d                	lui	a5,0x3
80001fa8:	09078593          	addi	a1,a5,144 # 3090 <STACK_SIZE+0x2890>
80001fac:	853a                	mv	a0,a4
80001fae:	31dd                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:78
	sensor_i2c_write(i2c_ch_sel, 0x3091, 0x08);//AREA3_WIDTH_2
80001fb0:	fdf44703          	lbu	a4,-33(s0)
80001fb4:	4621                	li	a2,8
80001fb6:	678d                	lui	a5,0x3
80001fb8:	09178593          	addi	a1,a5,145 # 3091 <STACK_SIZE+0x2891>
80001fbc:	853a                	mv	a0,a4
80001fbe:	39d9                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:79
	sensor_i2c_write(i2c_ch_sel, 0x3308, 0x70);//Y_OUT_SIZE
80001fc0:	fdf44703          	lbu	a4,-33(s0)
80001fc4:	07000613          	li	a2,112
80001fc8:	678d                	lui	a5,0x3
80001fca:	30878593          	addi	a1,a5,776 # 3308 <STACK_SIZE+0x2b08>
80001fce:	853a                	mv	a0,a4
80001fd0:	31d1                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:80
	sensor_i2c_write(i2c_ch_sel, 0x3309, 0x08);//Y_OUT_SIZE
80001fd2:	fdf44703          	lbu	a4,-33(s0)
80001fd6:	4621                	li	a2,8
80001fd8:	678d                	lui	a5,0x3
80001fda:	30978593          	addi	a1,a5,777 # 3309 <STACK_SIZE+0x2b09>
80001fde:	853a                	mv	a0,a4
80001fe0:	3955                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:81
	sensor_i2c_write(i2c_ch_sel, 0x30C6, 0x00);//BLACK_OFSET_ADR
80001fe2:	fdf44703          	lbu	a4,-33(s0)
80001fe6:	4601                	li	a2,0
80001fe8:	678d                	lui	a5,0x3
80001fea:	0c678593          	addi	a1,a5,198 # 30c6 <STACK_SIZE+0x28c6>
80001fee:	853a                	mv	a0,a4
80001ff0:	3155                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:82
	sensor_i2c_write(i2c_ch_sel, 0x30C7, 0x00);//BLACK_OFSET_ADR
80001ff2:	fdf44703          	lbu	a4,-33(s0)
80001ff6:	4601                	li	a2,0
80001ff8:	678d                	lui	a5,0x3
80001ffa:	0c778593          	addi	a1,a5,199 # 30c7 <STACK_SIZE+0x28c7>
80001ffe:	853a                	mv	a0,a4
80002000:	3951                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:83
	sensor_i2c_write(i2c_ch_sel, 0x30CE, 0x00);//UNRD_LINE_MAX
80002002:	fdf44703          	lbu	a4,-33(s0)
80002006:	4601                	li	a2,0
80002008:	678d                	lui	a5,0x3
8000200a:	0ce78593          	addi	a1,a5,206 # 30ce <STACK_SIZE+0x28ce>
8000200e:	853a                	mv	a0,a4
80002010:	3151                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:84
	sensor_i2c_write(i2c_ch_sel, 0x30CF, 0x00);//UNRD_LINE_MAX
80002012:	fdf44703          	lbu	a4,-33(s0)
80002016:	4601                	li	a2,0
80002018:	678d                	lui	a5,0x3
8000201a:	0cf78593          	addi	a1,a5,207 # 30cf <STACK_SIZE+0x28cf>
8000201e:	853a                	mv	a0,a4
80002020:	3995                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:85
	sensor_i2c_write(i2c_ch_sel, 0x30D8, 0x20);//UNREAD_ED_ADR
80002022:	fdf44703          	lbu	a4,-33(s0)
80002026:	02000613          	li	a2,32
8000202a:	678d                	lui	a5,0x3
8000202c:	0d878593          	addi	a1,a5,216 # 30d8 <STACK_SIZE+0x28d8>
80002030:	853a                	mv	a0,a4
80002032:	318d                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:86
	sensor_i2c_write(i2c_ch_sel, 0x30D9, 0x12);//UNREAD_ED_ADR
80002034:	fdf44703          	lbu	a4,-33(s0)
80002038:	4649                	li	a2,18
8000203a:	678d                	lui	a5,0x3
8000203c:	0d978593          	addi	a1,a5,217 # 30d9 <STACK_SIZE+0x28d9>
80002040:	853a                	mv	a0,a4
80002042:	3989                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:87
	sensor_i2c_write(i2c_ch_sel, 0x304C, 0x00);//OPB_SIZE_V-OPTICAL BLACK
80002044:	fdf44703          	lbu	a4,-33(s0)
80002048:	4601                	li	a2,0
8000204a:	678d                	lui	a5,0x3
8000204c:	04c78593          	addi	a1,a5,76 # 304c <STACK_SIZE+0x284c>
80002050:	853a                	mv	a0,a4
80002052:	3189                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:112
	sensor_i2c_write(i2c_ch_sel, 0x30D8, 0x18);//UNREAD_ED_ADR
	sensor_i2c_write(i2c_ch_sel, 0x30D9, 0x0A);//UNREAD_ED_ADR
	sensor_i2c_write(i2c_ch_sel, 0x304C, 0x00);//OPB_SIZE_V-OPTICAL BLACK
#endif

	sensor_i2c_write(i2c_ch_sel, 0x304E, 0x00);//H_REVERSE
80002054:	fdf44703          	lbu	a4,-33(s0)
80002058:	4601                	li	a2,0
8000205a:	678d                	lui	a5,0x3
8000205c:	04e78593          	addi	a1,a5,78 # 304e <STACK_SIZE+0x284e>
80002060:	853a                	mv	a0,a4
80002062:	390d                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:113
	sensor_i2c_write(i2c_ch_sel, 0x304F, 0x00);//V_REVERSE
80002064:	fdf44703          	lbu	a4,-33(s0)
80002068:	4601                	li	a2,0
8000206a:	678d                	lui	a5,0x3
8000206c:	04f78593          	addi	a1,a5,79 # 304f <STACK_SIZE+0x284f>
80002070:	853a                	mv	a0,a4
80002072:	310d                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:114
	sensor_i2c_write(i2c_ch_sel, 0x3050, 0x0);//ADBIT-0-10BIT/ 1-12BIT
80002074:	fdf44703          	lbu	a4,-33(s0)
80002078:	4601                	li	a2,0
8000207a:	678d                	lui	a5,0x3
8000207c:	05078593          	addi	a1,a5,80 # 3050 <STACK_SIZE+0x2850>
80002080:	853a                	mv	a0,a4
80002082:	3909                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:116

	sensor_i2c_write(i2c_ch_sel, 0x30B6, 0x00);//UNREAD_PARAM5
80002084:	fdf44703          	lbu	a4,-33(s0)
80002088:	4601                	li	a2,0
8000208a:	678d                	lui	a5,0x3
8000208c:	0b678593          	addi	a1,a5,182 # 30b6 <STACK_SIZE+0x28b6>
80002090:	853a                	mv	a0,a4
80002092:	3109                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:117
	sensor_i2c_write(i2c_ch_sel, 0x30B7, 0x00);//UNREAD_PARAM5
80002094:	fdf44703          	lbu	a4,-33(s0)
80002098:	4601                	li	a2,0
8000209a:	678d                	lui	a5,0x3
8000209c:	0b778593          	addi	a1,a5,183 # 30b7 <STACK_SIZE+0x28b7>
800020a0:	853a                	mv	a0,a4
800020a2:	3ecd                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:118
	sensor_i2c_write(i2c_ch_sel, 0x3116, 0x08);//UNREAD_PARAM6
800020a4:	fdf44703          	lbu	a4,-33(s0)
800020a8:	4621                	li	a2,8
800020aa:	678d                	lui	a5,0x3
800020ac:	11678593          	addi	a1,a5,278 # 3116 <STACK_SIZE+0x2916>
800020b0:	853a                	mv	a0,a4
800020b2:	36cd                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:119
	sensor_i2c_write(i2c_ch_sel, 0x3117, 0x00);//UNREAD_PARAM6
800020b4:	fdf44703          	lbu	a4,-33(s0)
800020b8:	4601                	li	a2,0
800020ba:	678d                	lui	a5,0x3
800020bc:	11778593          	addi	a1,a5,279 # 3117 <STACK_SIZE+0x2917>
800020c0:	853a                	mv	a0,a4
800020c2:	3ec9                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:122

	/*Change this if slave mode is used*/
	sensor_i2c_write(i2c_ch_sel, 0x31A0, 0x20);//XVS,XHS output tied to ground
800020c4:	fdf44703          	lbu	a4,-33(s0)
800020c8:	02000613          	li	a2,32
800020cc:	678d                	lui	a5,0x3
800020ce:	1a078593          	addi	a1,a5,416 # 31a0 <STACK_SIZE+0x29a0>
800020d2:	853a                	mv	a0,a4
800020d4:	36c1                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:123
	sensor_i2c_write(i2c_ch_sel, 0x31A1, 0x0F);//XVS,XHS output tied to ground
800020d6:	fdf44703          	lbu	a4,-33(s0)
800020da:	463d                	li	a2,15
800020dc:	678d                	lui	a5,0x3
800020de:	1a178593          	addi	a1,a5,417 # 31a1 <STACK_SIZE+0x29a1>
800020e2:	853a                	mv	a0,a4
800020e4:	3e45                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:126
#if CAM_CONFIG_4K_1_2M
	/*1188 Mbps*/
	sensor_i2c_write(i2c_ch_sel, 0x300C, 0x42);//BC_WAIT_TIME
800020e6:	fdf44703          	lbu	a4,-33(s0)
800020ea:	04200613          	li	a2,66
800020ee:	678d                	lui	a5,0x3
800020f0:	00c78593          	addi	a1,a5,12 # 300c <STACK_SIZE+0x280c>
800020f4:	853a                	mv	a0,a4
800020f6:	3e79                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:127
	sensor_i2c_write(i2c_ch_sel, 0x300D, 0x2E);//CP_WAIT_TIME
800020f8:	fdf44703          	lbu	a4,-33(s0)
800020fc:	02e00613          	li	a2,46
80002100:	678d                	lui	a5,0x3
80002102:	00d78593          	addi	a1,a5,13 # 300d <STACK_SIZE+0x280d>
80002106:	853a                	mv	a0,a4
80002108:	3671                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:128
	sensor_i2c_write(i2c_ch_sel, 0x314C, 0xB0);//INCKSEL1
8000210a:	fdf44703          	lbu	a4,-33(s0)
8000210e:	0b000613          	li	a2,176
80002112:	678d                	lui	a5,0x3
80002114:	14c78593          	addi	a1,a5,332 # 314c <STACK_SIZE+0x294c>
80002118:	853a                	mv	a0,a4
8000211a:	3ead                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:129
	sensor_i2c_write(i2c_ch_sel, 0x314D, 0x00);//INCKSEL1
8000211c:	fdf44703          	lbu	a4,-33(s0)
80002120:	4601                	li	a2,0
80002122:	678d                	lui	a5,0x3
80002124:	14d78593          	addi	a1,a5,333 # 314d <STACK_SIZE+0x294d>
80002128:	853a                	mv	a0,a4
8000212a:	36ad                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:130
	sensor_i2c_write(i2c_ch_sel, 0x315A, 0x02);//INCKSEL2
8000212c:	fdf44703          	lbu	a4,-33(s0)
80002130:	4609                	li	a2,2
80002132:	678d                	lui	a5,0x3
80002134:	15a78593          	addi	a1,a5,346 # 315a <STACK_SIZE+0x295a>
80002138:	853a                	mv	a0,a4
8000213a:	3ea9                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:131
	sensor_i2c_write(i2c_ch_sel, 0x3168, 0x8F);//INCKSEL3
8000213c:	fdf44703          	lbu	a4,-33(s0)
80002140:	08f00613          	li	a2,143
80002144:	678d                	lui	a5,0x3
80002146:	16878593          	addi	a1,a5,360 # 3168 <STACK_SIZE+0x2968>
8000214a:	853a                	mv	a0,a4
8000214c:	36a1                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:132
	sensor_i2c_write(i2c_ch_sel, 0x316A, 0x7E);//INCKSEL4
8000214e:	fdf44703          	lbu	a4,-33(s0)
80002152:	07e00613          	li	a2,126
80002156:	678d                	lui	a5,0x3
80002158:	16a78593          	addi	a1,a5,362 # 316a <STACK_SIZE+0x296a>
8000215c:	853a                	mv	a0,a4
8000215e:	3e1d                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:133
	sensor_i2c_write(i2c_ch_sel, 0x319E, 0x01);//SYS_MODE
80002160:	fdf44703          	lbu	a4,-33(s0)
80002164:	4605                	li	a2,1
80002166:	678d                	lui	a5,0x3
80002168:	19e78593          	addi	a1,a5,414 # 319e <STACK_SIZE+0x299e>
8000216c:	853a                	mv	a0,a4
8000216e:	361d                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:145
	sensor_i2c_write(i2c_ch_sel, 0x315A, 0x0A);//INCKSEL2
	sensor_i2c_write(i2c_ch_sel, 0x3168, 0xA0);//INCKSEL3
	sensor_i2c_write(i2c_ch_sel, 0x316A, 0x7E);//INCKSEL4
	sensor_i2c_write(i2c_ch_sel, 0x319E, 0x02);//SYS_MODE
#endif
	sensor_i2c_write(i2c_ch_sel, 0x3199, 0x00);//HADD,VADD - 0 All pix scan, 3-2/2binning
80002170:	fdf44703          	lbu	a4,-33(s0)
80002174:	4601                	li	a2,0
80002176:	678d                	lui	a5,0x3
80002178:	19978593          	addi	a1,a5,409 # 3199 <STACK_SIZE+0x2999>
8000217c:	853a                	mv	a0,a4
8000217e:	3e19                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:146
	sensor_i2c_write(i2c_ch_sel, 0x319D, 0x00);//MDBIT-0-10bit,1-12bit
80002180:	fdf44703          	lbu	a4,-33(s0)
80002184:	4601                	li	a2,0
80002186:	678d                	lui	a5,0x3
80002188:	19d78593          	addi	a1,a5,413 # 319d <STACK_SIZE+0x299d>
8000218c:	853a                	mv	a0,a4
8000218e:	3619                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:148

	sensor_i2c_write(i2c_ch_sel, 0x31DD, 0x03);//VALID_EXPAND
80002190:	fdf44703          	lbu	a4,-33(s0)
80002194:	460d                	li	a2,3
80002196:	678d                	lui	a5,0x3
80002198:	1dd78593          	addi	a1,a5,477 # 31dd <STACK_SIZE+0x29dd>
8000219c:	853a                	mv	a0,a4
8000219e:	3cdd                	jal	80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:149
	sensor_i2c_write(i2c_ch_sel, 0x3300, 0x00);//TCYCLE
800021a0:	fdf44703          	lbu	a4,-33(s0)
800021a4:	4601                	li	a2,0
800021a6:	678d                	lui	a5,0x3
800021a8:	30078593          	addi	a1,a5,768 # 3300 <STACK_SIZE+0x2b00>
800021ac:	853a                	mv	a0,a4
800021ae:	ae7ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:151

	sensor_i2c_write(i2c_ch_sel, 0x341C, 0xFF);//ADBIT1 FFh-10bit, 47h-12bit
800021b2:	fdf44703          	lbu	a4,-33(s0)
800021b6:	0ff00613          	li	a2,255
800021ba:	678d                	lui	a5,0x3
800021bc:	41c78593          	addi	a1,a5,1052 # 341c <STACK_SIZE+0x2c1c>
800021c0:	853a                	mv	a0,a4
800021c2:	ad3ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:152
	sensor_i2c_write(i2c_ch_sel, 0x341D, 0x01);//ADBIT1 01h-10bit, 00h-12bit
800021c6:	fdf44703          	lbu	a4,-33(s0)
800021ca:	4605                	li	a2,1
800021cc:	678d                	lui	a5,0x3
800021ce:	41d78593          	addi	a1,a5,1053 # 341d <STACK_SIZE+0x2c1d>
800021d2:	853a                	mv	a0,a4
800021d4:	ac1ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:153
	sensor_i2c_write(i2c_ch_sel, 0x3A01, 0x03);//LANE_MODE
800021d8:	fdf44703          	lbu	a4,-33(s0)
800021dc:	460d                	li	a2,3
800021de:	6791                	lui	a5,0x4
800021e0:	a0178593          	addi	a1,a5,-1535 # 3a01 <STACK_SIZE+0x3201>
800021e4:	853a                	mv	a0,a4
800021e6:	aafff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:155

	sensor_i2c_write(i2c_ch_sel, 0x3A18, 0x7F);//TCLKPOST
800021ea:	fdf44703          	lbu	a4,-33(s0)
800021ee:	07f00613          	li	a2,127
800021f2:	6791                	lui	a5,0x4
800021f4:	a1878593          	addi	a1,a5,-1512 # 3a18 <STACK_SIZE+0x3218>
800021f8:	853a                	mv	a0,a4
800021fa:	a9bff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:156
	sensor_i2c_write(i2c_ch_sel, 0x3A19, 0x00);//TCLKPOST
800021fe:	fdf44703          	lbu	a4,-33(s0)
80002202:	4601                	li	a2,0
80002204:	6791                	lui	a5,0x4
80002206:	a1978593          	addi	a1,a5,-1511 # 3a19 <STACK_SIZE+0x3219>
8000220a:	853a                	mv	a0,a4
8000220c:	a89ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:157
	sensor_i2c_write(i2c_ch_sel, 0x3A1A, 0x37);//TCLKPPREPARE
80002210:	fdf44703          	lbu	a4,-33(s0)
80002214:	03700613          	li	a2,55
80002218:	6791                	lui	a5,0x4
8000221a:	a1a78593          	addi	a1,a5,-1510 # 3a1a <STACK_SIZE+0x321a>
8000221e:	853a                	mv	a0,a4
80002220:	a75ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:158
	sensor_i2c_write(i2c_ch_sel, 0x3A1B, 0x00);//TCLKPREPARE
80002224:	fdf44703          	lbu	a4,-33(s0)
80002228:	4601                	li	a2,0
8000222a:	6791                	lui	a5,0x4
8000222c:	a1b78593          	addi	a1,a5,-1509 # 3a1b <STACK_SIZE+0x321b>
80002230:	853a                	mv	a0,a4
80002232:	a63ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:159
	sensor_i2c_write(i2c_ch_sel, 0x3A1C, 0x37);//TCLKTRAIL
80002236:	fdf44703          	lbu	a4,-33(s0)
8000223a:	03700613          	li	a2,55
8000223e:	6791                	lui	a5,0x4
80002240:	a1c78593          	addi	a1,a5,-1508 # 3a1c <STACK_SIZE+0x321c>
80002244:	853a                	mv	a0,a4
80002246:	a4fff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:160
	sensor_i2c_write(i2c_ch_sel, 0x3A1D, 0x00);//TCLKTRAIL
8000224a:	fdf44703          	lbu	a4,-33(s0)
8000224e:	4601                	li	a2,0
80002250:	6791                	lui	a5,0x4
80002252:	a1d78593          	addi	a1,a5,-1507 # 3a1d <STACK_SIZE+0x321d>
80002256:	853a                	mv	a0,a4
80002258:	a3dff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:161
	sensor_i2c_write(i2c_ch_sel, 0x3A1E, 0xF7);//TCLKZERO
8000225c:	fdf44703          	lbu	a4,-33(s0)
80002260:	0f700613          	li	a2,247
80002264:	6791                	lui	a5,0x4
80002266:	a1e78593          	addi	a1,a5,-1506 # 3a1e <STACK_SIZE+0x321e>
8000226a:	853a                	mv	a0,a4
8000226c:	a29ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:162
	sensor_i2c_write(i2c_ch_sel, 0x3A1F, 0x00);//TCLKZERO
80002270:	fdf44703          	lbu	a4,-33(s0)
80002274:	4601                	li	a2,0
80002276:	6791                	lui	a5,0x4
80002278:	a1f78593          	addi	a1,a5,-1505 # 3a1f <STACK_SIZE+0x321f>
8000227c:	853a                	mv	a0,a4
8000227e:	a17ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:163
	sensor_i2c_write(i2c_ch_sel, 0x3A20, 0x3F);//THSPREPARE
80002282:	fdf44703          	lbu	a4,-33(s0)
80002286:	03f00613          	li	a2,63
8000228a:	6791                	lui	a5,0x4
8000228c:	a2078593          	addi	a1,a5,-1504 # 3a20 <STACK_SIZE+0x3220>
80002290:	853a                	mv	a0,a4
80002292:	a03ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:164
	sensor_i2c_write(i2c_ch_sel, 0x3A21, 0x00);//THSPREPARE
80002296:	fdf44703          	lbu	a4,-33(s0)
8000229a:	4601                	li	a2,0
8000229c:	6791                	lui	a5,0x4
8000229e:	a2178593          	addi	a1,a5,-1503 # 3a21 <STACK_SIZE+0x3221>
800022a2:	853a                	mv	a0,a4
800022a4:	9f1ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:165
	sensor_i2c_write(i2c_ch_sel, 0x3A20, 0x6F);//THSZERO
800022a8:	fdf44703          	lbu	a4,-33(s0)
800022ac:	06f00613          	li	a2,111
800022b0:	6791                	lui	a5,0x4
800022b2:	a2078593          	addi	a1,a5,-1504 # 3a20 <STACK_SIZE+0x3220>
800022b6:	853a                	mv	a0,a4
800022b8:	9ddff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:166
	sensor_i2c_write(i2c_ch_sel, 0x3A21, 0x00);//THSZERO
800022bc:	fdf44703          	lbu	a4,-33(s0)
800022c0:	4601                	li	a2,0
800022c2:	6791                	lui	a5,0x4
800022c4:	a2178593          	addi	a1,a5,-1503 # 3a21 <STACK_SIZE+0x3221>
800022c8:	853a                	mv	a0,a4
800022ca:	9cbff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:167
	sensor_i2c_write(i2c_ch_sel, 0x3A20, 0x3F);//THSTRAIL
800022ce:	fdf44703          	lbu	a4,-33(s0)
800022d2:	03f00613          	li	a2,63
800022d6:	6791                	lui	a5,0x4
800022d8:	a2078593          	addi	a1,a5,-1504 # 3a20 <STACK_SIZE+0x3220>
800022dc:	853a                	mv	a0,a4
800022de:	9b7ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:168
	sensor_i2c_write(i2c_ch_sel, 0x3A21, 0x00);//THSTRAIL
800022e2:	fdf44703          	lbu	a4,-33(s0)
800022e6:	4601                	li	a2,0
800022e8:	6791                	lui	a5,0x4
800022ea:	a2178593          	addi	a1,a5,-1503 # 3a21 <STACK_SIZE+0x3221>
800022ee:	853a                	mv	a0,a4
800022f0:	9a5ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:169
	sensor_i2c_write(i2c_ch_sel, 0x3A20, 0x5F);//THSEXIT
800022f4:	fdf44703          	lbu	a4,-33(s0)
800022f8:	05f00613          	li	a2,95
800022fc:	6791                	lui	a5,0x4
800022fe:	a2078593          	addi	a1,a5,-1504 # 3a20 <STACK_SIZE+0x3220>
80002302:	853a                	mv	a0,a4
80002304:	991ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:170
	sensor_i2c_write(i2c_ch_sel, 0x3A21, 0x00);//THSEXIT
80002308:	fdf44703          	lbu	a4,-33(s0)
8000230c:	4601                	li	a2,0
8000230e:	6791                	lui	a5,0x4
80002310:	a2178593          	addi	a1,a5,-1503 # 3a21 <STACK_SIZE+0x3221>
80002314:	853a                	mv	a0,a4
80002316:	97fff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:171
	sensor_i2c_write(i2c_ch_sel, 0x3A20, 0x2F);//TLPX
8000231a:	fdf44703          	lbu	a4,-33(s0)
8000231e:	02f00613          	li	a2,47
80002322:	6791                	lui	a5,0x4
80002324:	a2078593          	addi	a1,a5,-1504 # 3a20 <STACK_SIZE+0x3220>
80002328:	853a                	mv	a0,a4
8000232a:	96bff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:172
	sensor_i2c_write(i2c_ch_sel, 0x3A21, 0x00);//TLPX
8000232e:	fdf44703          	lbu	a4,-33(s0)
80002332:	4601                	li	a2,0
80002334:	6791                	lui	a5,0x4
80002336:	a2178593          	addi	a1,a5,-1503 # 3a21 <STACK_SIZE+0x3221>
8000233a:	853a                	mv	a0,a4
8000233c:	959ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:188
	sensor_i2c_write(i2c_ch_sel, 0x3303, 0x00);// Black level LSB
	sensor_i2c_write(i2c_ch_sel, 0x336C, 0x01);// WRJ_OPEN
#endif

	/*Additional settings for All scan mode */
	sensor_i2c_write(i2c_ch_sel, 0x3078, 0x02);
80002340:	fdf44703          	lbu	a4,-33(s0)
80002344:	4609                	li	a2,2
80002346:	678d                	lui	a5,0x3
80002348:	07878593          	addi	a1,a5,120 # 3078 <STACK_SIZE+0x2878>
8000234c:	853a                	mv	a0,a4
8000234e:	947ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:189
	sensor_i2c_write(i2c_ch_sel, 0x3079, 0x00);
80002352:	fdf44703          	lbu	a4,-33(s0)
80002356:	4601                	li	a2,0
80002358:	678d                	lui	a5,0x3
8000235a:	07978593          	addi	a1,a5,121 # 3079 <STACK_SIZE+0x2879>
8000235e:	853a                	mv	a0,a4
80002360:	935ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:190
	sensor_i2c_write(i2c_ch_sel, 0x307A, 0x00);
80002364:	fdf44703          	lbu	a4,-33(s0)
80002368:	4601                	li	a2,0
8000236a:	678d                	lui	a5,0x3
8000236c:	07a78593          	addi	a1,a5,122 # 307a <STACK_SIZE+0x287a>
80002370:	853a                	mv	a0,a4
80002372:	923ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:191
	sensor_i2c_write(i2c_ch_sel, 0x307B, 0x00);
80002376:	fdf44703          	lbu	a4,-33(s0)
8000237a:	4601                	li	a2,0
8000237c:	678d                	lui	a5,0x3
8000237e:	07b78593          	addi	a1,a5,123 # 307b <STACK_SIZE+0x287b>
80002382:	853a                	mv	a0,a4
80002384:	911ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:192
	sensor_i2c_write(i2c_ch_sel, 0x3080, 0x02);//0xFE if inverted vertical readout
80002388:	fdf44703          	lbu	a4,-33(s0)
8000238c:	4609                	li	a2,2
8000238e:	678d                	lui	a5,0x3
80002390:	08078593          	addi	a1,a5,128 # 3080 <STACK_SIZE+0x2880>
80002394:	853a                	mv	a0,a4
80002396:	8ffff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:193
	sensor_i2c_write(i2c_ch_sel, 0x3081, 0x00);
8000239a:	fdf44703          	lbu	a4,-33(s0)
8000239e:	4601                	li	a2,0
800023a0:	678d                	lui	a5,0x3
800023a2:	08178593          	addi	a1,a5,129 # 3081 <STACK_SIZE+0x2881>
800023a6:	853a                	mv	a0,a4
800023a8:	8edff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:194
	sensor_i2c_write(i2c_ch_sel, 0x3082, 0x00);
800023ac:	fdf44703          	lbu	a4,-33(s0)
800023b0:	4601                	li	a2,0
800023b2:	678d                	lui	a5,0x3
800023b4:	08278593          	addi	a1,a5,130 # 3082 <STACK_SIZE+0x2882>
800023b8:	853a                	mv	a0,a4
800023ba:	8dbff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:195
	sensor_i2c_write(i2c_ch_sel, 0x3083, 0x00);
800023be:	fdf44703          	lbu	a4,-33(s0)
800023c2:	4601                	li	a2,0
800023c4:	678d                	lui	a5,0x3
800023c6:	08378593          	addi	a1,a5,131 # 3083 <STACK_SIZE+0x2883>
800023ca:	853a                	mv	a0,a4
800023cc:	8c9ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:196
	sensor_i2c_write(i2c_ch_sel, 0x3088, 0x02);
800023d0:	fdf44703          	lbu	a4,-33(s0)
800023d4:	4609                	li	a2,2
800023d6:	678d                	lui	a5,0x3
800023d8:	08878593          	addi	a1,a5,136 # 3088 <STACK_SIZE+0x2888>
800023dc:	853a                	mv	a0,a4
800023de:	8b7ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:197
	sensor_i2c_write(i2c_ch_sel, 0x3094, 0x00);
800023e2:	fdf44703          	lbu	a4,-33(s0)
800023e6:	4601                	li	a2,0
800023e8:	678d                	lui	a5,0x3
800023ea:	09478593          	addi	a1,a5,148 # 3094 <STACK_SIZE+0x2894>
800023ee:	853a                	mv	a0,a4
800023f0:	8a5ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:198
	sensor_i2c_write(i2c_ch_sel, 0x3095, 0x00);
800023f4:	fdf44703          	lbu	a4,-33(s0)
800023f8:	4601                	li	a2,0
800023fa:	678d                	lui	a5,0x3
800023fc:	09578593          	addi	a1,a5,149 # 3095 <STACK_SIZE+0x2895>
80002400:	853a                	mv	a0,a4
80002402:	893ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:199
	sensor_i2c_write(i2c_ch_sel, 0x3096, 0x00);
80002406:	fdf44703          	lbu	a4,-33(s0)
8000240a:	4601                	li	a2,0
8000240c:	678d                	lui	a5,0x3
8000240e:	09678593          	addi	a1,a5,150 # 3096 <STACK_SIZE+0x2896>
80002412:	853a                	mv	a0,a4
80002414:	881ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:200
	sensor_i2c_write(i2c_ch_sel, 0x309B, 0x02);//0xFE if inverted vertical readout
80002418:	fdf44703          	lbu	a4,-33(s0)
8000241c:	4609                	li	a2,2
8000241e:	678d                	lui	a5,0x3
80002420:	09b78593          	addi	a1,a5,155 # 309b <STACK_SIZE+0x289b>
80002424:	853a                	mv	a0,a4
80002426:	86fff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:201
	sensor_i2c_write(i2c_ch_sel, 0x309C, 0x00);
8000242a:	fdf44703          	lbu	a4,-33(s0)
8000242e:	4601                	li	a2,0
80002430:	678d                	lui	a5,0x3
80002432:	09c78593          	addi	a1,a5,156 # 309c <STACK_SIZE+0x289c>
80002436:	853a                	mv	a0,a4
80002438:	85dff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:202
	sensor_i2c_write(i2c_ch_sel, 0x309D, 0x00);
8000243c:	fdf44703          	lbu	a4,-33(s0)
80002440:	4601                	li	a2,0
80002442:	678d                	lui	a5,0x3
80002444:	09d78593          	addi	a1,a5,157 # 309d <STACK_SIZE+0x289d>
80002448:	853a                	mv	a0,a4
8000244a:	84bff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:203
	sensor_i2c_write(i2c_ch_sel, 0x309E, 0x00);
8000244e:	fdf44703          	lbu	a4,-33(s0)
80002452:	4601                	li	a2,0
80002454:	678d                	lui	a5,0x3
80002456:	09e78593          	addi	a1,a5,158 # 309e <STACK_SIZE+0x289e>
8000245a:	853a                	mv	a0,a4
8000245c:	839ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:204
	sensor_i2c_write(i2c_ch_sel, 0x30A4, 0x00);
80002460:	fdf44703          	lbu	a4,-33(s0)
80002464:	4601                	li	a2,0
80002466:	678d                	lui	a5,0x3
80002468:	0a478593          	addi	a1,a5,164 # 30a4 <STACK_SIZE+0x28a4>
8000246c:	853a                	mv	a0,a4
8000246e:	827ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:205
	sensor_i2c_write(i2c_ch_sel, 0x30A5, 0x00);
80002472:	fdf44703          	lbu	a4,-33(s0)
80002476:	4601                	li	a2,0
80002478:	678d                	lui	a5,0x3
8000247a:	0a578593          	addi	a1,a5,165 # 30a5 <STACK_SIZE+0x28a5>
8000247e:	853a                	mv	a0,a4
80002480:	815ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:210
	/*End of additional settings for all scan mode*/


	/*Additional Mandatory Settings*/
	sensor_i2c_write(i2c_ch_sel, 0x3288, 0x21);
80002484:	fdf44703          	lbu	a4,-33(s0)
80002488:	02100613          	li	a2,33
8000248c:	678d                	lui	a5,0x3
8000248e:	28878593          	addi	a1,a5,648 # 3288 <STACK_SIZE+0x2a88>
80002492:	853a                	mv	a0,a4
80002494:	801ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:211
	sensor_i2c_write(i2c_ch_sel, 0x328A, 0x02);
80002498:	fdf44703          	lbu	a4,-33(s0)
8000249c:	4609                	li	a2,2
8000249e:	678d                	lui	a5,0x3
800024a0:	28a78593          	addi	a1,a5,650 # 328a <STACK_SIZE+0x2a8a>
800024a4:	853a                	mv	a0,a4
800024a6:	feeff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:212
	sensor_i2c_write(i2c_ch_sel, 0x3414, 0x05);
800024aa:	fdf44703          	lbu	a4,-33(s0)
800024ae:	4615                	li	a2,5
800024b0:	678d                	lui	a5,0x3
800024b2:	41478593          	addi	a1,a5,1044 # 3414 <STACK_SIZE+0x2c14>
800024b6:	853a                	mv	a0,a4
800024b8:	fdcff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:213
	sensor_i2c_write(i2c_ch_sel, 0x3416, 0x18);
800024bc:	fdf44703          	lbu	a4,-33(s0)
800024c0:	4661                	li	a2,24
800024c2:	678d                	lui	a5,0x3
800024c4:	41678593          	addi	a1,a5,1046 # 3416 <STACK_SIZE+0x2c16>
800024c8:	853a                	mv	a0,a4
800024ca:	fcaff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:214
	sensor_i2c_write(i2c_ch_sel, 0x35AC, 0x0E);
800024ce:	fdf44703          	lbu	a4,-33(s0)
800024d2:	4639                	li	a2,14
800024d4:	678d                	lui	a5,0x3
800024d6:	5ac78593          	addi	a1,a5,1452 # 35ac <STACK_SIZE+0x2dac>
800024da:	853a                	mv	a0,a4
800024dc:	fb8ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:215
	sensor_i2c_write(i2c_ch_sel, 0x3648, 0x01);
800024e0:	fdf44703          	lbu	a4,-33(s0)
800024e4:	4605                	li	a2,1
800024e6:	678d                	lui	a5,0x3
800024e8:	64878593          	addi	a1,a5,1608 # 3648 <STACK_SIZE+0x2e48>
800024ec:	853a                	mv	a0,a4
800024ee:	fa6ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:216
	sensor_i2c_write(i2c_ch_sel, 0x364A, 0x04);
800024f2:	fdf44703          	lbu	a4,-33(s0)
800024f6:	4611                	li	a2,4
800024f8:	678d                	lui	a5,0x3
800024fa:	64a78593          	addi	a1,a5,1610 # 364a <STACK_SIZE+0x2e4a>
800024fe:	853a                	mv	a0,a4
80002500:	f94ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:217
	sensor_i2c_write(i2c_ch_sel, 0x364C, 0x04);
80002504:	fdf44703          	lbu	a4,-33(s0)
80002508:	4611                	li	a2,4
8000250a:	678d                	lui	a5,0x3
8000250c:	64c78593          	addi	a1,a5,1612 # 364c <STACK_SIZE+0x2e4c>
80002510:	853a                	mv	a0,a4
80002512:	f82ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:218
	sensor_i2c_write(i2c_ch_sel, 0x3678, 0x01);
80002516:	fdf44703          	lbu	a4,-33(s0)
8000251a:	4605                	li	a2,1
8000251c:	678d                	lui	a5,0x3
8000251e:	67878593          	addi	a1,a5,1656 # 3678 <STACK_SIZE+0x2e78>
80002522:	853a                	mv	a0,a4
80002524:	f70ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:219
	sensor_i2c_write(i2c_ch_sel, 0x367C, 0x31);
80002528:	fdf44703          	lbu	a4,-33(s0)
8000252c:	03100613          	li	a2,49
80002530:	678d                	lui	a5,0x3
80002532:	67c78593          	addi	a1,a5,1660 # 367c <STACK_SIZE+0x2e7c>
80002536:	853a                	mv	a0,a4
80002538:	f5cff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:220
	sensor_i2c_write(i2c_ch_sel, 0x367E, 0x31);
8000253c:	fdf44703          	lbu	a4,-33(s0)
80002540:	03100613          	li	a2,49
80002544:	678d                	lui	a5,0x3
80002546:	67e78593          	addi	a1,a5,1662 # 367e <STACK_SIZE+0x2e7e>
8000254a:	853a                	mv	a0,a4
8000254c:	f48ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:221
	sensor_i2c_write(i2c_ch_sel, 0x3708, 0x02);
80002550:	fdf44703          	lbu	a4,-33(s0)
80002554:	4609                	li	a2,2
80002556:	678d                	lui	a5,0x3
80002558:	70878593          	addi	a1,a5,1800 # 3708 <STACK_SIZE+0x2f08>
8000255c:	853a                	mv	a0,a4
8000255e:	f36ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:222
	sensor_i2c_write(i2c_ch_sel, 0x3714, 0x01);
80002562:	fdf44703          	lbu	a4,-33(s0)
80002566:	4605                	li	a2,1
80002568:	678d                	lui	a5,0x3
8000256a:	71478593          	addi	a1,a5,1812 # 3714 <STACK_SIZE+0x2f14>
8000256e:	853a                	mv	a0,a4
80002570:	f24ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:223
	sensor_i2c_write(i2c_ch_sel, 0x3715, 0x02);
80002574:	fdf44703          	lbu	a4,-33(s0)
80002578:	4609                	li	a2,2
8000257a:	678d                	lui	a5,0x3
8000257c:	71578593          	addi	a1,a5,1813 # 3715 <STACK_SIZE+0x2f15>
80002580:	853a                	mv	a0,a4
80002582:	f12ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:224
	sensor_i2c_write(i2c_ch_sel, 0x3716, 0x02);
80002586:	fdf44703          	lbu	a4,-33(s0)
8000258a:	4609                	li	a2,2
8000258c:	678d                	lui	a5,0x3
8000258e:	71678593          	addi	a1,a5,1814 # 3716 <STACK_SIZE+0x2f16>
80002592:	853a                	mv	a0,a4
80002594:	f00ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:225
	sensor_i2c_write(i2c_ch_sel, 0x3717, 0x02);
80002598:	fdf44703          	lbu	a4,-33(s0)
8000259c:	4609                	li	a2,2
8000259e:	678d                	lui	a5,0x3
800025a0:	71778593          	addi	a1,a5,1815 # 3717 <STACK_SIZE+0x2f17>
800025a4:	853a                	mv	a0,a4
800025a6:	eeeff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:226
	sensor_i2c_write(i2c_ch_sel, 0x371C, 0x3D);
800025aa:	fdf44703          	lbu	a4,-33(s0)
800025ae:	03d00613          	li	a2,61
800025b2:	678d                	lui	a5,0x3
800025b4:	71c78593          	addi	a1,a5,1820 # 371c <STACK_SIZE+0x2f1c>
800025b8:	853a                	mv	a0,a4
800025ba:	edaff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:227
	sensor_i2c_write(i2c_ch_sel, 0x371D, 0x3F);
800025be:	fdf44703          	lbu	a4,-33(s0)
800025c2:	03f00613          	li	a2,63
800025c6:	678d                	lui	a5,0x3
800025c8:	71d78593          	addi	a1,a5,1821 # 371d <STACK_SIZE+0x2f1d>
800025cc:	853a                	mv	a0,a4
800025ce:	ec6ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:228
	sensor_i2c_write(i2c_ch_sel, 0x372C, 0x00);
800025d2:	fdf44703          	lbu	a4,-33(s0)
800025d6:	4601                	li	a2,0
800025d8:	678d                	lui	a5,0x3
800025da:	72c78593          	addi	a1,a5,1836 # 372c <STACK_SIZE+0x2f2c>
800025de:	853a                	mv	a0,a4
800025e0:	eb4ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:229
	sensor_i2c_write(i2c_ch_sel, 0x372D, 0x00);
800025e4:	fdf44703          	lbu	a4,-33(s0)
800025e8:	4601                	li	a2,0
800025ea:	678d                	lui	a5,0x3
800025ec:	72d78593          	addi	a1,a5,1837 # 372d <STACK_SIZE+0x2f2d>
800025f0:	853a                	mv	a0,a4
800025f2:	ea2ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:230
	sensor_i2c_write(i2c_ch_sel, 0x372E, 0x46);
800025f6:	fdf44703          	lbu	a4,-33(s0)
800025fa:	04600613          	li	a2,70
800025fe:	678d                	lui	a5,0x3
80002600:	72e78593          	addi	a1,a5,1838 # 372e <STACK_SIZE+0x2f2e>
80002604:	853a                	mv	a0,a4
80002606:	e8eff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:231
	sensor_i2c_write(i2c_ch_sel, 0x372F, 0x00);
8000260a:	fdf44703          	lbu	a4,-33(s0)
8000260e:	4601                	li	a2,0
80002610:	678d                	lui	a5,0x3
80002612:	72f78593          	addi	a1,a5,1839 # 372f <STACK_SIZE+0x2f2f>
80002616:	853a                	mv	a0,a4
80002618:	e7cff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:232
	sensor_i2c_write(i2c_ch_sel, 0x3730, 0x89);
8000261c:	fdf44703          	lbu	a4,-33(s0)
80002620:	08900613          	li	a2,137
80002624:	678d                	lui	a5,0x3
80002626:	73078593          	addi	a1,a5,1840 # 3730 <STACK_SIZE+0x2f30>
8000262a:	853a                	mv	a0,a4
8000262c:	e68ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:233
	sensor_i2c_write(i2c_ch_sel, 0x3731, 0x00);
80002630:	fdf44703          	lbu	a4,-33(s0)
80002634:	4601                	li	a2,0
80002636:	678d                	lui	a5,0x3
80002638:	73178593          	addi	a1,a5,1841 # 3731 <STACK_SIZE+0x2f31>
8000263c:	853a                	mv	a0,a4
8000263e:	e56ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:234
	sensor_i2c_write(i2c_ch_sel, 0x3732, 0x08);
80002642:	fdf44703          	lbu	a4,-33(s0)
80002646:	4621                	li	a2,8
80002648:	678d                	lui	a5,0x3
8000264a:	73278593          	addi	a1,a5,1842 # 3732 <STACK_SIZE+0x2f32>
8000264e:	853a                	mv	a0,a4
80002650:	e44ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:235
	sensor_i2c_write(i2c_ch_sel, 0x3733, 0x01);
80002654:	fdf44703          	lbu	a4,-33(s0)
80002658:	4605                	li	a2,1
8000265a:	678d                	lui	a5,0x3
8000265c:	73378593          	addi	a1,a5,1843 # 3733 <STACK_SIZE+0x2f33>
80002660:	853a                	mv	a0,a4
80002662:	e32ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:236
	sensor_i2c_write(i2c_ch_sel, 0x3734, 0xFE);
80002666:	fdf44703          	lbu	a4,-33(s0)
8000266a:	0fe00613          	li	a2,254
8000266e:	678d                	lui	a5,0x3
80002670:	73478593          	addi	a1,a5,1844 # 3734 <STACK_SIZE+0x2f34>
80002674:	853a                	mv	a0,a4
80002676:	e1eff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:237
	sensor_i2c_write(i2c_ch_sel, 0x3735, 0x05);
8000267a:	fdf44703          	lbu	a4,-33(s0)
8000267e:	4615                	li	a2,5
80002680:	678d                	lui	a5,0x3
80002682:	73578593          	addi	a1,a5,1845 # 3735 <STACK_SIZE+0x2f35>
80002686:	853a                	mv	a0,a4
80002688:	e0cff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:238
	sensor_i2c_write(i2c_ch_sel, 0x375D, 0x00);
8000268c:	fdf44703          	lbu	a4,-33(s0)
80002690:	4601                	li	a2,0
80002692:	678d                	lui	a5,0x3
80002694:	75d78593          	addi	a1,a5,1885 # 375d <STACK_SIZE+0x2f5d>
80002698:	853a                	mv	a0,a4
8000269a:	dfaff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:239
	sensor_i2c_write(i2c_ch_sel, 0x375E, 0x00);
8000269e:	fdf44703          	lbu	a4,-33(s0)
800026a2:	4601                	li	a2,0
800026a4:	678d                	lui	a5,0x3
800026a6:	75e78593          	addi	a1,a5,1886 # 375e <STACK_SIZE+0x2f5e>
800026aa:	853a                	mv	a0,a4
800026ac:	de8ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:240
	sensor_i2c_write(i2c_ch_sel, 0x375F, 0x61);
800026b0:	fdf44703          	lbu	a4,-33(s0)
800026b4:	06100613          	li	a2,97
800026b8:	678d                	lui	a5,0x3
800026ba:	75f78593          	addi	a1,a5,1887 # 375f <STACK_SIZE+0x2f5f>
800026be:	853a                	mv	a0,a4
800026c0:	dd4ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:241
	sensor_i2c_write(i2c_ch_sel, 0x3760, 0x06);
800026c4:	fdf44703          	lbu	a4,-33(s0)
800026c8:	4619                	li	a2,6
800026ca:	678d                	lui	a5,0x3
800026cc:	76078593          	addi	a1,a5,1888 # 3760 <STACK_SIZE+0x2f60>
800026d0:	853a                	mv	a0,a4
800026d2:	dc2ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:242
	sensor_i2c_write(i2c_ch_sel, 0x3768, 0x1B);
800026d6:	fdf44703          	lbu	a4,-33(s0)
800026da:	466d                	li	a2,27
800026dc:	678d                	lui	a5,0x3
800026de:	76878593          	addi	a1,a5,1896 # 3768 <STACK_SIZE+0x2f68>
800026e2:	853a                	mv	a0,a4
800026e4:	db0ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:243
	sensor_i2c_write(i2c_ch_sel, 0x3769, 0x1B);
800026e8:	fdf44703          	lbu	a4,-33(s0)
800026ec:	466d                	li	a2,27
800026ee:	678d                	lui	a5,0x3
800026f0:	76978593          	addi	a1,a5,1897 # 3769 <STACK_SIZE+0x2f69>
800026f4:	853a                	mv	a0,a4
800026f6:	d9eff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:244
	sensor_i2c_write(i2c_ch_sel, 0x376A, 0x1A);
800026fa:	fdf44703          	lbu	a4,-33(s0)
800026fe:	4669                	li	a2,26
80002700:	678d                	lui	a5,0x3
80002702:	76a78593          	addi	a1,a5,1898 # 376a <STACK_SIZE+0x2f6a>
80002706:	853a                	mv	a0,a4
80002708:	d8cff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:245
	sensor_i2c_write(i2c_ch_sel, 0x376B, 0x19);
8000270c:	fdf44703          	lbu	a4,-33(s0)
80002710:	4665                	li	a2,25
80002712:	678d                	lui	a5,0x3
80002714:	76b78593          	addi	a1,a5,1899 # 376b <STACK_SIZE+0x2f6b>
80002718:	853a                	mv	a0,a4
8000271a:	d7aff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:246
	sensor_i2c_write(i2c_ch_sel, 0x376C, 0x18);
8000271e:	fdf44703          	lbu	a4,-33(s0)
80002722:	4661                	li	a2,24
80002724:	678d                	lui	a5,0x3
80002726:	76c78593          	addi	a1,a5,1900 # 376c <STACK_SIZE+0x2f6c>
8000272a:	853a                	mv	a0,a4
8000272c:	d68ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:247
	sensor_i2c_write(i2c_ch_sel, 0x376D, 0x14);
80002730:	fdf44703          	lbu	a4,-33(s0)
80002734:	4651                	li	a2,20
80002736:	678d                	lui	a5,0x3
80002738:	76d78593          	addi	a1,a5,1901 # 376d <STACK_SIZE+0x2f6d>
8000273c:	853a                	mv	a0,a4
8000273e:	d56ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:248
	sensor_i2c_write(i2c_ch_sel, 0x376E, 0x0F);
80002742:	fdf44703          	lbu	a4,-33(s0)
80002746:	463d                	li	a2,15
80002748:	678d                	lui	a5,0x3
8000274a:	76e78593          	addi	a1,a5,1902 # 376e <STACK_SIZE+0x2f6e>
8000274e:	853a                	mv	a0,a4
80002750:	d44ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:249
	sensor_i2c_write(i2c_ch_sel, 0x3776, 0x00);
80002754:	fdf44703          	lbu	a4,-33(s0)
80002758:	4601                	li	a2,0
8000275a:	678d                	lui	a5,0x3
8000275c:	77678593          	addi	a1,a5,1910 # 3776 <STACK_SIZE+0x2f76>
80002760:	853a                	mv	a0,a4
80002762:	d32ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:250
	sensor_i2c_write(i2c_ch_sel, 0x3777, 0x00);
80002766:	fdf44703          	lbu	a4,-33(s0)
8000276a:	4601                	li	a2,0
8000276c:	678d                	lui	a5,0x3
8000276e:	77778593          	addi	a1,a5,1911 # 3777 <STACK_SIZE+0x2f77>
80002772:	853a                	mv	a0,a4
80002774:	d20ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:251
	sensor_i2c_write(i2c_ch_sel, 0x3778, 0x46);
80002778:	fdf44703          	lbu	a4,-33(s0)
8000277c:	04600613          	li	a2,70
80002780:	678d                	lui	a5,0x3
80002782:	77878593          	addi	a1,a5,1912 # 3778 <STACK_SIZE+0x2f78>
80002786:	853a                	mv	a0,a4
80002788:	d0cff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:252
	sensor_i2c_write(i2c_ch_sel, 0x3779, 0x00);
8000278c:	fdf44703          	lbu	a4,-33(s0)
80002790:	4601                	li	a2,0
80002792:	678d                	lui	a5,0x3
80002794:	77978593          	addi	a1,a5,1913 # 3779 <STACK_SIZE+0x2f79>
80002798:	853a                	mv	a0,a4
8000279a:	cfaff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:253
	sensor_i2c_write(i2c_ch_sel, 0x377A, 0x08);
8000279e:	fdf44703          	lbu	a4,-33(s0)
800027a2:	4621                	li	a2,8
800027a4:	678d                	lui	a5,0x3
800027a6:	77a78593          	addi	a1,a5,1914 # 377a <STACK_SIZE+0x2f7a>
800027aa:	853a                	mv	a0,a4
800027ac:	ce8ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:254
	sensor_i2c_write(i2c_ch_sel, 0x377B, 0x01);
800027b0:	fdf44703          	lbu	a4,-33(s0)
800027b4:	4605                	li	a2,1
800027b6:	678d                	lui	a5,0x3
800027b8:	77b78593          	addi	a1,a5,1915 # 377b <STACK_SIZE+0x2f7b>
800027bc:	853a                	mv	a0,a4
800027be:	cd6ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:255
	sensor_i2c_write(i2c_ch_sel, 0x377C, 0x45);
800027c2:	fdf44703          	lbu	a4,-33(s0)
800027c6:	04500613          	li	a2,69
800027ca:	678d                	lui	a5,0x3
800027cc:	77c78593          	addi	a1,a5,1916 # 377c <STACK_SIZE+0x2f7c>
800027d0:	853a                	mv	a0,a4
800027d2:	cc2ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:256
	sensor_i2c_write(i2c_ch_sel, 0x377D, 0x01);
800027d6:	fdf44703          	lbu	a4,-33(s0)
800027da:	4605                	li	a2,1
800027dc:	678d                	lui	a5,0x3
800027de:	77d78593          	addi	a1,a5,1917 # 377d <STACK_SIZE+0x2f7d>
800027e2:	853a                	mv	a0,a4
800027e4:	cb0ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:257
	sensor_i2c_write(i2c_ch_sel, 0x377E, 0x23);
800027e8:	fdf44703          	lbu	a4,-33(s0)
800027ec:	02300613          	li	a2,35
800027f0:	678d                	lui	a5,0x3
800027f2:	77e78593          	addi	a1,a5,1918 # 377e <STACK_SIZE+0x2f7e>
800027f6:	853a                	mv	a0,a4
800027f8:	c9cff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:258
	sensor_i2c_write(i2c_ch_sel, 0x377F, 0x02);
800027fc:	fdf44703          	lbu	a4,-33(s0)
80002800:	4609                	li	a2,2
80002802:	678d                	lui	a5,0x3
80002804:	77f78593          	addi	a1,a5,1919 # 377f <STACK_SIZE+0x2f7f>
80002808:	853a                	mv	a0,a4
8000280a:	c8aff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:259
	sensor_i2c_write(i2c_ch_sel, 0x3780, 0xD9);
8000280e:	fdf44703          	lbu	a4,-33(s0)
80002812:	0d900613          	li	a2,217
80002816:	678d                	lui	a5,0x3
80002818:	78078593          	addi	a1,a5,1920 # 3780 <STACK_SIZE+0x2f80>
8000281c:	853a                	mv	a0,a4
8000281e:	c76ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:260
	sensor_i2c_write(i2c_ch_sel, 0x3781, 0x03);
80002822:	fdf44703          	lbu	a4,-33(s0)
80002826:	460d                	li	a2,3
80002828:	678d                	lui	a5,0x3
8000282a:	78178593          	addi	a1,a5,1921 # 3781 <STACK_SIZE+0x2f81>
8000282e:	853a                	mv	a0,a4
80002830:	c64ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:261
	sensor_i2c_write(i2c_ch_sel, 0x3782, 0xF5);
80002834:	fdf44703          	lbu	a4,-33(s0)
80002838:	0f500613          	li	a2,245
8000283c:	678d                	lui	a5,0x3
8000283e:	78278593          	addi	a1,a5,1922 # 3782 <STACK_SIZE+0x2f82>
80002842:	853a                	mv	a0,a4
80002844:	c50ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:262
	sensor_i2c_write(i2c_ch_sel, 0x3783, 0x06);
80002848:	fdf44703          	lbu	a4,-33(s0)
8000284c:	4619                	li	a2,6
8000284e:	678d                	lui	a5,0x3
80002850:	78378593          	addi	a1,a5,1923 # 3783 <STACK_SIZE+0x2f83>
80002854:	853a                	mv	a0,a4
80002856:	c3eff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:263
	sensor_i2c_write(i2c_ch_sel, 0x3784, 0xA5);
8000285a:	fdf44703          	lbu	a4,-33(s0)
8000285e:	0a500613          	li	a2,165
80002862:	678d                	lui	a5,0x3
80002864:	78478593          	addi	a1,a5,1924 # 3784 <STACK_SIZE+0x2f84>
80002868:	853a                	mv	a0,a4
8000286a:	c2aff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:264
	sensor_i2c_write(i2c_ch_sel, 0x3788, 0x0F);
8000286e:	fdf44703          	lbu	a4,-33(s0)
80002872:	463d                	li	a2,15
80002874:	678d                	lui	a5,0x3
80002876:	78878593          	addi	a1,a5,1928 # 3788 <STACK_SIZE+0x2f88>
8000287a:	853a                	mv	a0,a4
8000287c:	c18ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:265
	sensor_i2c_write(i2c_ch_sel, 0x378A, 0xD9);
80002880:	fdf44703          	lbu	a4,-33(s0)
80002884:	0d900613          	li	a2,217
80002888:	678d                	lui	a5,0x3
8000288a:	78a78593          	addi	a1,a5,1930 # 378a <STACK_SIZE+0x2f8a>
8000288e:	853a                	mv	a0,a4
80002890:	c04ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:266
	sensor_i2c_write(i2c_ch_sel, 0x378B, 0x03);
80002894:	fdf44703          	lbu	a4,-33(s0)
80002898:	460d                	li	a2,3
8000289a:	678d                	lui	a5,0x3
8000289c:	78b78593          	addi	a1,a5,1931 # 378b <STACK_SIZE+0x2f8b>
800028a0:	853a                	mv	a0,a4
800028a2:	bf2ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:267
	sensor_i2c_write(i2c_ch_sel, 0x378C, 0xEB);
800028a6:	fdf44703          	lbu	a4,-33(s0)
800028aa:	0eb00613          	li	a2,235
800028ae:	678d                	lui	a5,0x3
800028b0:	78c78593          	addi	a1,a5,1932 # 378c <STACK_SIZE+0x2f8c>
800028b4:	853a                	mv	a0,a4
800028b6:	bdeff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:268
	sensor_i2c_write(i2c_ch_sel, 0x378D, 0x05);
800028ba:	fdf44703          	lbu	a4,-33(s0)
800028be:	4615                	li	a2,5
800028c0:	678d                	lui	a5,0x3
800028c2:	78d78593          	addi	a1,a5,1933 # 378d <STACK_SIZE+0x2f8d>
800028c6:	853a                	mv	a0,a4
800028c8:	bccff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:269
	sensor_i2c_write(i2c_ch_sel, 0x378E, 0x87);
800028cc:	fdf44703          	lbu	a4,-33(s0)
800028d0:	08700613          	li	a2,135
800028d4:	678d                	lui	a5,0x3
800028d6:	78e78593          	addi	a1,a5,1934 # 378e <STACK_SIZE+0x2f8e>
800028da:	853a                	mv	a0,a4
800028dc:	bb8ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:270
	sensor_i2c_write(i2c_ch_sel, 0x378F, 0x06);
800028e0:	fdf44703          	lbu	a4,-33(s0)
800028e4:	4619                	li	a2,6
800028e6:	678d                	lui	a5,0x3
800028e8:	78f78593          	addi	a1,a5,1935 # 378f <STACK_SIZE+0x2f8f>
800028ec:	853a                	mv	a0,a4
800028ee:	ba6ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:271
	sensor_i2c_write(i2c_ch_sel, 0x3790, 0xF5);
800028f2:	fdf44703          	lbu	a4,-33(s0)
800028f6:	0f500613          	li	a2,245
800028fa:	678d                	lui	a5,0x3
800028fc:	79078593          	addi	a1,a5,1936 # 3790 <STACK_SIZE+0x2f90>
80002900:	853a                	mv	a0,a4
80002902:	b92ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:272
	sensor_i2c_write(i2c_ch_sel, 0x3792, 0x43);
80002906:	fdf44703          	lbu	a4,-33(s0)
8000290a:	04300613          	li	a2,67
8000290e:	678d                	lui	a5,0x3
80002910:	79278593          	addi	a1,a5,1938 # 3792 <STACK_SIZE+0x2f92>
80002914:	853a                	mv	a0,a4
80002916:	b7eff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:273
	sensor_i2c_write(i2c_ch_sel, 0x3794, 0x7A);
8000291a:	fdf44703          	lbu	a4,-33(s0)
8000291e:	07a00613          	li	a2,122
80002922:	678d                	lui	a5,0x3
80002924:	79478593          	addi	a1,a5,1940 # 3794 <STACK_SIZE+0x2f94>
80002928:	853a                	mv	a0,a4
8000292a:	b6aff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:274
	sensor_i2c_write(i2c_ch_sel, 0x3796, 0xA1);
8000292e:	fdf44703          	lbu	a4,-33(s0)
80002932:	0a100613          	li	a2,161
80002936:	678d                	lui	a5,0x3
80002938:	79678593          	addi	a1,a5,1942 # 3796 <STACK_SIZE+0x2f96>
8000293c:	853a                	mv	a0,a4
8000293e:	b56ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:275
	sensor_i2c_write(i2c_ch_sel, 0x37B0, 0x37);// Xmaster pin high = 37h, else 36h
80002942:	fdf44703          	lbu	a4,-33(s0)
80002946:	03700613          	li	a2,55
8000294a:	678d                	lui	a5,0x3
8000294c:	7b078593          	addi	a1,a5,1968 # 37b0 <STACK_SIZE+0x2fb0>
80002950:	853a                	mv	a0,a4
80002952:	b42ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:276
	sensor_i2c_write(i2c_ch_sel, 0x3E04, 0x0E);
80002956:	fdf44703          	lbu	a4,-33(s0)
8000295a:	4639                	li	a2,14
8000295c:	6791                	lui	a5,0x4
8000295e:	e0478593          	addi	a1,a5,-508 # 3e04 <STACK_SIZE+0x3604>
80002962:	853a                	mv	a0,a4
80002964:	b30ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:279
	/*End of additional mandatory settings */

	sensor_i2c_write(i2c_ch_sel, 0x30E8, 0x30);// Gain setting LSB
80002968:	fdf44703          	lbu	a4,-33(s0)
8000296c:	03000613          	li	a2,48
80002970:	678d                	lui	a5,0x3
80002972:	0e878593          	addi	a1,a5,232 # 30e8 <STACK_SIZE+0x28e8>
80002976:	853a                	mv	a0,a4
80002978:	b1cff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:280
	sensor_i2c_write(i2c_ch_sel, 0x30E9, 0x00);// Gain setting MSB
8000297c:	fdf44703          	lbu	a4,-33(s0)
80002980:	4601                	li	a2,0
80002982:	678d                	lui	a5,0x3
80002984:	0e978593          	addi	a1,a5,233 # 30e9 <STACK_SIZE+0x28e9>
80002988:	853a                	mv	a0,a4
8000298a:	b0aff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:281
	sensor_i2c_write(i2c_ch_sel, 0x3E04, 0x0E);// Mandatory value as per data sheet
8000298e:	fdf44703          	lbu	a4,-33(s0)
80002992:	4639                	li	a2,14
80002994:	6791                	lui	a5,0x4
80002996:	e0478593          	addi	a1,a5,-508 # 3e04 <STACK_SIZE+0x3604>
8000299a:	853a                	mv	a0,a4
8000299c:	af8ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:282
	sensor_i2c_write(i2c_ch_sel, 0x3002, 0x00);// Master mode
800029a0:	fdf44703          	lbu	a4,-33(s0)
800029a4:	4601                	li	a2,0
800029a6:	678d                	lui	a5,0x3
800029a8:	00278593          	addi	a1,a5,2 # 3002 <STACK_SIZE+0x2802>
800029ac:	853a                	mv	a0,a4
800029ae:	ae6ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:283
	msdelay(1000);
800029b2:	3e800513          	li	a0,1000
800029b6:	2051                	jal	80002a3a <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:285

	sensor_i2c_write(i2c_ch_sel, 0x3000, 0x00);// STANDBY mode disabled
800029b8:	fdf44783          	lbu	a5,-33(s0)
800029bc:	4601                	li	a2,0
800029be:	658d                	lui	a1,0x3
800029c0:	853e                	mv	a0,a5
800029c2:	ad2ff0ef          	jal	ra,80001c94 <sensor_i2c_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:287
	//sensor_i2c_write_bits(0x301A, 0x0004, 1);  	//Enable Streaming
	for(i = 0; i < 50000; i++);
800029c6:	fe042623          	sw	zero,-20(s0)
800029ca:	a031                	j	800029d6 <imx334_cam_reginit+0xb5e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:287 (discriminator 3)
800029cc:	fec42783          	lw	a5,-20(s0)
800029d0:	0785                	addi	a5,a5,1
800029d2:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:287 (discriminator 1)
800029d6:	fec42703          	lw	a4,-20(s0)
800029da:	67b1                	lui	a5,0xc
800029dc:	34f78793          	addi	a5,a5,847 # c34f <STACK_SIZE+0xbb4f>
800029e0:	fee7f6e3          	bgeu	a5,a4,800029cc <imx334_cam_reginit+0xb54>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:288
}
800029e4:	0001                	nop
800029e6:	50b2                	lw	ra,44(sp)
800029e8:	5422                	lw	s0,40(sp)
800029ea:	6145                	addi	sp,sp,48
800029ec:	8082                	ret

800029ee <gain_setting>:
gain_setting():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:291

void gain_setting( uint8_t i2c_ch_sel,uint16_t in_gain)
{
800029ee:	1101                	addi	sp,sp,-32
800029f0:	ce06                	sw	ra,28(sp)
800029f2:	cc22                	sw	s0,24(sp)
800029f4:	1000                	addi	s0,sp,32
800029f6:	87aa                	mv	a5,a0
800029f8:	872e                	mv	a4,a1
800029fa:	fef407a3          	sb	a5,-17(s0)
800029fe:	87ba                	mv	a5,a4
80002a00:	fef41623          	sh	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:292
sensor_i2c_write_gain(i2c_ch_sel, 0x30E8, in_gain);// Gain setting LSB
80002a04:	fec45783          	lhu	a5,-20(s0)
80002a08:	0ff7f793          	andi	a5,a5,255
80002a0c:	fef44703          	lbu	a4,-17(s0)
80002a10:	863e                	mv	a2,a5
80002a12:	678d                	lui	a5,0x3
80002a14:	0e878593          	addi	a1,a5,232 # 30e8 <STACK_SIZE+0x28e8>
80002a18:	853a                	mv	a0,a4
80002a1a:	b5aff0ef          	jal	ra,80001d74 <sensor_i2c_write_gain>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:293
sensor_i2c_write_gain(i2c_ch_sel, 0x30E9, 0);// Gain setting MSB
80002a1e:	fef44703          	lbu	a4,-17(s0)
80002a22:	4601                	li	a2,0
80002a24:	678d                	lui	a5,0x3
80002a26:	0e978593          	addi	a1,a5,233 # 30e9 <STACK_SIZE+0x28e9>
80002a2a:	853a                	mv	a0,a4
80002a2c:	b48ff0ef          	jal	ra,80001d74 <sensor_i2c_write_gain>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/imx334_corei2c/imx334_corei2c.c:295

}
80002a30:	0001                	nop
80002a32:	40f2                	lw	ra,28(sp)
80002a34:	4462                	lw	s0,24(sp)
80002a36:	6105                	addi	sp,sp,32
80002a38:	8082                	ret

80002a3a <msdelay>:
msdelay():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/delay/msdelay.c:19
extern volatile uint32_t timerdone;
extern volatile uint32_t g_10ms_count1;
extern volatile uint32_t g_ms_count;

void msdelay(uint32_t tms)
{
80002a3a:	1101                	addi	sp,sp,-32
80002a3c:	ce22                	sw	s0,28(sp)
80002a3e:	1000                	addi	s0,sp,32
80002a40:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/delay/msdelay.c:20
    g_ms_count = tms;
80002a44:	96018793          	addi	a5,gp,-1696 # 80007610 <g_ms_count>
80002a48:	fec42703          	lw	a4,-20(s0)
80002a4c:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/delay/msdelay.c:21
    g_10ms_count1 = 0;
80002a4e:	97018793          	addi	a5,gp,-1680 # 80007620 <g_10ms_count1>
80002a52:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/delay/msdelay.c:22
    timerdone = 1;
80002a56:	8b018793          	addi	a5,gp,-1872 # 80007560 <timerdone>
80002a5a:	4705                	li	a4,1
80002a5c:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/delay/msdelay.c:23
    while(timerdone != 0)
80002a5e:	0001                	nop
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/delay/msdelay.c:23 (discriminator 1)
80002a60:	8b018793          	addi	a5,gp,-1872 # 80007560 <timerdone>
80002a64:	439c                	lw	a5,0(a5)
80002a66:	ffed                	bnez	a5,80002a60 <msdelay+0x26>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/delay/msdelay.c:28
	{
		//busy wait loop
	}

}
80002a68:	0001                	nop
80002a6a:	4472                	lw	s0,28(sp)
80002a6c:	6105                	addi	sp,sp,32
80002a6e:	8082                	ret

80002a70 <read_dp>:
read_dp():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_common.c:28

// ------------------------------------------------------------
// Read DisplayPort IP APB interface
// ------------------------------------------------------------
void read_dp(uint32_t rd_base_addr, uint32_t offset, uint32_t *rd_data)
{
80002a70:	7179                	addi	sp,sp,-48
80002a72:	d622                	sw	s0,44(sp)
80002a74:	1800                	addi	s0,sp,48
80002a76:	fca42e23          	sw	a0,-36(s0)
80002a7a:	fcb42c23          	sw	a1,-40(s0)
80002a7e:	fcc42a23          	sw	a2,-44(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_common.c:29
    uint32_t raddr = rd_base_addr | offset;
80002a82:	fdc42703          	lw	a4,-36(s0)
80002a86:	fd842783          	lw	a5,-40(s0)
80002a8a:	8fd9                	or	a5,a5,a4
80002a8c:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_common.c:30
    rd_data[0] = *((uint32_t*)raddr);
80002a90:	fec42783          	lw	a5,-20(s0)
80002a94:	4398                	lw	a4,0(a5)
80002a96:	fd442783          	lw	a5,-44(s0)
80002a9a:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_common.c:31
}
80002a9c:	0001                	nop
80002a9e:	5432                	lw	s0,44(sp)
80002aa0:	6145                	addi	sp,sp,48
80002aa2:	8082                	ret

80002aa4 <write_dp>:
write_dp():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_common.c:37

// ------------------------------------------------------------
// Write DisplayPort IP APB interface
// ------------------------------------------------------------
void write_dp(uint32_t wr_base_addr, uint32_t offset, uint32_t wdata)
{
80002aa4:	7179                	addi	sp,sp,-48
80002aa6:	d622                	sw	s0,44(sp)
80002aa8:	1800                	addi	s0,sp,48
80002aaa:	fca42e23          	sw	a0,-36(s0)
80002aae:	fcb42c23          	sw	a1,-40(s0)
80002ab2:	fcc42a23          	sw	a2,-44(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_common.c:38
    uint32_t wraddr = wr_base_addr | offset;
80002ab6:	fdc42703          	lw	a4,-36(s0)
80002aba:	fd842783          	lw	a5,-40(s0)
80002abe:	8fd9                	or	a5,a5,a4
80002ac0:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_common.c:39
    *((uint32_t *)wraddr) = wdata;
80002ac4:	fec42783          	lw	a5,-20(s0)
80002ac8:	fd442703          	lw	a4,-44(s0)
80002acc:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_common.c:40
}
80002ace:	0001                	nop
80002ad0:	5432                	lw	s0,44(sp)
80002ad2:	6145                	addi	sp,sp,48
80002ad4:	8082                	ret

80002ad6 <DPSourceInit>:
DPSourceInit():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:68
}
// ---------------------------------------------------------------------------
// DisplayPort init()
// ---------------------------------------------------------------------------
void DPSourceInit(uint32_t SPEED_MODE,uint32_t HRES,uint32_t VRES,uint32_t HFP,uint32_t HBP,uint32_t VFP,uint32_t VBP,uint32_t HSW,uint32_t VSW,uint32_t VSP,uint32_t LANE_NO)
{
80002ad6:	711d                	addi	sp,sp,-96
80002ad8:	ce86                	sw	ra,92(sp)
80002ada:	cca2                	sw	s0,88(sp)
80002adc:	1080                	addi	s0,sp,96
80002ade:	fca42623          	sw	a0,-52(s0)
80002ae2:	fcb42423          	sw	a1,-56(s0)
80002ae6:	fcc42223          	sw	a2,-60(s0)
80002aea:	fcd42023          	sw	a3,-64(s0)
80002aee:	fae42e23          	sw	a4,-68(s0)
80002af2:	faf42c23          	sw	a5,-72(s0)
80002af6:	fb042a23          	sw	a6,-76(s0)
80002afa:	fb142823          	sw	a7,-80(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:70

    update_speed(SPEED_MODE);
80002afe:	fcc42503          	lw	a0,-52(s0)
80002b02:	018020ef          	jal	ra,80004b1a <update_speed>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:73
    uint32_t rd_data_hpd;
    //hpd_1us_cycles
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_HPD_1US_CYCLES_OFFSET, 0x00000064);
80002b06:	06400613          	li	a2,100
80002b0a:	14000593          	li	a1,320
80002b0e:	71001537          	lui	a0,0x71001
80002b12:	3f49                	jal	80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:75
    //DP_TX_HPD_CONNECTED_HIGH_TIME_TH_OFFSET
    write_dp(DP_TX_IP_APB_BASE_ADDRESS,DP_TX_HPD_CONNECTED_HIGH_TIME_TH_OFFSET, 0x000186A0);
80002b14:	67e1                	lui	a5,0x18
80002b16:	6a078613          	addi	a2,a5,1696 # 186a0 <STACK_SIZE+0x17ea0>
80002b1a:	14400593          	li	a1,324
80002b1e:	71001537          	lui	a0,0x71001
80002b22:	3749                	jal	80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:77
    //DP_TX_HPD_DISCONNECTED_LOW_TIME_TH_OFFSET
    write_dp(DP_TX_IP_APB_BASE_ADDRESS,DP_TX_HPD_DISCONNECTED_LOW_TIME_TH_OFFSET, 0x000007d0);
80002b24:	7d000613          	li	a2,2000
80002b28:	14800593          	li	a1,328
80002b2c:	71001537          	lui	a0,0x71001
80002b30:	3f95                	jal	80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:79
    //DP_TX_HPD_IRQ_TIME_OFFSET
    write_dp(DP_TX_IP_APB_BASE_ADDRESS,DP_TX_HPD_IRQ_TIME_OFFSET, 0x03e801f4);
80002b32:	03e807b7          	lui	a5,0x3e80
80002b36:	1f478613          	addi	a2,a5,500 # 3e801f4 <STACK_SIZE+0x3e7f9f4>
80002b3a:	14c00593          	li	a1,332
80002b3e:	71001537          	lui	a0,0x71001
80002b42:	378d                	jal	80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:81
    //read interrupt
     read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_HPD_CONNECT_STATUS_OFFSET,&rd_data_hpd);
80002b44:	fec40793          	addi	a5,s0,-20
80002b48:	863e                	mv	a2,a5
80002b4a:	15000593          	li	a1,336
80002b4e:	71001537          	lui	a0,0x71001
80002b52:	3f39                	jal	80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:83
    // aux timeout
     write_dp(DP_TX_IP_APB_BASE_ADDRESS,DP_TX_AUX_REPLY_TIMEOUT_TH_OFFSET, 0x000493e0);
80002b54:	000497b7          	lui	a5,0x49
80002b58:	3e078613          	addi	a2,a5,992 # 493e0 <STACK_SIZE+0x48be0>
80002b5c:	11000593          	li	a1,272
80002b60:	71001537          	lui	a0,0x71001
80002b64:	3781                	jal	80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:88

    uint32_t rd_data[4];

    //read interrupt
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_INTERRUPT_OFFSET, &rd_data[0]);
80002b66:	fdc40793          	addi	a5,s0,-36
80002b6a:	863e                	mv	a2,a5
80002b6c:	18800593          	li	a1,392
80002b70:	71001537          	lui	a0,0x71001
80002b74:	3df5                	jal	80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:90
    //AUX_Rx_Reply_Timeout_Error
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_RX_ERROR_STATUS_OFFSET, &rd_data[0]);
80002b76:	fdc40793          	addi	a5,s0,-36
80002b7a:	863e                	mv	a2,a5
80002b7c:	12800593          	li	a1,296
80002b80:	71001537          	lui	a0,0x71001
80002b84:	35f5                	jal	80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:92
    //AUX_Tx_Request_Number
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_REQUEST_NUMBER_OFFSET, &rd_data[1]);
80002b86:	fdc40793          	addi	a5,s0,-36
80002b8a:	0791                	addi	a5,a5,4
80002b8c:	863e                	mv	a2,a5
80002b8e:	11c00593          	li	a1,284
80002b92:	71001537          	lui	a0,0x71001
80002b96:	3de9                	jal	80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:94
    //AUX_Rx_Reply_Number
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_RX_REPLY_NUMBER_OFFSET, &rd_data[2]);
80002b98:	fdc40793          	addi	a5,s0,-36
80002b9c:	07a1                	addi	a5,a5,8
80002b9e:	863e                	mv	a2,a5
80002ba0:	12000593          	li	a1,288
80002ba4:	71001537          	lui	a0,0x71001
80002ba8:	35e1                	jal	80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:97

    //powerup the dp
    SourceWrBytes[0] = 0x00000001;
80002baa:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80002bae:	4705                	li	a4,1
80002bb0:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:98
    DPSourceTxWrCmd(0x00000600,0x00000001,0x00000001); //SET_POWER & SET_DP_PWR_VOLTAGE
80002bb2:	4605                	li	a2,1
80002bb4:	4585                	li	a1,1
80002bb6:	60000513          	li	a0,1536
80002bba:	21c1                	jal	8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:101

    //following call displays without power cycling monitor
    link_training(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80002bbc:	441c                	lw	a5,8(s0)
80002bbe:	c43e                	sw	a5,8(sp)
80002bc0:	405c                	lw	a5,4(s0)
80002bc2:	c23e                	sw	a5,4(sp)
80002bc4:	401c                	lw	a5,0(s0)
80002bc6:	c03e                	sw	a5,0(sp)
80002bc8:	fb042883          	lw	a7,-80(s0)
80002bcc:	fb442803          	lw	a6,-76(s0)
80002bd0:	fb842783          	lw	a5,-72(s0)
80002bd4:	fbc42703          	lw	a4,-68(s0)
80002bd8:	fc042683          	lw	a3,-64(s0)
80002bdc:	fc442603          	lw	a2,-60(s0)
80002be0:	fc842583          	lw	a1,-56(s0)
80002be4:	fcc42503          	lw	a0,-52(s0)
80002be8:	117000ef          	jal	ra,800034fe <link_training>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:105



}
80002bec:	0001                	nop
80002bee:	40f6                	lw	ra,92(sp)
80002bf0:	4466                	lw	s0,88(sp)
80002bf2:	6125                	addi	sp,sp,96
80002bf4:	8082                	ret

80002bf6 <config_init>:
config_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:112
// ---------------------------------------------------------------------------
// DisplayPort config init()
// ---------------------------------------------------------------------------

void config_init(uint32_t SPEED_MODE,uint32_t HRES,uint32_t VRES,uint32_t HFP,uint32_t HBP,uint32_t VFP,uint32_t VBP,uint32_t HSW,uint32_t VSW,uint32_t VSP,uint32_t LANE_NO)
{
80002bf6:	7139                	addi	sp,sp,-64
80002bf8:	de06                	sw	ra,60(sp)
80002bfa:	dc22                	sw	s0,56(sp)
80002bfc:	0080                	addi	s0,sp,64
80002bfe:	fea42623          	sw	a0,-20(s0)
80002c02:	feb42423          	sw	a1,-24(s0)
80002c06:	fec42223          	sw	a2,-28(s0)
80002c0a:	fed42023          	sw	a3,-32(s0)
80002c0e:	fce42e23          	sw	a4,-36(s0)
80002c12:	fcf42c23          	sw	a5,-40(s0)
80002c16:	fd042a23          	sw	a6,-44(s0)
80002c1a:	fd142823          	sw	a7,-48(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:113
    SourceCmdSta = 0x0000000;
80002c1e:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80002c22:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:114
    timestamp = 0;
80002c26:	84818793          	addi	a5,gp,-1976 # 800074f8 <timestamp>
80002c2a:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:116

    DPSourceInit(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80002c2e:	441c                	lw	a5,8(s0)
80002c30:	c43e                	sw	a5,8(sp)
80002c32:	405c                	lw	a5,4(s0)
80002c34:	c23e                	sw	a5,4(sp)
80002c36:	401c                	lw	a5,0(s0)
80002c38:	c03e                	sw	a5,0(sp)
80002c3a:	fd042883          	lw	a7,-48(s0)
80002c3e:	fd442803          	lw	a6,-44(s0)
80002c42:	fd842783          	lw	a5,-40(s0)
80002c46:	fdc42703          	lw	a4,-36(s0)
80002c4a:	fe042683          	lw	a3,-32(s0)
80002c4e:	fe442603          	lw	a2,-28(s0)
80002c52:	fe842583          	lw	a1,-24(s0)
80002c56:	fec42503          	lw	a0,-20(s0)
80002c5a:	3db5                	jal	80002ad6 <DPSourceInit>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:118
    //DP_TX_AUX_TX
    SourceWrBytes[0] = 0x00000001;
80002c5c:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80002c60:	4705                	li	a4,1
80002c62:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:119
    DPSourceTxWrCmd(0x00000600,0x00000001,0x00000001); //SET_POWER & SET_DP_PWR_VOLTAGE
80002c64:	4605                	li	a2,1
80002c66:	4585                	li	a1,1
80002c68:	60000513          	li	a0,1536
80002c6c:	2139                	jal	8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:120
}
80002c6e:	0001                	nop
80002c70:	50f2                	lw	ra,60(sp)
80002c72:	5462                	lw	s0,56(sp)
80002c74:	6121                	addi	sp,sp,64
80002c76:	8082                	ret

80002c78 <DPSourceISR>:
DPSourceISR():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:126
// ---------------------------------------------------------------------------
// DisplayPort Source ISR
// ---------------------------------------------------------------------------

void DPSourceISR(uint32_t SPEED_MODE,uint32_t HRES,uint32_t VRES,uint32_t HFP,uint32_t HBP,uint32_t VFP,uint32_t VBP,uint32_t HSW,uint32_t VSW,uint32_t VSP,uint32_t LANE_NO)
{
80002c78:	7155                	addi	sp,sp,-208
80002c7a:	c786                	sw	ra,204(sp)
80002c7c:	c5a2                	sw	s0,200(sp)
80002c7e:	0980                	addi	s0,sp,208
80002c80:	f4a42e23          	sw	a0,-164(s0)
80002c84:	f4b42c23          	sw	a1,-168(s0)
80002c88:	f4c42a23          	sw	a2,-172(s0)
80002c8c:	f4d42823          	sw	a3,-176(s0)
80002c90:	f4e42623          	sw	a4,-180(s0)
80002c94:	f4f42423          	sw	a5,-184(s0)
80002c98:	f5042223          	sw	a6,-188(s0)
80002c9c:	f5142023          	sw	a7,-192(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:151
    //swing reg
    uint32_t SER_1_PMA_L0_SER_DRV_DATA_CTRL_R;
    uint32_t SER_1_PMA_L0_SER_DRV_CTRL_R;
    uint32_t SER_1_PMA_L0_SER_DRV_CTRL_SEL_R;
    //read interrupt
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_INTERRUPT_OFFSET, &irq_value);
80002ca0:	94018613          	addi	a2,gp,-1728 # 800075f0 <irq_value>
80002ca4:	18800593          	li	a1,392
80002ca8:	71001537          	lui	a0,0x71001
80002cac:	dc5ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:153

    if(irq_value == 0x00000000)
80002cb0:	94018793          	addi	a5,gp,-1728 # 800075f0 <irq_value>
80002cb4:	439c                	lw	a5,0(a5)
80002cb6:	3a078d63          	beqz	a5,80003070 <DPSourceISR+0x3f8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:156
        return;

    if( (irq_value&0x00000002) > 0x00000000)
80002cba:	94018793          	addi	a5,gp,-1728 # 800075f0 <irq_value>
80002cbe:	439c                	lw	a5,0(a5)
80002cc0:	8b89                	andi	a5,a5,2
80002cc2:	cb8d                	beqz	a5,80002cf4 <DPSourceISR+0x7c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:158
    {
        link_training(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80002cc4:	441c                	lw	a5,8(s0)
80002cc6:	c43e                	sw	a5,8(sp)
80002cc8:	405c                	lw	a5,4(s0)
80002cca:	c23e                	sw	a5,4(sp)
80002ccc:	401c                	lw	a5,0(s0)
80002cce:	c03e                	sw	a5,0(sp)
80002cd0:	f4042883          	lw	a7,-192(s0)
80002cd4:	f4442803          	lw	a6,-188(s0)
80002cd8:	f4842783          	lw	a5,-184(s0)
80002cdc:	f4c42703          	lw	a4,-180(s0)
80002ce0:	f5042683          	lw	a3,-176(s0)
80002ce4:	f5442603          	lw	a2,-172(s0)
80002ce8:	f5842583          	lw	a1,-168(s0)
80002cec:	f5c42503          	lw	a0,-164(s0)
80002cf0:	00f000ef          	jal	ra,800034fe <link_training>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:163
    }
    // -----------------------------------------
    // HPD Event
    // -----------------------------------------
    if( (irq_value&0x00000008) > 0x00000000)
80002cf4:	94018793          	addi	a5,gp,-1728 # 800075f0 <irq_value>
80002cf8:	439c                	lw	a5,0(a5)
80002cfa:	8ba1                	andi	a5,a5,8
80002cfc:	c3c5                	beqz	a5,80002d9c <DPSourceISR+0x124>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:165
    {
        uint8_t testmsg1[] = {"\n * DisplayPort Source Got HPD IRQ : \n"};
80002cfe:	00004797          	auipc	a5,0x4
80002d02:	6d678793          	addi	a5,a5,1750 # 800073d4 <local_irq_handler_table+0x3a4>
80002d06:	0007ae03          	lw	t3,0(a5)
80002d0a:	0047a303          	lw	t1,4(a5)
80002d0e:	0087a883          	lw	a7,8(a5)
80002d12:	00c7a803          	lw	a6,12(a5)
80002d16:	4b88                	lw	a0,16(a5)
80002d18:	4bcc                	lw	a1,20(a5)
80002d1a:	4f90                	lw	a2,24(a5)
80002d1c:	4fd4                	lw	a3,28(a5)
80002d1e:	5398                	lw	a4,32(a5)
80002d20:	f7c42423          	sw	t3,-152(s0)
80002d24:	f6642623          	sw	t1,-148(s0)
80002d28:	f7142823          	sw	a7,-144(s0)
80002d2c:	f7042a23          	sw	a6,-140(s0)
80002d30:	f6a42c23          	sw	a0,-136(s0)
80002d34:	f6b42e23          	sw	a1,-132(s0)
80002d38:	f8c42023          	sw	a2,-128(s0)
80002d3c:	f8d42223          	sw	a3,-124(s0)
80002d40:	f8e42423          	sw	a4,-120(s0)
80002d44:	0247d703          	lhu	a4,36(a5)
80002d48:	f8e41623          	sh	a4,-116(s0)
80002d4c:	0267c783          	lbu	a5,38(a5)
80002d50:	f8f40723          	sb	a5,-114(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:166
        UART_send(&g_uart,(const uint8_t *)&testmsg1,sizeof(testmsg1));
80002d54:	f6840793          	addi	a5,s0,-152
80002d58:	02700613          	li	a2,39
80002d5c:	85be                	mv	a1,a5
80002d5e:	95818513          	addi	a0,gp,-1704 # 80007608 <g_uart>
80002d62:	8f0fe0ef          	jal	ra,80000e52 <UART_send>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:167
        SourceCmdSta = 0x0000000;
80002d66:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80002d6a:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:168
        config_init(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80002d6e:	441c                	lw	a5,8(s0)
80002d70:	c43e                	sw	a5,8(sp)
80002d72:	405c                	lw	a5,4(s0)
80002d74:	c23e                	sw	a5,4(sp)
80002d76:	401c                	lw	a5,0(s0)
80002d78:	c03e                	sw	a5,0(sp)
80002d7a:	f4042883          	lw	a7,-192(s0)
80002d7e:	f4442803          	lw	a6,-188(s0)
80002d82:	f4842783          	lw	a5,-184(s0)
80002d86:	f4c42703          	lw	a4,-180(s0)
80002d8a:	f5042683          	lw	a3,-176(s0)
80002d8e:	f5442603          	lw	a2,-172(s0)
80002d92:	f5842583          	lw	a1,-168(s0)
80002d96:	f5c42503          	lw	a0,-164(s0)
80002d9a:	3db1                	jal	80002bf6 <config_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:170
    }
    if( (irq_value&0x00000010) > 0x00000000)
80002d9c:	94018793          	addi	a5,gp,-1728 # 800075f0 <irq_value>
80002da0:	439c                	lw	a5,0(a5)
80002da2:	8bc1                	andi	a5,a5,16
80002da4:	cbdd                	beqz	a5,80002e5a <DPSourceISR+0x1e2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:172
    {
        uint8_t testmsg1[] = {"\n * DisplayPort Source Got HPD Connection : \n"};
80002da6:	00004797          	auipc	a5,0x4
80002daa:	65678793          	addi	a5,a5,1622 # 800073fc <local_irq_handler_table+0x3cc>
80002dae:	0007af03          	lw	t5,0(a5)
80002db2:	0047ae83          	lw	t4,4(a5)
80002db6:	0087ae03          	lw	t3,8(a5)
80002dba:	00c7a303          	lw	t1,12(a5)
80002dbe:	0107a883          	lw	a7,16(a5)
80002dc2:	0147a803          	lw	a6,20(a5)
80002dc6:	4f88                	lw	a0,24(a5)
80002dc8:	4fcc                	lw	a1,28(a5)
80002dca:	5390                	lw	a2,32(a5)
80002dcc:	53d4                	lw	a3,36(a5)
80002dce:	5798                	lw	a4,40(a5)
80002dd0:	f7e42423          	sw	t5,-152(s0)
80002dd4:	f7d42623          	sw	t4,-148(s0)
80002dd8:	f7c42823          	sw	t3,-144(s0)
80002ddc:	f6642a23          	sw	t1,-140(s0)
80002de0:	f7142c23          	sw	a7,-136(s0)
80002de4:	f7042e23          	sw	a6,-132(s0)
80002de8:	f8a42023          	sw	a0,-128(s0)
80002dec:	f8b42223          	sw	a1,-124(s0)
80002df0:	f8c42423          	sw	a2,-120(s0)
80002df4:	f8d42623          	sw	a3,-116(s0)
80002df8:	f8e42823          	sw	a4,-112(s0)
80002dfc:	02c7d783          	lhu	a5,44(a5)
80002e00:	f8f41a23          	sh	a5,-108(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:173
        UART_send(&g_uart,(const uint8_t *)&testmsg1,sizeof(testmsg1));
80002e04:	f6840793          	addi	a5,s0,-152
80002e08:	02e00613          	li	a2,46
80002e0c:	85be                	mv	a1,a5
80002e0e:	95818513          	addi	a0,gp,-1704 # 80007608 <g_uart>
80002e12:	840fe0ef          	jal	ra,80000e52 <UART_send>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:174
        SourceCmdSta = 0x0000000;
80002e16:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80002e1a:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:175
        config_init(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80002e1e:	441c                	lw	a5,8(s0)
80002e20:	c43e                	sw	a5,8(sp)
80002e22:	405c                	lw	a5,4(s0)
80002e24:	c23e                	sw	a5,4(sp)
80002e26:	401c                	lw	a5,0(s0)
80002e28:	c03e                	sw	a5,0(sp)
80002e2a:	f4042883          	lw	a7,-192(s0)
80002e2e:	f4442803          	lw	a6,-188(s0)
80002e32:	f4842783          	lw	a5,-184(s0)
80002e36:	f4c42703          	lw	a4,-180(s0)
80002e3a:	f5042683          	lw	a3,-176(s0)
80002e3e:	f5442603          	lw	a2,-172(s0)
80002e42:	f5842583          	lw	a1,-168(s0)
80002e46:	f5c42503          	lw	a0,-164(s0)
80002e4a:	dadff0ef          	jal	ra,80002bf6 <config_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:176
        iter=0;
80002e4e:	00004797          	auipc	a5,0x4
80002e52:	66a78793          	addi	a5,a5,1642 # 800074b8 <iter>
80002e56:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:178
    }
    if( (irq_value&0x00000020) > 0x00000000)
80002e5a:	94018793          	addi	a5,gp,-1728 # 800075f0 <irq_value>
80002e5e:	439c                	lw	a5,0(a5)
80002e60:	0207f793          	andi	a5,a5,32
80002e64:	cf95                	beqz	a5,80002ea0 <DPSourceISR+0x228>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:180
    {
        uint8_t testmsg1[] = {"\n * DisplayPort Source Got HPD Disconnection : \n"};
80002e66:	00004717          	auipc	a4,0x4
80002e6a:	5c670713          	addi	a4,a4,1478 # 8000742c <local_irq_handler_table+0x3fc>
80002e6e:	f6840793          	addi	a5,s0,-152
80002e72:	86ba                	mv	a3,a4
80002e74:	03100713          	li	a4,49
80002e78:	863a                	mv	a2,a4
80002e7a:	85b6                	mv	a1,a3
80002e7c:	853e                	mv	a0,a5
80002e7e:	18a040ef          	jal	ra,80007008 <memcpy>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:181
        UART_send(&g_uart,(const uint8_t *)&testmsg1,sizeof(testmsg1));
80002e82:	f6840793          	addi	a5,s0,-152
80002e86:	03100613          	li	a2,49
80002e8a:	85be                	mv	a1,a5
80002e8c:	95818513          	addi	a0,gp,-1704 # 80007608 <g_uart>
80002e90:	fc3fd0ef          	jal	ra,80000e52 <UART_send>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:182
        iter=0;
80002e94:	00004797          	auipc	a5,0x4
80002e98:	62478793          	addi	a5,a5,1572 # 800074b8 <iter>
80002e9c:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:186 (discriminator 1)

    }
    //SAI
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_RSTPD, &SER_1_PMA_L0_DES_RSTPD_R);
80002ea0:	fec40793          	addi	a5,s0,-20
80002ea4:	863e                	mv	a2,a5
80002ea6:	010817b7          	lui	a5,0x1081
80002eaa:	04c78593          	addi	a1,a5,76 # 108104c <STACK_SIZE+0x108084c>
80002eae:	60000537          	lui	a0,0x60000
80002eb2:	bbfff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:187 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_RSTPD, &SER_1_PMA_L0_SER_RSTPD_R);
80002eb6:	fe840793          	addi	a5,s0,-24
80002eba:	863e                	mv	a2,a5
80002ebc:	010817b7          	lui	a5,0x1081
80002ec0:	07878593          	addi	a1,a5,120 # 1081078 <STACK_SIZE+0x1080878>
80002ec4:	60000537          	lui	a0,0x60000
80002ec8:	ba9ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:188 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_CDR_CTRL_2, &SER_1_PMA_L0_DES_CDR_CTRL_2_R);
80002ecc:	fe440793          	addi	a5,s0,-28
80002ed0:	863e                	mv	a2,a5
80002ed2:	010817b7          	lui	a5,0x1081
80002ed6:	00878593          	addi	a1,a5,8 # 1081008 <STACK_SIZE+0x1080808>
80002eda:	60000537          	lui	a0,0x60000
80002ede:	b93ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:189 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_CDR_CTRL_3, &SER_1_PMA_L0_DES_CDR_CTRL_3_R);
80002ee2:	fe040793          	addi	a5,s0,-32
80002ee6:	863e                	mv	a2,a5
80002ee8:	010817b7          	lui	a5,0x1081
80002eec:	00c78593          	addi	a1,a5,12 # 108100c <STACK_SIZE+0x108080c>
80002ef0:	60000537          	lui	a0,0x60000
80002ef4:	b7dff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:190 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFEEM_CTRL_1, &SER_1_PMA_L0_DES_DFEEM_CTRL_1_R);
80002ef8:	fdc40793          	addi	a5,s0,-36
80002efc:	863e                	mv	a2,a5
80002efe:	010817b7          	lui	a5,0x1081
80002f02:	01078593          	addi	a1,a5,16 # 1081010 <STACK_SIZE+0x1080810>
80002f06:	60000537          	lui	a0,0x60000
80002f0a:	b67ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:191 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFEEM_CTRL_2, &SER_1_PMA_L0_DES_DFEEM_CTRL_2_R);
80002f0e:	fd840793          	addi	a5,s0,-40
80002f12:	863e                	mv	a2,a5
80002f14:	010817b7          	lui	a5,0x1081
80002f18:	01478593          	addi	a1,a5,20 # 1081014 <STACK_SIZE+0x1080814>
80002f1c:	60000537          	lui	a0,0x60000
80002f20:	b51ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:192 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFEEM_CTRL_3, &SER_1_PMA_L0_DES_DFEEM_CTRL_3_R);
80002f24:	fd440793          	addi	a5,s0,-44
80002f28:	863e                	mv	a2,a5
80002f2a:	010817b7          	lui	a5,0x1081
80002f2e:	01878593          	addi	a1,a5,24 # 1081018 <STACK_SIZE+0x1080818>
80002f32:	60000537          	lui	a0,0x60000
80002f36:	b3bff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:193 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFE_CTRL_2, &SER_1_PMA_L0_DES_DFE_CTRL_2_R);
80002f3a:	fd040793          	addi	a5,s0,-48
80002f3e:	863e                	mv	a2,a5
80002f40:	010817b7          	lui	a5,0x1081
80002f44:	02478593          	addi	a1,a5,36 # 1081024 <STACK_SIZE+0x1080824>
80002f48:	60000537          	lui	a0,0x60000
80002f4c:	b25ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:194 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_EM_CTRL_2, &SER_1_PMA_L0_DES_EM_CTRL_2_R);
80002f50:	fcc40793          	addi	a5,s0,-52
80002f54:	863e                	mv	a2,a5
80002f56:	010817b7          	lui	a5,0x1081
80002f5a:	02c78593          	addi	a1,a5,44 # 108102c <STACK_SIZE+0x108082c>
80002f5e:	60000537          	lui	a0,0x60000
80002f62:	b0fff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:195 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_RXPLL_DIV, &SER_1_PMA_L0_DES_RXPLL_DIV_R);
80002f66:	fc840793          	addi	a5,s0,-56
80002f6a:	863e                	mv	a2,a5
80002f6c:	010817b7          	lui	a5,0x1081
80002f70:	04078593          	addi	a1,a5,64 # 1081040 <STACK_SIZE+0x1080840>
80002f74:	60000537          	lui	a0,0x60000
80002f78:	af9ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:196 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_CLK_CTRL, &SER_1_PMA_L0_SER_CLK_CTRL_R);
80002f7c:	fc440793          	addi	a5,s0,-60
80002f80:	863e                	mv	a2,a5
80002f82:	010817b7          	lui	a5,0x1081
80002f86:	07478593          	addi	a1,a5,116 # 1081074 <STACK_SIZE+0x1080874>
80002f8a:	60000537          	lui	a0,0x60000
80002f8e:	ae3ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:197 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SERDES_RTL_CTRL, &SER_1_PMA_L0_SERDES_RTL_CTRL_R);
80002f92:	fc040793          	addi	a5,s0,-64
80002f96:	863e                	mv	a2,a5
80002f98:	010817b7          	lui	a5,0x1081
80002f9c:	0c078593          	addi	a1,a5,192 # 10810c0 <STACK_SIZE+0x10808c0>
80002fa0:	60000537          	lui	a0,0x60000
80002fa4:	acdff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:198 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFE_CAL_CTRL_0, &SER_1_PMA_L0_DES_DFE_CAL_CTRL_0_R);
80002fa8:	fbc40793          	addi	a5,s0,-68
80002fac:	863e                	mv	a2,a5
80002fae:	010817b7          	lui	a5,0x1081
80002fb2:	0d078593          	addi	a1,a5,208 # 10810d0 <STACK_SIZE+0x10808d0>
80002fb6:	60000537          	lui	a0,0x60000
80002fba:	ab7ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:199 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFE_CAL_CTRL_1, &SER_1_PMA_L0_DES_DFE_CAL_CTRL_1_R);
80002fbe:	fb840793          	addi	a5,s0,-72
80002fc2:	863e                	mv	a2,a5
80002fc4:	010817b7          	lui	a5,0x1081
80002fc8:	0d478593          	addi	a1,a5,212 # 10810d4 <STACK_SIZE+0x10808d4>
80002fcc:	60000537          	lui	a0,0x60000
80002fd0:	aa1ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:200 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFE_CAL_CTRL_2, &SER_1_PMA_L0_DES_DFE_CAL_CTRL_2_R);
80002fd4:	fb440793          	addi	a5,s0,-76
80002fd8:	863e                	mv	a2,a5
80002fda:	010817b7          	lui	a5,0x1081
80002fde:	0d878593          	addi	a1,a5,216 # 10810d8 <STACK_SIZE+0x10808d8>
80002fe2:	60000537          	lui	a0,0x60000
80002fe6:	a8bff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:201 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFE_CAL_CMD, &SER_1_PMA_L0_DES_DFE_CAL_CMD_R);
80002fea:	fb040793          	addi	a5,s0,-80
80002fee:	863e                	mv	a2,a5
80002ff0:	010817b7          	lui	a5,0x1081
80002ff4:	0dc78593          	addi	a1,a5,220 # 10810dc <STACK_SIZE+0x10808dc>
80002ff8:	60000537          	lui	a0,0x60000
80002ffc:	a75ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:202 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_TXPLL_DIV_1, &TXPLL_DIV_1);
80003000:	fac40793          	addi	a5,s0,-84
80003004:	863e                	mv	a2,a5
80003006:	010907b7          	lui	a5,0x1090
8000300a:	01078593          	addi	a1,a5,16 # 1090010 <STACK_SIZE+0x108f810>
8000300e:	60000537          	lui	a0,0x60000
80003012:	a5fff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:203 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_TXPLL_DIV_2, &TXPLL_DIV_2);
80003016:	fa840793          	addi	a5,s0,-88
8000301a:	863e                	mv	a2,a5
8000301c:	010907b7          	lui	a5,0x1090
80003020:	01478593          	addi	a1,a5,20 # 1090014 <STACK_SIZE+0x108f814>
80003024:	60000537          	lui	a0,0x60000
80003028:	a49ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:205 (discriminator 1)
    //swing registers
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_DRV_DATA_CTRL, &SER_1_PMA_L0_SER_DRV_DATA_CTRL_R);
8000302c:	fa440793          	addi	a5,s0,-92
80003030:	863e                	mv	a2,a5
80003032:	010817b7          	lui	a5,0x1081
80003036:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000303a:	60000537          	lui	a0,0x60000
8000303e:	a33ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:206 (discriminator 1)
   read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_DRV_CTRL, &SER_1_PMA_L0_SER_DRV_CTRL_R);
80003042:	fa040793          	addi	a5,s0,-96
80003046:	863e                	mv	a2,a5
80003048:	010817b7          	lui	a5,0x1081
8000304c:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80003050:	60000537          	lui	a0,0x60000
80003054:	a1dff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:207 (discriminator 1)
   read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_DRV_CTRL_SEL, &SER_1_PMA_L0_SER_DRV_CTRL_SEL_R);
80003058:	f9c40793          	addi	a5,s0,-100
8000305c:	863e                	mv	a2,a5
8000305e:	010817b7          	lui	a5,0x1081
80003062:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80003066:	60000537          	lui	a0,0x60000
8000306a:	a07ff0ef          	jal	ra,80002a70 <read_dp>
8000306e:	a011                	j	80003072 <DPSourceISR+0x3fa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:154
        return;
80003070:	0001                	nop
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:208
}
80003072:	40be                	lw	ra,204(sp)
80003074:	442e                	lw	s0,200(sp)
80003076:	6169                	addi	sp,sp,208
80003078:	8082                	ret

8000307a <DPSourceTxWrCmd>:
DPSourceTxWrCmd():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:211

void DPSourceTxWrCmd(uint32_t addr,uint32_t lenVal,uint32_t txByteNum)
{
8000307a:	7179                	addi	sp,sp,-48
8000307c:	d606                	sw	ra,44(sp)
8000307e:	d422                	sw	s0,40(sp)
80003080:	1800                	addi	s0,sp,48
80003082:	fca42e23          	sw	a0,-36(s0)
80003086:	fcb42c23          	sw	a1,-40(s0)
8000308a:	fcc42a23          	sw	a2,-44(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:212
    for(uint32_t idx = 0;idx < txByteNum;idx++)
8000308e:	fe042623          	sw	zero,-20(s0)
80003092:	a025                	j	800030ba <DPSourceTxWrCmd+0x40>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:214 (discriminator 3)
    {
        write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_WRITING_DATA_OFFSET, SourceWrBytes[idx]);
80003094:	90018713          	addi	a4,gp,-1792 # 800075b0 <SourceWrBytes>
80003098:	fec42783          	lw	a5,-20(s0)
8000309c:	078a                	slli	a5,a5,0x2
8000309e:	97ba                	add	a5,a5,a4
800030a0:	439c                	lw	a5,0(a5)
800030a2:	863e                	mv	a2,a5
800030a4:	10c00593          	li	a1,268
800030a8:	71001537          	lui	a0,0x71001
800030ac:	9f9ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:212 (discriminator 3)
    for(uint32_t idx = 0;idx < txByteNum;idx++)
800030b0:	fec42783          	lw	a5,-20(s0)
800030b4:	0785                	addi	a5,a5,1
800030b6:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:212 (discriminator 1)
800030ba:	fec42703          	lw	a4,-20(s0)
800030be:	fd442783          	lw	a5,-44(s0)
800030c2:	fcf769e3          	bltu	a4,a5,80003094 <DPSourceTxWrCmd+0x1a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:218
        //delay_msec(1);
    }

    uint32_t len = txByteNum - 1;
800030c6:	fd442783          	lw	a5,-44(s0)
800030ca:	17fd                	addi	a5,a5,-1
800030cc:	fef42423          	sw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:219
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_ADDRESS_OFFSET, addr);
800030d0:	fdc42603          	lw	a2,-36(s0)
800030d4:	10400593          	li	a1,260
800030d8:	71001537          	lui	a0,0x71001
800030dc:	9c9ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:220
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_LENGTH_OFFSET, len);
800030e0:	fe842603          	lw	a2,-24(s0)
800030e4:	10800593          	li	a1,264
800030e8:	71001537          	lui	a0,0x71001
800030ec:	9b9ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:222
    //AUX_Tx_Data_Byte_Num[23:16], AUX_TX_LengthField_Val[8], AUX_Tx_Command[3:0]
    uint32_t txCmdReg = (txByteNum << 16) | (lenVal << 8) | 0x00000008;
800030f0:	fd442783          	lw	a5,-44(s0)
800030f4:	01079713          	slli	a4,a5,0x10
800030f8:	fd842783          	lw	a5,-40(s0)
800030fc:	07a2                	slli	a5,a5,0x8
800030fe:	8fd9                	or	a5,a5,a4
80003100:	0087e793          	ori	a5,a5,8
80003104:	fef42223          	sw	a5,-28(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:223
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_COMMAND_OFFSET, txCmdReg);
80003108:	fe442603          	lw	a2,-28(s0)
8000310c:	10000593          	li	a1,256
80003110:	71001537          	lui	a0,0x71001
80003114:	991ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:225

    SourceCmdSta++;
80003118:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
8000311c:	439c                	lw	a5,0(a5)
8000311e:	00178713          	addi	a4,a5,1
80003122:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003126:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:226
    SourceCmdTx = 1;
80003128:	84018793          	addi	a5,gp,-1984 # 800074f0 <SourceCmdTx>
8000312c:	4705                	li	a4,1
8000312e:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:227
}
80003130:	0001                	nop
80003132:	50b2                	lw	ra,44(sp)
80003134:	5422                	lw	s0,40(sp)
80003136:	6145                	addi	sp,sp,48
80003138:	8082                	ret

8000313a <DPSourceTxI2CWrCmd>:
DPSourceTxI2CWrCmd():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:231


void DPSourceTxI2CWrCmd(uint32_t addr,uint32_t lenVal,uint32_t txByteNum,uint32_t mot)
{
8000313a:	7179                	addi	sp,sp,-48
8000313c:	d606                	sw	ra,44(sp)
8000313e:	d422                	sw	s0,40(sp)
80003140:	1800                	addi	s0,sp,48
80003142:	fca42e23          	sw	a0,-36(s0)
80003146:	fcb42c23          	sw	a1,-40(s0)
8000314a:	fcc42a23          	sw	a2,-44(s0)
8000314e:	fcd42823          	sw	a3,-48(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:232
    for(uint32_t idx = 0;idx < txByteNum;idx++)
80003152:	fe042623          	sw	zero,-20(s0)
80003156:	a025                	j	8000317e <DPSourceTxI2CWrCmd+0x44>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:234 (discriminator 3)
    {
        write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_WRITING_DATA_OFFSET, SourceWrBytes[idx]);
80003158:	90018713          	addi	a4,gp,-1792 # 800075b0 <SourceWrBytes>
8000315c:	fec42783          	lw	a5,-20(s0)
80003160:	078a                	slli	a5,a5,0x2
80003162:	97ba                	add	a5,a5,a4
80003164:	439c                	lw	a5,0(a5)
80003166:	863e                	mv	a2,a5
80003168:	10c00593          	li	a1,268
8000316c:	71001537          	lui	a0,0x71001
80003170:	935ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:232 (discriminator 3)
    for(uint32_t idx = 0;idx < txByteNum;idx++)
80003174:	fec42783          	lw	a5,-20(s0)
80003178:	0785                	addi	a5,a5,1
8000317a:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:232 (discriminator 1)
8000317e:	fec42703          	lw	a4,-20(s0)
80003182:	fd442783          	lw	a5,-44(s0)
80003186:	fcf769e3          	bltu	a4,a5,80003158 <DPSourceTxI2CWrCmd+0x1e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:237
    }

    uint32_t len = txByteNum - 1;
8000318a:	fd442783          	lw	a5,-44(s0)
8000318e:	17fd                	addi	a5,a5,-1
80003190:	fef42423          	sw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:238
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_ADDRESS_OFFSET, addr);
80003194:	fdc42603          	lw	a2,-36(s0)
80003198:	10400593          	li	a1,260
8000319c:	71001537          	lui	a0,0x71001
800031a0:	905ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:239
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_LENGTH_OFFSET, len);
800031a4:	fe842603          	lw	a2,-24(s0)
800031a8:	10800593          	li	a1,264
800031ac:	71001537          	lui	a0,0x71001
800031b0:	8f5ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:242

    //AUX_Tx_Data_Byte_Num[23:16], AUX_TX_LengthField_Val[8], AUX_Tx_Command[3:0]
    uint32_t txCmdReg = (txByteNum << 16) | (lenVal << 8) | (mot << 2) | 0x00000000;
800031b4:	fd442783          	lw	a5,-44(s0)
800031b8:	01079713          	slli	a4,a5,0x10
800031bc:	fd842783          	lw	a5,-40(s0)
800031c0:	07a2                	slli	a5,a5,0x8
800031c2:	8f5d                	or	a4,a4,a5
800031c4:	fd042783          	lw	a5,-48(s0)
800031c8:	078a                	slli	a5,a5,0x2
800031ca:	8fd9                	or	a5,a5,a4
800031cc:	fef42223          	sw	a5,-28(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:243
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_COMMAND_OFFSET, txCmdReg);
800031d0:	fe442603          	lw	a2,-28(s0)
800031d4:	10000593          	li	a1,256
800031d8:	71001537          	lui	a0,0x71001
800031dc:	8c9ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:245

    SourceCmdSta++;
800031e0:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
800031e4:	439c                	lw	a5,0(a5)
800031e6:	00178713          	addi	a4,a5,1
800031ea:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
800031ee:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:246
    SourceCmdTx = 1;
800031f0:	84018793          	addi	a5,gp,-1984 # 800074f0 <SourceCmdTx>
800031f4:	4705                	li	a4,1
800031f6:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:247
}
800031f8:	0001                	nop
800031fa:	50b2                	lw	ra,44(sp)
800031fc:	5422                	lw	s0,40(sp)
800031fe:	6145                	addi	sp,sp,48
80003200:	8082                	ret

80003202 <DPSourceTxRdCmd>:
DPSourceTxRdCmd():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:250

void DPSourceTxRdCmd(uint32_t addr,uint32_t lenVal,uint32_t rxByteNum)
{
80003202:	7179                	addi	sp,sp,-48
80003204:	d606                	sw	ra,44(sp)
80003206:	d422                	sw	s0,40(sp)
80003208:	1800                	addi	s0,sp,48
8000320a:	fca42e23          	sw	a0,-36(s0)
8000320e:	fcb42c23          	sw	a1,-40(s0)
80003212:	fcc42a23          	sw	a2,-44(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:251
    uint32_t len = rxByteNum - 1;
80003216:	fd442783          	lw	a5,-44(s0)
8000321a:	17fd                	addi	a5,a5,-1
8000321c:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:252
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_ADDRESS_OFFSET, addr);
80003220:	fdc42603          	lw	a2,-36(s0)
80003224:	10400593          	li	a1,260
80003228:	71001537          	lui	a0,0x71001
8000322c:	879ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:253
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_LENGTH_OFFSET, len);
80003230:	fec42603          	lw	a2,-20(s0)
80003234:	10800593          	li	a1,264
80003238:	71001537          	lui	a0,0x71001
8000323c:	869ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:256

    //AUX_Tx_Data_Byte_Num[23:16], AUX_TX_LengthField_Val[8], AUX_Tx_Command[3:0]
    uint32_t txCmdReg = (lenVal << 8) | 0x00000009;
80003240:	fd842783          	lw	a5,-40(s0)
80003244:	07a2                	slli	a5,a5,0x8
80003246:	0097e793          	ori	a5,a5,9
8000324a:	fef42423          	sw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:257
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_COMMAND_OFFSET, txCmdReg);
8000324e:	fe842603          	lw	a2,-24(s0)
80003252:	10000593          	li	a1,256
80003256:	71001537          	lui	a0,0x71001
8000325a:	84bff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:259

    SourceCmdSta++;
8000325e:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003262:	439c                	lw	a5,0(a5)
80003264:	00178713          	addi	a4,a5,1
80003268:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
8000326c:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:260
}
8000326e:	0001                	nop
80003270:	50b2                	lw	ra,44(sp)
80003272:	5422                	lw	s0,40(sp)
80003274:	6145                	addi	sp,sp,48
80003276:	8082                	ret

80003278 <DPSourceTxI2CRdCmd>:
DPSourceTxI2CRdCmd():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:262
void DPSourceTxI2CRdCmd(uint32_t addr,uint32_t lenVal,uint32_t rxByteNum,uint32_t mot)
{
80003278:	7179                	addi	sp,sp,-48
8000327a:	d606                	sw	ra,44(sp)
8000327c:	d422                	sw	s0,40(sp)
8000327e:	1800                	addi	s0,sp,48
80003280:	fca42e23          	sw	a0,-36(s0)
80003284:	fcb42c23          	sw	a1,-40(s0)
80003288:	fcc42a23          	sw	a2,-44(s0)
8000328c:	fcd42823          	sw	a3,-48(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:263
    uint32_t len = rxByteNum - 1;
80003290:	fd442783          	lw	a5,-44(s0)
80003294:	17fd                	addi	a5,a5,-1
80003296:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:264
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_ADDRESS_OFFSET, addr);
8000329a:	fdc42603          	lw	a2,-36(s0)
8000329e:	10400593          	li	a1,260
800032a2:	71001537          	lui	a0,0x71001
800032a6:	ffeff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:265
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_LENGTH_OFFSET, len);
800032aa:	fec42603          	lw	a2,-20(s0)
800032ae:	10800593          	li	a1,264
800032b2:	71001537          	lui	a0,0x71001
800032b6:	feeff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:268

    //AUX_Tx_Data_Byte_Num[23:16], AUX_TX_LengthField_Val[8], AUX_Tx_Command[3:0]
    uint32_t txCmdReg = (lenVal << 8) | (mot << 2) | 0x00000001;
800032ba:	fd842783          	lw	a5,-40(s0)
800032be:	00879713          	slli	a4,a5,0x8
800032c2:	fd042783          	lw	a5,-48(s0)
800032c6:	078a                	slli	a5,a5,0x2
800032c8:	8fd9                	or	a5,a5,a4
800032ca:	0017e793          	ori	a5,a5,1
800032ce:	fef42423          	sw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:269
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_COMMAND_OFFSET, txCmdReg);
800032d2:	fe842603          	lw	a2,-24(s0)
800032d6:	10000593          	li	a1,256
800032da:	71001537          	lui	a0,0x71001
800032de:	fc6ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:271

    SourceCmdSta++;
800032e2:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
800032e6:	439c                	lw	a5,0(a5)
800032e8:	00178713          	addi	a4,a5,1
800032ec:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
800032f0:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:272
}
800032f2:	0001                	nop
800032f4:	50b2                	lw	ra,44(sp)
800032f6:	5422                	lw	s0,40(sp)
800032f8:	6145                	addi	sp,sp,48
800032fa:	8082                	ret

800032fc <DPSourceStartVideo>:
DPSourceStartVideo():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:276


void DPSourceStartVideo(uint32_t SPEED_MODE,uint32_t HRES,uint32_t VRES,uint32_t HFP,uint32_t HBP,uint32_t VFP,uint32_t VBP,uint32_t HSW,uint32_t VSW,uint32_t VSP,uint32_t LANE_NO)
{
800032fc:	7179                	addi	sp,sp,-48
800032fe:	d606                	sw	ra,44(sp)
80003300:	d422                	sw	s0,40(sp)
80003302:	1800                	addi	s0,sp,48
80003304:	fea42623          	sw	a0,-20(s0)
80003308:	feb42423          	sw	a1,-24(s0)
8000330c:	fec42223          	sw	a2,-28(s0)
80003310:	fed42023          	sw	a3,-32(s0)
80003314:	fce42e23          	sw	a4,-36(s0)
80003318:	fcf42c23          	sw	a5,-40(s0)
8000331c:	fd042a23          	sw	a6,-44(s0)
80003320:	fd142823          	sw	a7,-48(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:277
    SourceWrBytes[0] = 0x00000000;
80003324:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80003328:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:278
    DPSourceTxWrCmd(0x00000102,0x00000001,0x00000001);
8000332c:	4605                	li	a2,1
8000332e:	4585                	li	a1,1
80003330:	10200513          	li	a0,258
80003334:	d47ff0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:287

    // --------------------------------------
    //      DPSourceStartVideo();
    // -----------------------------------------
    // DP-TX lane number
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_LANE_NUMBER_OFFSET, LANE_NO);
80003338:	4410                	lw	a2,8(s0)
8000333a:	45a1                	li	a1,8
8000333c:	71001537          	lui	a0,0x71001
80003340:	f64ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:288
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_LANE_ENABLE_OFFSET, 0x0000000F);
80003344:	463d                	li	a2,15
80003346:	45b1                	li	a1,12
80003348:	71001537          	lui	a0,0x71001
8000334c:	f58ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:291

    // DP-TX Video Enable
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_VIDEO_STREAM_ENABLE_OFFSET, 0x00000001);
80003350:	4605                	li	a2,1
80003352:	4581                	li	a1,0
80003354:	71001537          	lui	a0,0x71001
80003358:	f4cff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:292
    if(SPEED_MODE==0)
8000335c:	fec42783          	lw	a5,-20(s0)
80003360:	eb89                	bnez	a5,80003372 <DPSourceStartVideo+0x76>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:294
        {
            MSA_VALUE=0x00075555;
80003362:	94418793          	addi	a5,gp,-1724 # 800075f4 <MSA_VALUE>
80003366:	00075737          	lui	a4,0x75
8000336a:	55570713          	addi	a4,a4,1365 # 75555 <STACK_SIZE+0x74d55>
8000336e:	c398                	sw	a4,0(a5)
80003370:	a815                	j	800033a4 <DPSourceStartVideo+0xa8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:296
        }
        else if (SPEED_MODE==1)
80003372:	fec42703          	lw	a4,-20(s0)
80003376:	4785                	li	a5,1
80003378:	00f71a63          	bne	a4,a5,8000338c <DPSourceStartVideo+0x90>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:298
        {
            MSA_VALUE=0x00046666;
8000337c:	94418793          	addi	a5,gp,-1724 # 800075f4 <MSA_VALUE>
80003380:	00046737          	lui	a4,0x46
80003384:	66670713          	addi	a4,a4,1638 # 46666 <STACK_SIZE+0x45e66>
80003388:	c398                	sw	a4,0(a5)
8000338a:	a829                	j	800033a4 <DPSourceStartVideo+0xa8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:300
        }
        else if (SPEED_MODE==2)
8000338c:	fec42703          	lw	a4,-20(s0)
80003390:	4789                	li	a5,2
80003392:	00f71963          	bne	a4,a5,800033a4 <DPSourceStartVideo+0xa8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:302
        {
            MSA_VALUE=0x0003F35F;
80003396:	94418793          	addi	a5,gp,-1724 # 800075f4 <MSA_VALUE>
8000339a:	0003f737          	lui	a4,0x3f
8000339e:	35f70713          	addi	a4,a4,863 # 3f35f <STACK_SIZE+0x3eb5f>
800033a2:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:305
        }
    // DP-TX 4K MSA
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_MVID_OFFSET, MSA_VALUE);//0x001f9a1);//0x00023333);//0x0008ccd);
800033a4:	94418793          	addi	a5,gp,-1724 # 800075f4 <MSA_VALUE>
800033a8:	439c                	lw	a5,0(a5)
800033aa:	863e                	mv	a2,a5
800033ac:	0c000593          	li	a1,192
800033b0:	71001537          	lui	a0,0x71001
800033b4:	ef0ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:306
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_NVID_OFFSET, 0x00080000);
800033b8:	00080637          	lui	a2,0x80
800033bc:	0c400593          	li	a1,196
800033c0:	71001537          	lui	a0,0x71001
800033c4:	ee0ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:307
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_HTOTAL_OFFSET, (HRES+HBP+HFP+HSW));
800033c8:	fe842703          	lw	a4,-24(s0)
800033cc:	fdc42783          	lw	a5,-36(s0)
800033d0:	973e                	add	a4,a4,a5
800033d2:	fe042783          	lw	a5,-32(s0)
800033d6:	973e                	add	a4,a4,a5
800033d8:	fd042783          	lw	a5,-48(s0)
800033dc:	97ba                	add	a5,a5,a4
800033de:	863e                	mv	a2,a5
800033e0:	0c800593          	li	a1,200
800033e4:	71001537          	lui	a0,0x71001
800033e8:	ebcff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:308
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_VTOTAL_OFFSET, (VRES+VBP+VFP+VSW));
800033ec:	fe442703          	lw	a4,-28(s0)
800033f0:	fd442783          	lw	a5,-44(s0)
800033f4:	973e                	add	a4,a4,a5
800033f6:	fd842783          	lw	a5,-40(s0)
800033fa:	973e                	add	a4,a4,a5
800033fc:	401c                	lw	a5,0(s0)
800033fe:	97ba                	add	a5,a5,a4
80003400:	863e                	mv	a2,a5
80003402:	0cc00593          	li	a1,204
80003406:	71001537          	lui	a0,0x71001
8000340a:	e9aff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:309
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_HSTART_OFFSET, (HSW+HBP));
8000340e:	fd042703          	lw	a4,-48(s0)
80003412:	fdc42783          	lw	a5,-36(s0)
80003416:	97ba                	add	a5,a5,a4
80003418:	863e                	mv	a2,a5
8000341a:	0d000593          	li	a1,208
8000341e:	71001537          	lui	a0,0x71001
80003422:	e82ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:310
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_VSTART_OFFSET, (VSW+VBP));
80003426:	4018                	lw	a4,0(s0)
80003428:	fd442783          	lw	a5,-44(s0)
8000342c:	97ba                	add	a5,a5,a4
8000342e:	863e                	mv	a2,a5
80003430:	0d400593          	li	a1,212
80003434:	71001537          	lui	a0,0x71001
80003438:	e6cff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:311
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_HSYNC_OFFSET, HSW);
8000343c:	fd042603          	lw	a2,-48(s0)
80003440:	0d800593          	li	a1,216
80003444:	71001537          	lui	a0,0x71001
80003448:	e5cff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:312
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_VSYNC_OFFSET, (VSP+VSW));// neg pol
8000344c:	4058                	lw	a4,4(s0)
8000344e:	401c                	lw	a5,0(s0)
80003450:	97ba                	add	a5,a5,a4
80003452:	863e                	mv	a2,a5
80003454:	0dc00593          	li	a1,220
80003458:	71001537          	lui	a0,0x71001
8000345c:	e48ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:313
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_MISC0_OFFSET, 0x00000021);
80003460:	02100613          	li	a2,33
80003464:	0e000593          	li	a1,224
80003468:	71001537          	lui	a0,0x71001
8000346c:	e38ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:314
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_MISC1_OFFSET, 0x00000000);
80003470:	4601                	li	a2,0
80003472:	0e400593          	li	a1,228
80003476:	71001537          	lui	a0,0x71001
8000347a:	e2aff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:315
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_HWIDTH_OFFSET, HRES);
8000347e:	fe842603          	lw	a2,-24(s0)
80003482:	0e800593          	li	a1,232
80003486:	71001537          	lui	a0,0x71001
8000348a:	e1aff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:316
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_VWIDTH_OFFSET, VRES);
8000348e:	fe442603          	lw	a2,-28(s0)
80003492:	0ec00593          	li	a1,236
80003496:	71001537          	lui	a0,0x71001
8000349a:	e0aff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:319
          // ------------------------------------------
    // DP-TX Video Enable
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_VIDEO_STREAM_ENABLE_OFFSET, 0x00000001);
8000349e:	4605                	li	a2,1
800034a0:	4581                	li	a1,0
800034a2:	71001537          	lui	a0,0x71001
800034a6:	dfeff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:321
    // Enable Scrambler
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_SCRAMBLER_ENABLE_OFFSET, 0x00000001);
800034aa:	4605                	li	a2,1
800034ac:	45c1                	li	a1,16
800034ae:	71001537          	lui	a0,0x71001
800034b2:	df2ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:323
    // Disable TPS
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_TRAINING_PATTERN_MODE_OFFSET, 0x00000000);
800034b6:	4601                	li	a2,0
800034b8:	45e1                	li	a1,24
800034ba:	71001537          	lui	a0,0x71001
800034be:	de6ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:326

    // Output data from DP-TX
    write_dp(DP_TX_IP_APB_BASE_ADDRESS1, DP_TX_OUTPUT_DATA_OFFSET, 0x80000000);
800034c2:	80000637          	lui	a2,0x80000
800034c6:	4581                	li	a1,0
800034c8:	7000a537          	lui	a0,0x7000a
800034cc:	dd8ff0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:328

    iter++;
800034d0:	00004797          	auipc	a5,0x4
800034d4:	fe878793          	addi	a5,a5,-24 # 800074b8 <iter>
800034d8:	439c                	lw	a5,0(a5)
800034da:	00178713          	addi	a4,a5,1
800034de:	00004797          	auipc	a5,0x4
800034e2:	fda78793          	addi	a5,a5,-38 # 800074b8 <iter>
800034e6:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:329
    seq_rst = 1;
800034e8:	00004797          	auipc	a5,0x4
800034ec:	fcc78793          	addi	a5,a5,-52 # 800074b4 <seq_rst>
800034f0:	4705                	li	a4,1
800034f2:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:330
}
800034f4:	0001                	nop
800034f6:	50b2                	lw	ra,44(sp)
800034f8:	5422                	lw	s0,40(sp)
800034fa:	6145                	addi	sp,sp,48
800034fc:	8082                	ret

800034fe <link_training>:
link_training():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:333

void link_training(uint32_t SPEED_MODE,uint32_t HRES,uint32_t VRES,uint32_t HFP,uint32_t HBP,uint32_t VFP,uint32_t VBP,uint32_t HSW,uint32_t VSW,uint32_t VSP,uint32_t LANE_NO)
{
800034fe:	715d                	addi	sp,sp,-80
80003500:	c686                	sw	ra,76(sp)
80003502:	c4a2                	sw	s0,72(sp)
80003504:	0880                	addi	s0,sp,80
80003506:	fca42e23          	sw	a0,-36(s0)
8000350a:	fcb42c23          	sw	a1,-40(s0)
8000350e:	fcc42a23          	sw	a2,-44(s0)
80003512:	fcd42823          	sw	a3,-48(s0)
80003516:	fce42623          	sw	a4,-52(s0)
8000351a:	fcf42423          	sw	a5,-56(s0)
8000351e:	fd042223          	sw	a6,-60(s0)
80003522:	fd142023          	sw	a7,-64(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:339
    // -----------------------------------------
    // Received AUX-Reply
    // -----------------------------------------

    uint32_t reply_bytes;
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_RX_REPLY_LENGTH_OFFSET, &reply_bytes);
80003526:	fe840793          	addi	a5,s0,-24
8000352a:	863e                	mv	a2,a5
8000352c:	12c00593          	li	a1,300
80003530:	71001537          	lui	a0,0x71001
80003534:	d3cff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:340
    for(uint32_t i=0;i<reply_bytes;i++)
80003538:	fe042623          	sw	zero,-20(s0)
8000353c:	0bb0006f          	j	80003df6 <link_training+0x8f8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:343
    {
        uint32_t reply_data;
        read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_RX_REPLY_READING_DATA_OFFSET, &reply_data);
80003540:	fe440793          	addi	a5,s0,-28
80003544:	863e                	mv	a2,a5
80003546:	12400593          	li	a1,292
8000354a:	71001537          	lui	a0,0x71001
8000354e:	d22ff0ef          	jal	ra,80002a70 <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:344
        if(SourceCmdSta == 0x0000000B)
80003552:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003556:	4398                	lw	a4,0(a5)
80003558:	47ad                	li	a5,11
8000355a:	04f71563          	bne	a4,a5,800035a4 <link_training+0xa6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:346
        {
            if(i==3)
8000355e:	fec42703          	lw	a4,-20(s0)
80003562:	478d                	li	a5,3
80003564:	04f71063          	bne	a4,a5,800035a4 <link_training+0xa6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:348
            {
                tps3_supported= reply_data&0x40;
80003568:	fe442783          	lw	a5,-28(s0)
8000356c:	0407f713          	andi	a4,a5,64
80003570:	84418793          	addi	a5,gp,-1980 # 800074f4 <tps3_supported>
80003574:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:349
                if(tps3_supported)
80003576:	84418793          	addi	a5,gp,-1980 # 800074f4 <tps3_supported>
8000357a:	439c                	lw	a5,0(a5)
8000357c:	cb99                	beqz	a5,80003592 <link_training+0x94>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:350
                    UART_send(&g_uart,"\r\nTPS3 Supported\n\r",sizeof("\r\nTPS3 Supported\n\r"));
8000357e:	464d                	li	a2,19
80003580:	00004597          	auipc	a1,0x4
80003584:	ee058593          	addi	a1,a1,-288 # 80007460 <local_irq_handler_table+0x430>
80003588:	95818513          	addi	a0,gp,-1704 # 80007608 <g_uart>
8000358c:	8c7fd0ef          	jal	ra,80000e52 <UART_send>
80003590:	a811                	j	800035a4 <link_training+0xa6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:352
                else
                    UART_send(&g_uart,"\r\nTPS3 not Supported\n\r",sizeof("\r\nTPS3 not Supported\n\r"));
80003592:	465d                	li	a2,23
80003594:	00004597          	auipc	a1,0x4
80003598:	ee058593          	addi	a1,a1,-288 # 80007474 <local_irq_handler_table+0x444>
8000359c:	95818513          	addi	a0,gp,-1704 # 80007608 <g_uart>
800035a0:	8b3fd0ef          	jal	ra,80000e52 <UART_send>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:356

            }
        }
         if(SourceCmdSta == 0x00000025 || SourceCmdSta == 0x00000027 )
800035a4:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
800035a8:	4398                	lw	a4,0(a5)
800035aa:	02500793          	li	a5,37
800035ae:	00f70963          	beq	a4,a5,800035c0 <link_training+0xc2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:356 (discriminator 1)
800035b2:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
800035b6:	4398                	lw	a4,0(a5)
800035b8:	02700793          	li	a5,39
800035bc:	3cf71963          	bne	a4,a5,8000398e <link_training+0x490>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:358
         {
            if(i==1)
800035c0:	fec42703          	lw	a4,-20(s0)
800035c4:	4785                	li	a5,1
800035c6:	02f71063          	bne	a4,a5,800035e6 <link_training+0xe8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:360
            {
                if(reply_data==0x11)
800035ca:	fe442703          	lw	a4,-28(s0)
800035ce:	47c5                	li	a5,17
800035d0:	00f71763          	bne	a4,a5,800035de <link_training+0xe0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:361
                    lane_01_cr_done = 0x01;
800035d4:	84c18793          	addi	a5,gp,-1972 # 800074fc <lane_01_cr_done>
800035d8:	4705                	li	a4,1
800035da:	c398                	sw	a4,0(a5)
800035dc:	a029                	j	800035e6 <link_training+0xe8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:363
                else
                    lane_01_cr_done = 0x00;
800035de:	84c18793          	addi	a5,gp,-1972 # 800074fc <lane_01_cr_done>
800035e2:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:365
            }
            if(i==2)
800035e6:	fec42703          	lw	a4,-20(s0)
800035ea:	4789                	li	a5,2
800035ec:	02f71063          	bne	a4,a5,8000360c <link_training+0x10e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:367
            {
                if(reply_data==0x11)
800035f0:	fe442703          	lw	a4,-28(s0)
800035f4:	47c5                	li	a5,17
800035f6:	00f71763          	bne	a4,a5,80003604 <link_training+0x106>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:368
                    lane_23_cr_done = 0x01;
800035fa:	85018793          	addi	a5,gp,-1968 # 80007500 <lane_23_cr_done>
800035fe:	4705                	li	a4,1
80003600:	c398                	sw	a4,0(a5)
80003602:	a029                	j	8000360c <link_training+0x10e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:370
                else
                    lane_23_cr_done = 0x00;
80003604:	85018793          	addi	a5,gp,-1968 # 80007500 <lane_23_cr_done>
80003608:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:372
            }
            if(i==5)
8000360c:	fec42703          	lw	a4,-20(s0)
80003610:	4795                	li	a5,5
80003612:	18f71763          	bne	a4,a5,800037a0 <link_training+0x2a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:374
            {
                reply_data_pe1 = reply_data&0xc0;
80003616:	fe442783          	lw	a5,-28(s0)
8000361a:	0c07f713          	andi	a4,a5,192
8000361e:	86818793          	addi	a5,gp,-1944 # 80007518 <reply_data_pe1>
80003622:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:375
                reply_data_vs1 = reply_data&0x30;
80003624:	fe442783          	lw	a5,-28(s0)
80003628:	0307f713          	andi	a4,a5,48
8000362c:	85818793          	addi	a5,gp,-1960 # 80007508 <reply_data_vs1>
80003630:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:376
                reply_data_pe0 = reply_data&0x0c;
80003632:	fe442783          	lw	a5,-28(s0)
80003636:	00c7f713          	andi	a4,a5,12
8000363a:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
8000363e:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:377
                reply_data_vs0 = reply_data&0x03;
80003640:	fe442783          	lw	a5,-28(s0)
80003644:	0037f713          	andi	a4,a5,3
80003648:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
8000364c:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:378
                if(reply_data_vs0==0)
8000364e:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80003652:	439c                	lw	a5,0(a5)
80003654:	e791                	bnez	a5,80003660 <link_training+0x162>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:379
                    reply_sw_0 = 0;
80003656:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
8000365a:	0007a023          	sw	zero,0(a5)
8000365e:	a089                	j	800036a0 <link_training+0x1a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:380
                else if (reply_data_vs0==0x1)
80003660:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80003664:	4398                	lw	a4,0(a5)
80003666:	4785                	li	a5,1
80003668:	00f71763          	bne	a4,a5,80003676 <link_training+0x178>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:381
                    reply_sw_0 = 1;
8000366c:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
80003670:	4705                	li	a4,1
80003672:	c398                	sw	a4,0(a5)
80003674:	a035                	j	800036a0 <link_training+0x1a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:382
                else if (reply_data_vs0==0x2)
80003676:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
8000367a:	4398                	lw	a4,0(a5)
8000367c:	4789                	li	a5,2
8000367e:	00f71763          	bne	a4,a5,8000368c <link_training+0x18e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:383
                    reply_sw_0 = 2;
80003682:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
80003686:	4709                	li	a4,2
80003688:	c398                	sw	a4,0(a5)
8000368a:	a819                	j	800036a0 <link_training+0x1a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:384
                else if (reply_data_vs0==0x3)
8000368c:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80003690:	4398                	lw	a4,0(a5)
80003692:	478d                	li	a5,3
80003694:	00f71663          	bne	a4,a5,800036a0 <link_training+0x1a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:385
                    reply_sw_0 = 7;
80003698:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
8000369c:	471d                	li	a4,7
8000369e:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:386
                if(reply_data_vs1==0)
800036a0:	85818793          	addi	a5,gp,-1960 # 80007508 <reply_data_vs1>
800036a4:	439c                	lw	a5,0(a5)
800036a6:	e791                	bnez	a5,800036b2 <link_training+0x1b4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:387
                    reply_sw_1 = 0;
800036a8:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
800036ac:	0007a023          	sw	zero,0(a5)
800036b0:	a099                	j	800036f6 <link_training+0x1f8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:388
                else if (reply_data_vs1==0x10)
800036b2:	85818793          	addi	a5,gp,-1960 # 80007508 <reply_data_vs1>
800036b6:	4398                	lw	a4,0(a5)
800036b8:	47c1                	li	a5,16
800036ba:	00f71763          	bne	a4,a5,800036c8 <link_training+0x1ca>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:389
                    reply_sw_1 = 1;
800036be:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
800036c2:	4705                	li	a4,1
800036c4:	c398                	sw	a4,0(a5)
800036c6:	a805                	j	800036f6 <link_training+0x1f8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:390
                else if (reply_data_vs1==0x20)
800036c8:	85818793          	addi	a5,gp,-1960 # 80007508 <reply_data_vs1>
800036cc:	4398                	lw	a4,0(a5)
800036ce:	02000793          	li	a5,32
800036d2:	00f71763          	bne	a4,a5,800036e0 <link_training+0x1e2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:391
                    reply_sw_1 = 2;
800036d6:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
800036da:	4709                	li	a4,2
800036dc:	c398                	sw	a4,0(a5)
800036de:	a821                	j	800036f6 <link_training+0x1f8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:392
                else if (reply_data_vs1==0x30)
800036e0:	85818793          	addi	a5,gp,-1960 # 80007508 <reply_data_vs1>
800036e4:	4398                	lw	a4,0(a5)
800036e6:	03000793          	li	a5,48
800036ea:	00f71663          	bne	a4,a5,800036f6 <link_training+0x1f8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:393
                    reply_sw_1 = 7;
800036ee:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
800036f2:	471d                	li	a4,7
800036f4:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:394
                if(reply_data_pe0==0)
800036f6:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
800036fa:	439c                	lw	a5,0(a5)
800036fc:	e791                	bnez	a5,80003708 <link_training+0x20a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:395
                    reply_pe_0 = 0;
800036fe:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
80003702:	0007a023          	sw	zero,0(a5)
80003706:	a089                	j	80003748 <link_training+0x24a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:396
                else if (reply_data_pe0==0x4)
80003708:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
8000370c:	4398                	lw	a4,0(a5)
8000370e:	4791                	li	a5,4
80003710:	00f71763          	bne	a4,a5,8000371e <link_training+0x220>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:397
                    reply_pe_0 = 1;
80003714:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
80003718:	4705                	li	a4,1
8000371a:	c398                	sw	a4,0(a5)
8000371c:	a035                	j	80003748 <link_training+0x24a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:398
                else if (reply_data_pe0==0x8)
8000371e:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
80003722:	4398                	lw	a4,0(a5)
80003724:	47a1                	li	a5,8
80003726:	00f71763          	bne	a4,a5,80003734 <link_training+0x236>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:399
                    reply_pe_0 = 2;
8000372a:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
8000372e:	4709                	li	a4,2
80003730:	c398                	sw	a4,0(a5)
80003732:	a819                	j	80003748 <link_training+0x24a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:400
                else if (reply_data_pe0==0xc)
80003734:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
80003738:	4398                	lw	a4,0(a5)
8000373a:	47b1                	li	a5,12
8000373c:	00f71663          	bne	a4,a5,80003748 <link_training+0x24a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:401
                    reply_pe_0 = 7;
80003740:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
80003744:	471d                	li	a4,7
80003746:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:402
                if(reply_data_pe1==0)
80003748:	86818793          	addi	a5,gp,-1944 # 80007518 <reply_data_pe1>
8000374c:	439c                	lw	a5,0(a5)
8000374e:	e791                	bnez	a5,8000375a <link_training+0x25c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:403
                    reply_pe_1 = 0;
80003750:	87818793          	addi	a5,gp,-1928 # 80007528 <reply_pe_1>
80003754:	0007a023          	sw	zero,0(a5)
80003758:	a0a1                	j	800037a0 <link_training+0x2a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:404
                else if (reply_data_pe1==0x40)
8000375a:	86818793          	addi	a5,gp,-1944 # 80007518 <reply_data_pe1>
8000375e:	4398                	lw	a4,0(a5)
80003760:	04000793          	li	a5,64
80003764:	00f71763          	bne	a4,a5,80003772 <link_training+0x274>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:405
                    reply_pe_1 = 1;
80003768:	87818793          	addi	a5,gp,-1928 # 80007528 <reply_pe_1>
8000376c:	4705                	li	a4,1
8000376e:	c398                	sw	a4,0(a5)
80003770:	a805                	j	800037a0 <link_training+0x2a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:406
                else if (reply_data_pe1==0x80)
80003772:	86818793          	addi	a5,gp,-1944 # 80007518 <reply_data_pe1>
80003776:	4398                	lw	a4,0(a5)
80003778:	08000793          	li	a5,128
8000377c:	00f71763          	bne	a4,a5,8000378a <link_training+0x28c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:407
                    reply_pe_1 = 2;
80003780:	87818793          	addi	a5,gp,-1928 # 80007528 <reply_pe_1>
80003784:	4709                	li	a4,2
80003786:	c398                	sw	a4,0(a5)
80003788:	a821                	j	800037a0 <link_training+0x2a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:408
                else if (reply_data_pe1==0xc0)
8000378a:	86818793          	addi	a5,gp,-1944 # 80007518 <reply_data_pe1>
8000378e:	4398                	lw	a4,0(a5)
80003790:	0c000793          	li	a5,192
80003794:	00f71663          	bne	a4,a5,800037a0 <link_training+0x2a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:409
                    reply_pe_1 = 7;
80003798:	87818793          	addi	a5,gp,-1928 # 80007528 <reply_pe_1>
8000379c:	471d                	li	a4,7
8000379e:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:411
            }
            if(i==6)
800037a0:	fec42703          	lw	a4,-20(s0)
800037a4:	4799                	li	a5,6
800037a6:	1ef71463          	bne	a4,a5,8000398e <link_training+0x490>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:413
            {
                reply_data_pe3 = reply_data&0xc0;
800037aa:	fe442783          	lw	a5,-28(s0)
800037ae:	0c07f713          	andi	a4,a5,192
800037b2:	87018793          	addi	a5,gp,-1936 # 80007520 <reply_data_pe3>
800037b6:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:414
                reply_data_vs3 = reply_data&0x30;
800037b8:	fe442783          	lw	a5,-28(s0)
800037bc:	0307f713          	andi	a4,a5,48
800037c0:	86018793          	addi	a5,gp,-1952 # 80007510 <reply_data_vs3>
800037c4:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:415
                reply_data_pe2 = reply_data&0x0c;
800037c6:	fe442783          	lw	a5,-28(s0)
800037ca:	00c7f713          	andi	a4,a5,12
800037ce:	86c18793          	addi	a5,gp,-1940 # 8000751c <reply_data_pe2>
800037d2:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:416
                reply_data_vs2 = reply_data&0x03;
800037d4:	fe442783          	lw	a5,-28(s0)
800037d8:	0037f713          	andi	a4,a5,3
800037dc:	85c18793          	addi	a5,gp,-1956 # 8000750c <reply_data_vs2>
800037e0:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:417
                if(reply_data_vs2==0)
800037e2:	85c18793          	addi	a5,gp,-1956 # 8000750c <reply_data_vs2>
800037e6:	439c                	lw	a5,0(a5)
800037e8:	e791                	bnez	a5,800037f4 <link_training+0x2f6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:418
                    reply_sw_2 = 0;
800037ea:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
800037ee:	0007a023          	sw	zero,0(a5)
800037f2:	a089                	j	80003834 <link_training+0x336>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:419
                else if (reply_data_vs2==0x1)
800037f4:	85c18793          	addi	a5,gp,-1956 # 8000750c <reply_data_vs2>
800037f8:	4398                	lw	a4,0(a5)
800037fa:	4785                	li	a5,1
800037fc:	00f71763          	bne	a4,a5,8000380a <link_training+0x30c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:420
                    reply_sw_2 = 1;
80003800:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
80003804:	4705                	li	a4,1
80003806:	c398                	sw	a4,0(a5)
80003808:	a035                	j	80003834 <link_training+0x336>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:421
                else if (reply_data_vs2==0x2)
8000380a:	85c18793          	addi	a5,gp,-1956 # 8000750c <reply_data_vs2>
8000380e:	4398                	lw	a4,0(a5)
80003810:	4789                	li	a5,2
80003812:	00f71763          	bne	a4,a5,80003820 <link_training+0x322>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:422
                    reply_sw_2 = 2;
80003816:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
8000381a:	4709                	li	a4,2
8000381c:	c398                	sw	a4,0(a5)
8000381e:	a819                	j	80003834 <link_training+0x336>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:423
                else if (reply_data_vs2==0x3)
80003820:	85c18793          	addi	a5,gp,-1956 # 8000750c <reply_data_vs2>
80003824:	4398                	lw	a4,0(a5)
80003826:	478d                	li	a5,3
80003828:	00f71663          	bne	a4,a5,80003834 <link_training+0x336>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:424
                    reply_sw_2 = 7;
8000382c:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
80003830:	471d                	li	a4,7
80003832:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:425
                if(reply_data_vs3==0)
80003834:	86018793          	addi	a5,gp,-1952 # 80007510 <reply_data_vs3>
80003838:	439c                	lw	a5,0(a5)
8000383a:	e791                	bnez	a5,80003846 <link_training+0x348>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:426
                    reply_sw_3 = 0;
8000383c:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
80003840:	0007a023          	sw	zero,0(a5)
80003844:	a099                	j	8000388a <link_training+0x38c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:427
                else if (reply_data_vs3==0x10)
80003846:	86018793          	addi	a5,gp,-1952 # 80007510 <reply_data_vs3>
8000384a:	4398                	lw	a4,0(a5)
8000384c:	47c1                	li	a5,16
8000384e:	00f71763          	bne	a4,a5,8000385c <link_training+0x35e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:428
                    reply_sw_3 = 1;
80003852:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
80003856:	4705                	li	a4,1
80003858:	c398                	sw	a4,0(a5)
8000385a:	a805                	j	8000388a <link_training+0x38c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:429
                else if (reply_data_vs3==0x20)
8000385c:	86018793          	addi	a5,gp,-1952 # 80007510 <reply_data_vs3>
80003860:	4398                	lw	a4,0(a5)
80003862:	02000793          	li	a5,32
80003866:	00f71763          	bne	a4,a5,80003874 <link_training+0x376>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:430
                    reply_sw_3 = 2;
8000386a:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
8000386e:	4709                	li	a4,2
80003870:	c398                	sw	a4,0(a5)
80003872:	a821                	j	8000388a <link_training+0x38c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:431
                else if (reply_data_vs3==0x30)
80003874:	86018793          	addi	a5,gp,-1952 # 80007510 <reply_data_vs3>
80003878:	4398                	lw	a4,0(a5)
8000387a:	03000793          	li	a5,48
8000387e:	00f71663          	bne	a4,a5,8000388a <link_training+0x38c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:432
                    reply_sw_3 = 7;
80003882:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
80003886:	471d                	li	a4,7
80003888:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:433
                if(reply_data_pe2==0)
8000388a:	86c18793          	addi	a5,gp,-1940 # 8000751c <reply_data_pe2>
8000388e:	439c                	lw	a5,0(a5)
80003890:	e791                	bnez	a5,8000389c <link_training+0x39e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:434
                    reply_pe_2 = 0;
80003892:	87c18793          	addi	a5,gp,-1924 # 8000752c <reply_pe_2>
80003896:	0007a023          	sw	zero,0(a5)
8000389a:	a089                	j	800038dc <link_training+0x3de>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:435
                else if (reply_data_pe2==0x4)
8000389c:	86c18793          	addi	a5,gp,-1940 # 8000751c <reply_data_pe2>
800038a0:	4398                	lw	a4,0(a5)
800038a2:	4791                	li	a5,4
800038a4:	00f71763          	bne	a4,a5,800038b2 <link_training+0x3b4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:436
                    reply_pe_2 = 1;
800038a8:	87c18793          	addi	a5,gp,-1924 # 8000752c <reply_pe_2>
800038ac:	4705                	li	a4,1
800038ae:	c398                	sw	a4,0(a5)
800038b0:	a035                	j	800038dc <link_training+0x3de>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:437
                else if (reply_data_pe2==0x8)
800038b2:	86c18793          	addi	a5,gp,-1940 # 8000751c <reply_data_pe2>
800038b6:	4398                	lw	a4,0(a5)
800038b8:	47a1                	li	a5,8
800038ba:	00f71763          	bne	a4,a5,800038c8 <link_training+0x3ca>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:438
                    reply_pe_2 = 2;
800038be:	87c18793          	addi	a5,gp,-1924 # 8000752c <reply_pe_2>
800038c2:	4709                	li	a4,2
800038c4:	c398                	sw	a4,0(a5)
800038c6:	a819                	j	800038dc <link_training+0x3de>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:439
                else if (reply_data_pe2==0xc)
800038c8:	86c18793          	addi	a5,gp,-1940 # 8000751c <reply_data_pe2>
800038cc:	4398                	lw	a4,0(a5)
800038ce:	47b1                	li	a5,12
800038d0:	00f71663          	bne	a4,a5,800038dc <link_training+0x3de>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:440
                    reply_pe_2 = 7;
800038d4:	87c18793          	addi	a5,gp,-1924 # 8000752c <reply_pe_2>
800038d8:	471d                	li	a4,7
800038da:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:441
                if(reply_data_pe3==0)
800038dc:	87018793          	addi	a5,gp,-1936 # 80007520 <reply_data_pe3>
800038e0:	439c                	lw	a5,0(a5)
800038e2:	e791                	bnez	a5,800038ee <link_training+0x3f0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:442
                    reply_pe_3 = 0;
800038e4:	88018793          	addi	a5,gp,-1920 # 80007530 <reply_pe_3>
800038e8:	0007a023          	sw	zero,0(a5)
800038ec:	a0a1                	j	80003934 <link_training+0x436>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:443
                else if (reply_data_pe3==0x40)
800038ee:	87018793          	addi	a5,gp,-1936 # 80007520 <reply_data_pe3>
800038f2:	4398                	lw	a4,0(a5)
800038f4:	04000793          	li	a5,64
800038f8:	00f71763          	bne	a4,a5,80003906 <link_training+0x408>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:444
                    reply_pe_3 = 1;
800038fc:	88018793          	addi	a5,gp,-1920 # 80007530 <reply_pe_3>
80003900:	4705                	li	a4,1
80003902:	c398                	sw	a4,0(a5)
80003904:	a805                	j	80003934 <link_training+0x436>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:445
                else if (reply_data_pe3==0x80)
80003906:	87018793          	addi	a5,gp,-1936 # 80007520 <reply_data_pe3>
8000390a:	4398                	lw	a4,0(a5)
8000390c:	08000793          	li	a5,128
80003910:	00f71763          	bne	a4,a5,8000391e <link_training+0x420>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:446
                    reply_pe_3 = 2;
80003914:	88018793          	addi	a5,gp,-1920 # 80007530 <reply_pe_3>
80003918:	4709                	li	a4,2
8000391a:	c398                	sw	a4,0(a5)
8000391c:	a821                	j	80003934 <link_training+0x436>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:447
                else if (reply_data_pe3==0xc0)
8000391e:	87018793          	addi	a5,gp,-1936 # 80007520 <reply_data_pe3>
80003922:	4398                	lw	a4,0(a5)
80003924:	0c000793          	li	a5,192
80003928:	00f71663          	bne	a4,a5,80003934 <link_training+0x436>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:448
                    reply_pe_3 = 7;
8000392c:	88018793          	addi	a5,gp,-1920 # 80007530 <reply_pe_3>
80003930:	471d                	li	a4,7
80003932:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:449
                if(LANE_NO==0x4)
80003934:	4418                	lw	a4,8(s0)
80003936:	4791                	li	a5,4
80003938:	02f71a63          	bne	a4,a5,8000396c <link_training+0x46e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:451
                {
                    if(lane_01_cr_done==0x01 && lane_23_cr_done==0x01) // cr done for all lanes goto tps2
8000393c:	84c18793          	addi	a5,gp,-1972 # 800074fc <lane_01_cr_done>
80003940:	4398                	lw	a4,0(a5)
80003942:	4785                	li	a5,1
80003944:	00f71e63          	bne	a4,a5,80003960 <link_training+0x462>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:451 (discriminator 1)
80003948:	85018793          	addi	a5,gp,-1968 # 80007500 <lane_23_cr_done>
8000394c:	4398                	lw	a4,0(a5)
8000394e:	4785                	li	a5,1
80003950:	00f71863          	bne	a4,a5,80003960 <link_training+0x462>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:453
                    {
                        SourceCmdSta = 0x00000028;
80003954:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003958:	02800713          	li	a4,40
8000395c:	c398                	sw	a4,0(a5)
8000395e:	a805                	j	8000398e <link_training+0x490>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:457
                    }
                    else
                    {
                        SourceCmdSta = 0x00000025;
80003960:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003964:	02500713          	li	a4,37
80003968:	c398                	sw	a4,0(a5)
8000396a:	a015                	j	8000398e <link_training+0x490>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:462
                    }
                }
                else
                {
                    if(lane_01_cr_done==0x01) // cr done for all lanes goto tps2
8000396c:	84c18793          	addi	a5,gp,-1972 # 800074fc <lane_01_cr_done>
80003970:	4398                	lw	a4,0(a5)
80003972:	4785                	li	a5,1
80003974:	00f71863          	bne	a4,a5,80003984 <link_training+0x486>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:464
                   {
                       SourceCmdSta = 0x00000028;
80003978:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
8000397c:	02800713          	li	a4,40
80003980:	c398                	sw	a4,0(a5)
80003982:	a031                	j	8000398e <link_training+0x490>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:468
                   }
                   else
                   {
                       SourceCmdSta = 0x00000025;
80003984:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003988:	02500713          	li	a4,37
8000398c:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:474
                   }
                }
            }

         }
         if(SourceCmdSta == 0x0000002A )
8000398e:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003992:	4398                	lw	a4,0(a5)
80003994:	02a00793          	li	a5,42
80003998:	44f71a63          	bne	a4,a5,80003dec <link_training+0x8ee>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:476
         {
            if(i==1)
8000399c:	fec42703          	lw	a4,-20(s0)
800039a0:	4785                	li	a5,1
800039a2:	00f71e63          	bne	a4,a5,800039be <link_training+0x4c0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:478
            {
                reply_data_cr_01 = reply_data&0x11;
800039a6:	fe442783          	lw	a5,-28(s0)
800039aa:	0117f713          	andi	a4,a5,17
800039ae:	89c18793          	addi	a5,gp,-1892 # 8000754c <reply_data_cr_01>
800039b2:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:479
                reply_data_eq_01 = reply_data;
800039b4:	fe442703          	lw	a4,-28(s0)
800039b8:	8a418793          	addi	a5,gp,-1884 # 80007554 <reply_data_eq_01>
800039bc:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:481
            }
            if(i==2)
800039be:	fec42703          	lw	a4,-20(s0)
800039c2:	4789                	li	a5,2
800039c4:	00f71e63          	bne	a4,a5,800039e0 <link_training+0x4e2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:483
            {
                reply_data_cr_23 = reply_data&0x11;
800039c8:	fe442783          	lw	a5,-28(s0)
800039cc:	0117f713          	andi	a4,a5,17
800039d0:	8a018793          	addi	a5,gp,-1888 # 80007550 <reply_data_cr_23>
800039d4:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:484
                reply_data_eq_23 = reply_data;
800039d6:	fe442703          	lw	a4,-28(s0)
800039da:	8a818793          	addi	a5,gp,-1880 # 80007558 <reply_data_eq_23>
800039de:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:486
            }
            if(i==5)
800039e0:	fec42703          	lw	a4,-20(s0)
800039e4:	4795                	li	a5,5
800039e6:	18f71763          	bne	a4,a5,80003b74 <link_training+0x676>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:488
            {
                reply_data_pe1 = reply_data&0xc0;
800039ea:	fe442783          	lw	a5,-28(s0)
800039ee:	0c07f713          	andi	a4,a5,192
800039f2:	86818793          	addi	a5,gp,-1944 # 80007518 <reply_data_pe1>
800039f6:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:489
                reply_data_vs1 = reply_data&0x30;
800039f8:	fe442783          	lw	a5,-28(s0)
800039fc:	0307f713          	andi	a4,a5,48
80003a00:	85818793          	addi	a5,gp,-1960 # 80007508 <reply_data_vs1>
80003a04:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:490
                reply_data_pe0 = reply_data&0x0c;
80003a06:	fe442783          	lw	a5,-28(s0)
80003a0a:	00c7f713          	andi	a4,a5,12
80003a0e:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
80003a12:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:491
                reply_data_vs0 = reply_data&0x03;
80003a14:	fe442783          	lw	a5,-28(s0)
80003a18:	0037f713          	andi	a4,a5,3
80003a1c:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80003a20:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:492
                if(reply_data_vs0==0)
80003a22:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80003a26:	439c                	lw	a5,0(a5)
80003a28:	e791                	bnez	a5,80003a34 <link_training+0x536>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:493
                    reply_sw_0 = 0;
80003a2a:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
80003a2e:	0007a023          	sw	zero,0(a5)
80003a32:	a089                	j	80003a74 <link_training+0x576>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:494
                else if (reply_data_vs0==0x1)
80003a34:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80003a38:	4398                	lw	a4,0(a5)
80003a3a:	4785                	li	a5,1
80003a3c:	00f71763          	bne	a4,a5,80003a4a <link_training+0x54c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:495
                    reply_sw_0 = 1;
80003a40:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
80003a44:	4705                	li	a4,1
80003a46:	c398                	sw	a4,0(a5)
80003a48:	a035                	j	80003a74 <link_training+0x576>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:496
                else if (reply_data_vs0==0x2)
80003a4a:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80003a4e:	4398                	lw	a4,0(a5)
80003a50:	4789                	li	a5,2
80003a52:	00f71763          	bne	a4,a5,80003a60 <link_training+0x562>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:497
                    reply_sw_0 = 2;
80003a56:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
80003a5a:	4709                	li	a4,2
80003a5c:	c398                	sw	a4,0(a5)
80003a5e:	a819                	j	80003a74 <link_training+0x576>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:498
                else if (reply_data_vs0==0x3)
80003a60:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80003a64:	4398                	lw	a4,0(a5)
80003a66:	478d                	li	a5,3
80003a68:	00f71663          	bne	a4,a5,80003a74 <link_training+0x576>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:499
                    reply_sw_0 = 7;
80003a6c:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
80003a70:	471d                	li	a4,7
80003a72:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:500
                if(reply_data_vs1==0)
80003a74:	85818793          	addi	a5,gp,-1960 # 80007508 <reply_data_vs1>
80003a78:	439c                	lw	a5,0(a5)
80003a7a:	e791                	bnez	a5,80003a86 <link_training+0x588>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:501
                    reply_sw_1 = 0;
80003a7c:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
80003a80:	0007a023          	sw	zero,0(a5)
80003a84:	a099                	j	80003aca <link_training+0x5cc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:502
                else if (reply_data_vs1==0x10)
80003a86:	85818793          	addi	a5,gp,-1960 # 80007508 <reply_data_vs1>
80003a8a:	4398                	lw	a4,0(a5)
80003a8c:	47c1                	li	a5,16
80003a8e:	00f71763          	bne	a4,a5,80003a9c <link_training+0x59e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:503
                    reply_sw_1 = 1;
80003a92:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
80003a96:	4705                	li	a4,1
80003a98:	c398                	sw	a4,0(a5)
80003a9a:	a805                	j	80003aca <link_training+0x5cc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:504
                else if (reply_data_vs1==0x20)
80003a9c:	85818793          	addi	a5,gp,-1960 # 80007508 <reply_data_vs1>
80003aa0:	4398                	lw	a4,0(a5)
80003aa2:	02000793          	li	a5,32
80003aa6:	00f71763          	bne	a4,a5,80003ab4 <link_training+0x5b6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:505
                    reply_sw_1 = 2;
80003aaa:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
80003aae:	4709                	li	a4,2
80003ab0:	c398                	sw	a4,0(a5)
80003ab2:	a821                	j	80003aca <link_training+0x5cc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:506
                else if (reply_data_vs1==0x30)
80003ab4:	85818793          	addi	a5,gp,-1960 # 80007508 <reply_data_vs1>
80003ab8:	4398                	lw	a4,0(a5)
80003aba:	03000793          	li	a5,48
80003abe:	00f71663          	bne	a4,a5,80003aca <link_training+0x5cc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:507
                    reply_sw_1 = 7;
80003ac2:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
80003ac6:	471d                	li	a4,7
80003ac8:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:508
                if(reply_data_pe0==0)
80003aca:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
80003ace:	439c                	lw	a5,0(a5)
80003ad0:	e791                	bnez	a5,80003adc <link_training+0x5de>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:509
                    reply_pe_0 = 0;
80003ad2:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
80003ad6:	0007a023          	sw	zero,0(a5)
80003ada:	a089                	j	80003b1c <link_training+0x61e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:510
                else if (reply_data_pe0==0x4)
80003adc:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
80003ae0:	4398                	lw	a4,0(a5)
80003ae2:	4791                	li	a5,4
80003ae4:	00f71763          	bne	a4,a5,80003af2 <link_training+0x5f4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:511
                    reply_pe_0 = 1;
80003ae8:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
80003aec:	4705                	li	a4,1
80003aee:	c398                	sw	a4,0(a5)
80003af0:	a035                	j	80003b1c <link_training+0x61e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:512
                else if (reply_data_pe0==0x8)
80003af2:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
80003af6:	4398                	lw	a4,0(a5)
80003af8:	47a1                	li	a5,8
80003afa:	00f71763          	bne	a4,a5,80003b08 <link_training+0x60a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:513
                    reply_pe_0 = 2;
80003afe:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
80003b02:	4709                	li	a4,2
80003b04:	c398                	sw	a4,0(a5)
80003b06:	a819                	j	80003b1c <link_training+0x61e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:514
                else if (reply_data_pe0==0xc)
80003b08:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
80003b0c:	4398                	lw	a4,0(a5)
80003b0e:	47b1                	li	a5,12
80003b10:	00f71663          	bne	a4,a5,80003b1c <link_training+0x61e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:515
                    reply_pe_0 = 7;
80003b14:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
80003b18:	471d                	li	a4,7
80003b1a:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:516
                if(reply_data_pe1==0)
80003b1c:	86818793          	addi	a5,gp,-1944 # 80007518 <reply_data_pe1>
80003b20:	439c                	lw	a5,0(a5)
80003b22:	e791                	bnez	a5,80003b2e <link_training+0x630>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:517
                    reply_pe_1 = 0;
80003b24:	87818793          	addi	a5,gp,-1928 # 80007528 <reply_pe_1>
80003b28:	0007a023          	sw	zero,0(a5)
80003b2c:	a0a1                	j	80003b74 <link_training+0x676>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:518
                else if (reply_data_pe1==0x40)
80003b2e:	86818793          	addi	a5,gp,-1944 # 80007518 <reply_data_pe1>
80003b32:	4398                	lw	a4,0(a5)
80003b34:	04000793          	li	a5,64
80003b38:	00f71763          	bne	a4,a5,80003b46 <link_training+0x648>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:519
                    reply_pe_1 = 1;
80003b3c:	87818793          	addi	a5,gp,-1928 # 80007528 <reply_pe_1>
80003b40:	4705                	li	a4,1
80003b42:	c398                	sw	a4,0(a5)
80003b44:	a805                	j	80003b74 <link_training+0x676>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:520
                else if (reply_data_pe1==0x80)
80003b46:	86818793          	addi	a5,gp,-1944 # 80007518 <reply_data_pe1>
80003b4a:	4398                	lw	a4,0(a5)
80003b4c:	08000793          	li	a5,128
80003b50:	00f71763          	bne	a4,a5,80003b5e <link_training+0x660>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:521
                    reply_pe_1 = 2;
80003b54:	87818793          	addi	a5,gp,-1928 # 80007528 <reply_pe_1>
80003b58:	4709                	li	a4,2
80003b5a:	c398                	sw	a4,0(a5)
80003b5c:	a821                	j	80003b74 <link_training+0x676>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:522
                else if (reply_data_pe1==0xc0)
80003b5e:	86818793          	addi	a5,gp,-1944 # 80007518 <reply_data_pe1>
80003b62:	4398                	lw	a4,0(a5)
80003b64:	0c000793          	li	a5,192
80003b68:	00f71663          	bne	a4,a5,80003b74 <link_training+0x676>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:523
                    reply_pe_0 = 7;
80003b6c:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
80003b70:	471d                	li	a4,7
80003b72:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:525
            }
            if(i==6)
80003b74:	fec42703          	lw	a4,-20(s0)
80003b78:	4799                	li	a5,6
80003b7a:	18f71763          	bne	a4,a5,80003d08 <link_training+0x80a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:527
            {
                reply_data_pe3 = reply_data&0xc0;
80003b7e:	fe442783          	lw	a5,-28(s0)
80003b82:	0c07f713          	andi	a4,a5,192
80003b86:	87018793          	addi	a5,gp,-1936 # 80007520 <reply_data_pe3>
80003b8a:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:528
                reply_data_vs3 = reply_data&0x30;
80003b8c:	fe442783          	lw	a5,-28(s0)
80003b90:	0307f713          	andi	a4,a5,48
80003b94:	86018793          	addi	a5,gp,-1952 # 80007510 <reply_data_vs3>
80003b98:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:529
                reply_data_pe2 = reply_data&0x0c;
80003b9a:	fe442783          	lw	a5,-28(s0)
80003b9e:	00c7f713          	andi	a4,a5,12
80003ba2:	86c18793          	addi	a5,gp,-1940 # 8000751c <reply_data_pe2>
80003ba6:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:530
                reply_data_vs2 = reply_data&0x03;
80003ba8:	fe442783          	lw	a5,-28(s0)
80003bac:	0037f713          	andi	a4,a5,3
80003bb0:	85c18793          	addi	a5,gp,-1956 # 8000750c <reply_data_vs2>
80003bb4:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:531
                if(reply_data_vs2==0)
80003bb6:	85c18793          	addi	a5,gp,-1956 # 8000750c <reply_data_vs2>
80003bba:	439c                	lw	a5,0(a5)
80003bbc:	e791                	bnez	a5,80003bc8 <link_training+0x6ca>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:532
                    reply_sw_2 = 0;
80003bbe:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
80003bc2:	0007a023          	sw	zero,0(a5)
80003bc6:	a089                	j	80003c08 <link_training+0x70a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:533
                else if (reply_data_vs2==0x1)
80003bc8:	85c18793          	addi	a5,gp,-1956 # 8000750c <reply_data_vs2>
80003bcc:	4398                	lw	a4,0(a5)
80003bce:	4785                	li	a5,1
80003bd0:	00f71763          	bne	a4,a5,80003bde <link_training+0x6e0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:534
                    reply_sw_2 = 1;
80003bd4:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
80003bd8:	4705                	li	a4,1
80003bda:	c398                	sw	a4,0(a5)
80003bdc:	a035                	j	80003c08 <link_training+0x70a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:535
                else if (reply_data_vs2==0x2)
80003bde:	85c18793          	addi	a5,gp,-1956 # 8000750c <reply_data_vs2>
80003be2:	4398                	lw	a4,0(a5)
80003be4:	4789                	li	a5,2
80003be6:	00f71763          	bne	a4,a5,80003bf4 <link_training+0x6f6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:536
                    reply_sw_2 = 2;
80003bea:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
80003bee:	4709                	li	a4,2
80003bf0:	c398                	sw	a4,0(a5)
80003bf2:	a819                	j	80003c08 <link_training+0x70a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:537
                else if (reply_data_vs2==0x3)
80003bf4:	85c18793          	addi	a5,gp,-1956 # 8000750c <reply_data_vs2>
80003bf8:	4398                	lw	a4,0(a5)
80003bfa:	478d                	li	a5,3
80003bfc:	00f71663          	bne	a4,a5,80003c08 <link_training+0x70a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:538
                    reply_sw_2 = 7;
80003c00:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
80003c04:	471d                	li	a4,7
80003c06:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:539
                if(reply_data_vs3==0)
80003c08:	86018793          	addi	a5,gp,-1952 # 80007510 <reply_data_vs3>
80003c0c:	439c                	lw	a5,0(a5)
80003c0e:	e791                	bnez	a5,80003c1a <link_training+0x71c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:540
                    reply_sw_3 = 0;
80003c10:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
80003c14:	0007a023          	sw	zero,0(a5)
80003c18:	a099                	j	80003c5e <link_training+0x760>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:541
                else if (reply_data_vs3==0x10)
80003c1a:	86018793          	addi	a5,gp,-1952 # 80007510 <reply_data_vs3>
80003c1e:	4398                	lw	a4,0(a5)
80003c20:	47c1                	li	a5,16
80003c22:	00f71763          	bne	a4,a5,80003c30 <link_training+0x732>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:542
                    reply_sw_3 = 1;
80003c26:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
80003c2a:	4705                	li	a4,1
80003c2c:	c398                	sw	a4,0(a5)
80003c2e:	a805                	j	80003c5e <link_training+0x760>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:543
                else if (reply_data_vs3==0x20)
80003c30:	86018793          	addi	a5,gp,-1952 # 80007510 <reply_data_vs3>
80003c34:	4398                	lw	a4,0(a5)
80003c36:	02000793          	li	a5,32
80003c3a:	00f71763          	bne	a4,a5,80003c48 <link_training+0x74a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:544
                    reply_sw_3 = 2;
80003c3e:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
80003c42:	4709                	li	a4,2
80003c44:	c398                	sw	a4,0(a5)
80003c46:	a821                	j	80003c5e <link_training+0x760>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:545
                else if (reply_data_vs3==0x30)
80003c48:	86018793          	addi	a5,gp,-1952 # 80007510 <reply_data_vs3>
80003c4c:	4398                	lw	a4,0(a5)
80003c4e:	03000793          	li	a5,48
80003c52:	00f71663          	bne	a4,a5,80003c5e <link_training+0x760>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:546
                    reply_sw_3 = 7;
80003c56:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
80003c5a:	471d                	li	a4,7
80003c5c:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:547
                if(reply_data_pe2==0)
80003c5e:	86c18793          	addi	a5,gp,-1940 # 8000751c <reply_data_pe2>
80003c62:	439c                	lw	a5,0(a5)
80003c64:	e791                	bnez	a5,80003c70 <link_training+0x772>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:548
                    reply_pe_2 = 0;
80003c66:	87c18793          	addi	a5,gp,-1924 # 8000752c <reply_pe_2>
80003c6a:	0007a023          	sw	zero,0(a5)
80003c6e:	a089                	j	80003cb0 <link_training+0x7b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:549
                else if (reply_data_pe2==0x4)
80003c70:	86c18793          	addi	a5,gp,-1940 # 8000751c <reply_data_pe2>
80003c74:	4398                	lw	a4,0(a5)
80003c76:	4791                	li	a5,4
80003c78:	00f71763          	bne	a4,a5,80003c86 <link_training+0x788>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:550
                    reply_pe_2 = 1;
80003c7c:	87c18793          	addi	a5,gp,-1924 # 8000752c <reply_pe_2>
80003c80:	4705                	li	a4,1
80003c82:	c398                	sw	a4,0(a5)
80003c84:	a035                	j	80003cb0 <link_training+0x7b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:551
                else if (reply_data_pe2==0x8)
80003c86:	86c18793          	addi	a5,gp,-1940 # 8000751c <reply_data_pe2>
80003c8a:	4398                	lw	a4,0(a5)
80003c8c:	47a1                	li	a5,8
80003c8e:	00f71763          	bne	a4,a5,80003c9c <link_training+0x79e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:552
                    reply_pe_2 = 2;
80003c92:	87c18793          	addi	a5,gp,-1924 # 8000752c <reply_pe_2>
80003c96:	4709                	li	a4,2
80003c98:	c398                	sw	a4,0(a5)
80003c9a:	a819                	j	80003cb0 <link_training+0x7b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:553
                else if (reply_data_pe2==0xc)
80003c9c:	86c18793          	addi	a5,gp,-1940 # 8000751c <reply_data_pe2>
80003ca0:	4398                	lw	a4,0(a5)
80003ca2:	47b1                	li	a5,12
80003ca4:	00f71663          	bne	a4,a5,80003cb0 <link_training+0x7b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:554
                    reply_pe_2 = 7;
80003ca8:	87c18793          	addi	a5,gp,-1924 # 8000752c <reply_pe_2>
80003cac:	471d                	li	a4,7
80003cae:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:555
                if(reply_data_pe3==0)
80003cb0:	87018793          	addi	a5,gp,-1936 # 80007520 <reply_data_pe3>
80003cb4:	439c                	lw	a5,0(a5)
80003cb6:	e791                	bnez	a5,80003cc2 <link_training+0x7c4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:556
                    reply_pe_3 = 0;
80003cb8:	88018793          	addi	a5,gp,-1920 # 80007530 <reply_pe_3>
80003cbc:	0007a023          	sw	zero,0(a5)
80003cc0:	a0a1                	j	80003d08 <link_training+0x80a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:557
                else if (reply_data_pe3==0x40)
80003cc2:	87018793          	addi	a5,gp,-1936 # 80007520 <reply_data_pe3>
80003cc6:	4398                	lw	a4,0(a5)
80003cc8:	04000793          	li	a5,64
80003ccc:	00f71763          	bne	a4,a5,80003cda <link_training+0x7dc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:558
                    reply_pe_3 = 1;
80003cd0:	88018793          	addi	a5,gp,-1920 # 80007530 <reply_pe_3>
80003cd4:	4705                	li	a4,1
80003cd6:	c398                	sw	a4,0(a5)
80003cd8:	a805                	j	80003d08 <link_training+0x80a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:559
                else if (reply_data_pe3==0x80)
80003cda:	87018793          	addi	a5,gp,-1936 # 80007520 <reply_data_pe3>
80003cde:	4398                	lw	a4,0(a5)
80003ce0:	08000793          	li	a5,128
80003ce4:	00f71763          	bne	a4,a5,80003cf2 <link_training+0x7f4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:560
                    reply_pe_3 = 2;
80003ce8:	88018793          	addi	a5,gp,-1920 # 80007530 <reply_pe_3>
80003cec:	4709                	li	a4,2
80003cee:	c398                	sw	a4,0(a5)
80003cf0:	a821                	j	80003d08 <link_training+0x80a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:561
                else if (reply_data_pe3==0xc0)
80003cf2:	87018793          	addi	a5,gp,-1936 # 80007520 <reply_data_pe3>
80003cf6:	4398                	lw	a4,0(a5)
80003cf8:	0c000793          	li	a5,192
80003cfc:	00f71663          	bne	a4,a5,80003d08 <link_training+0x80a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:562
                    reply_pe_3 = 7;
80003d00:	88018793          	addi	a5,gp,-1920 # 80007530 <reply_pe_3>
80003d04:	471d                	li	a4,7
80003d06:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:564
            }
            if(SourceCmdSta == 0x0000002A & i==6)
80003d08:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003d0c:	439c                	lw	a5,0(a5)
80003d0e:	fd678793          	addi	a5,a5,-42
80003d12:	0017b793          	seqz	a5,a5
80003d16:	0ff7f713          	andi	a4,a5,255
80003d1a:	fec42783          	lw	a5,-20(s0)
80003d1e:	17e9                	addi	a5,a5,-6
80003d20:	0017b793          	seqz	a5,a5
80003d24:	0ff7f793          	andi	a5,a5,255
80003d28:	8ff9                	and	a5,a5,a4
80003d2a:	0ff7f793          	andi	a5,a5,255
80003d2e:	cfdd                	beqz	a5,80003dec <link_training+0x8ee>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:566
            {
               if(LANE_NO==4)
80003d30:	4418                	lw	a4,8(s0)
80003d32:	4791                	li	a5,4
80003d34:	06f71e63          	bne	a4,a5,80003db0 <link_training+0x8b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:568
               {
                if(reply_data_cr_01==0x11 & reply_data_cr_23==0x11)
80003d38:	89c18793          	addi	a5,gp,-1892 # 8000754c <reply_data_cr_01>
80003d3c:	439c                	lw	a5,0(a5)
80003d3e:	17bd                	addi	a5,a5,-17
80003d40:	0017b793          	seqz	a5,a5
80003d44:	0ff7f713          	andi	a4,a5,255
80003d48:	8a018793          	addi	a5,gp,-1888 # 80007550 <reply_data_cr_23>
80003d4c:	439c                	lw	a5,0(a5)
80003d4e:	17bd                	addi	a5,a5,-17
80003d50:	0017b793          	seqz	a5,a5
80003d54:	0ff7f793          	andi	a5,a5,255
80003d58:	8ff9                	and	a5,a5,a4
80003d5a:	0ff7f793          	andi	a5,a5,255
80003d5e:	c3b9                	beqz	a5,80003da4 <link_training+0x8a6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:570
                {
                    if(reply_data_eq_01==0x77 & reply_data_eq_23 ==0x77)
80003d60:	8a418793          	addi	a5,gp,-1884 # 80007554 <reply_data_eq_01>
80003d64:	439c                	lw	a5,0(a5)
80003d66:	f8978793          	addi	a5,a5,-119
80003d6a:	0017b793          	seqz	a5,a5
80003d6e:	0ff7f713          	andi	a4,a5,255
80003d72:	8a818793          	addi	a5,gp,-1880 # 80007558 <reply_data_eq_23>
80003d76:	439c                	lw	a5,0(a5)
80003d78:	f8978793          	addi	a5,a5,-119
80003d7c:	0017b793          	seqz	a5,a5
80003d80:	0ff7f793          	andi	a5,a5,255
80003d84:	8ff9                	and	a5,a5,a4
80003d86:	0ff7f793          	andi	a5,a5,255
80003d8a:	c799                	beqz	a5,80003d98 <link_training+0x89a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:572
                    {
                        SourceCmdSta = 0x0000002B;
80003d8c:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003d90:	02b00713          	li	a4,43
80003d94:	c398                	sw	a4,0(a5)
80003d96:	a899                	j	80003dec <link_training+0x8ee>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:576
                    }
                    else
                    {
                        SourceCmdSta = 0x00000028;
80003d98:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003d9c:	02800713          	li	a4,40
80003da0:	c398                	sw	a4,0(a5)
80003da2:	a0a9                	j	80003dec <link_training+0x8ee>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:581
                    }
                }
                else
                {
                    SourceCmdSta = 0x00000025;
80003da4:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003da8:	02500713          	li	a4,37
80003dac:	c398                	sw	a4,0(a5)
80003dae:	a83d                	j	80003dec <link_training+0x8ee>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:586
                }
               }
               else
               {
                   if(reply_data_cr_01==0x11 )
80003db0:	89c18793          	addi	a5,gp,-1892 # 8000754c <reply_data_cr_01>
80003db4:	4398                	lw	a4,0(a5)
80003db6:	47c5                	li	a5,17
80003db8:	02f71563          	bne	a4,a5,80003de2 <link_training+0x8e4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:588
                      {
                          if(reply_data_eq_01==0x77 )
80003dbc:	8a418793          	addi	a5,gp,-1884 # 80007554 <reply_data_eq_01>
80003dc0:	4398                	lw	a4,0(a5)
80003dc2:	07700793          	li	a5,119
80003dc6:	00f71863          	bne	a4,a5,80003dd6 <link_training+0x8d8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:590
                          {
                              SourceCmdSta = 0x0000002B;
80003dca:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003dce:	02b00713          	li	a4,43
80003dd2:	c398                	sw	a4,0(a5)
80003dd4:	a821                	j	80003dec <link_training+0x8ee>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:594
                          }
                          else
                          {
                              SourceCmdSta = 0x00000028;
80003dd6:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003dda:	02800713          	li	a4,40
80003dde:	c398                	sw	a4,0(a5)
80003de0:	a031                	j	80003dec <link_training+0x8ee>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:599
                          }
                      }
                      else
                      {
                          SourceCmdSta = 0x00000025;
80003de2:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003de6:	02500713          	li	a4,37
80003dea:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:340 (discriminator 2)
    for(uint32_t i=0;i<reply_bytes;i++)
80003dec:	fec42783          	lw	a5,-20(s0)
80003df0:	0785                	addi	a5,a5,1
80003df2:	fef42623          	sw	a5,-20(s0)
80003df6:	fe842783          	lw	a5,-24(s0)
80003dfa:	fec42703          	lw	a4,-20(s0)
80003dfe:	f4f76163          	bltu	a4,a5,80003540 <link_training+0x42>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:606
               }
            }
         }
    }

    if(SourceCmdSta == 0x00000001)
80003e02:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003e06:	4398                	lw	a4,0(a5)
80003e08:	4785                	li	a5,1
80003e0a:	00f71a63          	bne	a4,a5,80003e1e <link_training+0x920>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:608
    {
        DPSourceTxRdCmd(0x00000200,0x00000001,0x00000001);
80003e0e:	4605                	li	a2,1
80003e10:	4585                	li	a1,1
80003e12:	20000513          	li	a0,512
80003e16:	becff0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
    {
//        delay_msec(100);
        msdelay(100);
        DPSourceStartVideo(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
    }
}
80003e1a:	4f70006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:610
    else if(SourceCmdSta == 0x00000002)
80003e1e:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003e22:	4398                	lw	a4,0(a5)
80003e24:	4789                	li	a5,2
80003e26:	00f71963          	bne	a4,a5,80003e38 <link_training+0x93a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:612
        DPSourceTxRdCmd(0x00000000,0x00000001,0x00000001);
80003e2a:	4605                	li	a2,1
80003e2c:	4585                	li	a1,1
80003e2e:	4501                	li	a0,0
80003e30:	bd2ff0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003e34:	4dd0006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:614
    else if(SourceCmdSta == 0x00000003)
80003e38:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003e3c:	4398                	lw	a4,0(a5)
80003e3e:	478d                	li	a5,3
80003e40:	00f71a63          	bne	a4,a5,80003e54 <link_training+0x956>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:616
        DPSourceTxRdCmd(0x00000500,0x00000001,0x0000000B);
80003e44:	462d                	li	a2,11
80003e46:	4585                	li	a1,1
80003e48:	50000513          	li	a0,1280
80003e4c:	bb6ff0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003e50:	4c10006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:618
    else if(SourceCmdSta == 0x00000004)
80003e54:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003e58:	4398                	lw	a4,0(a5)
80003e5a:	4791                	li	a5,4
80003e5c:	00f71a63          	bne	a4,a5,80003e70 <link_training+0x972>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:620
        DPSourceTxRdCmd(0x00000600,0x00000001,0x00000001);
80003e60:	4605                	li	a2,1
80003e62:	4585                	li	a1,1
80003e64:	60000513          	li	a0,1536
80003e68:	b9aff0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003e6c:	4a50006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:622
    else if(SourceCmdSta == 0x00000005)
80003e70:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003e74:	4398                	lw	a4,0(a5)
80003e76:	4795                	li	a5,5
80003e78:	00f71e63          	bne	a4,a5,80003e94 <link_training+0x996>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:624
        SourceWrBytes[0] = 0x00000001;
80003e7c:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80003e80:	4705                	li	a4,1
80003e82:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:625
        DPSourceTxWrCmd(0x00000600,0x00000001,0x00000001); //SET_POWER & SET_DP_PWR_VOLTAGE
80003e84:	4605                	li	a2,1
80003e86:	4585                	li	a1,1
80003e88:	60000513          	li	a0,1536
80003e8c:	9eeff0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003e90:	4810006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:627
    else if(SourceCmdSta == 0x00000006)
80003e94:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003e98:	4398                	lw	a4,0(a5)
80003e9a:	4799                	li	a5,6
80003e9c:	00f71f63          	bne	a4,a5,80003eba <link_training+0x9bc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:629
       SourceWrBytes[0] = 0x00000080;
80003ea0:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80003ea4:	08000713          	li	a4,128
80003ea8:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:630
        DPSourceTxWrCmd(0x00000300,0x00000001,0x00000001);
80003eaa:	4605                	li	a2,1
80003eac:	4585                	li	a1,1
80003eae:	30000513          	li	a0,768
80003eb2:	9c8ff0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003eb6:	45b0006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:632
    else if(SourceCmdSta == 0x00000007)
80003eba:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003ebe:	4398                	lw	a4,0(a5)
80003ec0:	479d                	li	a5,7
80003ec2:	00f71f63          	bne	a4,a5,80003ee0 <link_training+0x9e2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:634
       SourceWrBytes[0] = 0x00000034;
80003ec6:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80003eca:	03400713          	li	a4,52
80003ece:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:635
        DPSourceTxWrCmd(0x00000301,0x00000001,0x00000001);
80003ed0:	4605                	li	a2,1
80003ed2:	4585                	li	a1,1
80003ed4:	30100513          	li	a0,769
80003ed8:	9a2ff0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003edc:	4350006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:637
    else if(SourceCmdSta == 0x00000008)
80003ee0:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003ee4:	4398                	lw	a4,0(a5)
80003ee6:	47a1                	li	a5,8
80003ee8:	00f71f63          	bne	a4,a5,80003f06 <link_training+0xa08>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:639
       SourceWrBytes[0] = 0x00000028;
80003eec:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80003ef0:	02800713          	li	a4,40
80003ef4:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:640
        DPSourceTxWrCmd(0x00000302,0x00000001,0x00000001);
80003ef6:	4605                	li	a2,1
80003ef8:	4585                	li	a1,1
80003efa:	30200513          	li	a0,770
80003efe:	97cff0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003f02:	40f0006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:642
    else if(SourceCmdSta == 0x00000009)
80003f06:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003f0a:	4398                	lw	a4,0(a5)
80003f0c:	47a5                	li	a5,9
80003f0e:	00f71963          	bne	a4,a5,80003f20 <link_training+0xa22>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:644
       DPSourceTxRdCmd(0x0000000E,0x00000001,0x00000001);
80003f12:	4605                	li	a2,1
80003f14:	4585                	li	a1,1
80003f16:	4539                	li	a0,14
80003f18:	aeaff0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003f1c:	3f50006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:646
    else if(SourceCmdSta == 0x0000000A)
80003f20:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003f24:	4398                	lw	a4,0(a5)
80003f26:	47a9                	li	a5,10
80003f28:	00f71963          	bne	a4,a5,80003f3a <link_training+0xa3c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:648
       DPSourceTxRdCmd(0x00000000,0x00000001,0x0000000E);
80003f2c:	4639                	li	a2,14
80003f2e:	4585                	li	a1,1
80003f30:	4501                	li	a0,0
80003f32:	ad0ff0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003f36:	3db0006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:650
    else if(SourceCmdSta == 0x0000000B)
80003f3a:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003f3e:	4398                	lw	a4,0(a5)
80003f40:	47ad                	li	a5,11
80003f42:	00f71a63          	bne	a4,a5,80003f56 <link_training+0xa58>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:652
       DPSourceTxRdCmd(0x00000080,0x00000001,0x00000004);
80003f46:	4611                	li	a2,4
80003f48:	4585                	li	a1,1
80003f4a:	08000513          	li	a0,128
80003f4e:	ab4ff0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003f52:	3bf0006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:654
    else if(SourceCmdSta == 0x0000000C)
80003f56:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003f5a:	4398                	lw	a4,0(a5)
80003f5c:	47b1                	li	a5,12
80003f5e:	00f71f63          	bne	a4,a5,80003f7c <link_training+0xa7e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:656
        SourceWrBytes[0] = 0x00000000;
80003f62:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80003f66:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:657
        DPSourceTxI2CWrCmd(0x00000050,0x00000001,0x00000001,0x00000001);  //0x00043 to 0x00053 -- Reserved
80003f6a:	4685                	li	a3,1
80003f6c:	4605                	li	a2,1
80003f6e:	4585                	li	a1,1
80003f70:	05000513          	li	a0,80
80003f74:	9c6ff0ef          	jal	ra,8000313a <DPSourceTxI2CWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003f78:	3990006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:659
    else if(SourceCmdSta >= 0x000000D && SourceCmdSta <= 0x00000014)
80003f7c:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003f80:	4398                	lw	a4,0(a5)
80003f82:	47b1                	li	a5,12
80003f84:	02e7f163          	bgeu	a5,a4,80003fa6 <link_training+0xaa8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:659 (discriminator 1)
80003f88:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003f8c:	4398                	lw	a4,0(a5)
80003f8e:	47d1                	li	a5,20
80003f90:	00e7eb63          	bltu	a5,a4,80003fa6 <link_training+0xaa8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:661
        DPSourceTxI2CRdCmd(0x00000050,0x00000001,0x00000010,0x00000001);
80003f94:	4685                	li	a3,1
80003f96:	4641                	li	a2,16
80003f98:	4585                	li	a1,1
80003f9a:	05000513          	li	a0,80
80003f9e:	adaff0ef          	jal	ra,80003278 <DPSourceTxI2CRdCmd>
80003fa2:	36f0006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:663
    else if(SourceCmdSta == 0x0000015)
80003fa6:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003faa:	4398                	lw	a4,0(a5)
80003fac:	47d5                	li	a5,21
80003fae:	02f71063          	bne	a4,a5,80003fce <link_training+0xad0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:665
        SourceWrBytes[0] = 0x00000080;
80003fb2:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80003fb6:	08000713          	li	a4,128
80003fba:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:666
        DPSourceTxI2CWrCmd(0x00000050,0x00000001,0x00000001,0x00000001);
80003fbc:	4685                	li	a3,1
80003fbe:	4605                	li	a2,1
80003fc0:	4585                	li	a1,1
80003fc2:	05000513          	li	a0,80
80003fc6:	974ff0ef          	jal	ra,8000313a <DPSourceTxI2CWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80003fca:	3470006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:668
    else if(SourceCmdSta >= 0x0000016 && SourceCmdSta <= 0x0000001C)
80003fce:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003fd2:	4398                	lw	a4,0(a5)
80003fd4:	47d5                	li	a5,21
80003fd6:	02e7f163          	bgeu	a5,a4,80003ff8 <link_training+0xafa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:668 (discriminator 1)
80003fda:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003fde:	4398                	lw	a4,0(a5)
80003fe0:	47f1                	li	a5,28
80003fe2:	00e7eb63          	bltu	a5,a4,80003ff8 <link_training+0xafa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:670
        DPSourceTxI2CRdCmd(0x00000050,0x00000001,0x00000010,0x00000001);
80003fe6:	4685                	li	a3,1
80003fe8:	4641                	li	a2,16
80003fea:	4585                	li	a1,1
80003fec:	05000513          	li	a0,80
80003ff0:	a88ff0ef          	jal	ra,80003278 <DPSourceTxI2CRdCmd>
80003ff4:	31d0006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:672
    else if(SourceCmdSta == 0x0000001D)
80003ff8:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80003ffc:	4398                	lw	a4,0(a5)
80003ffe:	47f5                	li	a5,29
80004000:	00f71b63          	bne	a4,a5,80004016 <link_training+0xb18>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:674
        DPSourceTxI2CRdCmd(0x00000050,0x00000001,0x00000010,0x00000000);
80004004:	4681                	li	a3,0
80004006:	4641                	li	a2,16
80004008:	4585                	li	a1,1
8000400a:	05000513          	li	a0,80
8000400e:	a6aff0ef          	jal	ra,80003278 <DPSourceTxI2CRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80004012:	2ff0006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:676
    else if(SourceCmdSta == 0x0000001E)
80004016:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
8000401a:	4398                	lw	a4,0(a5)
8000401c:	47f9                	li	a5,30
8000401e:	00f71e63          	bne	a4,a5,8000403a <link_training+0xb3c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:678
        SourceWrBytes[0] = 0x00000000;
80004022:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004026:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:679
        DPSourceTxWrCmd(0x00000111,0x00000001,0x00000001); //00111h MSTM_CTRL
8000402a:	4605                	li	a2,1
8000402c:	4585                	li	a1,1
8000402e:	11100513          	li	a0,273
80004032:	848ff0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80004036:	2db0006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:682
    else if(SourceCmdSta == 0x0000001F)
8000403a:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
8000403e:	4398                	lw	a4,0(a5)
80004040:	47fd                	li	a5,31
80004042:	00f71e63          	bne	a4,a5,8000405e <link_training+0xb60>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:684
        SourceWrBytes[0] = 0x00000000;
80004046:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
8000404a:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:685
        DPSourceTxWrCmd(0x00000107,0x00000001,0x00000001); //DOWNSPREAD_CTRL
8000404e:	4605                	li	a2,1
80004050:	4585                	li	a1,1
80004052:	10700513          	li	a0,263
80004056:	824ff0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
8000405a:	2b70006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:687
    else if(SourceCmdSta == 0x00000020)
8000405e:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80004062:	4398                	lw	a4,0(a5)
80004064:	02000793          	li	a5,32
80004068:	00f71e63          	bne	a4,a5,80004084 <link_training+0xb86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:689
        SourceWrBytes[0] = 0x00000001;
8000406c:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004070:	4705                	li	a4,1
80004072:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:690
        DPSourceTxWrCmd(0x00000600,0x00000001,0x00000001); //SET_POWER & SET_DP_PWR_VOLTAGE
80004074:	4605                	li	a2,1
80004076:	4585                	li	a1,1
80004078:	60000513          	li	a0,1536
8000407c:	ffffe0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80004080:	2910006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:692
    else if(SourceCmdSta == 0x00000021)
80004084:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80004088:	4398                	lw	a4,0(a5)
8000408a:	02100793          	li	a5,33
8000408e:	00f71f63          	bne	a4,a5,800040ac <link_training+0xbae>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:694
        SourceWrBytes[0] = 0x00000020;
80004092:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004096:	02000713          	li	a4,32
8000409a:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:695
        DPSourceTxWrCmd(0x00000102,0x00000001,0x00000001); //TRAINING_PATTERN_SET
8000409c:	4605                	li	a2,1
8000409e:	4585                	li	a1,1
800040a0:	10200513          	li	a0,258
800040a4:	fd7fe0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
800040a8:	2690006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:699
    else if(SourceCmdSta == 0x00000022)
800040ac:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
800040b0:	4398                	lw	a4,0(a5)
800040b2:	02200793          	li	a5,34
800040b6:	04f71f63          	bne	a4,a5,80004114 <link_training+0xc16>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:701
        if(SPEED_MODE==0)
800040ba:	fdc42783          	lw	a5,-36(s0)
800040be:	e791                	bnez	a5,800040ca <link_training+0xbcc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:703
                SPEED=0x00000006;
800040c0:	8ac18793          	addi	a5,gp,-1876 # 8000755c <SPEED>
800040c4:	4719                	li	a4,6
800040c6:	c398                	sw	a4,0(a5)
800040c8:	a025                	j	800040f0 <link_training+0xbf2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:705
            else if (SPEED_MODE==1)
800040ca:	fdc42703          	lw	a4,-36(s0)
800040ce:	4785                	li	a5,1
800040d0:	00f71763          	bne	a4,a5,800040de <link_training+0xbe0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:707
                SPEED=0x0000000A;
800040d4:	8ac18793          	addi	a5,gp,-1876 # 8000755c <SPEED>
800040d8:	4729                	li	a4,10
800040da:	c398                	sw	a4,0(a5)
800040dc:	a811                	j	800040f0 <link_training+0xbf2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:709
            else if (SPEED_MODE==2)
800040de:	fdc42703          	lw	a4,-36(s0)
800040e2:	4789                	li	a5,2
800040e4:	00f71663          	bne	a4,a5,800040f0 <link_training+0xbf2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:711
                SPEED=0x00000014;
800040e8:	8ac18793          	addi	a5,gp,-1876 # 8000755c <SPEED>
800040ec:	4751                	li	a4,20
800040ee:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:713
        SourceWrBytes[0] = SPEED;  //2.7Gbps   //0x00000014;
800040f0:	8ac18793          	addi	a5,gp,-1876 # 8000755c <SPEED>
800040f4:	4398                	lw	a4,0(a5)
800040f6:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
800040fa:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:715
        SourceWrBytes[1] = LANE_NO;
800040fc:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004100:	4418                	lw	a4,8(s0)
80004102:	c3d8                	sw	a4,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:716
        DPSourceTxWrCmd(0x00000100,0x00000001,0x00000002);//LINK_BW_SET
80004104:	4609                	li	a2,2
80004106:	4585                	li	a1,1
80004108:	10000513          	li	a0,256
8000410c:	f6ffe0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80004110:	2010006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:718
    else if(SourceCmdSta == 0x00000023)
80004114:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80004118:	4398                	lw	a4,0(a5)
8000411a:	02300793          	li	a5,35
8000411e:	26f71f63          	bne	a4,a5,8000439c <link_training+0xe9e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:722
         write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_SCRAMBLER_ENABLE_OFFSET, 0x00000000);
80004122:	4601                	li	a2,0
80004124:	45c1                	li	a1,16
80004126:	71001537          	lui	a0,0x71001
8000412a:	97bfe0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:723
         write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_TRAINING_PATTERN_MODE_OFFSET, 0x00000001);  //TPS1
8000412e:	4605                	li	a2,1
80004130:	45e1                	li	a1,24
80004132:	71001537          	lui	a0,0x71001
80004136:	96ffe0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:725
        SourceWrBytes[0] = 0x00000021;//TRAINING_PATTERN_SET
8000413a:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
8000413e:	02100713          	li	a4,33
80004142:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:727
        if(reply_data_vs0==0)
80004144:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80004148:	439c                	lw	a5,0(a5)
8000414a:	e791                	bnez	a5,80004156 <link_training+0xc58>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:728
                   vs = 0;
8000414c:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004150:	0007a023          	sw	zero,0(a5)
80004154:	a089                	j	80004196 <link_training+0xc98>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:729
               else if (reply_data_vs0==0x1)
80004156:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
8000415a:	4398                	lw	a4,0(a5)
8000415c:	4785                	li	a5,1
8000415e:	00f71763          	bne	a4,a5,8000416c <link_training+0xc6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:730
                   vs = 1;
80004162:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004166:	4705                	li	a4,1
80004168:	c398                	sw	a4,0(a5)
8000416a:	a035                	j	80004196 <link_training+0xc98>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:731
               else if (reply_data_vs0==0x2)
8000416c:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80004170:	4398                	lw	a4,0(a5)
80004172:	4789                	li	a5,2
80004174:	00f71763          	bne	a4,a5,80004182 <link_training+0xc84>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:732
                   vs = 2;
80004178:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
8000417c:	4709                	li	a4,2
8000417e:	c398                	sw	a4,0(a5)
80004180:	a819                	j	80004196 <link_training+0xc98>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:733
               else if (reply_data_vs0==0x3)
80004182:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80004186:	4398                	lw	a4,0(a5)
80004188:	478d                	li	a5,3
8000418a:	00f71663          	bne	a4,a5,80004196 <link_training+0xc98>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:734
                   vs = 3;
8000418e:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004192:	470d                	li	a4,3
80004194:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:736
               if(reply_data_pe0==0)
80004196:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
8000419a:	439c                	lw	a5,0(a5)
8000419c:	e791                	bnez	a5,800041a8 <link_training+0xcaa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:737
                   pe = 0;
8000419e:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800041a2:	0007a023          	sw	zero,0(a5)
800041a6:	a089                	j	800041e8 <link_training+0xcea>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:738
               else if (reply_data_pe0==0x4)
800041a8:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
800041ac:	4398                	lw	a4,0(a5)
800041ae:	4791                	li	a5,4
800041b0:	00f71763          	bne	a4,a5,800041be <link_training+0xcc0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:739
                   pe = 1;
800041b4:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800041b8:	4705                	li	a4,1
800041ba:	c398                	sw	a4,0(a5)
800041bc:	a035                	j	800041e8 <link_training+0xcea>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:740
               else if (reply_data_pe0==0x8)
800041be:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
800041c2:	4398                	lw	a4,0(a5)
800041c4:	47a1                	li	a5,8
800041c6:	00f71763          	bne	a4,a5,800041d4 <link_training+0xcd6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:741
                   pe = 2;
800041ca:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800041ce:	4709                	li	a4,2
800041d0:	c398                	sw	a4,0(a5)
800041d2:	a819                	j	800041e8 <link_training+0xcea>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:742
               else if (reply_data_pe0==0xc)
800041d4:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
800041d8:	4398                	lw	a4,0(a5)
800041da:	47b1                	li	a5,12
800041dc:	00f71663          	bne	a4,a5,800041e8 <link_training+0xcea>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:743
                   pe = 3;
800041e0:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800041e4:	470d                	li	a4,3
800041e6:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:745
                if(vs==0 && pe==0)
800041e8:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800041ec:	439c                	lw	a5,0(a5)
800041ee:	eb91                	bnez	a5,80004202 <link_training+0xd04>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:745 (discriminator 1)
800041f0:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800041f4:	439c                	lw	a5,0(a5)
800041f6:	e791                	bnez	a5,80004202 <link_training+0xd04>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:746
                    vsw_pe(0x0,0x0);
800041f8:	4581                	li	a1,0
800041fa:	4501                	li	a0,0
800041fc:	251010ef          	jal	ra,80005c4c <vsw_pe>
80004200:	a2b5                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:747
                else if (vs==0 && pe==1)
80004202:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004206:	439c                	lw	a5,0(a5)
80004208:	ef81                	bnez	a5,80004220 <link_training+0xd22>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:747 (discriminator 1)
8000420a:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
8000420e:	4398                	lw	a4,0(a5)
80004210:	4785                	li	a5,1
80004212:	00f71763          	bne	a4,a5,80004220 <link_training+0xd22>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:748
                    vsw_pe(0x0,0x1);
80004216:	4585                	li	a1,1
80004218:	4501                	li	a0,0
8000421a:	233010ef          	jal	ra,80005c4c <vsw_pe>
8000421e:	a2b9                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:749
                else if (vs==0 && pe==2)
80004220:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004224:	439c                	lw	a5,0(a5)
80004226:	ef81                	bnez	a5,8000423e <link_training+0xd40>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:749 (discriminator 1)
80004228:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
8000422c:	4398                	lw	a4,0(a5)
8000422e:	4789                	li	a5,2
80004230:	00f71763          	bne	a4,a5,8000423e <link_training+0xd40>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:750
                    vsw_pe(0x0,0x2);
80004234:	4589                	li	a1,2
80004236:	4501                	li	a0,0
80004238:	215010ef          	jal	ra,80005c4c <vsw_pe>
8000423c:	aa05                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:751
                else if (vs==1 && pe==0)
8000423e:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004242:	4398                	lw	a4,0(a5)
80004244:	4785                	li	a5,1
80004246:	00f71b63          	bne	a4,a5,8000425c <link_training+0xd5e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:751 (discriminator 1)
8000424a:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
8000424e:	439c                	lw	a5,0(a5)
80004250:	e791                	bnez	a5,8000425c <link_training+0xd5e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:752
                    vsw_pe(0x1,0x0);
80004252:	4581                	li	a1,0
80004254:	4505                	li	a0,1
80004256:	1f7010ef          	jal	ra,80005c4c <vsw_pe>
8000425a:	aa09                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:753
                else if (vs==1 && pe==1)
8000425c:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004260:	4398                	lw	a4,0(a5)
80004262:	4785                	li	a5,1
80004264:	00f71d63          	bne	a4,a5,8000427e <link_training+0xd80>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:753 (discriminator 1)
80004268:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
8000426c:	4398                	lw	a4,0(a5)
8000426e:	4785                	li	a5,1
80004270:	00f71763          	bne	a4,a5,8000427e <link_training+0xd80>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:754
                    vsw_pe(0x1,0x1);
80004274:	4585                	li	a1,1
80004276:	4505                	li	a0,1
80004278:	1d5010ef          	jal	ra,80005c4c <vsw_pe>
8000427c:	a8c5                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:755
                else if (vs==1 && pe==2)
8000427e:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004282:	4398                	lw	a4,0(a5)
80004284:	4785                	li	a5,1
80004286:	00f71d63          	bne	a4,a5,800042a0 <link_training+0xda2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:755 (discriminator 1)
8000428a:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
8000428e:	4398                	lw	a4,0(a5)
80004290:	4789                	li	a5,2
80004292:	00f71763          	bne	a4,a5,800042a0 <link_training+0xda2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:756
                    vsw_pe(0x1,0x2);
80004296:	4589                	li	a1,2
80004298:	4505                	li	a0,1
8000429a:	1b3010ef          	jal	ra,80005c4c <vsw_pe>
8000429e:	a0f9                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:757
                else if (vs==2 && pe==0)
800042a0:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800042a4:	4398                	lw	a4,0(a5)
800042a6:	4789                	li	a5,2
800042a8:	00f71b63          	bne	a4,a5,800042be <link_training+0xdc0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:757 (discriminator 1)
800042ac:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800042b0:	439c                	lw	a5,0(a5)
800042b2:	e791                	bnez	a5,800042be <link_training+0xdc0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:758
                    vsw_pe(0x2,0x0);
800042b4:	4581                	li	a1,0
800042b6:	4509                	li	a0,2
800042b8:	195010ef          	jal	ra,80005c4c <vsw_pe>
800042bc:	a845                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:759
                else if (vs==2 && pe==1)
800042be:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800042c2:	4398                	lw	a4,0(a5)
800042c4:	4789                	li	a5,2
800042c6:	00f71d63          	bne	a4,a5,800042e0 <link_training+0xde2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:759 (discriminator 1)
800042ca:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800042ce:	4398                	lw	a4,0(a5)
800042d0:	4785                	li	a5,1
800042d2:	00f71763          	bne	a4,a5,800042e0 <link_training+0xde2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:760
                    vsw_pe(0x2,0x1);
800042d6:	4585                	li	a1,1
800042d8:	4509                	li	a0,2
800042da:	173010ef          	jal	ra,80005c4c <vsw_pe>
800042de:	a079                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:761
                else if (vs==2 && pe==2)
800042e0:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800042e4:	4398                	lw	a4,0(a5)
800042e6:	4789                	li	a5,2
800042e8:	00f71d63          	bne	a4,a5,80004302 <link_training+0xe04>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:761 (discriminator 1)
800042ec:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800042f0:	4398                	lw	a4,0(a5)
800042f2:	4789                	li	a5,2
800042f4:	00f71763          	bne	a4,a5,80004302 <link_training+0xe04>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:762
                    vsw_pe(0x2,0x2);
800042f8:	4589                	li	a1,2
800042fa:	4509                	li	a0,2
800042fc:	151010ef          	jal	ra,80005c4c <vsw_pe>
80004300:	a0b5                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:763
                else if (vs==3 && pe==0)
80004302:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004306:	4398                	lw	a4,0(a5)
80004308:	478d                	li	a5,3
8000430a:	00f71b63          	bne	a4,a5,80004320 <link_training+0xe22>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:763 (discriminator 1)
8000430e:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004312:	439c                	lw	a5,0(a5)
80004314:	e791                	bnez	a5,80004320 <link_training+0xe22>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:764
                    vsw_pe(0x3,0x0);
80004316:	4581                	li	a1,0
80004318:	450d                	li	a0,3
8000431a:	133010ef          	jal	ra,80005c4c <vsw_pe>
8000431e:	a0b9                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:765
                else if (vs==3 && pe==1)
80004320:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004324:	4398                	lw	a4,0(a5)
80004326:	478d                	li	a5,3
80004328:	00f71d63          	bne	a4,a5,80004342 <link_training+0xe44>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:765 (discriminator 1)
8000432c:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004330:	4398                	lw	a4,0(a5)
80004332:	4785                	li	a5,1
80004334:	00f71763          	bne	a4,a5,80004342 <link_training+0xe44>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:766
                    vsw_pe(0x3,0x1);
80004338:	4585                	li	a1,1
8000433a:	450d                	li	a0,3
8000433c:	111010ef          	jal	ra,80005c4c <vsw_pe>
80004340:	a035                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:767
                else if (vs==3 && pe==2)
80004342:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004346:	4398                	lw	a4,0(a5)
80004348:	478d                	li	a5,3
8000434a:	00f71d63          	bne	a4,a5,80004364 <link_training+0xe66>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:767 (discriminator 1)
8000434e:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004352:	4398                	lw	a4,0(a5)
80004354:	4789                	li	a5,2
80004356:	00f71763          	bne	a4,a5,80004364 <link_training+0xe66>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:768
                    vsw_pe(0x3,0x2);
8000435a:	4589                	li	a1,2
8000435c:	450d                	li	a0,3
8000435e:	0ef010ef          	jal	ra,80005c4c <vsw_pe>
80004362:	a029                	j	8000436c <link_training+0xe6e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:770
                    vsw_pe(0x3,0x3);
80004364:	458d                	li	a1,3
80004366:	450d                	li	a0,3
80004368:	0e5010ef          	jal	ra,80005c4c <vsw_pe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:773
        SourceWrBytes[1] = 0x00000000;//TRAINING_LANE0_SET
8000436c:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004370:	0007a223          	sw	zero,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:774
        SourceWrBytes[2] = 0x00000000;
80004374:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004378:	0007a423          	sw	zero,8(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:775
        SourceWrBytes[3] = 0x00000000;
8000437c:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004380:	0007a623          	sw	zero,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:776
        SourceWrBytes[4] = 0x00000000;
80004384:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004388:	0007a823          	sw	zero,16(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:777
        DPSourceTxWrCmd(0x00000102,0x00000001,0x00000005);
8000438c:	4615                	li	a2,5
8000438e:	4585                	li	a1,1
80004390:	10200513          	li	a0,258
80004394:	ce7fe0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80004398:	7780006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:780
    else if(SourceCmdSta == 0x00000024)
8000439c:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
800043a0:	4398                	lw	a4,0(a5)
800043a2:	02400793          	li	a5,36
800043a6:	00f71d63          	bne	a4,a5,800043c0 <link_training+0xec2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:784
        msdelay(10);
800043aa:	4529                	li	a0,10
800043ac:	e8efe0ef          	jal	ra,80002a3a <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:785
        DPSourceTxRdCmd(0x00000202,0x00000001,0x00000006);
800043b0:	4619                	li	a2,6
800043b2:	4585                	li	a1,1
800043b4:	20200513          	li	a0,514
800043b8:	e4bfe0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
800043bc:	7540006f          	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:788
    else if(SourceCmdSta == 0x00000025)
800043c0:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
800043c4:	4398                	lw	a4,0(a5)
800043c6:	02500793          	li	a5,37
800043ca:	3af71763          	bne	a4,a5,80004778 <link_training+0x127a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:791
        SourceWrBytes[0] = 0x00000021;
800043ce:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
800043d2:	02100713          	li	a4,33
800043d6:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:792
        if(reply_data_vs0==0)
800043d8:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
800043dc:	439c                	lw	a5,0(a5)
800043de:	e791                	bnez	a5,800043ea <link_training+0xeec>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:793
           vs = 0;
800043e0:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800043e4:	0007a023          	sw	zero,0(a5)
800043e8:	a089                	j	8000442a <link_training+0xf2c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:794
       else if (reply_data_vs0==0x1)
800043ea:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
800043ee:	4398                	lw	a4,0(a5)
800043f0:	4785                	li	a5,1
800043f2:	00f71763          	bne	a4,a5,80004400 <link_training+0xf02>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:795
           vs = 1;
800043f6:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800043fa:	4705                	li	a4,1
800043fc:	c398                	sw	a4,0(a5)
800043fe:	a035                	j	8000442a <link_training+0xf2c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:796
       else if (reply_data_vs0==0x2)
80004400:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80004404:	4398                	lw	a4,0(a5)
80004406:	4789                	li	a5,2
80004408:	00f71763          	bne	a4,a5,80004416 <link_training+0xf18>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:797
           vs = 2;
8000440c:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004410:	4709                	li	a4,2
80004412:	c398                	sw	a4,0(a5)
80004414:	a819                	j	8000442a <link_training+0xf2c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:798
       else if (reply_data_vs0==0x3)
80004416:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
8000441a:	4398                	lw	a4,0(a5)
8000441c:	478d                	li	a5,3
8000441e:	00f71663          	bne	a4,a5,8000442a <link_training+0xf2c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:799
           vs = 3;
80004422:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004426:	470d                	li	a4,3
80004428:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:801
       if(reply_data_pe0==0)
8000442a:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
8000442e:	439c                	lw	a5,0(a5)
80004430:	e791                	bnez	a5,8000443c <link_training+0xf3e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:802
           pe = 0;
80004432:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004436:	0007a023          	sw	zero,0(a5)
8000443a:	a089                	j	8000447c <link_training+0xf7e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:803
       else if (reply_data_pe0==0x4)
8000443c:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
80004440:	4398                	lw	a4,0(a5)
80004442:	4791                	li	a5,4
80004444:	00f71763          	bne	a4,a5,80004452 <link_training+0xf54>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:804
           pe = 1;
80004448:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
8000444c:	4705                	li	a4,1
8000444e:	c398                	sw	a4,0(a5)
80004450:	a035                	j	8000447c <link_training+0xf7e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:805
       else if (reply_data_pe0==0x8)
80004452:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
80004456:	4398                	lw	a4,0(a5)
80004458:	47a1                	li	a5,8
8000445a:	00f71763          	bne	a4,a5,80004468 <link_training+0xf6a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:806
           pe = 2;
8000445e:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004462:	4709                	li	a4,2
80004464:	c398                	sw	a4,0(a5)
80004466:	a819                	j	8000447c <link_training+0xf7e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:807
       else if (reply_data_pe0==0xc)
80004468:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
8000446c:	4398                	lw	a4,0(a5)
8000446e:	47b1                	li	a5,12
80004470:	00f71663          	bne	a4,a5,8000447c <link_training+0xf7e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:808
           pe = 3;
80004474:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004478:	470d                	li	a4,3
8000447a:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:810
        if(vs==0 && pe==0)
8000447c:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004480:	439c                	lw	a5,0(a5)
80004482:	eb91                	bnez	a5,80004496 <link_training+0xf98>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:810 (discriminator 1)
80004484:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004488:	439c                	lw	a5,0(a5)
8000448a:	e791                	bnez	a5,80004496 <link_training+0xf98>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:811
            vsw_pe(0x0,0x0);
8000448c:	4581                	li	a1,0
8000448e:	4501                	li	a0,0
80004490:	7bc010ef          	jal	ra,80005c4c <vsw_pe>
80004494:	a2b5                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:812
        else if (vs==0 && pe==1)
80004496:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
8000449a:	439c                	lw	a5,0(a5)
8000449c:	ef81                	bnez	a5,800044b4 <link_training+0xfb6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:812 (discriminator 1)
8000449e:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800044a2:	4398                	lw	a4,0(a5)
800044a4:	4785                	li	a5,1
800044a6:	00f71763          	bne	a4,a5,800044b4 <link_training+0xfb6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:813
            vsw_pe(0x0,0x1);
800044aa:	4585                	li	a1,1
800044ac:	4501                	li	a0,0
800044ae:	79e010ef          	jal	ra,80005c4c <vsw_pe>
800044b2:	a2b9                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:814
        else if (vs==0 && pe==2)
800044b4:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800044b8:	439c                	lw	a5,0(a5)
800044ba:	ef81                	bnez	a5,800044d2 <link_training+0xfd4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:814 (discriminator 1)
800044bc:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800044c0:	4398                	lw	a4,0(a5)
800044c2:	4789                	li	a5,2
800044c4:	00f71763          	bne	a4,a5,800044d2 <link_training+0xfd4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:815
            vsw_pe(0x0,0x2);
800044c8:	4589                	li	a1,2
800044ca:	4501                	li	a0,0
800044cc:	780010ef          	jal	ra,80005c4c <vsw_pe>
800044d0:	aa05                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:816
        else if (vs==1 && pe==0)
800044d2:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800044d6:	4398                	lw	a4,0(a5)
800044d8:	4785                	li	a5,1
800044da:	00f71b63          	bne	a4,a5,800044f0 <link_training+0xff2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:816 (discriminator 1)
800044de:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800044e2:	439c                	lw	a5,0(a5)
800044e4:	e791                	bnez	a5,800044f0 <link_training+0xff2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:817
            vsw_pe(0x1,0x0);
800044e6:	4581                	li	a1,0
800044e8:	4505                	li	a0,1
800044ea:	762010ef          	jal	ra,80005c4c <vsw_pe>
800044ee:	aa09                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:818
        else if (vs==1 && pe==1)
800044f0:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800044f4:	4398                	lw	a4,0(a5)
800044f6:	4785                	li	a5,1
800044f8:	00f71d63          	bne	a4,a5,80004512 <link_training+0x1014>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:818 (discriminator 1)
800044fc:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004500:	4398                	lw	a4,0(a5)
80004502:	4785                	li	a5,1
80004504:	00f71763          	bne	a4,a5,80004512 <link_training+0x1014>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:819
            vsw_pe(0x1,0x1);
80004508:	4585                	li	a1,1
8000450a:	4505                	li	a0,1
8000450c:	740010ef          	jal	ra,80005c4c <vsw_pe>
80004510:	a8c5                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:820
        else if (vs==1 && pe==2)
80004512:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004516:	4398                	lw	a4,0(a5)
80004518:	4785                	li	a5,1
8000451a:	00f71d63          	bne	a4,a5,80004534 <link_training+0x1036>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:820 (discriminator 1)
8000451e:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004522:	4398                	lw	a4,0(a5)
80004524:	4789                	li	a5,2
80004526:	00f71763          	bne	a4,a5,80004534 <link_training+0x1036>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:821
            vsw_pe(0x1,0x2);
8000452a:	4589                	li	a1,2
8000452c:	4505                	li	a0,1
8000452e:	71e010ef          	jal	ra,80005c4c <vsw_pe>
80004532:	a0f9                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:822
        else if (vs==2 && pe==0)
80004534:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004538:	4398                	lw	a4,0(a5)
8000453a:	4789                	li	a5,2
8000453c:	00f71b63          	bne	a4,a5,80004552 <link_training+0x1054>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:822 (discriminator 1)
80004540:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004544:	439c                	lw	a5,0(a5)
80004546:	e791                	bnez	a5,80004552 <link_training+0x1054>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:823
            vsw_pe(0x2,0x0);
80004548:	4581                	li	a1,0
8000454a:	4509                	li	a0,2
8000454c:	700010ef          	jal	ra,80005c4c <vsw_pe>
80004550:	a845                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:824
        else if (vs==2 && pe==1)
80004552:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004556:	4398                	lw	a4,0(a5)
80004558:	4789                	li	a5,2
8000455a:	00f71d63          	bne	a4,a5,80004574 <link_training+0x1076>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:824 (discriminator 1)
8000455e:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004562:	4398                	lw	a4,0(a5)
80004564:	4785                	li	a5,1
80004566:	00f71763          	bne	a4,a5,80004574 <link_training+0x1076>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:825
            vsw_pe(0x2,0x1);
8000456a:	4585                	li	a1,1
8000456c:	4509                	li	a0,2
8000456e:	6de010ef          	jal	ra,80005c4c <vsw_pe>
80004572:	a079                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:826
        else if (vs==2 && pe==2)
80004574:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004578:	4398                	lw	a4,0(a5)
8000457a:	4789                	li	a5,2
8000457c:	00f71d63          	bne	a4,a5,80004596 <link_training+0x1098>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:826 (discriminator 1)
80004580:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004584:	4398                	lw	a4,0(a5)
80004586:	4789                	li	a5,2
80004588:	00f71763          	bne	a4,a5,80004596 <link_training+0x1098>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:827
            vsw_pe(0x2,0x2);
8000458c:	4589                	li	a1,2
8000458e:	4509                	li	a0,2
80004590:	6bc010ef          	jal	ra,80005c4c <vsw_pe>
80004594:	a0b5                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:828
        else if (vs==3 && pe==0)
80004596:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
8000459a:	4398                	lw	a4,0(a5)
8000459c:	478d                	li	a5,3
8000459e:	00f71b63          	bne	a4,a5,800045b4 <link_training+0x10b6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:828 (discriminator 1)
800045a2:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800045a6:	439c                	lw	a5,0(a5)
800045a8:	e791                	bnez	a5,800045b4 <link_training+0x10b6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:829
            vsw_pe(0x3,0x0);
800045aa:	4581                	li	a1,0
800045ac:	450d                	li	a0,3
800045ae:	69e010ef          	jal	ra,80005c4c <vsw_pe>
800045b2:	a0b9                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:830
        else if (vs==3 && pe==1)
800045b4:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800045b8:	4398                	lw	a4,0(a5)
800045ba:	478d                	li	a5,3
800045bc:	00f71d63          	bne	a4,a5,800045d6 <link_training+0x10d8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:830 (discriminator 1)
800045c0:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800045c4:	4398                	lw	a4,0(a5)
800045c6:	4785                	li	a5,1
800045c8:	00f71763          	bne	a4,a5,800045d6 <link_training+0x10d8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:831
            vsw_pe(0x3,0x1);
800045cc:	4585                	li	a1,1
800045ce:	450d                	li	a0,3
800045d0:	67c010ef          	jal	ra,80005c4c <vsw_pe>
800045d4:	a035                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:832
        else if (vs==3 && pe==2)
800045d6:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800045da:	4398                	lw	a4,0(a5)
800045dc:	478d                	li	a5,3
800045de:	00f71d63          	bne	a4,a5,800045f8 <link_training+0x10fa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:832 (discriminator 1)
800045e2:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800045e6:	4398                	lw	a4,0(a5)
800045e8:	4789                	li	a5,2
800045ea:	00f71763          	bne	a4,a5,800045f8 <link_training+0x10fa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:833
            vsw_pe(0x3,0x2);
800045ee:	4589                	li	a1,2
800045f0:	450d                	li	a0,3
800045f2:	65a010ef          	jal	ra,80005c4c <vsw_pe>
800045f6:	a029                	j	80004600 <link_training+0x1102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:835
            vsw_pe(0x3,0x3);
800045f8:	458d                	li	a1,3
800045fa:	450d                	li	a0,3
800045fc:	650010ef          	jal	ra,80005c4c <vsw_pe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:837
        if(LANE_NO==4)
80004600:	4418                	lw	a4,8(s0)
80004602:	4791                	li	a5,4
80004604:	0cf71863          	bne	a4,a5,800046d4 <link_training+0x11d6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:839
        if(reply_sw_0==reply_sw_1&&reply_sw_1==reply_sw_2&&reply_sw_2==reply_sw_3&&reply_sw_3==reply_sw_0)
80004608:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
8000460c:	4398                	lw	a4,0(a5)
8000460e:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
80004612:	439c                	lw	a5,0(a5)
80004614:	0af71163          	bne	a4,a5,800046b6 <link_training+0x11b8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:839 (discriminator 1)
80004618:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
8000461c:	4398                	lw	a4,0(a5)
8000461e:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
80004622:	439c                	lw	a5,0(a5)
80004624:	08f71963          	bne	a4,a5,800046b6 <link_training+0x11b8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:839 (discriminator 2)
80004628:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
8000462c:	4398                	lw	a4,0(a5)
8000462e:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
80004632:	439c                	lw	a5,0(a5)
80004634:	08f71163          	bne	a4,a5,800046b6 <link_training+0x11b8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:839 (discriminator 3)
80004638:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
8000463c:	4398                	lw	a4,0(a5)
8000463e:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
80004642:	439c                	lw	a5,0(a5)
80004644:	06f71963          	bne	a4,a5,800046b6 <link_training+0x11b8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:841
            SourceWrBytes[1] = ((reply_pe_0*8)+reply_sw_0);
80004648:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
8000464c:	439c                	lw	a5,0(a5)
8000464e:	00379713          	slli	a4,a5,0x3
80004652:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
80004656:	439c                	lw	a5,0(a5)
80004658:	973e                	add	a4,a4,a5
8000465a:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
8000465e:	c3d8                	sw	a4,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:842
           SourceWrBytes[2] = ((reply_pe_1*8)+reply_sw_1);
80004660:	87818793          	addi	a5,gp,-1928 # 80007528 <reply_pe_1>
80004664:	439c                	lw	a5,0(a5)
80004666:	00379713          	slli	a4,a5,0x3
8000466a:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
8000466e:	439c                	lw	a5,0(a5)
80004670:	973e                	add	a4,a4,a5
80004672:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004676:	c798                	sw	a4,8(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:843
           SourceWrBytes[3] = ((reply_pe_2*8)+reply_sw_2);
80004678:	87c18793          	addi	a5,gp,-1924 # 8000752c <reply_pe_2>
8000467c:	439c                	lw	a5,0(a5)
8000467e:	00379713          	slli	a4,a5,0x3
80004682:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
80004686:	439c                	lw	a5,0(a5)
80004688:	973e                	add	a4,a4,a5
8000468a:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
8000468e:	c7d8                	sw	a4,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:844
           SourceWrBytes[4] = ((reply_pe_3*8)+reply_sw_3);
80004690:	88018793          	addi	a5,gp,-1920 # 80007530 <reply_pe_3>
80004694:	439c                	lw	a5,0(a5)
80004696:	00379713          	slli	a4,a5,0x3
8000469a:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
8000469e:	439c                	lw	a5,0(a5)
800046a0:	973e                	add	a4,a4,a5
800046a2:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
800046a6:	cb98                	sw	a4,16(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:845
           DPSourceTxWrCmd(0x00000102,0x00000001,0x00000005);
800046a8:	4615                	li	a2,5
800046aa:	4585                	li	a1,1
800046ac:	10200513          	li	a0,258
800046b0:	9cbfe0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
800046b4:	a9b1                	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:850
                DPSourceTxRdCmd(0x00000202,0x00000001,0x00000006);
800046b6:	4619                	li	a2,6
800046b8:	4585                	li	a1,1
800046ba:	20200513          	li	a0,514
800046be:	b45fe0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:851
                SourceCmdSta = 0x00000001;
800046c2:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
800046c6:	4705                	li	a4,1
800046c8:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:852
                irq_value = 0x00000008;
800046ca:	94018793          	addi	a5,gp,-1728 # 800075f0 <irq_value>
800046ce:	4721                	li	a4,8
800046d0:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
800046d2:	a93d                	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:857
            if(reply_sw_0==reply_sw_1)
800046d4:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
800046d8:	4398                	lw	a4,0(a5)
800046da:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
800046de:	439c                	lw	a5,0(a5)
800046e0:	06f71963          	bne	a4,a5,80004752 <link_training+0x1254>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:859
                SourceWrBytes[1] = ((reply_pe_0*8)+reply_sw_0);
800046e4:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
800046e8:	439c                	lw	a5,0(a5)
800046ea:	00379713          	slli	a4,a5,0x3
800046ee:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
800046f2:	439c                	lw	a5,0(a5)
800046f4:	973e                	add	a4,a4,a5
800046f6:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
800046fa:	c3d8                	sw	a4,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:860
               SourceWrBytes[2] = ((reply_pe_1*8)+reply_sw_1);
800046fc:	87818793          	addi	a5,gp,-1928 # 80007528 <reply_pe_1>
80004700:	439c                	lw	a5,0(a5)
80004702:	00379713          	slli	a4,a5,0x3
80004706:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
8000470a:	439c                	lw	a5,0(a5)
8000470c:	973e                	add	a4,a4,a5
8000470e:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004712:	c798                	sw	a4,8(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:861
               SourceWrBytes[3] = ((reply_pe_2*8)+reply_sw_2);
80004714:	87c18793          	addi	a5,gp,-1924 # 8000752c <reply_pe_2>
80004718:	439c                	lw	a5,0(a5)
8000471a:	00379713          	slli	a4,a5,0x3
8000471e:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
80004722:	439c                	lw	a5,0(a5)
80004724:	973e                	add	a4,a4,a5
80004726:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
8000472a:	c7d8                	sw	a4,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:862
               SourceWrBytes[4] = ((reply_pe_3*8)+reply_sw_3);
8000472c:	88018793          	addi	a5,gp,-1920 # 80007530 <reply_pe_3>
80004730:	439c                	lw	a5,0(a5)
80004732:	00379713          	slli	a4,a5,0x3
80004736:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
8000473a:	439c                	lw	a5,0(a5)
8000473c:	973e                	add	a4,a4,a5
8000473e:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004742:	cb98                	sw	a4,16(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:863
               DPSourceTxWrCmd(0x00000102,0x00000001,0x00000005);
80004744:	4615                	li	a2,5
80004746:	4585                	li	a1,1
80004748:	10200513          	li	a0,258
8000474c:	92ffe0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80004750:	a6c1                	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:868
                DPSourceTxRdCmd(0x00000202,0x00000001,0x00000006);
80004752:	4619                	li	a2,6
80004754:	4585                	li	a1,1
80004756:	20200513          	li	a0,514
8000475a:	aa9fe0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:869
                if(LANE_NO==4)
8000475e:	4418                	lw	a4,8(s0)
80004760:	4791                	li	a5,4
80004762:	3af71763          	bne	a4,a5,80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:871
                SourceCmdSta = 0x00000001;
80004766:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
8000476a:	4705                	li	a4,1
8000476c:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:872
                irq_value = 0x00000008;
8000476e:	94018793          	addi	a5,gp,-1728 # 800075f0 <irq_value>
80004772:	4721                	li	a4,8
80004774:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80004776:	ae69                	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:878
    else if(SourceCmdSta == 0x00000026)
80004778:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
8000477c:	4398                	lw	a4,0(a5)
8000477e:	02600793          	li	a5,38
80004782:	00f71c63          	bne	a4,a5,8000479a <link_training+0x129c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:883
        msdelay(10);
80004786:	4529                	li	a0,10
80004788:	ab2fe0ef          	jal	ra,80002a3a <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:884
        DPSourceTxRdCmd(0x00000202,0x00000001,0x00000006);
8000478c:	4619                	li	a2,6
8000478e:	4585                	li	a1,1
80004790:	20200513          	li	a0,514
80004794:	a6ffe0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80004798:	aea5                	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:887
    else if(SourceCmdSta == 0x00000028)
8000479a:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
8000479e:	4398                	lw	a4,0(a5)
800047a0:	02800793          	li	a5,40
800047a4:	30f71063          	bne	a4,a5,80004aa4 <link_training+0x15a6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:895
        write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_SCRAMBLER_ENABLE_OFFSET, 0x00000000);
800047a8:	4601                	li	a2,0
800047aa:	45c1                	li	a1,16
800047ac:	71001537          	lui	a0,0x71001
800047b0:	af4fe0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:896
        if(tps3_supported )
800047b4:	84418793          	addi	a5,gp,-1980 # 800074f4 <tps3_supported>
800047b8:	439c                	lw	a5,0(a5)
800047ba:	c795                	beqz	a5,800047e6 <link_training+0x12e8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:898
            write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_TRAINING_PATTERN_MODE_OFFSET, 0x00000003);  //TPS3
800047bc:	460d                	li	a2,3
800047be:	45e1                	li	a1,24
800047c0:	71001537          	lui	a0,0x71001
800047c4:	ae0fe0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:899
            SourceWrBytes[0] = 0x00000023;
800047c8:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
800047cc:	02300713          	li	a4,35
800047d0:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:900
            UART_send(&g_uart,(const uint8_t *)"Sending tps3\n\r",sizeof("sending tps3\n\r"));
800047d2:	463d                	li	a2,15
800047d4:	00003597          	auipc	a1,0x3
800047d8:	cb858593          	addi	a1,a1,-840 # 8000748c <local_irq_handler_table+0x45c>
800047dc:	95818513          	addi	a0,gp,-1704 # 80007608 <g_uart>
800047e0:	e72fc0ef          	jal	ra,80000e52 <UART_send>
800047e4:	a02d                	j	8000480e <link_training+0x1310>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:904
            write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_TRAINING_PATTERN_MODE_OFFSET, 0x00000002);  //TPS2
800047e6:	4609                	li	a2,2
800047e8:	45e1                	li	a1,24
800047ea:	71001537          	lui	a0,0x71001
800047ee:	ab6fe0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:905
            SourceWrBytes[0] = 0x00000022;
800047f2:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
800047f6:	02200713          	li	a4,34
800047fa:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:906
            UART_send(&g_uart,(const uint8_t *)"sending tps2\n\r",sizeof("sending tps2\n\r"));
800047fc:	463d                	li	a2,15
800047fe:	00003597          	auipc	a1,0x3
80004802:	c9e58593          	addi	a1,a1,-866 # 8000749c <local_irq_handler_table+0x46c>
80004806:	95818513          	addi	a0,gp,-1704 # 80007608 <g_uart>
8000480a:	e48fc0ef          	jal	ra,80000e52 <UART_send>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:908
        if(reply_data_vs0==0)
8000480e:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80004812:	439c                	lw	a5,0(a5)
80004814:	e791                	bnez	a5,80004820 <link_training+0x1322>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:909
           vs = 0;
80004816:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
8000481a:	0007a023          	sw	zero,0(a5)
8000481e:	a089                	j	80004860 <link_training+0x1362>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:910
       else if (reply_data_vs0==0x1)
80004820:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80004824:	4398                	lw	a4,0(a5)
80004826:	4785                	li	a5,1
80004828:	00f71763          	bne	a4,a5,80004836 <link_training+0x1338>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:911
           vs = 1;
8000482c:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004830:	4705                	li	a4,1
80004832:	c398                	sw	a4,0(a5)
80004834:	a035                	j	80004860 <link_training+0x1362>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:912
       else if (reply_data_vs0==0x2)
80004836:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
8000483a:	4398                	lw	a4,0(a5)
8000483c:	4789                	li	a5,2
8000483e:	00f71763          	bne	a4,a5,8000484c <link_training+0x134e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:913
           vs = 2;
80004842:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004846:	4709                	li	a4,2
80004848:	c398                	sw	a4,0(a5)
8000484a:	a819                	j	80004860 <link_training+0x1362>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:914
       else if (reply_data_vs0==0x3)
8000484c:	85418793          	addi	a5,gp,-1964 # 80007504 <reply_data_vs0>
80004850:	4398                	lw	a4,0(a5)
80004852:	478d                	li	a5,3
80004854:	00f71663          	bne	a4,a5,80004860 <link_training+0x1362>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:915
           vs = 3;
80004858:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
8000485c:	470d                	li	a4,3
8000485e:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:917
       if(reply_data_pe0==0)
80004860:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
80004864:	439c                	lw	a5,0(a5)
80004866:	e791                	bnez	a5,80004872 <link_training+0x1374>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:918
           pe = 0;
80004868:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
8000486c:	0007a023          	sw	zero,0(a5)
80004870:	a089                	j	800048b2 <link_training+0x13b4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:919
       else if (reply_data_pe0==0x4)
80004872:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
80004876:	4398                	lw	a4,0(a5)
80004878:	4791                	li	a5,4
8000487a:	00f71763          	bne	a4,a5,80004888 <link_training+0x138a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:920
           pe = 1;
8000487e:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004882:	4705                	li	a4,1
80004884:	c398                	sw	a4,0(a5)
80004886:	a035                	j	800048b2 <link_training+0x13b4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:921
       else if (reply_data_pe0==0x8)
80004888:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
8000488c:	4398                	lw	a4,0(a5)
8000488e:	47a1                	li	a5,8
80004890:	00f71763          	bne	a4,a5,8000489e <link_training+0x13a0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:922
           pe = 2;
80004894:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004898:	4709                	li	a4,2
8000489a:	c398                	sw	a4,0(a5)
8000489c:	a819                	j	800048b2 <link_training+0x13b4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:923
       else if (reply_data_pe0==0xc)
8000489e:	86418793          	addi	a5,gp,-1948 # 80007514 <reply_data_pe0>
800048a2:	4398                	lw	a4,0(a5)
800048a4:	47b1                	li	a5,12
800048a6:	00f71663          	bne	a4,a5,800048b2 <link_training+0x13b4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:924
           pe = 3;
800048aa:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800048ae:	470d                	li	a4,3
800048b0:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:926
        if(vs==0 && pe==0)
800048b2:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800048b6:	439c                	lw	a5,0(a5)
800048b8:	eb91                	bnez	a5,800048cc <link_training+0x13ce>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:926 (discriminator 1)
800048ba:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800048be:	439c                	lw	a5,0(a5)
800048c0:	e791                	bnez	a5,800048cc <link_training+0x13ce>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:927
            vsw_pe(0x0,0x0);
800048c2:	4581                	li	a1,0
800048c4:	4501                	li	a0,0
800048c6:	386010ef          	jal	ra,80005c4c <vsw_pe>
800048ca:	a2b5                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:928
        else if (vs==0 && pe==1)
800048cc:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800048d0:	439c                	lw	a5,0(a5)
800048d2:	ef81                	bnez	a5,800048ea <link_training+0x13ec>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:928 (discriminator 1)
800048d4:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800048d8:	4398                	lw	a4,0(a5)
800048da:	4785                	li	a5,1
800048dc:	00f71763          	bne	a4,a5,800048ea <link_training+0x13ec>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:929
            vsw_pe(0x0,0x1);
800048e0:	4585                	li	a1,1
800048e2:	4501                	li	a0,0
800048e4:	368010ef          	jal	ra,80005c4c <vsw_pe>
800048e8:	a2b9                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:930
        else if (vs==0 && pe==2)
800048ea:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800048ee:	439c                	lw	a5,0(a5)
800048f0:	ef81                	bnez	a5,80004908 <link_training+0x140a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:930 (discriminator 1)
800048f2:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800048f6:	4398                	lw	a4,0(a5)
800048f8:	4789                	li	a5,2
800048fa:	00f71763          	bne	a4,a5,80004908 <link_training+0x140a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:931
            vsw_pe(0x0,0x2);
800048fe:	4589                	li	a1,2
80004900:	4501                	li	a0,0
80004902:	34a010ef          	jal	ra,80005c4c <vsw_pe>
80004906:	aa05                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:932
        else if (vs==1 && pe==0)
80004908:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
8000490c:	4398                	lw	a4,0(a5)
8000490e:	4785                	li	a5,1
80004910:	00f71b63          	bne	a4,a5,80004926 <link_training+0x1428>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:932 (discriminator 1)
80004914:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004918:	439c                	lw	a5,0(a5)
8000491a:	e791                	bnez	a5,80004926 <link_training+0x1428>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:933
            vsw_pe(0x1,0x0);
8000491c:	4581                	li	a1,0
8000491e:	4505                	li	a0,1
80004920:	32c010ef          	jal	ra,80005c4c <vsw_pe>
80004924:	aa09                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:934
        else if (vs==1 && pe==1)
80004926:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
8000492a:	4398                	lw	a4,0(a5)
8000492c:	4785                	li	a5,1
8000492e:	00f71d63          	bne	a4,a5,80004948 <link_training+0x144a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:934 (discriminator 1)
80004932:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004936:	4398                	lw	a4,0(a5)
80004938:	4785                	li	a5,1
8000493a:	00f71763          	bne	a4,a5,80004948 <link_training+0x144a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:935
            vsw_pe(0x1,0x1);
8000493e:	4585                	li	a1,1
80004940:	4505                	li	a0,1
80004942:	30a010ef          	jal	ra,80005c4c <vsw_pe>
80004946:	a8c5                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:936
        else if (vs==1 && pe==2)
80004948:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
8000494c:	4398                	lw	a4,0(a5)
8000494e:	4785                	li	a5,1
80004950:	00f71d63          	bne	a4,a5,8000496a <link_training+0x146c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:936 (discriminator 1)
80004954:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004958:	4398                	lw	a4,0(a5)
8000495a:	4789                	li	a5,2
8000495c:	00f71763          	bne	a4,a5,8000496a <link_training+0x146c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:937
            vsw_pe(0x1,0x2);
80004960:	4589                	li	a1,2
80004962:	4505                	li	a0,1
80004964:	2e8010ef          	jal	ra,80005c4c <vsw_pe>
80004968:	a0f9                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:938
        else if (vs==2 && pe==0)
8000496a:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
8000496e:	4398                	lw	a4,0(a5)
80004970:	4789                	li	a5,2
80004972:	00f71b63          	bne	a4,a5,80004988 <link_training+0x148a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:938 (discriminator 1)
80004976:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
8000497a:	439c                	lw	a5,0(a5)
8000497c:	e791                	bnez	a5,80004988 <link_training+0x148a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:939
            vsw_pe(0x2,0x0);
8000497e:	4581                	li	a1,0
80004980:	4509                	li	a0,2
80004982:	2ca010ef          	jal	ra,80005c4c <vsw_pe>
80004986:	a845                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:940
        else if (vs==2 && pe==1)
80004988:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
8000498c:	4398                	lw	a4,0(a5)
8000498e:	4789                	li	a5,2
80004990:	00f71d63          	bne	a4,a5,800049aa <link_training+0x14ac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:940 (discriminator 1)
80004994:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004998:	4398                	lw	a4,0(a5)
8000499a:	4785                	li	a5,1
8000499c:	00f71763          	bne	a4,a5,800049aa <link_training+0x14ac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:941
            vsw_pe(0x2,0x1);
800049a0:	4585                	li	a1,1
800049a2:	4509                	li	a0,2
800049a4:	2a8010ef          	jal	ra,80005c4c <vsw_pe>
800049a8:	a079                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:942
        else if (vs==2 && pe==2)
800049aa:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800049ae:	4398                	lw	a4,0(a5)
800049b0:	4789                	li	a5,2
800049b2:	00f71d63          	bne	a4,a5,800049cc <link_training+0x14ce>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:942 (discriminator 1)
800049b6:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800049ba:	4398                	lw	a4,0(a5)
800049bc:	4789                	li	a5,2
800049be:	00f71763          	bne	a4,a5,800049cc <link_training+0x14ce>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:943
            vsw_pe(0x2,0x2);
800049c2:	4589                	li	a1,2
800049c4:	4509                	li	a0,2
800049c6:	286010ef          	jal	ra,80005c4c <vsw_pe>
800049ca:	a0b5                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:944
        else if (vs==3 && pe==0)
800049cc:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800049d0:	4398                	lw	a4,0(a5)
800049d2:	478d                	li	a5,3
800049d4:	00f71b63          	bne	a4,a5,800049ea <link_training+0x14ec>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:944 (discriminator 1)
800049d8:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800049dc:	439c                	lw	a5,0(a5)
800049de:	e791                	bnez	a5,800049ea <link_training+0x14ec>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:945
            vsw_pe(0x3,0x0);
800049e0:	4581                	li	a1,0
800049e2:	450d                	li	a0,3
800049e4:	268010ef          	jal	ra,80005c4c <vsw_pe>
800049e8:	a0b9                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:946
        else if (vs==3 && pe==1)
800049ea:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
800049ee:	4398                	lw	a4,0(a5)
800049f0:	478d                	li	a5,3
800049f2:	00f71d63          	bne	a4,a5,80004a0c <link_training+0x150e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:946 (discriminator 1)
800049f6:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
800049fa:	4398                	lw	a4,0(a5)
800049fc:	4785                	li	a5,1
800049fe:	00f71763          	bne	a4,a5,80004a0c <link_training+0x150e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:947
            vsw_pe(0x3,0x1);
80004a02:	4585                	li	a1,1
80004a04:	450d                	li	a0,3
80004a06:	246010ef          	jal	ra,80005c4c <vsw_pe>
80004a0a:	a035                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:948
        else if (vs==3 && pe==2)
80004a0c:	89418793          	addi	a5,gp,-1900 # 80007544 <vs>
80004a10:	4398                	lw	a4,0(a5)
80004a12:	478d                	li	a5,3
80004a14:	00f71d63          	bne	a4,a5,80004a2e <link_training+0x1530>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:948 (discriminator 1)
80004a18:	89818793          	addi	a5,gp,-1896 # 80007548 <pe>
80004a1c:	4398                	lw	a4,0(a5)
80004a1e:	4789                	li	a5,2
80004a20:	00f71763          	bne	a4,a5,80004a2e <link_training+0x1530>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:949
            vsw_pe(0x3,0x2);
80004a24:	4589                	li	a1,2
80004a26:	450d                	li	a0,3
80004a28:	224010ef          	jal	ra,80005c4c <vsw_pe>
80004a2c:	a029                	j	80004a36 <link_training+0x1538>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:951
            vsw_pe(0x3,0x3);
80004a2e:	458d                	li	a1,3
80004a30:	450d                	li	a0,3
80004a32:	21a010ef          	jal	ra,80005c4c <vsw_pe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:953
        SourceWrBytes[1]  =  ((reply_pe_0*8)+reply_sw_0);
80004a36:	87418793          	addi	a5,gp,-1932 # 80007524 <reply_pe_0>
80004a3a:	439c                	lw	a5,0(a5)
80004a3c:	00379713          	slli	a4,a5,0x3
80004a40:	88418793          	addi	a5,gp,-1916 # 80007534 <reply_sw_0>
80004a44:	439c                	lw	a5,0(a5)
80004a46:	973e                	add	a4,a4,a5
80004a48:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004a4c:	c3d8                	sw	a4,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:954
        SourceWrBytes[2]  =  ((reply_pe_1*8)+reply_sw_1);
80004a4e:	87818793          	addi	a5,gp,-1928 # 80007528 <reply_pe_1>
80004a52:	439c                	lw	a5,0(a5)
80004a54:	00379713          	slli	a4,a5,0x3
80004a58:	88818793          	addi	a5,gp,-1912 # 80007538 <reply_sw_1>
80004a5c:	439c                	lw	a5,0(a5)
80004a5e:	973e                	add	a4,a4,a5
80004a60:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004a64:	c798                	sw	a4,8(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:955
         SourceWrBytes[3] = ((reply_pe_2*8)+reply_sw_2);
80004a66:	87c18793          	addi	a5,gp,-1924 # 8000752c <reply_pe_2>
80004a6a:	439c                	lw	a5,0(a5)
80004a6c:	00379713          	slli	a4,a5,0x3
80004a70:	88c18793          	addi	a5,gp,-1908 # 8000753c <reply_sw_2>
80004a74:	439c                	lw	a5,0(a5)
80004a76:	973e                	add	a4,a4,a5
80004a78:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004a7c:	c7d8                	sw	a4,12(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:956
        SourceWrBytes[4]  =  ((reply_pe_3*8)+reply_sw_3);
80004a7e:	88018793          	addi	a5,gp,-1920 # 80007530 <reply_pe_3>
80004a82:	439c                	lw	a5,0(a5)
80004a84:	00379713          	slli	a4,a5,0x3
80004a88:	89018793          	addi	a5,gp,-1904 # 80007540 <reply_sw_3>
80004a8c:	439c                	lw	a5,0(a5)
80004a8e:	973e                	add	a4,a4,a5
80004a90:	90018793          	addi	a5,gp,-1792 # 800075b0 <SourceWrBytes>
80004a94:	cb98                	sw	a4,16(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:957
        DPSourceTxWrCmd(0x00000102,0x00000001,0x00000005);
80004a96:	4615                	li	a2,5
80004a98:	4585                	li	a1,1
80004a9a:	10200513          	li	a0,258
80004a9e:	ddcfe0ef          	jal	ra,8000307a <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80004aa2:	a0bd                	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:959
    else if(SourceCmdSta == 0x00000029)
80004aa4:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80004aa8:	4398                	lw	a4,0(a5)
80004aaa:	02900793          	li	a5,41
80004aae:	00f71d63          	bne	a4,a5,80004ac8 <link_training+0x15ca>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:962
        msdelay(100);
80004ab2:	06400513          	li	a0,100
80004ab6:	f85fd0ef          	jal	ra,80002a3a <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:963
        DPSourceTxRdCmd(0x00000202,0x00000001,0x00000006);
80004aba:	4619                	li	a2,6
80004abc:	4585                	li	a1,1
80004abe:	20200513          	li	a0,514
80004ac2:	f40fe0ef          	jal	ra,80003202 <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80004ac6:	a0a9                	j	80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:965
    else if(SourceCmdSta == 0x0000002B)
80004ac8:	83c18793          	addi	a5,gp,-1988 # 800074ec <SourceCmdSta>
80004acc:	4398                	lw	a4,0(a5)
80004ace:	02b00793          	li	a5,43
80004ad2:	02f71f63          	bne	a4,a5,80004b10 <link_training+0x1612>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:968
        msdelay(100);
80004ad6:	06400513          	li	a0,100
80004ada:	f61fd0ef          	jal	ra,80002a3a <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:969
        DPSourceStartVideo(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80004ade:	441c                	lw	a5,8(s0)
80004ae0:	c43e                	sw	a5,8(sp)
80004ae2:	405c                	lw	a5,4(s0)
80004ae4:	c23e                	sw	a5,4(sp)
80004ae6:	401c                	lw	a5,0(s0)
80004ae8:	c03e                	sw	a5,0(sp)
80004aea:	fc042883          	lw	a7,-64(s0)
80004aee:	fc442803          	lw	a6,-60(s0)
80004af2:	fc842783          	lw	a5,-56(s0)
80004af6:	fcc42703          	lw	a4,-52(s0)
80004afa:	fd042683          	lw	a3,-48(s0)
80004afe:	fd442603          	lw	a2,-44(s0)
80004b02:	fd842583          	lw	a1,-40(s0)
80004b06:	fdc42503          	lw	a0,-36(s0)
80004b0a:	ff2fe0ef          	jal	ra,800032fc <DPSourceStartVideo>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:971
}
80004b0e:	a009                	j	80004b10 <link_training+0x1612>
80004b10:	0001                	nop
80004b12:	40b6                	lw	ra,76(sp)
80004b14:	4426                	lw	s0,72(sp)
80004b16:	6161                	addi	sp,sp,80
80004b18:	8082                	ret

80004b1a <update_speed>:
update_speed():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:977



//DRI
void update_speed(uint32_t data )
{
80004b1a:	1101                	addi	sp,sp,-32
80004b1c:	ce06                	sw	ra,28(sp)
80004b1e:	cc22                	sw	s0,24(sp)
80004b20:	1000                	addi	s0,sp,32
80004b22:	fea42623          	sw	a0,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:979

    if (data == 0x01) //2.7G
80004b26:	fec42703          	lw	a4,-20(s0)
80004b2a:	4785                	li	a5,1
80004b2c:	5af71a63          	bne	a4,a5,800050e0 <update_speed+0x5c6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1015
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
# endif
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80004b30:	03300613          	li	a2,51
80004b34:	010817b7          	lui	a5,0x1081
80004b38:	04c78593          	addi	a1,a5,76 # 108104c <STACK_SIZE+0x108084c>
80004b3c:	60000537          	lui	a0,0x60000
80004b40:	f65fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1016
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80004b44:	03300613          	li	a2,51
80004b48:	010827b7          	lui	a5,0x1082
80004b4c:	04c78593          	addi	a1,a5,76 # 108204c <STACK_SIZE+0x108184c>
80004b50:	60000537          	lui	a0,0x60000
80004b54:	f51fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1017
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80004b58:	03300613          	li	a2,51
80004b5c:	010847b7          	lui	a5,0x1084
80004b60:	04c78593          	addi	a1,a5,76 # 108404c <STACK_SIZE+0x108384c>
80004b64:	60000537          	lui	a0,0x60000
80004b68:	f3dfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1018
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80004b6c:	03300613          	li	a2,51
80004b70:	010887b7          	lui	a5,0x1088
80004b74:	04c78593          	addi	a1,a5,76 # 108804c <STACK_SIZE+0x108784c>
80004b78:	60000537          	lui	a0,0x60000
80004b7c:	f29fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1019
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80004b80:	460d                	li	a2,3
80004b82:	010817b7          	lui	a5,0x1081
80004b86:	07878593          	addi	a1,a5,120 # 1081078 <STACK_SIZE+0x1080878>
80004b8a:	60000537          	lui	a0,0x60000
80004b8e:	f17fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1020
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80004b92:	460d                	li	a2,3
80004b94:	010827b7          	lui	a5,0x1082
80004b98:	07878593          	addi	a1,a5,120 # 1082078 <STACK_SIZE+0x1081878>
80004b9c:	60000537          	lui	a0,0x60000
80004ba0:	f05fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1021
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80004ba4:	460d                	li	a2,3
80004ba6:	010847b7          	lui	a5,0x1084
80004baa:	07878593          	addi	a1,a5,120 # 1084078 <STACK_SIZE+0x1083878>
80004bae:	60000537          	lui	a0,0x60000
80004bb2:	ef3fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1022
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80004bb6:	460d                	li	a2,3
80004bb8:	010887b7          	lui	a5,0x1088
80004bbc:	07878593          	addi	a1,a5,120 # 1088078 <STACK_SIZE+0x1087878>
80004bc0:	60000537          	lui	a0,0x60000
80004bc4:	ee1fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1024

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80004bc8:	6785                	lui	a5,0x1
80004bca:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
80004bce:	010817b7          	lui	a5,0x1081
80004bd2:	00878593          	addi	a1,a5,8 # 1081008 <STACK_SIZE+0x1080808>
80004bd6:	60000537          	lui	a0,0x60000
80004bda:	ecbfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1025
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80004bde:	6785                	lui	a5,0x1
80004be0:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
80004be4:	010827b7          	lui	a5,0x1082
80004be8:	00878593          	addi	a1,a5,8 # 1082008 <STACK_SIZE+0x1081808>
80004bec:	60000537          	lui	a0,0x60000
80004bf0:	eb5fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1026
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80004bf4:	6785                	lui	a5,0x1
80004bf6:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
80004bfa:	010847b7          	lui	a5,0x1084
80004bfe:	00878593          	addi	a1,a5,8 # 1084008 <STACK_SIZE+0x1083808>
80004c02:	60000537          	lui	a0,0x60000
80004c06:	e9ffd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1027
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80004c0a:	6785                	lui	a5,0x1
80004c0c:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
80004c10:	010887b7          	lui	a5,0x1088
80004c14:	00878593          	addi	a1,a5,8 # 1088008 <STACK_SIZE+0x1087808>
80004c18:	60000537          	lui	a0,0x60000
80004c1c:	e89fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1029

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80004c20:	4601                	li	a2,0
80004c22:	010817b7          	lui	a5,0x1081
80004c26:	00c78593          	addi	a1,a5,12 # 108100c <STACK_SIZE+0x108080c>
80004c2a:	60000537          	lui	a0,0x60000
80004c2e:	e77fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1030
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80004c32:	4601                	li	a2,0
80004c34:	010827b7          	lui	a5,0x1082
80004c38:	00c78593          	addi	a1,a5,12 # 108200c <STACK_SIZE+0x108180c>
80004c3c:	60000537          	lui	a0,0x60000
80004c40:	e65fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1031
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80004c44:	4601                	li	a2,0
80004c46:	010847b7          	lui	a5,0x1084
80004c4a:	00c78593          	addi	a1,a5,12 # 108400c <STACK_SIZE+0x108380c>
80004c4e:	60000537          	lui	a0,0x60000
80004c52:	e53fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1032
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80004c56:	4601                	li	a2,0
80004c58:	010887b7          	lui	a5,0x1088
80004c5c:	00c78593          	addi	a1,a5,12 # 108800c <STACK_SIZE+0x108780c>
80004c60:	60000537          	lui	a0,0x60000
80004c64:	e41fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1034

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80004c68:	4655                	li	a2,21
80004c6a:	010817b7          	lui	a5,0x1081
80004c6e:	01078593          	addi	a1,a5,16 # 1081010 <STACK_SIZE+0x1080810>
80004c72:	60000537          	lui	a0,0x60000
80004c76:	e2ffd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1035
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80004c7a:	4655                	li	a2,21
80004c7c:	010827b7          	lui	a5,0x1082
80004c80:	01078593          	addi	a1,a5,16 # 1082010 <STACK_SIZE+0x1081810>
80004c84:	60000537          	lui	a0,0x60000
80004c88:	e1dfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1036
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80004c8c:	4655                	li	a2,21
80004c8e:	010847b7          	lui	a5,0x1084
80004c92:	01078593          	addi	a1,a5,16 # 1084010 <STACK_SIZE+0x1083810>
80004c96:	60000537          	lui	a0,0x60000
80004c9a:	e0bfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1037
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80004c9e:	4655                	li	a2,21
80004ca0:	010887b7          	lui	a5,0x1088
80004ca4:	01078593          	addi	a1,a5,16 # 1088010 <STACK_SIZE+0x1087810>
80004ca8:	60000537          	lui	a0,0x60000
80004cac:	df9fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1039

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80004cb0:	4601                	li	a2,0
80004cb2:	010817b7          	lui	a5,0x1081
80004cb6:	01478593          	addi	a1,a5,20 # 1081014 <STACK_SIZE+0x1080814>
80004cba:	60000537          	lui	a0,0x60000
80004cbe:	de7fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1040
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80004cc2:	4601                	li	a2,0
80004cc4:	010827b7          	lui	a5,0x1082
80004cc8:	01478593          	addi	a1,a5,20 # 1082014 <STACK_SIZE+0x1081814>
80004ccc:	60000537          	lui	a0,0x60000
80004cd0:	dd5fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1041
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80004cd4:	4601                	li	a2,0
80004cd6:	010847b7          	lui	a5,0x1084
80004cda:	01478593          	addi	a1,a5,20 # 1084014 <STACK_SIZE+0x1083814>
80004cde:	60000537          	lui	a0,0x60000
80004ce2:	dc3fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1042
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80004ce6:	4601                	li	a2,0
80004ce8:	010887b7          	lui	a5,0x1088
80004cec:	01478593          	addi	a1,a5,20 # 1088014 <STACK_SIZE+0x1087814>
80004cf0:	60000537          	lui	a0,0x60000
80004cf4:	db1fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1044

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80004cf8:	4601                	li	a2,0
80004cfa:	010817b7          	lui	a5,0x1081
80004cfe:	01878593          	addi	a1,a5,24 # 1081018 <STACK_SIZE+0x1080818>
80004d02:	60000537          	lui	a0,0x60000
80004d06:	d9ffd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1045
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80004d0a:	4601                	li	a2,0
80004d0c:	010827b7          	lui	a5,0x1082
80004d10:	01878593          	addi	a1,a5,24 # 1082018 <STACK_SIZE+0x1081818>
80004d14:	60000537          	lui	a0,0x60000
80004d18:	d8dfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1046
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80004d1c:	4601                	li	a2,0
80004d1e:	010847b7          	lui	a5,0x1084
80004d22:	01878593          	addi	a1,a5,24 # 1084018 <STACK_SIZE+0x1083818>
80004d26:	60000537          	lui	a0,0x60000
80004d2a:	d7bfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1047
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80004d2e:	4601                	li	a2,0
80004d30:	010887b7          	lui	a5,0x1088
80004d34:	01878593          	addi	a1,a5,24 # 1088018 <STACK_SIZE+0x1087818>
80004d38:	60000537          	lui	a0,0x60000
80004d3c:	d69fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1049

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80004d40:	4601                	li	a2,0
80004d42:	010817b7          	lui	a5,0x1081
80004d46:	02478593          	addi	a1,a5,36 # 1081024 <STACK_SIZE+0x1080824>
80004d4a:	60000537          	lui	a0,0x60000
80004d4e:	d57fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1050
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80004d52:	4601                	li	a2,0
80004d54:	010827b7          	lui	a5,0x1082
80004d58:	02478593          	addi	a1,a5,36 # 1082024 <STACK_SIZE+0x1081824>
80004d5c:	60000537          	lui	a0,0x60000
80004d60:	d45fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1051
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80004d64:	4601                	li	a2,0
80004d66:	010847b7          	lui	a5,0x1084
80004d6a:	02478593          	addi	a1,a5,36 # 1084024 <STACK_SIZE+0x1083824>
80004d6e:	60000537          	lui	a0,0x60000
80004d72:	d33fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1052
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80004d76:	4601                	li	a2,0
80004d78:	010887b7          	lui	a5,0x1088
80004d7c:	02478593          	addi	a1,a5,36 # 1088024 <STACK_SIZE+0x1087824>
80004d80:	60000537          	lui	a0,0x60000
80004d84:	d21fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1054

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80004d88:	4601                	li	a2,0
80004d8a:	010817b7          	lui	a5,0x1081
80004d8e:	02c78593          	addi	a1,a5,44 # 108102c <STACK_SIZE+0x108082c>
80004d92:	60000537          	lui	a0,0x60000
80004d96:	d0ffd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1055
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80004d9a:	4601                	li	a2,0
80004d9c:	010827b7          	lui	a5,0x1082
80004da0:	02c78593          	addi	a1,a5,44 # 108202c <STACK_SIZE+0x108182c>
80004da4:	60000537          	lui	a0,0x60000
80004da8:	cfdfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1056
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80004dac:	4601                	li	a2,0
80004dae:	010847b7          	lui	a5,0x1084
80004db2:	02c78593          	addi	a1,a5,44 # 108402c <STACK_SIZE+0x108382c>
80004db6:	60000537          	lui	a0,0x60000
80004dba:	cebfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1057
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80004dbe:	4601                	li	a2,0
80004dc0:	010887b7          	lui	a5,0x1088
80004dc4:	02c78593          	addi	a1,a5,44 # 108802c <STACK_SIZE+0x108782c>
80004dc8:	60000537          	lui	a0,0x60000
80004dcc:	cd9fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1059

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80004dd0:	6789                	lui	a5,0x2
80004dd2:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
80004dd6:	010817b7          	lui	a5,0x1081
80004dda:	04078593          	addi	a1,a5,64 # 1081040 <STACK_SIZE+0x1080840>
80004dde:	60000537          	lui	a0,0x60000
80004de2:	cc3fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1060
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80004de6:	6789                	lui	a5,0x2
80004de8:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
80004dec:	010827b7          	lui	a5,0x1082
80004df0:	04078593          	addi	a1,a5,64 # 1082040 <STACK_SIZE+0x1081840>
80004df4:	60000537          	lui	a0,0x60000
80004df8:	cadfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1061
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80004dfc:	6789                	lui	a5,0x2
80004dfe:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
80004e02:	010847b7          	lui	a5,0x1084
80004e06:	04078593          	addi	a1,a5,64 # 1084040 <STACK_SIZE+0x1083840>
80004e0a:	60000537          	lui	a0,0x60000
80004e0e:	c97fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1062
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80004e12:	6789                	lui	a5,0x2
80004e14:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
80004e18:	010887b7          	lui	a5,0x1088
80004e1c:	04078593          	addi	a1,a5,64 # 1088040 <STACK_SIZE+0x1087840>
80004e20:	60000537          	lui	a0,0x60000
80004e24:	c81fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1064

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
80004e28:	07100613          	li	a2,113
80004e2c:	010817b7          	lui	a5,0x1081
80004e30:	07478593          	addi	a1,a5,116 # 1081074 <STACK_SIZE+0x1080874>
80004e34:	60000537          	lui	a0,0x60000
80004e38:	c6dfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1065
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
80004e3c:	07100613          	li	a2,113
80004e40:	010827b7          	lui	a5,0x1082
80004e44:	07478593          	addi	a1,a5,116 # 1082074 <STACK_SIZE+0x1081874>
80004e48:	60000537          	lui	a0,0x60000
80004e4c:	c59fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1066
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
80004e50:	07100613          	li	a2,113
80004e54:	010847b7          	lui	a5,0x1084
80004e58:	07478593          	addi	a1,a5,116 # 1084074 <STACK_SIZE+0x1083874>
80004e5c:	60000537          	lui	a0,0x60000
80004e60:	c45fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1067
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
80004e64:	07100613          	li	a2,113
80004e68:	010887b7          	lui	a5,0x1088
80004e6c:	07478593          	addi	a1,a5,116 # 1088074 <STACK_SIZE+0x1087874>
80004e70:	60000537          	lui	a0,0x60000
80004e74:	c31fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1069

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80004e78:	4601                	li	a2,0
80004e7a:	010817b7          	lui	a5,0x1081
80004e7e:	0c078593          	addi	a1,a5,192 # 10810c0 <STACK_SIZE+0x10808c0>
80004e82:	60000537          	lui	a0,0x60000
80004e86:	c1ffd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1070
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80004e8a:	4601                	li	a2,0
80004e8c:	010827b7          	lui	a5,0x1082
80004e90:	0c078593          	addi	a1,a5,192 # 10820c0 <STACK_SIZE+0x10818c0>
80004e94:	60000537          	lui	a0,0x60000
80004e98:	c0dfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1071
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80004e9c:	4601                	li	a2,0
80004e9e:	010847b7          	lui	a5,0x1084
80004ea2:	0c078593          	addi	a1,a5,192 # 10840c0 <STACK_SIZE+0x10838c0>
80004ea6:	60000537          	lui	a0,0x60000
80004eaa:	bfbfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1072
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80004eae:	4601                	li	a2,0
80004eb0:	010887b7          	lui	a5,0x1088
80004eb4:	0c078593          	addi	a1,a5,192 # 10880c0 <STACK_SIZE+0x10878c0>
80004eb8:	60000537          	lui	a0,0x60000
80004ebc:	be9fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1074

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80004ec0:	641007b7          	lui	a5,0x64100
80004ec4:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
80004ec8:	010817b7          	lui	a5,0x1081
80004ecc:	0d078593          	addi	a1,a5,208 # 10810d0 <STACK_SIZE+0x10808d0>
80004ed0:	60000537          	lui	a0,0x60000
80004ed4:	bd1fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1075
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80004ed8:	641007b7          	lui	a5,0x64100
80004edc:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
80004ee0:	010827b7          	lui	a5,0x1082
80004ee4:	0d078593          	addi	a1,a5,208 # 10820d0 <STACK_SIZE+0x10818d0>
80004ee8:	60000537          	lui	a0,0x60000
80004eec:	bb9fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1076
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80004ef0:	641007b7          	lui	a5,0x64100
80004ef4:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
80004ef8:	010847b7          	lui	a5,0x1084
80004efc:	0d078593          	addi	a1,a5,208 # 10840d0 <STACK_SIZE+0x10838d0>
80004f00:	60000537          	lui	a0,0x60000
80004f04:	ba1fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1077
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80004f08:	641007b7          	lui	a5,0x64100
80004f0c:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
80004f10:	010887b7          	lui	a5,0x1088
80004f14:	0d078593          	addi	a1,a5,208 # 10880d0 <STACK_SIZE+0x10878d0>
80004f18:	60000537          	lui	a0,0x60000
80004f1c:	b89fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1079

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80004f20:	010347b7          	lui	a5,0x1034
80004f24:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
80004f28:	010817b7          	lui	a5,0x1081
80004f2c:	0d478593          	addi	a1,a5,212 # 10810d4 <STACK_SIZE+0x10808d4>
80004f30:	60000537          	lui	a0,0x60000
80004f34:	b71fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1080
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80004f38:	010347b7          	lui	a5,0x1034
80004f3c:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
80004f40:	010827b7          	lui	a5,0x1082
80004f44:	0d478593          	addi	a1,a5,212 # 10820d4 <STACK_SIZE+0x10818d4>
80004f48:	60000537          	lui	a0,0x60000
80004f4c:	b59fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1081
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80004f50:	010347b7          	lui	a5,0x1034
80004f54:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
80004f58:	010847b7          	lui	a5,0x1084
80004f5c:	0d478593          	addi	a1,a5,212 # 10840d4 <STACK_SIZE+0x10838d4>
80004f60:	60000537          	lui	a0,0x60000
80004f64:	b41fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1082
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80004f68:	010347b7          	lui	a5,0x1034
80004f6c:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
80004f70:	010887b7          	lui	a5,0x1088
80004f74:	0d478593          	addi	a1,a5,212 # 10880d4 <STACK_SIZE+0x10878d4>
80004f78:	60000537          	lui	a0,0x60000
80004f7c:	b29fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1084

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80004f80:	00800637          	lui	a2,0x800
80004f84:	010817b7          	lui	a5,0x1081
80004f88:	0d878593          	addi	a1,a5,216 # 10810d8 <STACK_SIZE+0x10808d8>
80004f8c:	60000537          	lui	a0,0x60000
80004f90:	b15fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1085
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80004f94:	00800637          	lui	a2,0x800
80004f98:	010827b7          	lui	a5,0x1082
80004f9c:	0d878593          	addi	a1,a5,216 # 10820d8 <STACK_SIZE+0x10818d8>
80004fa0:	60000537          	lui	a0,0x60000
80004fa4:	b01fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1086
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80004fa8:	00800637          	lui	a2,0x800
80004fac:	010847b7          	lui	a5,0x1084
80004fb0:	0d878593          	addi	a1,a5,216 # 10840d8 <STACK_SIZE+0x10838d8>
80004fb4:	60000537          	lui	a0,0x60000
80004fb8:	aedfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1087
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80004fbc:	00800637          	lui	a2,0x800
80004fc0:	010887b7          	lui	a5,0x1088
80004fc4:	0d878593          	addi	a1,a5,216 # 10880d8 <STACK_SIZE+0x10878d8>
80004fc8:	60000537          	lui	a0,0x60000
80004fcc:	ad9fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1089

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80004fd0:	4601                	li	a2,0
80004fd2:	010817b7          	lui	a5,0x1081
80004fd6:	0dc78593          	addi	a1,a5,220 # 10810dc <STACK_SIZE+0x10808dc>
80004fda:	60000537          	lui	a0,0x60000
80004fde:	ac7fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1090
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80004fe2:	4601                	li	a2,0
80004fe4:	010827b7          	lui	a5,0x1082
80004fe8:	0dc78593          	addi	a1,a5,220 # 10820dc <STACK_SIZE+0x10818dc>
80004fec:	60000537          	lui	a0,0x60000
80004ff0:	ab5fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1091
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80004ff4:	4601                	li	a2,0
80004ff6:	010847b7          	lui	a5,0x1084
80004ffa:	0dc78593          	addi	a1,a5,220 # 10840dc <STACK_SIZE+0x10838dc>
80004ffe:	60000537          	lui	a0,0x60000
80005002:	aa3fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1092
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80005006:	4601                	li	a2,0
80005008:	010887b7          	lui	a5,0x1088
8000500c:	0dc78593          	addi	a1,a5,220 # 10880dc <STACK_SIZE+0x10878dc>
80005010:	60000537          	lui	a0,0x60000
80005014:	a91fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1094

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_1,0x14000C );//TXPLL_DIV_1//IN PMA cmn
80005018:	001407b7          	lui	a5,0x140
8000501c:	00c78613          	addi	a2,a5,12 # 14000c <STACK_SIZE+0x13f80c>
80005020:	010907b7          	lui	a5,0x1090
80005024:	01078593          	addi	a1,a5,16 # 1090010 <STACK_SIZE+0x108f810>
80005028:	60000537          	lui	a0,0x60000
8000502c:	a79fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1095
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_2,0x1000000 );//TXPLL_DIV_2//IN PMA cmn
80005030:	01000637          	lui	a2,0x1000
80005034:	010907b7          	lui	a5,0x1090
80005038:	01478593          	addi	a1,a5,20 # 1090014 <STACK_SIZE+0x108f814>
8000503c:	60000537          	lui	a0,0x60000
80005040:	a65fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1098


        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80005044:	4605                	li	a2,1
80005046:	010817b7          	lui	a5,0x1081
8000504a:	04c78593          	addi	a1,a5,76 # 108104c <STACK_SIZE+0x108084c>
8000504e:	60000537          	lui	a0,0x60000
80005052:	a53fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1099
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80005056:	4605                	li	a2,1
80005058:	010827b7          	lui	a5,0x1082
8000505c:	04c78593          	addi	a1,a5,76 # 108204c <STACK_SIZE+0x108184c>
80005060:	60000537          	lui	a0,0x60000
80005064:	a41fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1100
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80005068:	4605                	li	a2,1
8000506a:	010847b7          	lui	a5,0x1084
8000506e:	04c78593          	addi	a1,a5,76 # 108404c <STACK_SIZE+0x108384c>
80005072:	60000537          	lui	a0,0x60000
80005076:	a2ffd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1101
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
8000507a:	4605                	li	a2,1
8000507c:	010887b7          	lui	a5,0x1088
80005080:	04c78593          	addi	a1,a5,76 # 108804c <STACK_SIZE+0x108784c>
80005084:	60000537          	lui	a0,0x60000
80005088:	a1dfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1102
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
8000508c:	03000613          	li	a2,48
80005090:	010817b7          	lui	a5,0x1081
80005094:	07878593          	addi	a1,a5,120 # 1081078 <STACK_SIZE+0x1080878>
80005098:	60000537          	lui	a0,0x60000
8000509c:	a09fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1103
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
800050a0:	03000613          	li	a2,48
800050a4:	010827b7          	lui	a5,0x1082
800050a8:	07878593          	addi	a1,a5,120 # 1082078 <STACK_SIZE+0x1081878>
800050ac:	60000537          	lui	a0,0x60000
800050b0:	9f5fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1104
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
800050b4:	03000613          	li	a2,48
800050b8:	010847b7          	lui	a5,0x1084
800050bc:	07878593          	addi	a1,a5,120 # 1084078 <STACK_SIZE+0x1083878>
800050c0:	60000537          	lui	a0,0x60000
800050c4:	9e1fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1105
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
800050c8:	03000613          	li	a2,48
800050cc:	010887b7          	lui	a5,0x1088
800050d0:	07878593          	addi	a1,a5,120 # 1088078 <STACK_SIZE+0x1087878>
800050d4:	60000537          	lui	a0,0x60000
800050d8:	9cdfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1296
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
    }

}
800050dc:	3670006f          	j	80005c42 <update_speed+0x1128>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1108
    else if(data == 0x00) //1.62G
800050e0:	fec42783          	lw	a5,-20(s0)
800050e4:	5a079963          	bnez	a5,80005696 <update_speed+0xb7c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1110
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800050e8:	03300613          	li	a2,51
800050ec:	010817b7          	lui	a5,0x1081
800050f0:	04c78593          	addi	a1,a5,76 # 108104c <STACK_SIZE+0x108084c>
800050f4:	60000537          	lui	a0,0x60000
800050f8:	9adfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1111
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800050fc:	03300613          	li	a2,51
80005100:	010827b7          	lui	a5,0x1082
80005104:	04c78593          	addi	a1,a5,76 # 108204c <STACK_SIZE+0x108184c>
80005108:	60000537          	lui	a0,0x60000
8000510c:	999fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1112
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80005110:	03300613          	li	a2,51
80005114:	010847b7          	lui	a5,0x1084
80005118:	04c78593          	addi	a1,a5,76 # 108404c <STACK_SIZE+0x108384c>
8000511c:	60000537          	lui	a0,0x60000
80005120:	985fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1113
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80005124:	03300613          	li	a2,51
80005128:	010887b7          	lui	a5,0x1088
8000512c:	04c78593          	addi	a1,a5,76 # 108804c <STACK_SIZE+0x108784c>
80005130:	60000537          	lui	a0,0x60000
80005134:	971fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1114
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80005138:	460d                	li	a2,3
8000513a:	010817b7          	lui	a5,0x1081
8000513e:	07878593          	addi	a1,a5,120 # 1081078 <STACK_SIZE+0x1080878>
80005142:	60000537          	lui	a0,0x60000
80005146:	95ffd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1115
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
8000514a:	460d                	li	a2,3
8000514c:	010827b7          	lui	a5,0x1082
80005150:	07878593          	addi	a1,a5,120 # 1082078 <STACK_SIZE+0x1081878>
80005154:	60000537          	lui	a0,0x60000
80005158:	94dfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1116
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
8000515c:	460d                	li	a2,3
8000515e:	010847b7          	lui	a5,0x1084
80005162:	07878593          	addi	a1,a5,120 # 1084078 <STACK_SIZE+0x1083878>
80005166:	60000537          	lui	a0,0x60000
8000516a:	93bfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1117
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
8000516e:	460d                	li	a2,3
80005170:	010887b7          	lui	a5,0x1088
80005174:	07878593          	addi	a1,a5,120 # 1088078 <STACK_SIZE+0x1087878>
80005178:	60000537          	lui	a0,0x60000
8000517c:	929fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1119
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80005180:	6785                	lui	a5,0x1
80005182:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
80005186:	010817b7          	lui	a5,0x1081
8000518a:	00878593          	addi	a1,a5,8 # 1081008 <STACK_SIZE+0x1080808>
8000518e:	60000537          	lui	a0,0x60000
80005192:	913fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1120
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80005196:	6785                	lui	a5,0x1
80005198:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
8000519c:	010827b7          	lui	a5,0x1082
800051a0:	00878593          	addi	a1,a5,8 # 1082008 <STACK_SIZE+0x1081808>
800051a4:	60000537          	lui	a0,0x60000
800051a8:	8fdfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1121
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
800051ac:	6785                	lui	a5,0x1
800051ae:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
800051b2:	010847b7          	lui	a5,0x1084
800051b6:	00878593          	addi	a1,a5,8 # 1084008 <STACK_SIZE+0x1083808>
800051ba:	60000537          	lui	a0,0x60000
800051be:	8e7fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1122
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
800051c2:	6785                	lui	a5,0x1
800051c4:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
800051c8:	010887b7          	lui	a5,0x1088
800051cc:	00878593          	addi	a1,a5,8 # 1088008 <STACK_SIZE+0x1087808>
800051d0:	60000537          	lui	a0,0x60000
800051d4:	8d1fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1124
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
800051d8:	4601                	li	a2,0
800051da:	010817b7          	lui	a5,0x1081
800051de:	00c78593          	addi	a1,a5,12 # 108100c <STACK_SIZE+0x108080c>
800051e2:	60000537          	lui	a0,0x60000
800051e6:	8bffd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1125
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
800051ea:	4601                	li	a2,0
800051ec:	010827b7          	lui	a5,0x1082
800051f0:	00c78593          	addi	a1,a5,12 # 108200c <STACK_SIZE+0x108180c>
800051f4:	60000537          	lui	a0,0x60000
800051f8:	8adfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1126
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
800051fc:	4601                	li	a2,0
800051fe:	010847b7          	lui	a5,0x1084
80005202:	00c78593          	addi	a1,a5,12 # 108400c <STACK_SIZE+0x108380c>
80005206:	60000537          	lui	a0,0x60000
8000520a:	89bfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1127
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
8000520e:	4601                	li	a2,0
80005210:	010887b7          	lui	a5,0x1088
80005214:	00c78593          	addi	a1,a5,12 # 108800c <STACK_SIZE+0x108780c>
80005218:	60000537          	lui	a0,0x60000
8000521c:	889fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1129
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80005220:	4655                	li	a2,21
80005222:	010817b7          	lui	a5,0x1081
80005226:	01078593          	addi	a1,a5,16 # 1081010 <STACK_SIZE+0x1080810>
8000522a:	60000537          	lui	a0,0x60000
8000522e:	877fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1130
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80005232:	4655                	li	a2,21
80005234:	010827b7          	lui	a5,0x1082
80005238:	01078593          	addi	a1,a5,16 # 1082010 <STACK_SIZE+0x1081810>
8000523c:	60000537          	lui	a0,0x60000
80005240:	865fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1131
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80005244:	4655                	li	a2,21
80005246:	010847b7          	lui	a5,0x1084
8000524a:	01078593          	addi	a1,a5,16 # 1084010 <STACK_SIZE+0x1083810>
8000524e:	60000537          	lui	a0,0x60000
80005252:	853fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1132
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80005256:	4655                	li	a2,21
80005258:	010887b7          	lui	a5,0x1088
8000525c:	01078593          	addi	a1,a5,16 # 1088010 <STACK_SIZE+0x1087810>
80005260:	60000537          	lui	a0,0x60000
80005264:	841fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1134
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80005268:	4601                	li	a2,0
8000526a:	010817b7          	lui	a5,0x1081
8000526e:	01478593          	addi	a1,a5,20 # 1081014 <STACK_SIZE+0x1080814>
80005272:	60000537          	lui	a0,0x60000
80005276:	82ffd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1135
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
8000527a:	4601                	li	a2,0
8000527c:	010827b7          	lui	a5,0x1082
80005280:	01478593          	addi	a1,a5,20 # 1082014 <STACK_SIZE+0x1081814>
80005284:	60000537          	lui	a0,0x60000
80005288:	81dfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1136
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
8000528c:	4601                	li	a2,0
8000528e:	010847b7          	lui	a5,0x1084
80005292:	01478593          	addi	a1,a5,20 # 1084014 <STACK_SIZE+0x1083814>
80005296:	60000537          	lui	a0,0x60000
8000529a:	80bfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1137
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
8000529e:	4601                	li	a2,0
800052a0:	010887b7          	lui	a5,0x1088
800052a4:	01478593          	addi	a1,a5,20 # 1088014 <STACK_SIZE+0x1087814>
800052a8:	60000537          	lui	a0,0x60000
800052ac:	ff8fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1139
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
800052b0:	4601                	li	a2,0
800052b2:	010817b7          	lui	a5,0x1081
800052b6:	01878593          	addi	a1,a5,24 # 1081018 <STACK_SIZE+0x1080818>
800052ba:	60000537          	lui	a0,0x60000
800052be:	fe6fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1140
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
800052c2:	4601                	li	a2,0
800052c4:	010827b7          	lui	a5,0x1082
800052c8:	01878593          	addi	a1,a5,24 # 1082018 <STACK_SIZE+0x1081818>
800052cc:	60000537          	lui	a0,0x60000
800052d0:	fd4fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1141
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
800052d4:	4601                	li	a2,0
800052d6:	010847b7          	lui	a5,0x1084
800052da:	01878593          	addi	a1,a5,24 # 1084018 <STACK_SIZE+0x1083818>
800052de:	60000537          	lui	a0,0x60000
800052e2:	fc2fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1142
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
800052e6:	4601                	li	a2,0
800052e8:	010887b7          	lui	a5,0x1088
800052ec:	01878593          	addi	a1,a5,24 # 1088018 <STACK_SIZE+0x1087818>
800052f0:	60000537          	lui	a0,0x60000
800052f4:	fb0fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1144
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
800052f8:	4601                	li	a2,0
800052fa:	010817b7          	lui	a5,0x1081
800052fe:	02478593          	addi	a1,a5,36 # 1081024 <STACK_SIZE+0x1080824>
80005302:	60000537          	lui	a0,0x60000
80005306:	f9efd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1145
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
8000530a:	4601                	li	a2,0
8000530c:	010827b7          	lui	a5,0x1082
80005310:	02478593          	addi	a1,a5,36 # 1082024 <STACK_SIZE+0x1081824>
80005314:	60000537          	lui	a0,0x60000
80005318:	f8cfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1146
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
8000531c:	4601                	li	a2,0
8000531e:	010847b7          	lui	a5,0x1084
80005322:	02478593          	addi	a1,a5,36 # 1084024 <STACK_SIZE+0x1083824>
80005326:	60000537          	lui	a0,0x60000
8000532a:	f7afd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1147
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
8000532e:	4601                	li	a2,0
80005330:	010887b7          	lui	a5,0x1088
80005334:	02478593          	addi	a1,a5,36 # 1088024 <STACK_SIZE+0x1087824>
80005338:	60000537          	lui	a0,0x60000
8000533c:	f68fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1149
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80005340:	4601                	li	a2,0
80005342:	010817b7          	lui	a5,0x1081
80005346:	02c78593          	addi	a1,a5,44 # 108102c <STACK_SIZE+0x108082c>
8000534a:	60000537          	lui	a0,0x60000
8000534e:	f56fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1150
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80005352:	4601                	li	a2,0
80005354:	010827b7          	lui	a5,0x1082
80005358:	02c78593          	addi	a1,a5,44 # 108202c <STACK_SIZE+0x108182c>
8000535c:	60000537          	lui	a0,0x60000
80005360:	f44fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1151
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80005364:	4601                	li	a2,0
80005366:	010847b7          	lui	a5,0x1084
8000536a:	02c78593          	addi	a1,a5,44 # 108402c <STACK_SIZE+0x108382c>
8000536e:	60000537          	lui	a0,0x60000
80005372:	f32fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1152
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80005376:	4601                	li	a2,0
80005378:	010887b7          	lui	a5,0x1088
8000537c:	02c78593          	addi	a1,a5,44 # 108802c <STACK_SIZE+0x108782c>
80005380:	60000537          	lui	a0,0x60000
80005384:	f20fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1154
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80005388:	6789                	lui	a5,0x2
8000538a:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
8000538e:	010817b7          	lui	a5,0x1081
80005392:	04078593          	addi	a1,a5,64 # 1081040 <STACK_SIZE+0x1080840>
80005396:	60000537          	lui	a0,0x60000
8000539a:	f0afd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1155
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
8000539e:	6789                	lui	a5,0x2
800053a0:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
800053a4:	010827b7          	lui	a5,0x1082
800053a8:	04078593          	addi	a1,a5,64 # 1082040 <STACK_SIZE+0x1081840>
800053ac:	60000537          	lui	a0,0x60000
800053b0:	ef4fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1156
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
800053b4:	6789                	lui	a5,0x2
800053b6:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
800053ba:	010847b7          	lui	a5,0x1084
800053be:	04078593          	addi	a1,a5,64 # 1084040 <STACK_SIZE+0x1083840>
800053c2:	60000537          	lui	a0,0x60000
800053c6:	edefd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1157
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
800053ca:	6789                	lui	a5,0x2
800053cc:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
800053d0:	010887b7          	lui	a5,0x1088
800053d4:	04078593          	addi	a1,a5,64 # 1088040 <STACK_SIZE+0x1087840>
800053d8:	60000537          	lui	a0,0x60000
800053dc:	ec8fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1159
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
800053e0:	07100613          	li	a2,113
800053e4:	010817b7          	lui	a5,0x1081
800053e8:	07478593          	addi	a1,a5,116 # 1081074 <STACK_SIZE+0x1080874>
800053ec:	60000537          	lui	a0,0x60000
800053f0:	eb4fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1160
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
800053f4:	07100613          	li	a2,113
800053f8:	010827b7          	lui	a5,0x1082
800053fc:	07478593          	addi	a1,a5,116 # 1082074 <STACK_SIZE+0x1081874>
80005400:	60000537          	lui	a0,0x60000
80005404:	ea0fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1161
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
80005408:	07100613          	li	a2,113
8000540c:	010847b7          	lui	a5,0x1084
80005410:	07478593          	addi	a1,a5,116 # 1084074 <STACK_SIZE+0x1083874>
80005414:	60000537          	lui	a0,0x60000
80005418:	e8cfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1162
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
8000541c:	07100613          	li	a2,113
80005420:	010887b7          	lui	a5,0x1088
80005424:	07478593          	addi	a1,a5,116 # 1088074 <STACK_SIZE+0x1087874>
80005428:	60000537          	lui	a0,0x60000
8000542c:	e78fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1164
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80005430:	4601                	li	a2,0
80005432:	010817b7          	lui	a5,0x1081
80005436:	0c078593          	addi	a1,a5,192 # 10810c0 <STACK_SIZE+0x10808c0>
8000543a:	60000537          	lui	a0,0x60000
8000543e:	e66fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1165
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80005442:	4601                	li	a2,0
80005444:	010827b7          	lui	a5,0x1082
80005448:	0c078593          	addi	a1,a5,192 # 10820c0 <STACK_SIZE+0x10818c0>
8000544c:	60000537          	lui	a0,0x60000
80005450:	e54fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1166
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80005454:	4601                	li	a2,0
80005456:	010847b7          	lui	a5,0x1084
8000545a:	0c078593          	addi	a1,a5,192 # 10840c0 <STACK_SIZE+0x10838c0>
8000545e:	60000537          	lui	a0,0x60000
80005462:	e42fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1167
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80005466:	4601                	li	a2,0
80005468:	010887b7          	lui	a5,0x1088
8000546c:	0c078593          	addi	a1,a5,192 # 10880c0 <STACK_SIZE+0x10878c0>
80005470:	60000537          	lui	a0,0x60000
80005474:	e30fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1169
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80005478:	641007b7          	lui	a5,0x64100
8000547c:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
80005480:	010817b7          	lui	a5,0x1081
80005484:	0d078593          	addi	a1,a5,208 # 10810d0 <STACK_SIZE+0x10808d0>
80005488:	60000537          	lui	a0,0x60000
8000548c:	e18fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1170
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80005490:	641007b7          	lui	a5,0x64100
80005494:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
80005498:	010827b7          	lui	a5,0x1082
8000549c:	0d078593          	addi	a1,a5,208 # 10820d0 <STACK_SIZE+0x10818d0>
800054a0:	60000537          	lui	a0,0x60000
800054a4:	e00fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1171
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
800054a8:	641007b7          	lui	a5,0x64100
800054ac:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
800054b0:	010847b7          	lui	a5,0x1084
800054b4:	0d078593          	addi	a1,a5,208 # 10840d0 <STACK_SIZE+0x10838d0>
800054b8:	60000537          	lui	a0,0x60000
800054bc:	de8fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1172
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
800054c0:	641007b7          	lui	a5,0x64100
800054c4:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
800054c8:	010887b7          	lui	a5,0x1088
800054cc:	0d078593          	addi	a1,a5,208 # 10880d0 <STACK_SIZE+0x10878d0>
800054d0:	60000537          	lui	a0,0x60000
800054d4:	dd0fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1174
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
800054d8:	010347b7          	lui	a5,0x1034
800054dc:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
800054e0:	010817b7          	lui	a5,0x1081
800054e4:	0d478593          	addi	a1,a5,212 # 10810d4 <STACK_SIZE+0x10808d4>
800054e8:	60000537          	lui	a0,0x60000
800054ec:	db8fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1175
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
800054f0:	010347b7          	lui	a5,0x1034
800054f4:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
800054f8:	010827b7          	lui	a5,0x1082
800054fc:	0d478593          	addi	a1,a5,212 # 10820d4 <STACK_SIZE+0x10818d4>
80005500:	60000537          	lui	a0,0x60000
80005504:	da0fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1176
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005508:	010347b7          	lui	a5,0x1034
8000550c:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
80005510:	010847b7          	lui	a5,0x1084
80005514:	0d478593          	addi	a1,a5,212 # 10840d4 <STACK_SIZE+0x10838d4>
80005518:	60000537          	lui	a0,0x60000
8000551c:	d88fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1177
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005520:	010347b7          	lui	a5,0x1034
80005524:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
80005528:	010887b7          	lui	a5,0x1088
8000552c:	0d478593          	addi	a1,a5,212 # 10880d4 <STACK_SIZE+0x10878d4>
80005530:	60000537          	lui	a0,0x60000
80005534:	d70fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1179
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005538:	00800637          	lui	a2,0x800
8000553c:	010817b7          	lui	a5,0x1081
80005540:	0d878593          	addi	a1,a5,216 # 10810d8 <STACK_SIZE+0x10808d8>
80005544:	60000537          	lui	a0,0x60000
80005548:	d5cfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1180
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
8000554c:	00800637          	lui	a2,0x800
80005550:	010827b7          	lui	a5,0x1082
80005554:	0d878593          	addi	a1,a5,216 # 10820d8 <STACK_SIZE+0x10818d8>
80005558:	60000537          	lui	a0,0x60000
8000555c:	d48fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1181
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005560:	00800637          	lui	a2,0x800
80005564:	010847b7          	lui	a5,0x1084
80005568:	0d878593          	addi	a1,a5,216 # 10840d8 <STACK_SIZE+0x10838d8>
8000556c:	60000537          	lui	a0,0x60000
80005570:	d34fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1182
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005574:	00800637          	lui	a2,0x800
80005578:	010887b7          	lui	a5,0x1088
8000557c:	0d878593          	addi	a1,a5,216 # 10880d8 <STACK_SIZE+0x10878d8>
80005580:	60000537          	lui	a0,0x60000
80005584:	d20fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1184
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80005588:	4601                	li	a2,0
8000558a:	010817b7          	lui	a5,0x1081
8000558e:	0dc78593          	addi	a1,a5,220 # 10810dc <STACK_SIZE+0x10808dc>
80005592:	60000537          	lui	a0,0x60000
80005596:	d0efd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1185
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
8000559a:	4601                	li	a2,0
8000559c:	010827b7          	lui	a5,0x1082
800055a0:	0dc78593          	addi	a1,a5,220 # 10820dc <STACK_SIZE+0x10818dc>
800055a4:	60000537          	lui	a0,0x60000
800055a8:	cfcfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1186
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
800055ac:	4601                	li	a2,0
800055ae:	010847b7          	lui	a5,0x1084
800055b2:	0dc78593          	addi	a1,a5,220 # 10840dc <STACK_SIZE+0x10838dc>
800055b6:	60000537          	lui	a0,0x60000
800055ba:	ceafd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1187
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
800055be:	4601                	li	a2,0
800055c0:	010887b7          	lui	a5,0x1088
800055c4:	0dc78593          	addi	a1,a5,220 # 10880dc <STACK_SIZE+0x10878dc>
800055c8:	60000537          	lui	a0,0x60000
800055cc:	cd8fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1189
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_1,0x180008 );//TXPLL_DIV_1//IN PMA cmn
800055d0:	001807b7          	lui	a5,0x180
800055d4:	00878613          	addi	a2,a5,8 # 180008 <STACK_SIZE+0x17f808>
800055d8:	010907b7          	lui	a5,0x1090
800055dc:	01078593          	addi	a1,a5,16 # 1090010 <STACK_SIZE+0x108f810>
800055e0:	60000537          	lui	a0,0x60000
800055e4:	cc0fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1190
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_2,0x2000000 );//TXPLL_DIV_2//IN PMA cmn
800055e8:	02000637          	lui	a2,0x2000
800055ec:	010907b7          	lui	a5,0x1090
800055f0:	01478593          	addi	a1,a5,20 # 1090014 <STACK_SIZE+0x108f814>
800055f4:	60000537          	lui	a0,0x60000
800055f8:	cacfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1193
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
800055fc:	4605                	li	a2,1
800055fe:	010817b7          	lui	a5,0x1081
80005602:	04c78593          	addi	a1,a5,76 # 108104c <STACK_SIZE+0x108084c>
80005606:	60000537          	lui	a0,0x60000
8000560a:	c9afd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1194
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
8000560e:	4605                	li	a2,1
80005610:	010827b7          	lui	a5,0x1082
80005614:	04c78593          	addi	a1,a5,76 # 108204c <STACK_SIZE+0x108184c>
80005618:	60000537          	lui	a0,0x60000
8000561c:	c88fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1195
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80005620:	4605                	li	a2,1
80005622:	010847b7          	lui	a5,0x1084
80005626:	04c78593          	addi	a1,a5,76 # 108404c <STACK_SIZE+0x108384c>
8000562a:	60000537          	lui	a0,0x60000
8000562e:	c76fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1196
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80005632:	4605                	li	a2,1
80005634:	010887b7          	lui	a5,0x1088
80005638:	04c78593          	addi	a1,a5,76 # 108804c <STACK_SIZE+0x108784c>
8000563c:	60000537          	lui	a0,0x60000
80005640:	c64fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1197
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80005644:	03000613          	li	a2,48
80005648:	010817b7          	lui	a5,0x1081
8000564c:	07878593          	addi	a1,a5,120 # 1081078 <STACK_SIZE+0x1080878>
80005650:	60000537          	lui	a0,0x60000
80005654:	c50fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1198
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80005658:	03000613          	li	a2,48
8000565c:	010827b7          	lui	a5,0x1082
80005660:	07878593          	addi	a1,a5,120 # 1082078 <STACK_SIZE+0x1081878>
80005664:	60000537          	lui	a0,0x60000
80005668:	c3cfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1199
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
8000566c:	03000613          	li	a2,48
80005670:	010847b7          	lui	a5,0x1084
80005674:	07878593          	addi	a1,a5,120 # 1084078 <STACK_SIZE+0x1083878>
80005678:	60000537          	lui	a0,0x60000
8000567c:	c28fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1200
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80005680:	03000613          	li	a2,48
80005684:	010887b7          	lui	a5,0x1088
80005688:	07878593          	addi	a1,a5,120 # 1088078 <STACK_SIZE+0x1087878>
8000568c:	60000537          	lui	a0,0x60000
80005690:	c14fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1296
}
80005694:	a37d                	j	80005c42 <update_speed+0x1128>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1204
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80005696:	03300613          	li	a2,51
8000569a:	010817b7          	lui	a5,0x1081
8000569e:	04c78593          	addi	a1,a5,76 # 108104c <STACK_SIZE+0x108084c>
800056a2:	60000537          	lui	a0,0x60000
800056a6:	bfefd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1205
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800056aa:	03300613          	li	a2,51
800056ae:	010827b7          	lui	a5,0x1082
800056b2:	04c78593          	addi	a1,a5,76 # 108204c <STACK_SIZE+0x108184c>
800056b6:	60000537          	lui	a0,0x60000
800056ba:	beafd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1206
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800056be:	03300613          	li	a2,51
800056c2:	010847b7          	lui	a5,0x1084
800056c6:	04c78593          	addi	a1,a5,76 # 108404c <STACK_SIZE+0x108384c>
800056ca:	60000537          	lui	a0,0x60000
800056ce:	bd6fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1207
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800056d2:	03300613          	li	a2,51
800056d6:	010887b7          	lui	a5,0x1088
800056da:	04c78593          	addi	a1,a5,76 # 108804c <STACK_SIZE+0x108784c>
800056de:	60000537          	lui	a0,0x60000
800056e2:	bc2fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1208
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
800056e6:	460d                	li	a2,3
800056e8:	010817b7          	lui	a5,0x1081
800056ec:	07878593          	addi	a1,a5,120 # 1081078 <STACK_SIZE+0x1080878>
800056f0:	60000537          	lui	a0,0x60000
800056f4:	bb0fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1209
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
800056f8:	460d                	li	a2,3
800056fa:	010827b7          	lui	a5,0x1082
800056fe:	07878593          	addi	a1,a5,120 # 1082078 <STACK_SIZE+0x1081878>
80005702:	60000537          	lui	a0,0x60000
80005706:	b9efd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1210
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
8000570a:	460d                	li	a2,3
8000570c:	010847b7          	lui	a5,0x1084
80005710:	07878593          	addi	a1,a5,120 # 1084078 <STACK_SIZE+0x1083878>
80005714:	60000537          	lui	a0,0x60000
80005718:	b8cfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1211
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
8000571c:	460d                	li	a2,3
8000571e:	010887b7          	lui	a5,0x1088
80005722:	07878593          	addi	a1,a5,120 # 1088078 <STACK_SIZE+0x1087878>
80005726:	60000537          	lui	a0,0x60000
8000572a:	b7afd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1213
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
8000572e:	6785                	lui	a5,0x1
80005730:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
80005734:	010817b7          	lui	a5,0x1081
80005738:	00878593          	addi	a1,a5,8 # 1081008 <STACK_SIZE+0x1080808>
8000573c:	60000537          	lui	a0,0x60000
80005740:	b64fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1214
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80005744:	6785                	lui	a5,0x1
80005746:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
8000574a:	010827b7          	lui	a5,0x1082
8000574e:	00878593          	addi	a1,a5,8 # 1082008 <STACK_SIZE+0x1081808>
80005752:	60000537          	lui	a0,0x60000
80005756:	b4efd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1215
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
8000575a:	6785                	lui	a5,0x1
8000575c:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
80005760:	010847b7          	lui	a5,0x1084
80005764:	00878593          	addi	a1,a5,8 # 1084008 <STACK_SIZE+0x1083808>
80005768:	60000537          	lui	a0,0x60000
8000576c:	b38fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1216
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80005770:	6785                	lui	a5,0x1
80005772:	f1578613          	addi	a2,a5,-235 # f15 <STACK_SIZE+0x715>
80005776:	010887b7          	lui	a5,0x1088
8000577a:	00878593          	addi	a1,a5,8 # 1088008 <STACK_SIZE+0x1087808>
8000577e:	60000537          	lui	a0,0x60000
80005782:	b22fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1218
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80005786:	4601                	li	a2,0
80005788:	010817b7          	lui	a5,0x1081
8000578c:	00c78593          	addi	a1,a5,12 # 108100c <STACK_SIZE+0x108080c>
80005790:	60000537          	lui	a0,0x60000
80005794:	b10fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1219
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80005798:	4601                	li	a2,0
8000579a:	010827b7          	lui	a5,0x1082
8000579e:	00c78593          	addi	a1,a5,12 # 108200c <STACK_SIZE+0x108180c>
800057a2:	60000537          	lui	a0,0x60000
800057a6:	afefd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1220
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
800057aa:	4601                	li	a2,0
800057ac:	010847b7          	lui	a5,0x1084
800057b0:	00c78593          	addi	a1,a5,12 # 108400c <STACK_SIZE+0x108380c>
800057b4:	60000537          	lui	a0,0x60000
800057b8:	aecfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1221
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
800057bc:	4601                	li	a2,0
800057be:	010887b7          	lui	a5,0x1088
800057c2:	00c78593          	addi	a1,a5,12 # 108800c <STACK_SIZE+0x108780c>
800057c6:	60000537          	lui	a0,0x60000
800057ca:	adafd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1223
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
800057ce:	4655                	li	a2,21
800057d0:	010817b7          	lui	a5,0x1081
800057d4:	01078593          	addi	a1,a5,16 # 1081010 <STACK_SIZE+0x1080810>
800057d8:	60000537          	lui	a0,0x60000
800057dc:	ac8fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1224
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
800057e0:	4655                	li	a2,21
800057e2:	010827b7          	lui	a5,0x1082
800057e6:	01078593          	addi	a1,a5,16 # 1082010 <STACK_SIZE+0x1081810>
800057ea:	60000537          	lui	a0,0x60000
800057ee:	ab6fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1225
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
800057f2:	4655                	li	a2,21
800057f4:	010847b7          	lui	a5,0x1084
800057f8:	01078593          	addi	a1,a5,16 # 1084010 <STACK_SIZE+0x1083810>
800057fc:	60000537          	lui	a0,0x60000
80005800:	aa4fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1226
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80005804:	4655                	li	a2,21
80005806:	010887b7          	lui	a5,0x1088
8000580a:	01078593          	addi	a1,a5,16 # 1088010 <STACK_SIZE+0x1087810>
8000580e:	60000537          	lui	a0,0x60000
80005812:	a92fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1228
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80005816:	4601                	li	a2,0
80005818:	010817b7          	lui	a5,0x1081
8000581c:	01478593          	addi	a1,a5,20 # 1081014 <STACK_SIZE+0x1080814>
80005820:	60000537          	lui	a0,0x60000
80005824:	a80fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1229
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80005828:	4601                	li	a2,0
8000582a:	010827b7          	lui	a5,0x1082
8000582e:	01478593          	addi	a1,a5,20 # 1082014 <STACK_SIZE+0x1081814>
80005832:	60000537          	lui	a0,0x60000
80005836:	a6efd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1230
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
8000583a:	4601                	li	a2,0
8000583c:	010847b7          	lui	a5,0x1084
80005840:	01478593          	addi	a1,a5,20 # 1084014 <STACK_SIZE+0x1083814>
80005844:	60000537          	lui	a0,0x60000
80005848:	a5cfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1231
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
8000584c:	4601                	li	a2,0
8000584e:	010887b7          	lui	a5,0x1088
80005852:	01478593          	addi	a1,a5,20 # 1088014 <STACK_SIZE+0x1087814>
80005856:	60000537          	lui	a0,0x60000
8000585a:	a4afd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1233
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
8000585e:	4601                	li	a2,0
80005860:	010817b7          	lui	a5,0x1081
80005864:	01878593          	addi	a1,a5,24 # 1081018 <STACK_SIZE+0x1080818>
80005868:	60000537          	lui	a0,0x60000
8000586c:	a38fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1234
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80005870:	4601                	li	a2,0
80005872:	010827b7          	lui	a5,0x1082
80005876:	01878593          	addi	a1,a5,24 # 1082018 <STACK_SIZE+0x1081818>
8000587a:	60000537          	lui	a0,0x60000
8000587e:	a26fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1235
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80005882:	4601                	li	a2,0
80005884:	010847b7          	lui	a5,0x1084
80005888:	01878593          	addi	a1,a5,24 # 1084018 <STACK_SIZE+0x1083818>
8000588c:	60000537          	lui	a0,0x60000
80005890:	a14fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1236
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80005894:	4601                	li	a2,0
80005896:	010887b7          	lui	a5,0x1088
8000589a:	01878593          	addi	a1,a5,24 # 1088018 <STACK_SIZE+0x1087818>
8000589e:	60000537          	lui	a0,0x60000
800058a2:	a02fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1238
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
800058a6:	4601                	li	a2,0
800058a8:	010817b7          	lui	a5,0x1081
800058ac:	02478593          	addi	a1,a5,36 # 1081024 <STACK_SIZE+0x1080824>
800058b0:	60000537          	lui	a0,0x60000
800058b4:	9f0fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1239
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
800058b8:	4601                	li	a2,0
800058ba:	010827b7          	lui	a5,0x1082
800058be:	02478593          	addi	a1,a5,36 # 1082024 <STACK_SIZE+0x1081824>
800058c2:	60000537          	lui	a0,0x60000
800058c6:	9defd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1240
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
800058ca:	4601                	li	a2,0
800058cc:	010847b7          	lui	a5,0x1084
800058d0:	02478593          	addi	a1,a5,36 # 1084024 <STACK_SIZE+0x1083824>
800058d4:	60000537          	lui	a0,0x60000
800058d8:	9ccfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1241
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
800058dc:	4601                	li	a2,0
800058de:	010887b7          	lui	a5,0x1088
800058e2:	02478593          	addi	a1,a5,36 # 1088024 <STACK_SIZE+0x1087824>
800058e6:	60000537          	lui	a0,0x60000
800058ea:	9bafd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1243
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
800058ee:	4601                	li	a2,0
800058f0:	010817b7          	lui	a5,0x1081
800058f4:	02c78593          	addi	a1,a5,44 # 108102c <STACK_SIZE+0x108082c>
800058f8:	60000537          	lui	a0,0x60000
800058fc:	9a8fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1244
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80005900:	4601                	li	a2,0
80005902:	010827b7          	lui	a5,0x1082
80005906:	02c78593          	addi	a1,a5,44 # 108202c <STACK_SIZE+0x108182c>
8000590a:	60000537          	lui	a0,0x60000
8000590e:	996fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1245
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80005912:	4601                	li	a2,0
80005914:	010847b7          	lui	a5,0x1084
80005918:	02c78593          	addi	a1,a5,44 # 108402c <STACK_SIZE+0x108382c>
8000591c:	60000537          	lui	a0,0x60000
80005920:	984fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1246
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80005924:	4601                	li	a2,0
80005926:	010887b7          	lui	a5,0x1088
8000592a:	02c78593          	addi	a1,a5,44 # 108802c <STACK_SIZE+0x108782c>
8000592e:	60000537          	lui	a0,0x60000
80005932:	972fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1248
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80005936:	6789                	lui	a5,0x2
80005938:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
8000593c:	010817b7          	lui	a5,0x1081
80005940:	04078593          	addi	a1,a5,64 # 1081040 <STACK_SIZE+0x1080840>
80005944:	60000537          	lui	a0,0x60000
80005948:	95cfd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1249
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
8000594c:	6789                	lui	a5,0x2
8000594e:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
80005952:	010827b7          	lui	a5,0x1082
80005956:	04078593          	addi	a1,a5,64 # 1082040 <STACK_SIZE+0x1081840>
8000595a:	60000537          	lui	a0,0x60000
8000595e:	946fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1250
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80005962:	6789                	lui	a5,0x2
80005964:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
80005968:	010847b7          	lui	a5,0x1084
8000596c:	04078593          	addi	a1,a5,64 # 1084040 <STACK_SIZE+0x1083840>
80005970:	60000537          	lui	a0,0x60000
80005974:	930fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1251
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80005978:	6789                	lui	a5,0x2
8000597a:	21978613          	addi	a2,a5,537 # 2219 <STACK_SIZE+0x1a19>
8000597e:	010887b7          	lui	a5,0x1088
80005982:	04078593          	addi	a1,a5,64 # 1088040 <STACK_SIZE+0x1087840>
80005986:	60000537          	lui	a0,0x60000
8000598a:	91afd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1253
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
8000598e:	07100613          	li	a2,113
80005992:	010817b7          	lui	a5,0x1081
80005996:	07478593          	addi	a1,a5,116 # 1081074 <STACK_SIZE+0x1080874>
8000599a:	60000537          	lui	a0,0x60000
8000599e:	906fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1254
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
800059a2:	07100613          	li	a2,113
800059a6:	010827b7          	lui	a5,0x1082
800059aa:	07478593          	addi	a1,a5,116 # 1082074 <STACK_SIZE+0x1081874>
800059ae:	60000537          	lui	a0,0x60000
800059b2:	8f2fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1255
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
800059b6:	07100613          	li	a2,113
800059ba:	010847b7          	lui	a5,0x1084
800059be:	07478593          	addi	a1,a5,116 # 1084074 <STACK_SIZE+0x1083874>
800059c2:	60000537          	lui	a0,0x60000
800059c6:	8defd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1256
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
800059ca:	07100613          	li	a2,113
800059ce:	010887b7          	lui	a5,0x1088
800059d2:	07478593          	addi	a1,a5,116 # 1088074 <STACK_SIZE+0x1087874>
800059d6:	60000537          	lui	a0,0x60000
800059da:	8cafd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1258
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
800059de:	4601                	li	a2,0
800059e0:	010817b7          	lui	a5,0x1081
800059e4:	0c078593          	addi	a1,a5,192 # 10810c0 <STACK_SIZE+0x10808c0>
800059e8:	60000537          	lui	a0,0x60000
800059ec:	8b8fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1259
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
800059f0:	4601                	li	a2,0
800059f2:	010827b7          	lui	a5,0x1082
800059f6:	0c078593          	addi	a1,a5,192 # 10820c0 <STACK_SIZE+0x10818c0>
800059fa:	60000537          	lui	a0,0x60000
800059fe:	8a6fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1260
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80005a02:	4601                	li	a2,0
80005a04:	010847b7          	lui	a5,0x1084
80005a08:	0c078593          	addi	a1,a5,192 # 10840c0 <STACK_SIZE+0x10838c0>
80005a0c:	60000537          	lui	a0,0x60000
80005a10:	894fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1261
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80005a14:	4601                	li	a2,0
80005a16:	010887b7          	lui	a5,0x1088
80005a1a:	0c078593          	addi	a1,a5,192 # 10880c0 <STACK_SIZE+0x10878c0>
80005a1e:	60000537          	lui	a0,0x60000
80005a22:	882fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1263
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80005a26:	641007b7          	lui	a5,0x64100
80005a2a:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
80005a2e:	010817b7          	lui	a5,0x1081
80005a32:	0d078593          	addi	a1,a5,208 # 10810d0 <STACK_SIZE+0x10808d0>
80005a36:	60000537          	lui	a0,0x60000
80005a3a:	86afd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1264
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80005a3e:	641007b7          	lui	a5,0x64100
80005a42:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
80005a46:	010827b7          	lui	a5,0x1082
80005a4a:	0d078593          	addi	a1,a5,208 # 10820d0 <STACK_SIZE+0x10818d0>
80005a4e:	60000537          	lui	a0,0x60000
80005a52:	852fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1265
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80005a56:	641007b7          	lui	a5,0x64100
80005a5a:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
80005a5e:	010847b7          	lui	a5,0x1084
80005a62:	0d078593          	addi	a1,a5,208 # 10840d0 <STACK_SIZE+0x10838d0>
80005a66:	60000537          	lui	a0,0x60000
80005a6a:	83afd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1266
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80005a6e:	641007b7          	lui	a5,0x64100
80005a72:	70278613          	addi	a2,a5,1794 # 64100702 <STACK_SIZE+0x640fff02>
80005a76:	010887b7          	lui	a5,0x1088
80005a7a:	0d078593          	addi	a1,a5,208 # 10880d0 <STACK_SIZE+0x10878d0>
80005a7e:	60000537          	lui	a0,0x60000
80005a82:	822fd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1268
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005a86:	010347b7          	lui	a5,0x1034
80005a8a:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
80005a8e:	010817b7          	lui	a5,0x1081
80005a92:	0d478593          	addi	a1,a5,212 # 10810d4 <STACK_SIZE+0x10808d4>
80005a96:	60000537          	lui	a0,0x60000
80005a9a:	80afd0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1269
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005a9e:	010347b7          	lui	a5,0x1034
80005aa2:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
80005aa6:	010827b7          	lui	a5,0x1082
80005aaa:	0d478593          	addi	a1,a5,212 # 10820d4 <STACK_SIZE+0x10818d4>
80005aae:	60000537          	lui	a0,0x60000
80005ab2:	ff3fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1270
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005ab6:	010347b7          	lui	a5,0x1034
80005aba:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
80005abe:	010847b7          	lui	a5,0x1084
80005ac2:	0d478593          	addi	a1,a5,212 # 10840d4 <STACK_SIZE+0x10838d4>
80005ac6:	60000537          	lui	a0,0x60000
80005aca:	fdbfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1271
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005ace:	010347b7          	lui	a5,0x1034
80005ad2:	01878613          	addi	a2,a5,24 # 1034018 <STACK_SIZE+0x1033818>
80005ad6:	010887b7          	lui	a5,0x1088
80005ada:	0d478593          	addi	a1,a5,212 # 10880d4 <STACK_SIZE+0x10878d4>
80005ade:	60000537          	lui	a0,0x60000
80005ae2:	fc3fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1273
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005ae6:	00800637          	lui	a2,0x800
80005aea:	010817b7          	lui	a5,0x1081
80005aee:	0d878593          	addi	a1,a5,216 # 10810d8 <STACK_SIZE+0x10808d8>
80005af2:	60000537          	lui	a0,0x60000
80005af6:	faffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1274
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005afa:	00800637          	lui	a2,0x800
80005afe:	010827b7          	lui	a5,0x1082
80005b02:	0d878593          	addi	a1,a5,216 # 10820d8 <STACK_SIZE+0x10818d8>
80005b06:	60000537          	lui	a0,0x60000
80005b0a:	f9bfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1275
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005b0e:	00800637          	lui	a2,0x800
80005b12:	010847b7          	lui	a5,0x1084
80005b16:	0d878593          	addi	a1,a5,216 # 10840d8 <STACK_SIZE+0x10838d8>
80005b1a:	60000537          	lui	a0,0x60000
80005b1e:	f87fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1276
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80005b22:	00800637          	lui	a2,0x800
80005b26:	010887b7          	lui	a5,0x1088
80005b2a:	0d878593          	addi	a1,a5,216 # 10880d8 <STACK_SIZE+0x10878d8>
80005b2e:	60000537          	lui	a0,0x60000
80005b32:	f73fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1278
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80005b36:	4601                	li	a2,0
80005b38:	010817b7          	lui	a5,0x1081
80005b3c:	0dc78593          	addi	a1,a5,220 # 10810dc <STACK_SIZE+0x10808dc>
80005b40:	60000537          	lui	a0,0x60000
80005b44:	f61fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1279
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80005b48:	4601                	li	a2,0
80005b4a:	010827b7          	lui	a5,0x1082
80005b4e:	0dc78593          	addi	a1,a5,220 # 10820dc <STACK_SIZE+0x10818dc>
80005b52:	60000537          	lui	a0,0x60000
80005b56:	f4ffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1280
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80005b5a:	4601                	li	a2,0
80005b5c:	010847b7          	lui	a5,0x1084
80005b60:	0dc78593          	addi	a1,a5,220 # 10840dc <STACK_SIZE+0x10838dc>
80005b64:	60000537          	lui	a0,0x60000
80005b68:	f3dfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1281
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80005b6c:	4601                	li	a2,0
80005b6e:	010887b7          	lui	a5,0x1088
80005b72:	0dc78593          	addi	a1,a5,220 # 10880dc <STACK_SIZE+0x10878dc>
80005b76:	60000537          	lui	a0,0x60000
80005b7a:	f2bfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1283
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_1,0x280016 );//TXPLL_DIV_1//IN PMA cmn
80005b7e:	002807b7          	lui	a5,0x280
80005b82:	01678613          	addi	a2,a5,22 # 280016 <STACK_SIZE+0x27f816>
80005b86:	010907b7          	lui	a5,0x1090
80005b8a:	01078593          	addi	a1,a5,16 # 1090010 <STACK_SIZE+0x108f810>
80005b8e:	60000537          	lui	a0,0x60000
80005b92:	f13fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1284
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_2,0x1000000 );//TXPLL_DIV_2//IN PMA cmn
80005b96:	01000637          	lui	a2,0x1000
80005b9a:	010907b7          	lui	a5,0x1090
80005b9e:	01478593          	addi	a1,a5,20 # 1090014 <STACK_SIZE+0x108f814>
80005ba2:	60000537          	lui	a0,0x60000
80005ba6:	efffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1286
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80005baa:	4605                	li	a2,1
80005bac:	010817b7          	lui	a5,0x1081
80005bb0:	04c78593          	addi	a1,a5,76 # 108104c <STACK_SIZE+0x108084c>
80005bb4:	60000537          	lui	a0,0x60000
80005bb8:	eedfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1287
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80005bbc:	4605                	li	a2,1
80005bbe:	010827b7          	lui	a5,0x1082
80005bc2:	04c78593          	addi	a1,a5,76 # 108204c <STACK_SIZE+0x108184c>
80005bc6:	60000537          	lui	a0,0x60000
80005bca:	edbfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1288
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80005bce:	4605                	li	a2,1
80005bd0:	010847b7          	lui	a5,0x1084
80005bd4:	04c78593          	addi	a1,a5,76 # 108404c <STACK_SIZE+0x108384c>
80005bd8:	60000537          	lui	a0,0x60000
80005bdc:	ec9fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1289
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80005be0:	4605                	li	a2,1
80005be2:	010887b7          	lui	a5,0x1088
80005be6:	04c78593          	addi	a1,a5,76 # 108804c <STACK_SIZE+0x108784c>
80005bea:	60000537          	lui	a0,0x60000
80005bee:	eb7fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1290
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80005bf2:	03000613          	li	a2,48
80005bf6:	010817b7          	lui	a5,0x1081
80005bfa:	07878593          	addi	a1,a5,120 # 1081078 <STACK_SIZE+0x1080878>
80005bfe:	60000537          	lui	a0,0x60000
80005c02:	ea3fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1291
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80005c06:	03000613          	li	a2,48
80005c0a:	010827b7          	lui	a5,0x1082
80005c0e:	07878593          	addi	a1,a5,120 # 1082078 <STACK_SIZE+0x1081878>
80005c12:	60000537          	lui	a0,0x60000
80005c16:	e8ffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1292
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80005c1a:	03000613          	li	a2,48
80005c1e:	010847b7          	lui	a5,0x1084
80005c22:	07878593          	addi	a1,a5,120 # 1084078 <STACK_SIZE+0x1083878>
80005c26:	60000537          	lui	a0,0x60000
80005c2a:	e7bfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1293
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80005c2e:	03000613          	li	a2,48
80005c32:	010887b7          	lui	a5,0x1088
80005c36:	07878593          	addi	a1,a5,120 # 1088078 <STACK_SIZE+0x1087878>
80005c3a:	60000537          	lui	a0,0x60000
80005c3e:	e67fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1296
}
80005c42:	0001                	nop
80005c44:	40f2                	lw	ra,28(sp)
80005c46:	4462                	lw	s0,24(sp)
80005c48:	6105                	addi	sp,sp,32
80005c4a:	8082                	ret

80005c4c <vsw_pe>:
vsw_pe():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1299
//voltage swing and pre emphasis
void vsw_pe(uint32_t sw,uint32_t pe)
{
80005c4c:	1101                	addi	sp,sp,-32
80005c4e:	ce06                	sw	ra,28(sp)
80005c50:	cc22                	sw	s0,24(sp)
80005c52:	1000                	addi	s0,sp,32
80005c54:	fea42623          	sw	a0,-20(s0)
80005c58:	feb42423          	sw	a1,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1300
    write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80005c5c:	03300613          	li	a2,51
80005c60:	010817b7          	lui	a5,0x1081
80005c64:	04c78593          	addi	a1,a5,76 # 108104c <STACK_SIZE+0x108084c>
80005c68:	60000537          	lui	a0,0x60000
80005c6c:	e39fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1301
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80005c70:	03300613          	li	a2,51
80005c74:	010827b7          	lui	a5,0x1082
80005c78:	04c78593          	addi	a1,a5,76 # 108204c <STACK_SIZE+0x108184c>
80005c7c:	60000537          	lui	a0,0x60000
80005c80:	e25fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1302
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80005c84:	03300613          	li	a2,51
80005c88:	010847b7          	lui	a5,0x1084
80005c8c:	04c78593          	addi	a1,a5,76 # 108404c <STACK_SIZE+0x108384c>
80005c90:	60000537          	lui	a0,0x60000
80005c94:	e11fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1303
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80005c98:	03300613          	li	a2,51
80005c9c:	010887b7          	lui	a5,0x1088
80005ca0:	04c78593          	addi	a1,a5,76 # 108804c <STACK_SIZE+0x108784c>
80005ca4:	60000537          	lui	a0,0x60000
80005ca8:	dfdfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1304
           write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80005cac:	460d                	li	a2,3
80005cae:	010817b7          	lui	a5,0x1081
80005cb2:	07878593          	addi	a1,a5,120 # 1081078 <STACK_SIZE+0x1080878>
80005cb6:	60000537          	lui	a0,0x60000
80005cba:	debfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1305
           write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80005cbe:	460d                	li	a2,3
80005cc0:	010827b7          	lui	a5,0x1082
80005cc4:	07878593          	addi	a1,a5,120 # 1082078 <STACK_SIZE+0x1081878>
80005cc8:	60000537          	lui	a0,0x60000
80005ccc:	dd9fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1306
           write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80005cd0:	460d                	li	a2,3
80005cd2:	010847b7          	lui	a5,0x1084
80005cd6:	07878593          	addi	a1,a5,120 # 1084078 <STACK_SIZE+0x1083878>
80005cda:	60000537          	lui	a0,0x60000
80005cde:	dc7fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1307
           write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80005ce2:	460d                	li	a2,3
80005ce4:	010887b7          	lui	a5,0x1088
80005ce8:	07878593          	addi	a1,a5,120 # 1088078 <STACK_SIZE+0x1087878>
80005cec:	60000537          	lui	a0,0x60000
80005cf0:	db5fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1308
    if (sw == 0x00 && pe == 0x00)
80005cf4:	fec42783          	lw	a5,-20(s0)
80005cf8:	0e079c63          	bnez	a5,80005df0 <vsw_pe+0x1a4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1308 (discriminator 1)
80005cfc:	fe842783          	lw	a5,-24(s0)
80005d00:	0e079863          	bnez	a5,80005df0 <vsw_pe+0x1a4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1310
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80005d04:	4601                	li	a2,0
80005d06:	010817b7          	lui	a5,0x1081
80005d0a:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005d0e:	60000537          	lui	a0,0x60000
80005d12:	d93fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1311
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x25);
80005d16:	02500613          	li	a2,37
80005d1a:	010817b7          	lui	a5,0x1081
80005d1e:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005d22:	60000537          	lui	a0,0x60000
80005d26:	d7ffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1312
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80005d2a:	11000637          	lui	a2,0x11000
80005d2e:	010817b7          	lui	a5,0x1081
80005d32:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005d36:	60000537          	lui	a0,0x60000
80005d3a:	d6bfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1313
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80005d3e:	4601                	li	a2,0
80005d40:	010817b7          	lui	a5,0x1081
80005d44:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005d48:	60000537          	lui	a0,0x60000
80005d4c:	d59fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1314
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x25);
80005d50:	02500613          	li	a2,37
80005d54:	010817b7          	lui	a5,0x1081
80005d58:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005d5c:	60000537          	lui	a0,0x60000
80005d60:	d45fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1315
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80005d64:	11000637          	lui	a2,0x11000
80005d68:	010817b7          	lui	a5,0x1081
80005d6c:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005d70:	60000537          	lui	a0,0x60000
80005d74:	d31fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1316
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80005d78:	4601                	li	a2,0
80005d7a:	010817b7          	lui	a5,0x1081
80005d7e:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005d82:	60000537          	lui	a0,0x60000
80005d86:	d1ffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1317
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x25);
80005d8a:	02500613          	li	a2,37
80005d8e:	010817b7          	lui	a5,0x1081
80005d92:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005d96:	60000537          	lui	a0,0x60000
80005d9a:	d0bfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1318
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80005d9e:	11000637          	lui	a2,0x11000
80005da2:	010817b7          	lui	a5,0x1081
80005da6:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005daa:	60000537          	lui	a0,0x60000
80005dae:	cf7fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1319
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80005db2:	4601                	li	a2,0
80005db4:	010817b7          	lui	a5,0x1081
80005db8:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005dbc:	60000537          	lui	a0,0x60000
80005dc0:	ce5fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1320
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x25);
80005dc4:	02500613          	li	a2,37
80005dc8:	010817b7          	lui	a5,0x1081
80005dcc:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005dd0:	60000537          	lui	a0,0x60000
80005dd4:	cd1fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1321
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
80005dd8:	11000637          	lui	a2,0x11000
80005ddc:	010817b7          	lui	a5,0x1081
80005de0:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005de4:	60000537          	lui	a0,0x60000
80005de8:	cbdfc0ef          	jal	ra,80002aa4 <write_dp>
80005dec:	3e70006f          	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1323
    }
    else if(sw == 0x00 && pe == 0x01)
80005df0:	fec42783          	lw	a5,-20(s0)
80005df4:	0e079963          	bnez	a5,80005ee6 <vsw_pe+0x29a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1323 (discriminator 1)
80005df8:	fe842703          	lw	a4,-24(s0)
80005dfc:	4785                	li	a5,1
80005dfe:	0ef71463          	bne	a4,a5,80005ee6 <vsw_pe+0x29a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1325
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80005e02:	4601                	li	a2,0
80005e04:	010817b7          	lui	a5,0x1081
80005e08:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005e0c:	60000537          	lui	a0,0x60000
80005e10:	c95fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1326
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0xd);
80005e14:	4635                	li	a2,13
80005e16:	010817b7          	lui	a5,0x1081
80005e1a:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005e1e:	60000537          	lui	a0,0x60000
80005e22:	c83fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1327
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80005e26:	11000637          	lui	a2,0x11000
80005e2a:	010817b7          	lui	a5,0x1081
80005e2e:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005e32:	60000537          	lui	a0,0x60000
80005e36:	c6ffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1328
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80005e3a:	4601                	li	a2,0
80005e3c:	010817b7          	lui	a5,0x1081
80005e40:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005e44:	60000537          	lui	a0,0x60000
80005e48:	c5dfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1329
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0xd);
80005e4c:	4635                	li	a2,13
80005e4e:	010817b7          	lui	a5,0x1081
80005e52:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005e56:	60000537          	lui	a0,0x60000
80005e5a:	c4bfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1330
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80005e5e:	11000637          	lui	a2,0x11000
80005e62:	010817b7          	lui	a5,0x1081
80005e66:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005e6a:	60000537          	lui	a0,0x60000
80005e6e:	c37fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1331
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80005e72:	4601                	li	a2,0
80005e74:	010817b7          	lui	a5,0x1081
80005e78:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005e7c:	60000537          	lui	a0,0x60000
80005e80:	c25fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1332
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0xd);
80005e84:	4635                	li	a2,13
80005e86:	010817b7          	lui	a5,0x1081
80005e8a:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005e8e:	60000537          	lui	a0,0x60000
80005e92:	c13fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1333
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80005e96:	11000637          	lui	a2,0x11000
80005e9a:	010817b7          	lui	a5,0x1081
80005e9e:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005ea2:	60000537          	lui	a0,0x60000
80005ea6:	bfffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1334
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80005eaa:	4601                	li	a2,0
80005eac:	010817b7          	lui	a5,0x1081
80005eb0:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005eb4:	60000537          	lui	a0,0x60000
80005eb8:	bedfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1335
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0xd);
80005ebc:	4635                	li	a2,13
80005ebe:	010817b7          	lui	a5,0x1081
80005ec2:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005ec6:	60000537          	lui	a0,0x60000
80005eca:	bdbfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1336
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
80005ece:	11000637          	lui	a2,0x11000
80005ed2:	010817b7          	lui	a5,0x1081
80005ed6:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005eda:	60000537          	lui	a0,0x60000
80005ede:	bc7fc0ef          	jal	ra,80002aa4 <write_dp>
80005ee2:	2f10006f          	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1338
    }
    else if (sw == 0x00 && pe == 0x02)
80005ee6:	fec42783          	lw	a5,-20(s0)
80005eea:	0e079d63          	bnez	a5,80005fe4 <vsw_pe+0x398>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1338 (discriminator 1)
80005eee:	fe842703          	lw	a4,-24(s0)
80005ef2:	4789                	li	a5,2
80005ef4:	0ef71863          	bne	a4,a5,80005fe4 <vsw_pe+0x398>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1340
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80005ef8:	4601                	li	a2,0
80005efa:	010817b7          	lui	a5,0x1081
80005efe:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005f02:	60000537          	lui	a0,0x60000
80005f06:	b9ffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1341
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x4d);
80005f0a:	04d00613          	li	a2,77
80005f0e:	010817b7          	lui	a5,0x1081
80005f12:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005f16:	60000537          	lui	a0,0x60000
80005f1a:	b8bfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1342
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80005f1e:	11000637          	lui	a2,0x11000
80005f22:	010817b7          	lui	a5,0x1081
80005f26:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005f2a:	60000537          	lui	a0,0x60000
80005f2e:	b77fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1343
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80005f32:	4601                	li	a2,0
80005f34:	010817b7          	lui	a5,0x1081
80005f38:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005f3c:	60000537          	lui	a0,0x60000
80005f40:	b65fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1344
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x4d);
80005f44:	04d00613          	li	a2,77
80005f48:	010817b7          	lui	a5,0x1081
80005f4c:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005f50:	60000537          	lui	a0,0x60000
80005f54:	b51fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1345
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80005f58:	11000637          	lui	a2,0x11000
80005f5c:	010817b7          	lui	a5,0x1081
80005f60:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005f64:	60000537          	lui	a0,0x60000
80005f68:	b3dfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1346
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80005f6c:	4601                	li	a2,0
80005f6e:	010817b7          	lui	a5,0x1081
80005f72:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005f76:	60000537          	lui	a0,0x60000
80005f7a:	b2bfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1347
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x4d);
80005f7e:	04d00613          	li	a2,77
80005f82:	010817b7          	lui	a5,0x1081
80005f86:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005f8a:	60000537          	lui	a0,0x60000
80005f8e:	b17fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1348
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80005f92:	11000637          	lui	a2,0x11000
80005f96:	010817b7          	lui	a5,0x1081
80005f9a:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005f9e:	60000537          	lui	a0,0x60000
80005fa2:	b03fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1349
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80005fa6:	4601                	li	a2,0
80005fa8:	010817b7          	lui	a5,0x1081
80005fac:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80005fb0:	60000537          	lui	a0,0x60000
80005fb4:	af1fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1350
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x4d);
80005fb8:	04d00613          	li	a2,77
80005fbc:	010817b7          	lui	a5,0x1081
80005fc0:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80005fc4:	60000537          	lui	a0,0x60000
80005fc8:	addfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1351
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
80005fcc:	11000637          	lui	a2,0x11000
80005fd0:	010817b7          	lui	a5,0x1081
80005fd4:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80005fd8:	60000537          	lui	a0,0x60000
80005fdc:	ac9fc0ef          	jal	ra,80002aa4 <write_dp>
80005fe0:	1f30006f          	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1353
    }
    else if (sw == 0x01 && pe == 0x00 )
80005fe4:	fec42703          	lw	a4,-20(s0)
80005fe8:	4785                	li	a5,1
80005fea:	0ef71c63          	bne	a4,a5,800060e2 <vsw_pe+0x496>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1353 (discriminator 1)
80005fee:	fe842783          	lw	a5,-24(s0)
80005ff2:	0e079863          	bnez	a5,800060e2 <vsw_pe+0x496>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1355
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80005ff6:	4601                	li	a2,0
80005ff8:	010817b7          	lui	a5,0x1081
80005ffc:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006000:	60000537          	lui	a0,0x60000
80006004:	aa1fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1356
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x21);
80006008:	02100613          	li	a2,33
8000600c:	010817b7          	lui	a5,0x1081
80006010:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006014:	60000537          	lui	a0,0x60000
80006018:	a8dfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1357
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
8000601c:	11000637          	lui	a2,0x11000
80006020:	010817b7          	lui	a5,0x1081
80006024:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006028:	60000537          	lui	a0,0x60000
8000602c:	a79fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1358
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80006030:	4601                	li	a2,0
80006032:	010817b7          	lui	a5,0x1081
80006036:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000603a:	60000537          	lui	a0,0x60000
8000603e:	a67fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1359
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x21);
80006042:	02100613          	li	a2,33
80006046:	010817b7          	lui	a5,0x1081
8000604a:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000604e:	60000537          	lui	a0,0x60000
80006052:	a53fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1360
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80006056:	11000637          	lui	a2,0x11000
8000605a:	010817b7          	lui	a5,0x1081
8000605e:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006062:	60000537          	lui	a0,0x60000
80006066:	a3ffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1361
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
8000606a:	4601                	li	a2,0
8000606c:	010817b7          	lui	a5,0x1081
80006070:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006074:	60000537          	lui	a0,0x60000
80006078:	a2dfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1362
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x21);
8000607c:	02100613          	li	a2,33
80006080:	010817b7          	lui	a5,0x1081
80006084:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006088:	60000537          	lui	a0,0x60000
8000608c:	a19fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1363
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80006090:	11000637          	lui	a2,0x11000
80006094:	010817b7          	lui	a5,0x1081
80006098:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
8000609c:	60000537          	lui	a0,0x60000
800060a0:	a05fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1364
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
800060a4:	4601                	li	a2,0
800060a6:	010817b7          	lui	a5,0x1081
800060aa:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800060ae:	60000537          	lui	a0,0x60000
800060b2:	9f3fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1365
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x21);
800060b6:	02100613          	li	a2,33
800060ba:	010817b7          	lui	a5,0x1081
800060be:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
800060c2:	60000537          	lui	a0,0x60000
800060c6:	9dffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1366
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
800060ca:	11000637          	lui	a2,0x11000
800060ce:	010817b7          	lui	a5,0x1081
800060d2:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800060d6:	60000537          	lui	a0,0x60000
800060da:	9cbfc0ef          	jal	ra,80002aa4 <write_dp>
800060de:	0f50006f          	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1368
    }
    else if (sw == 0x01 && pe == 0x01 )
800060e2:	fec42703          	lw	a4,-20(s0)
800060e6:	4785                	li	a5,1
800060e8:	0ef71963          	bne	a4,a5,800061da <vsw_pe+0x58e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1368 (discriminator 1)
800060ec:	fe842703          	lw	a4,-24(s0)
800060f0:	4785                	li	a5,1
800060f2:	0ef71463          	bne	a4,a5,800061da <vsw_pe+0x58e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1370
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
800060f6:	4601                	li	a2,0
800060f8:	010817b7          	lui	a5,0x1081
800060fc:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006100:	60000537          	lui	a0,0x60000
80006104:	9a1fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1371
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x9);
80006108:	4625                	li	a2,9
8000610a:	010817b7          	lui	a5,0x1081
8000610e:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006112:	60000537          	lui	a0,0x60000
80006116:	98ffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1372
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
8000611a:	11000637          	lui	a2,0x11000
8000611e:	010817b7          	lui	a5,0x1081
80006122:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006126:	60000537          	lui	a0,0x60000
8000612a:	97bfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1373
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
8000612e:	4601                	li	a2,0
80006130:	010817b7          	lui	a5,0x1081
80006134:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006138:	60000537          	lui	a0,0x60000
8000613c:	969fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1374
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x9);
80006140:	4625                	li	a2,9
80006142:	010817b7          	lui	a5,0x1081
80006146:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000614a:	60000537          	lui	a0,0x60000
8000614e:	957fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1375
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80006152:	11000637          	lui	a2,0x11000
80006156:	010817b7          	lui	a5,0x1081
8000615a:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
8000615e:	60000537          	lui	a0,0x60000
80006162:	943fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1376
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80006166:	4601                	li	a2,0
80006168:	010817b7          	lui	a5,0x1081
8000616c:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006170:	60000537          	lui	a0,0x60000
80006174:	931fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1377
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x9);
80006178:	4625                	li	a2,9
8000617a:	010817b7          	lui	a5,0x1081
8000617e:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006182:	60000537          	lui	a0,0x60000
80006186:	91ffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1378
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
8000618a:	11000637          	lui	a2,0x11000
8000618e:	010817b7          	lui	a5,0x1081
80006192:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006196:	60000537          	lui	a0,0x60000
8000619a:	90bfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1379
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
8000619e:	4601                	li	a2,0
800061a0:	010817b7          	lui	a5,0x1081
800061a4:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800061a8:	60000537          	lui	a0,0x60000
800061ac:	8f9fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1380
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x9);
800061b0:	4625                	li	a2,9
800061b2:	010817b7          	lui	a5,0x1081
800061b6:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
800061ba:	60000537          	lui	a0,0x60000
800061be:	8e7fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1381
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
800061c2:	11000637          	lui	a2,0x11000
800061c6:	010817b7          	lui	a5,0x1081
800061ca:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800061ce:	60000537          	lui	a0,0x60000
800061d2:	8d3fc0ef          	jal	ra,80002aa4 <write_dp>
800061d6:	7fc0006f          	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1383
    }
    else if (sw == 0x01 && pe == 0x02 )
800061da:	fec42703          	lw	a4,-20(s0)
800061de:	4785                	li	a5,1
800061e0:	0ef71d63          	bne	a4,a5,800062da <vsw_pe+0x68e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1383 (discriminator 1)
800061e4:	fe842703          	lw	a4,-24(s0)
800061e8:	4789                	li	a5,2
800061ea:	0ef71863          	bne	a4,a5,800062da <vsw_pe+0x68e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1385
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
800061ee:	4601                	li	a2,0
800061f0:	010817b7          	lui	a5,0x1081
800061f4:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800061f8:	60000537          	lui	a0,0x60000
800061fc:	8a9fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1386
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x49);
80006200:	04900613          	li	a2,73
80006204:	010817b7          	lui	a5,0x1081
80006208:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000620c:	60000537          	lui	a0,0x60000
80006210:	895fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1387
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80006214:	11000637          	lui	a2,0x11000
80006218:	010817b7          	lui	a5,0x1081
8000621c:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006220:	60000537          	lui	a0,0x60000
80006224:	881fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1388
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80006228:	4601                	li	a2,0
8000622a:	010817b7          	lui	a5,0x1081
8000622e:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006232:	60000537          	lui	a0,0x60000
80006236:	86ffc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1389
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x49);
8000623a:	04900613          	li	a2,73
8000623e:	010817b7          	lui	a5,0x1081
80006242:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006246:	60000537          	lui	a0,0x60000
8000624a:	85bfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1390
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
8000624e:	11000637          	lui	a2,0x11000
80006252:	010817b7          	lui	a5,0x1081
80006256:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
8000625a:	60000537          	lui	a0,0x60000
8000625e:	847fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1391
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80006262:	4601                	li	a2,0
80006264:	010817b7          	lui	a5,0x1081
80006268:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000626c:	60000537          	lui	a0,0x60000
80006270:	835fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1392
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x49);
80006274:	04900613          	li	a2,73
80006278:	010817b7          	lui	a5,0x1081
8000627c:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006280:	60000537          	lui	a0,0x60000
80006284:	821fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1393
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80006288:	11000637          	lui	a2,0x11000
8000628c:	010817b7          	lui	a5,0x1081
80006290:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006294:	60000537          	lui	a0,0x60000
80006298:	80dfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1394
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
8000629c:	4601                	li	a2,0
8000629e:	010817b7          	lui	a5,0x1081
800062a2:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800062a6:	60000537          	lui	a0,0x60000
800062aa:	ffafc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1395
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x49);
800062ae:	04900613          	li	a2,73
800062b2:	010817b7          	lui	a5,0x1081
800062b6:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
800062ba:	60000537          	lui	a0,0x60000
800062be:	fe6fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1396
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
800062c2:	11000637          	lui	a2,0x11000
800062c6:	010817b7          	lui	a5,0x1081
800062ca:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800062ce:	60000537          	lui	a0,0x60000
800062d2:	fd2fc0ef          	jal	ra,80002aa4 <write_dp>
800062d6:	6fc0006f          	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1398
    }
    else if (sw == 0x02 && pe == 0x00 )
800062da:	fec42703          	lw	a4,-20(s0)
800062de:	4789                	li	a5,2
800062e0:	10f71763          	bne	a4,a5,800063ee <vsw_pe+0x7a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1398 (discriminator 1)
800062e4:	fe842783          	lw	a5,-24(s0)
800062e8:	10079363          	bnez	a5,800063ee <vsw_pe+0x7a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1400
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0xAAAA);
800062ec:	67ad                	lui	a5,0xb
800062ee:	aaa78613          	addi	a2,a5,-1366 # aaaa <STACK_SIZE+0xa2aa>
800062f2:	010817b7          	lui	a5,0x1081
800062f6:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800062fa:	60000537          	lui	a0,0x60000
800062fe:	fa6fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1401
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x0);
80006302:	4601                	li	a2,0
80006304:	010817b7          	lui	a5,0x1081
80006308:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000630c:	60000537          	lui	a0,0x60000
80006310:	f94fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1402
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x36FFFFEC);
80006314:	370007b7          	lui	a5,0x37000
80006318:	fec78613          	addi	a2,a5,-20 # 36ffffec <STACK_SIZE+0x36fff7ec>
8000631c:	010817b7          	lui	a5,0x1081
80006320:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006324:	60000537          	lui	a0,0x60000
80006328:	f7cfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1403
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0xAAAA);
8000632c:	67ad                	lui	a5,0xb
8000632e:	aaa78613          	addi	a2,a5,-1366 # aaaa <STACK_SIZE+0xa2aa>
80006332:	010817b7          	lui	a5,0x1081
80006336:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000633a:	60000537          	lui	a0,0x60000
8000633e:	f66fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1404
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x0);
80006342:	4601                	li	a2,0
80006344:	010817b7          	lui	a5,0x1081
80006348:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000634c:	60000537          	lui	a0,0x60000
80006350:	f54fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1405
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x36FFFFEC);
80006354:	370007b7          	lui	a5,0x37000
80006358:	fec78613          	addi	a2,a5,-20 # 36ffffec <STACK_SIZE+0x36fff7ec>
8000635c:	010817b7          	lui	a5,0x1081
80006360:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006364:	60000537          	lui	a0,0x60000
80006368:	f3cfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1406
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0xAAAA);
8000636c:	67ad                	lui	a5,0xb
8000636e:	aaa78613          	addi	a2,a5,-1366 # aaaa <STACK_SIZE+0xa2aa>
80006372:	010817b7          	lui	a5,0x1081
80006376:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000637a:	60000537          	lui	a0,0x60000
8000637e:	f26fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1407
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x0);
80006382:	4601                	li	a2,0
80006384:	010817b7          	lui	a5,0x1081
80006388:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000638c:	60000537          	lui	a0,0x60000
80006390:	f14fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1408
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x36FFFFEC);
80006394:	370007b7          	lui	a5,0x37000
80006398:	fec78613          	addi	a2,a5,-20 # 36ffffec <STACK_SIZE+0x36fff7ec>
8000639c:	010817b7          	lui	a5,0x1081
800063a0:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800063a4:	60000537          	lui	a0,0x60000
800063a8:	efcfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1409
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0xAAAA);
800063ac:	67ad                	lui	a5,0xb
800063ae:	aaa78613          	addi	a2,a5,-1366 # aaaa <STACK_SIZE+0xa2aa>
800063b2:	010817b7          	lui	a5,0x1081
800063b6:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800063ba:	60000537          	lui	a0,0x60000
800063be:	ee6fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1410
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x0);
800063c2:	4601                	li	a2,0
800063c4:	010817b7          	lui	a5,0x1081
800063c8:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
800063cc:	60000537          	lui	a0,0x60000
800063d0:	ed4fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1411
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x36FFFFEC);
800063d4:	370007b7          	lui	a5,0x37000
800063d8:	fec78613          	addi	a2,a5,-20 # 36ffffec <STACK_SIZE+0x36fff7ec>
800063dc:	010817b7          	lui	a5,0x1081
800063e0:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800063e4:	60000537          	lui	a0,0x60000
800063e8:	ebcfc0ef          	jal	ra,80002aa4 <write_dp>
800063ec:	a3dd                	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1413
    }
    else if (sw == 0x02 && pe == 0x01 )
800063ee:	fec42703          	lw	a4,-20(s0)
800063f2:	4789                	li	a5,2
800063f4:	0ef71863          	bne	a4,a5,800064e4 <vsw_pe+0x898>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1413 (discriminator 1)
800063f8:	fe842703          	lw	a4,-24(s0)
800063fc:	4785                	li	a5,1
800063fe:	0ef71363          	bne	a4,a5,800064e4 <vsw_pe+0x898>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1415
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80006402:	4601                	li	a2,0
80006404:	010817b7          	lui	a5,0x1081
80006408:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000640c:	60000537          	lui	a0,0x60000
80006410:	e94fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1416
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x5);
80006414:	4615                	li	a2,5
80006416:	010817b7          	lui	a5,0x1081
8000641a:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000641e:	60000537          	lui	a0,0x60000
80006422:	e82fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1417
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80006426:	11000637          	lui	a2,0x11000
8000642a:	010817b7          	lui	a5,0x1081
8000642e:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006432:	60000537          	lui	a0,0x60000
80006436:	e6efc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1418
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
8000643a:	4601                	li	a2,0
8000643c:	010817b7          	lui	a5,0x1081
80006440:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006444:	60000537          	lui	a0,0x60000
80006448:	e5cfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1419
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x5);
8000644c:	4615                	li	a2,5
8000644e:	010817b7          	lui	a5,0x1081
80006452:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006456:	60000537          	lui	a0,0x60000
8000645a:	e4afc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1420
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
8000645e:	11000637          	lui	a2,0x11000
80006462:	010817b7          	lui	a5,0x1081
80006466:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
8000646a:	60000537          	lui	a0,0x60000
8000646e:	e36fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1421
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80006472:	4601                	li	a2,0
80006474:	010817b7          	lui	a5,0x1081
80006478:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000647c:	60000537          	lui	a0,0x60000
80006480:	e24fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1422
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x5);
80006484:	4615                	li	a2,5
80006486:	010817b7          	lui	a5,0x1081
8000648a:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000648e:	60000537          	lui	a0,0x60000
80006492:	e12fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1423
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80006496:	11000637          	lui	a2,0x11000
8000649a:	010817b7          	lui	a5,0x1081
8000649e:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800064a2:	60000537          	lui	a0,0x60000
800064a6:	dfefc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1424
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
800064aa:	4601                	li	a2,0
800064ac:	010817b7          	lui	a5,0x1081
800064b0:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800064b4:	60000537          	lui	a0,0x60000
800064b8:	decfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1425
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x5);
800064bc:	4615                	li	a2,5
800064be:	010817b7          	lui	a5,0x1081
800064c2:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
800064c6:	60000537          	lui	a0,0x60000
800064ca:	ddafc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1426
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
800064ce:	11000637          	lui	a2,0x11000
800064d2:	010817b7          	lui	a5,0x1081
800064d6:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800064da:	60000537          	lui	a0,0x60000
800064de:	dc6fc0ef          	jal	ra,80002aa4 <write_dp>
800064e2:	a9c5                	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1428
    }
    else if (sw == 0x02 && pe == 0x02 )
800064e4:	fec42703          	lw	a4,-20(s0)
800064e8:	4789                	li	a5,2
800064ea:	0ef71c63          	bne	a4,a5,800065e2 <vsw_pe+0x996>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1428 (discriminator 1)
800064ee:	fe842703          	lw	a4,-24(s0)
800064f2:	4789                	li	a5,2
800064f4:	0ef71763          	bne	a4,a5,800065e2 <vsw_pe+0x996>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1430
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
800064f8:	4601                	li	a2,0
800064fa:	010817b7          	lui	a5,0x1081
800064fe:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006502:	60000537          	lui	a0,0x60000
80006506:	d9efc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1431
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x45);
8000650a:	04500613          	li	a2,69
8000650e:	010817b7          	lui	a5,0x1081
80006512:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006516:	60000537          	lui	a0,0x60000
8000651a:	d8afc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1432
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
8000651e:	11000637          	lui	a2,0x11000
80006522:	010817b7          	lui	a5,0x1081
80006526:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
8000652a:	60000537          	lui	a0,0x60000
8000652e:	d76fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1433
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80006532:	4601                	li	a2,0
80006534:	010817b7          	lui	a5,0x1081
80006538:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000653c:	60000537          	lui	a0,0x60000
80006540:	d64fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1434
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x45);
80006544:	04500613          	li	a2,69
80006548:	010817b7          	lui	a5,0x1081
8000654c:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006550:	60000537          	lui	a0,0x60000
80006554:	d50fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1435
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80006558:	11000637          	lui	a2,0x11000
8000655c:	010817b7          	lui	a5,0x1081
80006560:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006564:	60000537          	lui	a0,0x60000
80006568:	d3cfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1436
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
8000656c:	4601                	li	a2,0
8000656e:	010817b7          	lui	a5,0x1081
80006572:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006576:	60000537          	lui	a0,0x60000
8000657a:	d2afc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1437
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x45);
8000657e:	04500613          	li	a2,69
80006582:	010817b7          	lui	a5,0x1081
80006586:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000658a:	60000537          	lui	a0,0x60000
8000658e:	d16fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1438
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80006592:	11000637          	lui	a2,0x11000
80006596:	010817b7          	lui	a5,0x1081
8000659a:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
8000659e:	60000537          	lui	a0,0x60000
800065a2:	d02fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1439
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
800065a6:	4601                	li	a2,0
800065a8:	010817b7          	lui	a5,0x1081
800065ac:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800065b0:	60000537          	lui	a0,0x60000
800065b4:	cf0fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1440
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x45);
800065b8:	04500613          	li	a2,69
800065bc:	010817b7          	lui	a5,0x1081
800065c0:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
800065c4:	60000537          	lui	a0,0x60000
800065c8:	cdcfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1441
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
800065cc:	11000637          	lui	a2,0x11000
800065d0:	010817b7          	lui	a5,0x1081
800065d4:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800065d8:	60000537          	lui	a0,0x60000
800065dc:	cc8fc0ef          	jal	ra,80002aa4 <write_dp>
800065e0:	aecd                	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1443
    }
    else if (sw == 0x03 && pe == 0x00 )
800065e2:	fec42703          	lw	a4,-20(s0)
800065e6:	478d                	li	a5,3
800065e8:	10f71763          	bne	a4,a5,800066f6 <vsw_pe+0xaaa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1443 (discriminator 1)
800065ec:	fe842783          	lw	a5,-24(s0)
800065f0:	10079363          	bnez	a5,800066f6 <vsw_pe+0xaaa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1445
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0xAAAA);
800065f4:	67ad                	lui	a5,0xb
800065f6:	aaa78613          	addi	a2,a5,-1366 # aaaa <STACK_SIZE+0xa2aa>
800065fa:	010817b7          	lui	a5,0x1081
800065fe:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006602:	60000537          	lui	a0,0x60000
80006606:	c9efc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1446
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x0);
8000660a:	4601                	li	a2,0
8000660c:	010817b7          	lui	a5,0x1081
80006610:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006614:	60000537          	lui	a0,0x60000
80006618:	c8cfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1447
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x56FFFFED);
8000661c:	570007b7          	lui	a5,0x57000
80006620:	fed78613          	addi	a2,a5,-19 # 56ffffed <STACK_SIZE+0x56fff7ed>
80006624:	010817b7          	lui	a5,0x1081
80006628:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
8000662c:	60000537          	lui	a0,0x60000
80006630:	c74fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1448
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0xAAAA);
80006634:	67ad                	lui	a5,0xb
80006636:	aaa78613          	addi	a2,a5,-1366 # aaaa <STACK_SIZE+0xa2aa>
8000663a:	010817b7          	lui	a5,0x1081
8000663e:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006642:	60000537          	lui	a0,0x60000
80006646:	c5efc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1449
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x0);
8000664a:	4601                	li	a2,0
8000664c:	010817b7          	lui	a5,0x1081
80006650:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006654:	60000537          	lui	a0,0x60000
80006658:	c4cfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1450
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x56FFFFED);
8000665c:	570007b7          	lui	a5,0x57000
80006660:	fed78613          	addi	a2,a5,-19 # 56ffffed <STACK_SIZE+0x56fff7ed>
80006664:	010817b7          	lui	a5,0x1081
80006668:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
8000666c:	60000537          	lui	a0,0x60000
80006670:	c34fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1451
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0xAAAA);
80006674:	67ad                	lui	a5,0xb
80006676:	aaa78613          	addi	a2,a5,-1366 # aaaa <STACK_SIZE+0xa2aa>
8000667a:	010817b7          	lui	a5,0x1081
8000667e:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006682:	60000537          	lui	a0,0x60000
80006686:	c1efc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1452
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x0);
8000668a:	4601                	li	a2,0
8000668c:	010817b7          	lui	a5,0x1081
80006690:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006694:	60000537          	lui	a0,0x60000
80006698:	c0cfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1453
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x56FFFFED);
8000669c:	570007b7          	lui	a5,0x57000
800066a0:	fed78613          	addi	a2,a5,-19 # 56ffffed <STACK_SIZE+0x56fff7ed>
800066a4:	010817b7          	lui	a5,0x1081
800066a8:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800066ac:	60000537          	lui	a0,0x60000
800066b0:	bf4fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1454
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0xAAAA);
800066b4:	67ad                	lui	a5,0xb
800066b6:	aaa78613          	addi	a2,a5,-1366 # aaaa <STACK_SIZE+0xa2aa>
800066ba:	010817b7          	lui	a5,0x1081
800066be:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800066c2:	60000537          	lui	a0,0x60000
800066c6:	bdefc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1455
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x0);
800066ca:	4601                	li	a2,0
800066cc:	010817b7          	lui	a5,0x1081
800066d0:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
800066d4:	60000537          	lui	a0,0x60000
800066d8:	bccfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1456
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x56FFFFED);
800066dc:	570007b7          	lui	a5,0x57000
800066e0:	fed78613          	addi	a2,a5,-19 # 56ffffed <STACK_SIZE+0x56fff7ed>
800066e4:	010817b7          	lui	a5,0x1081
800066e8:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800066ec:	60000537          	lui	a0,0x60000
800066f0:	bb4fc0ef          	jal	ra,80002aa4 <write_dp>
800066f4:	acf9                	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1458
    }
    else if (sw == 0x03 && pe == 0x01 )
800066f6:	fec42703          	lw	a4,-20(s0)
800066fa:	478d                	li	a5,3
800066fc:	0ef71863          	bne	a4,a5,800067ec <vsw_pe+0xba0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1458 (discriminator 1)
80006700:	fe842703          	lw	a4,-24(s0)
80006704:	4785                	li	a5,1
80006706:	0ef71363          	bne	a4,a5,800067ec <vsw_pe+0xba0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1460
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
8000670a:	4601                	li	a2,0
8000670c:	010817b7          	lui	a5,0x1081
80006710:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006714:	60000537          	lui	a0,0x60000
80006718:	b8cfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1461
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x1);
8000671c:	4605                	li	a2,1
8000671e:	010817b7          	lui	a5,0x1081
80006722:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006726:	60000537          	lui	a0,0x60000
8000672a:	b7afc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1462
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
8000672e:	11000637          	lui	a2,0x11000
80006732:	010817b7          	lui	a5,0x1081
80006736:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
8000673a:	60000537          	lui	a0,0x60000
8000673e:	b66fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1463
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80006742:	4601                	li	a2,0
80006744:	010817b7          	lui	a5,0x1081
80006748:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000674c:	60000537          	lui	a0,0x60000
80006750:	b54fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1464
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x1);
80006754:	4605                	li	a2,1
80006756:	010817b7          	lui	a5,0x1081
8000675a:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000675e:	60000537          	lui	a0,0x60000
80006762:	b42fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1465
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80006766:	11000637          	lui	a2,0x11000
8000676a:	010817b7          	lui	a5,0x1081
8000676e:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006772:	60000537          	lui	a0,0x60000
80006776:	b2efc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1466
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
8000677a:	4601                	li	a2,0
8000677c:	010817b7          	lui	a5,0x1081
80006780:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006784:	60000537          	lui	a0,0x60000
80006788:	b1cfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1467
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x1);
8000678c:	4605                	li	a2,1
8000678e:	010817b7          	lui	a5,0x1081
80006792:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006796:	60000537          	lui	a0,0x60000
8000679a:	b0afc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1468
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
8000679e:	11000637          	lui	a2,0x11000
800067a2:	010817b7          	lui	a5,0x1081
800067a6:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800067aa:	60000537          	lui	a0,0x60000
800067ae:	af6fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1469
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
800067b2:	4601                	li	a2,0
800067b4:	010817b7          	lui	a5,0x1081
800067b8:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800067bc:	60000537          	lui	a0,0x60000
800067c0:	ae4fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1470
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x1);
800067c4:	4605                	li	a2,1
800067c6:	010817b7          	lui	a5,0x1081
800067ca:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
800067ce:	60000537          	lui	a0,0x60000
800067d2:	ad2fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1471
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
800067d6:	11000637          	lui	a2,0x11000
800067da:	010817b7          	lui	a5,0x1081
800067de:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800067e2:	60000537          	lui	a0,0x60000
800067e6:	abefc0ef          	jal	ra,80002aa4 <write_dp>
800067ea:	a2e5                	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1473
    }
    else if (sw == 0x03 && pe == 0x02 )
800067ec:	fec42703          	lw	a4,-20(s0)
800067f0:	478d                	li	a5,3
800067f2:	0ef71c63          	bne	a4,a5,800068ea <vsw_pe+0xc9e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1473 (discriminator 1)
800067f6:	fe842703          	lw	a4,-24(s0)
800067fa:	4789                	li	a5,2
800067fc:	0ef71763          	bne	a4,a5,800068ea <vsw_pe+0xc9e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1475
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80006800:	4601                	li	a2,0
80006802:	010817b7          	lui	a5,0x1081
80006806:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000680a:	60000537          	lui	a0,0x60000
8000680e:	a96fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1476
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x41);
80006812:	04100613          	li	a2,65
80006816:	010817b7          	lui	a5,0x1081
8000681a:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000681e:	60000537          	lui	a0,0x60000
80006822:	a82fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1477
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80006826:	11000637          	lui	a2,0x11000
8000682a:	010817b7          	lui	a5,0x1081
8000682e:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006832:	60000537          	lui	a0,0x60000
80006836:	a6efc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1478
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
8000683a:	4601                	li	a2,0
8000683c:	010817b7          	lui	a5,0x1081
80006840:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006844:	60000537          	lui	a0,0x60000
80006848:	a5cfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1479
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x41);
8000684c:	04100613          	li	a2,65
80006850:	010817b7          	lui	a5,0x1081
80006854:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006858:	60000537          	lui	a0,0x60000
8000685c:	a48fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1480
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80006860:	11000637          	lui	a2,0x11000
80006864:	010817b7          	lui	a5,0x1081
80006868:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
8000686c:	60000537          	lui	a0,0x60000
80006870:	a34fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1481
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80006874:	4601                	li	a2,0
80006876:	010817b7          	lui	a5,0x1081
8000687a:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000687e:	60000537          	lui	a0,0x60000
80006882:	a22fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1482
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x41);
80006886:	04100613          	li	a2,65
8000688a:	010817b7          	lui	a5,0x1081
8000688e:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006892:	60000537          	lui	a0,0x60000
80006896:	a0efc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1483
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
8000689a:	11000637          	lui	a2,0x11000
8000689e:	010817b7          	lui	a5,0x1081
800068a2:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800068a6:	60000537          	lui	a0,0x60000
800068aa:	9fafc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1484
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
800068ae:	4601                	li	a2,0
800068b0:	010817b7          	lui	a5,0x1081
800068b4:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800068b8:	60000537          	lui	a0,0x60000
800068bc:	9e8fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1485
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x41);
800068c0:	04100613          	li	a2,65
800068c4:	010817b7          	lui	a5,0x1081
800068c8:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
800068cc:	60000537          	lui	a0,0x60000
800068d0:	9d4fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1486
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
800068d4:	11000637          	lui	a2,0x11000
800068d8:	010817b7          	lui	a5,0x1081
800068dc:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800068e0:	60000537          	lui	a0,0x60000
800068e4:	9c0fc0ef          	jal	ra,80002aa4 <write_dp>
800068e8:	a0ed                	j	800069d2 <vsw_pe+0xd86>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1490
    }
    else
        {
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
800068ea:	4601                	li	a2,0
800068ec:	010817b7          	lui	a5,0x1081
800068f0:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800068f4:	60000537          	lui	a0,0x60000
800068f8:	9acfc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1491
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x41);
800068fc:	04100613          	li	a2,65
80006900:	010817b7          	lui	a5,0x1081
80006904:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006908:	60000537          	lui	a0,0x60000
8000690c:	998fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1492
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80006910:	11000637          	lui	a2,0x11000
80006914:	010817b7          	lui	a5,0x1081
80006918:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
8000691c:	60000537          	lui	a0,0x60000
80006920:	984fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1493
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80006924:	4601                	li	a2,0
80006926:	010817b7          	lui	a5,0x1081
8000692a:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
8000692e:	60000537          	lui	a0,0x60000
80006932:	972fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1494
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x41);
80006936:	04100613          	li	a2,65
8000693a:	010817b7          	lui	a5,0x1081
8000693e:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
80006942:	60000537          	lui	a0,0x60000
80006946:	95efc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1495
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
8000694a:	11000637          	lui	a2,0x11000
8000694e:	010817b7          	lui	a5,0x1081
80006952:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006956:	60000537          	lui	a0,0x60000
8000695a:	94afc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1496
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
8000695e:	4601                	li	a2,0
80006960:	010817b7          	lui	a5,0x1081
80006964:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
80006968:	60000537          	lui	a0,0x60000
8000696c:	938fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1497
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x41);
80006970:	04100613          	li	a2,65
80006974:	010817b7          	lui	a5,0x1081
80006978:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
8000697c:	60000537          	lui	a0,0x60000
80006980:	924fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1498
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80006984:	11000637          	lui	a2,0x11000
80006988:	010817b7          	lui	a5,0x1081
8000698c:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
80006990:	60000537          	lui	a0,0x60000
80006994:	910fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1499
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80006998:	4601                	li	a2,0
8000699a:	010817b7          	lui	a5,0x1081
8000699e:	09878593          	addi	a1,a5,152 # 1081098 <STACK_SIZE+0x1080898>
800069a2:	60000537          	lui	a0,0x60000
800069a6:	8fefc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1500
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x41);
800069aa:	04100613          	li	a2,65
800069ae:	010817b7          	lui	a5,0x1081
800069b2:	0a078593          	addi	a1,a5,160 # 10810a0 <STACK_SIZE+0x10808a0>
800069b6:	60000537          	lui	a0,0x60000
800069ba:	8eafc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1501
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
800069be:	11000637          	lui	a2,0x11000
800069c2:	010817b7          	lui	a5,0x1081
800069c6:	09c78593          	addi	a1,a5,156 # 108109c <STACK_SIZE+0x108089c>
800069ca:	60000537          	lui	a0,0x60000
800069ce:	8d6fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1505

        }

            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
800069d2:	4605                	li	a2,1
800069d4:	010817b7          	lui	a5,0x1081
800069d8:	04c78593          	addi	a1,a5,76 # 108104c <STACK_SIZE+0x108084c>
800069dc:	60000537          	lui	a0,0x60000
800069e0:	8c4fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1506
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
800069e4:	4605                	li	a2,1
800069e6:	010827b7          	lui	a5,0x1082
800069ea:	04c78593          	addi	a1,a5,76 # 108204c <STACK_SIZE+0x108184c>
800069ee:	60000537          	lui	a0,0x60000
800069f2:	8b2fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1507
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
800069f6:	4605                	li	a2,1
800069f8:	010847b7          	lui	a5,0x1084
800069fc:	04c78593          	addi	a1,a5,76 # 108404c <STACK_SIZE+0x108384c>
80006a00:	60000537          	lui	a0,0x60000
80006a04:	8a0fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1508
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80006a08:	4605                	li	a2,1
80006a0a:	010887b7          	lui	a5,0x1088
80006a0e:	04c78593          	addi	a1,a5,76 # 108804c <STACK_SIZE+0x108784c>
80006a12:	60000537          	lui	a0,0x60000
80006a16:	88efc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1509
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80006a1a:	03000613          	li	a2,48
80006a1e:	010817b7          	lui	a5,0x1081
80006a22:	07878593          	addi	a1,a5,120 # 1081078 <STACK_SIZE+0x1080878>
80006a26:	60000537          	lui	a0,0x60000
80006a2a:	87afc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1510
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80006a2e:	03000613          	li	a2,48
80006a32:	010827b7          	lui	a5,0x1082
80006a36:	07878593          	addi	a1,a5,120 # 1082078 <STACK_SIZE+0x1081878>
80006a3a:	60000537          	lui	a0,0x60000
80006a3e:	866fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1511
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80006a42:	03000613          	li	a2,48
80006a46:	010847b7          	lui	a5,0x1084
80006a4a:	07878593          	addi	a1,a5,120 # 1084078 <STACK_SIZE+0x1083878>
80006a4e:	60000537          	lui	a0,0x60000
80006a52:	852fc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1512
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80006a56:	03000613          	li	a2,48
80006a5a:	010887b7          	lui	a5,0x1088
80006a5e:	07878593          	addi	a1,a5,120 # 1088078 <STACK_SIZE+0x1087878>
80006a62:	60000537          	lui	a0,0x60000
80006a66:	83efc0ef          	jal	ra,80002aa4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/dp_cmd_tx.c:1514

}
80006a6a:	0001                	nop
80006a6c:	40f2                	lw	ra,28(sp)
80006a6e:	4462                	lw	s0,24(sp)
80006a70:	6105                	addi	sp,sp,32
80006a72:	8082                	ret

80006a74 <MRV_enable_local_irq>:
MRV_enable_local_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:619
{
80006a74:	7179                	addi	sp,sp,-48
80006a76:	d622                	sw	s0,44(sp)
80006a78:	1800                	addi	s0,sp,48
80006a7a:	fca42e23          	sw	a0,-36(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:620
    set_csr(mie, mask);
80006a7e:	fdc42783          	lw	a5,-36(s0)
80006a82:	3047a7f3          	csrrs	a5,mie,a5
80006a86:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:621
}
80006a8a:	0001                	nop
80006a8c:	5432                	lw	s0,44(sp)
80006a8e:	6145                	addi	sp,sp,48
80006a90:	8082                	ret

80006a92 <SysTick_Handler>:
SysTick_Handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:109
uint32_t process_data = 0;

/*-----------------------------------------------------------------------------
 * System Tick interrupt handler
 */
void SysTick_Handler(void) {
80006a92:	1141                	addi	sp,sp,-16
80006a94:	c622                	sw	s0,12(sp)
80006a96:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:111

    g_state = (~g_state) & 0x01;
80006a98:	00001797          	auipc	a5,0x1
80006a9c:	a2878793          	addi	a5,a5,-1496 # 800074c0 <g_state>
80006aa0:	439c                	lw	a5,0(a5)
80006aa2:	8b85                	andi	a5,a5,1
80006aa4:	0017b793          	seqz	a5,a5
80006aa8:	0ff7f793          	andi	a5,a5,255
80006aac:	873e                	mv	a4,a5
80006aae:	00001797          	auipc	a5,0x1
80006ab2:	a1278793          	addi	a5,a5,-1518 # 800074c0 <g_state>
80006ab6:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:113

    if(timerdone == 1)
80006ab8:	8b018793          	addi	a5,gp,-1872 # 80007560 <timerdone>
80006abc:	4398                	lw	a4,0(a5)
80006abe:	4785                	li	a5,1
80006ac0:	02f71663          	bne	a4,a5,80006aec <SysTick_Handler+0x5a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:115
    {
        g_10ms_count1 += 1;
80006ac4:	97018793          	addi	a5,gp,-1680 # 80007620 <g_10ms_count1>
80006ac8:	439c                	lw	a5,0(a5)
80006aca:	00178713          	addi	a4,a5,1
80006ace:	97018793          	addi	a5,gp,-1680 # 80007620 <g_10ms_count1>
80006ad2:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:116
        if(g_ms_count <= g_10ms_count1)
80006ad4:	96018793          	addi	a5,gp,-1696 # 80007610 <g_ms_count>
80006ad8:	4398                	lw	a4,0(a5)
80006ada:	97018793          	addi	a5,gp,-1680 # 80007620 <g_10ms_count1>
80006ade:	439c                	lw	a5,0(a5)
80006ae0:	00e7e663          	bltu	a5,a4,80006aec <SysTick_Handler+0x5a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:117
            timerdone = 0;
80006ae4:	8b018793          	addi	a5,gp,-1872 # 80007560 <timerdone>
80006ae8:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:120
    }

    if(rx_tmr_done == 1)
80006aec:	8b418793          	addi	a5,gp,-1868 # 80007564 <rx_tmr_done>
80006af0:	4398                	lw	a4,0(a5)
80006af2:	4785                	li	a5,1
80006af4:	02f71a63          	bne	a4,a5,80006b28 <SysTick_Handler+0x96>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:122
    {
        rx_ms_count1 += 1;
80006af8:	95418793          	addi	a5,gp,-1708 # 80007604 <rx_ms_count1>
80006afc:	439c                	lw	a5,0(a5)
80006afe:	00178713          	addi	a4,a5,1
80006b02:	95418793          	addi	a5,gp,-1708 # 80007604 <rx_ms_count1>
80006b06:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:123
        if(rx_ms_count1 >= rx_ms_count){
80006b08:	95418793          	addi	a5,gp,-1708 # 80007604 <rx_ms_count1>
80006b0c:	4398                	lw	a4,0(a5)
80006b0e:	96418793          	addi	a5,gp,-1692 # 80007614 <rx_ms_count>
80006b12:	439c                	lw	a5,0(a5)
80006b14:	00f76a63          	bltu	a4,a5,80006b28 <SysTick_Handler+0x96>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:124
            rx_tmr_done = 0;
80006b18:	8b418793          	addi	a5,gp,-1868 # 80007564 <rx_tmr_done>
80006b1c:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:125
            process_data = 1;
80006b20:	8bc18793          	addi	a5,gp,-1860 # 8000756c <process_data>
80006b24:	4705                	li	a4,1
80006b26:	c398                	sw	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:128
        }
    }
}
80006b28:	0001                	nop
80006b2a:	4432                	lw	s0,12(sp)
80006b2c:	0141                	addi	sp,sp,16
80006b2e:	8082                	ret

80006b30 <MSYS_EI0_IRQHandler>:
MSYS_EI0_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:131

uint8_t  MSYS_EI0_IRQHandler(void)
{
80006b30:	1141                	addi	sp,sp,-16
80006b32:	c606                	sw	ra,12(sp)
80006b34:	c422                	sw	s0,8(sp)
80006b36:	0800                	addi	s0,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:132
    I2C_isr(&g_i2c_instance_cam1);
80006b38:	97418513          	addi	a0,gp,-1676 # 80007624 <g_i2c_instance_cam1>
80006b3c:	e26fa0ef          	jal	ra,80001162 <I2C_isr>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:133
    return (EXT_IRQ_KEEP_ENABLED);
80006b40:	4781                	li	a5,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:134
}
80006b42:	853e                	mv	a0,a5
80006b44:	40b2                	lw	ra,12(sp)
80006b46:	4422                	lw	s0,8(sp)
80006b48:	0141                	addi	sp,sp,16
80006b4a:	8082                	ret

80006b4c <main>:
main():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:141
/*-----------------------------------------------------------------------------
 * main
 */
uint32_t a;

int main(int argc, char **argv) {
80006b4c:	7119                	addi	sp,sp,-128
80006b4e:	de86                	sw	ra,124(sp)
80006b50:	dca2                	sw	s0,120(sp)
80006b52:	0100                	addi	s0,sp,128
80006b54:	f8a42e23          	sw	a0,-100(s0)
80006b58:	f8b42c23          	sw	a1,-104(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:144
    volatile  uint32_t counter;
    uint8_t state;
    counter = 0;
80006b5c:	fa042423          	sw	zero,-88(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:145
    state = 0;
80006b60:	fe0407a3          	sb	zero,-17(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:165
    uint32_t VSP=0x00000000;
    uint32_t LANE_NO=0x00000004;
#endif
    ///////////////////4K//////////////////////
#if 1
    uint32_t PIXEL_MODE=4;//4 PIXEL MODE HRES DEIVIDE BY 4
80006b64:	4791                	li	a5,4
80006b66:	fef42423          	sw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:166
        uint32_t BAYER_OFFSET_VALUE=0;
80006b6a:	fe042223          	sw	zero,-28(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:167
        uint32_t SPEED_MODE=2;
80006b6e:	4789                	li	a5,2
80006b70:	fef42023          	sw	a5,-32(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:168
        uint32_t HRES=3840;
80006b74:	6785                	lui	a5,0x1
80006b76:	f0078793          	addi	a5,a5,-256 # f00 <STACK_SIZE+0x700>
80006b7a:	fcf42e23          	sw	a5,-36(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:169
        uint32_t VRES=2160;
80006b7e:	6785                	lui	a5,0x1
80006b80:	87078793          	addi	a5,a5,-1936 # 870 <STACK_SIZE+0x70>
80006b84:	fcf42c23          	sw	a5,-40(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:170
        uint32_t HFP=76;//65;//100;//176;
80006b88:	04c00793          	li	a5,76
80006b8c:	fcf42a23          	sw	a5,-44(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:171
        uint32_t HSW=8;
80006b90:	47a1                	li	a5,8
80006b92:	fcf42823          	sw	a5,-48(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:172
        uint32_t HBP=76;//296;
80006b96:	04c00793          	li	a5,76
80006b9a:	fcf42623          	sw	a5,-52(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:173
        uint32_t VFP=54;
80006b9e:	03600793          	li	a5,54
80006ba2:	fcf42423          	sw	a5,-56(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:174
        uint32_t VSW=5;
80006ba6:	4795                	li	a5,5
80006ba8:	fcf42223          	sw	a5,-60(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:175
        uint32_t VBP=3;
80006bac:	478d                	li	a5,3
80006bae:	fcf42023          	sw	a5,-64(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:176
        uint32_t VSP=0x00008000;
80006bb2:	67a1                	lui	a5,0x8
80006bb4:	faf42e23          	sw	a5,-68(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:177
        uint32_t LANE_NO=0x00000004;
80006bb8:	4791                	li	a5,4
80006bba:	faf42c23          	sw	a5,-72(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:180
#endif
        // =========================== DisplayController ================================
        uint32_t Enable=1;
80006bbe:	4785                	li	a5,1
80006bc0:	faf42a23          	sw	a5,-76(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:181
        uint32_t Disable=0;
80006bc4:	fa042823          	sw	zero,-80(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:184

        //bayer = 0x00;
        Enable = 0x01;
80006bc8:	4785                	li	a5,1
80006bca:	faf42a23          	sw	a5,-76(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:185
        Disable = 0x00;
80006bce:	fa042823          	sw	zero,-80(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:187

        axi4litewrite(BAYER_ADDR,BAYER_OFFSET_VALUE);
80006bd2:	fe442583          	lw	a1,-28(s0)
80006bd6:	72020537          	lui	a0,0x72020
80006bda:	89afb0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:189

        axi4litewrite(DC_IP_EN_DIS,Disable); // diabling the IP
80006bde:	fb042583          	lw	a1,-80(s0)
80006be2:	720407b7          	lui	a5,0x72040
80006be6:	00478513          	addi	a0,a5,4 # 72040004 <STACK_SIZE+0x7203f804>
80006bea:	88afb0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:191

        axi4litewrite(DC_IP_HRES,HRES/PIXEL_MODE);
80006bee:	fdc42703          	lw	a4,-36(s0)
80006bf2:	fe842783          	lw	a5,-24(s0)
80006bf6:	02f757b3          	divu	a5,a4,a5
80006bfa:	85be                	mv	a1,a5
80006bfc:	720407b7          	lui	a5,0x72040
80006c00:	00878513          	addi	a0,a5,8 # 72040008 <STACK_SIZE+0x7203f808>
80006c04:	870fb0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:192
        axi4litewrite(DC_IP_VRES,VRES);
80006c08:	fd842583          	lw	a1,-40(s0)
80006c0c:	720407b7          	lui	a5,0x72040
80006c10:	00c78513          	addi	a0,a5,12 # 7204000c <STACK_SIZE+0x7203f80c>
80006c14:	860fb0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:193
        axi4litewrite(DC_IP_HFP,HFP/PIXEL_MODE);
80006c18:	fd442703          	lw	a4,-44(s0)
80006c1c:	fe842783          	lw	a5,-24(s0)
80006c20:	02f757b3          	divu	a5,a4,a5
80006c24:	85be                	mv	a1,a5
80006c26:	720407b7          	lui	a5,0x72040
80006c2a:	01078513          	addi	a0,a5,16 # 72040010 <STACK_SIZE+0x7203f810>
80006c2e:	846fb0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:194
        axi4litewrite(DC_IP_HBP,HBP/PIXEL_MODE);
80006c32:	fcc42703          	lw	a4,-52(s0)
80006c36:	fe842783          	lw	a5,-24(s0)
80006c3a:	02f757b3          	divu	a5,a4,a5
80006c3e:	85be                	mv	a1,a5
80006c40:	720407b7          	lui	a5,0x72040
80006c44:	01478513          	addi	a0,a5,20 # 72040014 <STACK_SIZE+0x7203f814>
80006c48:	82cfb0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:195
        axi4litewrite(DC_IP_VFP,VFP);
80006c4c:	fc842583          	lw	a1,-56(s0)
80006c50:	720407b7          	lui	a5,0x72040
80006c54:	01878513          	addi	a0,a5,24 # 72040018 <STACK_SIZE+0x7203f818>
80006c58:	81cfb0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:196
        axi4litewrite(DC_IP_VBP,VBP);
80006c5c:	fc042583          	lw	a1,-64(s0)
80006c60:	720407b7          	lui	a5,0x72040
80006c64:	01c78513          	addi	a0,a5,28 # 7204001c <STACK_SIZE+0x7203f81c>
80006c68:	80cfb0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:197
        axi4litewrite(DC_IP_HSW,HSW/PIXEL_MODE);
80006c6c:	fd042703          	lw	a4,-48(s0)
80006c70:	fe842783          	lw	a5,-24(s0)
80006c74:	02f757b3          	divu	a5,a4,a5
80006c78:	85be                	mv	a1,a5
80006c7a:	720407b7          	lui	a5,0x72040
80006c7e:	02078513          	addi	a0,a5,32 # 72040020 <STACK_SIZE+0x7203f820>
80006c82:	ff3fa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:198
        axi4litewrite(DC_IP_VSW,VSW);
80006c86:	fc442583          	lw	a1,-60(s0)
80006c8a:	720407b7          	lui	a5,0x72040
80006c8e:	02478513          	addi	a0,a5,36 # 72040024 <STACK_SIZE+0x7203f824>
80006c92:	fe3fa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:200

        axi4litewrite(DC_IP_EN_DIS,Enable); // Enabling the IP
80006c96:	fb442583          	lw	a1,-76(s0)
80006c9a:	720407b7          	lui	a5,0x72040
80006c9e:	00478513          	addi	a0,a5,4 # 72040004 <STACK_SIZE+0x7203f804>
80006ca2:	fd3fa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:203


        axi4litewrite(IE_IP_EN_DIS,Disable); // diabling the IP
80006ca6:	fb042583          	lw	a1,-80(s0)
80006caa:	720307b7          	lui	a5,0x72030
80006cae:	00478513          	addi	a0,a5,4 # 72030004 <STACK_SIZE+0x7202f804>
80006cb2:	fc3fa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:205

        axi4litewrite(IE_R_CONST,R_constant);
80006cb6:	81418793          	addi	a5,gp,-2028 # 800074c4 <R_constant>
80006cba:	439c                	lw	a5,0(a5)
80006cbc:	85be                	mv	a1,a5
80006cbe:	720307b7          	lui	a5,0x72030
80006cc2:	00878513          	addi	a0,a5,8 # 72030008 <STACK_SIZE+0x7202f808>
80006cc6:	faffa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:206
        axi4litewrite(IE_G_CONST,G_constant);
80006cca:	81818793          	addi	a5,gp,-2024 # 800074c8 <G_constant>
80006cce:	439c                	lw	a5,0(a5)
80006cd0:	85be                	mv	a1,a5
80006cd2:	720307b7          	lui	a5,0x72030
80006cd6:	00c78513          	addi	a0,a5,12 # 7203000c <STACK_SIZE+0x7202f80c>
80006cda:	f9bfa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:207
        axi4litewrite(IE_B_CONST,B_constant);
80006cde:	81c18793          	addi	a5,gp,-2020 # 800074cc <B_constant>
80006ce2:	439c                	lw	a5,0(a5)
80006ce4:	85be                	mv	a1,a5
80006ce6:	720307b7          	lui	a5,0x72030
80006cea:	01078513          	addi	a0,a5,16 # 72030010 <STACK_SIZE+0x7202f810>
80006cee:	f87fa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:208
        axi4litewrite(IE_COMMON_CONST,second_constant);
80006cf2:	8b818793          	addi	a5,gp,-1864 # 80007568 <second_constant>
80006cf6:	439c                	lw	a5,0(a5)
80006cf8:	85be                	mv	a1,a5
80006cfa:	720307b7          	lui	a5,0x72030
80006cfe:	01478513          	addi	a0,a5,20 # 72030014 <STACK_SIZE+0x7202f814>
80006d02:	f73fa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:211


        axi4litewrite(IE_IP_EN_DIS,Enable); // Enabling the IP
80006d06:	fb442583          	lw	a1,-76(s0)
80006d0a:	720307b7          	lui	a5,0x72030
80006d0e:	00478513          	addi	a0,a5,4 # 72030004 <STACK_SIZE+0x7202f804>
80006d12:	f63fa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:217



        //Displaycontroller(HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,PIXEL_MODE/*,BAYER_OFFSET_VALUE*/);

        axi4litewrite(DC_IP_HRES,HRES/PIXEL_MODE);
80006d16:	fdc42703          	lw	a4,-36(s0)
80006d1a:	fe842783          	lw	a5,-24(s0)
80006d1e:	02f757b3          	divu	a5,a4,a5
80006d22:	85be                	mv	a1,a5
80006d24:	720407b7          	lui	a5,0x72040
80006d28:	00878513          	addi	a0,a5,8 # 72040008 <STACK_SIZE+0x7203f808>
80006d2c:	f49fa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:218
        axi4litewrite(DC_IP_HRES,HRES/PIXEL_MODE);
80006d30:	fdc42703          	lw	a4,-36(s0)
80006d34:	fe842783          	lw	a5,-24(s0)
80006d38:	02f757b3          	divu	a5,a4,a5
80006d3c:	85be                	mv	a1,a5
80006d3e:	720407b7          	lui	a5,0x72040
80006d42:	00878513          	addi	a0,a5,8 # 72040008 <STACK_SIZE+0x7203f808>
80006d46:	f2ffa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:219
        axi4litewrite(DC_IP_HRES,HRES/PIXEL_MODE);
80006d4a:	fdc42703          	lw	a4,-36(s0)
80006d4e:	fe842783          	lw	a5,-24(s0)
80006d52:	02f757b3          	divu	a5,a4,a5
80006d56:	85be                	mv	a1,a5
80006d58:	720407b7          	lui	a5,0x72040
80006d5c:	00878513          	addi	a0,a5,8 # 72040008 <STACK_SIZE+0x7203f808>
80006d60:	f15fa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:220
        axi4litewrite(DC_IP_HRES,HRES/PIXEL_MODE);
80006d64:	fdc42703          	lw	a4,-36(s0)
80006d68:	fe842783          	lw	a5,-24(s0)
80006d6c:	02f757b3          	divu	a5,a4,a5
80006d70:	85be                	mv	a1,a5
80006d72:	720407b7          	lui	a5,0x72040
80006d76:	00878513          	addi	a0,a5,8 # 72040008 <STACK_SIZE+0x7203f808>
80006d7a:	efbfa0ef          	jal	ra,80001c74 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:223


        uint32_t div = (HRES*VRES*2);
80006d7e:	fdc42703          	lw	a4,-36(s0)
80006d82:	fd842783          	lw	a5,-40(s0)
80006d86:	02f707b3          	mul	a5,a4,a5
80006d8a:	0786                	slli	a5,a5,0x1
80006d8c:	faf42623          	sw	a5,-84(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:225

    GPIO_init(&g_gpio_out, COREGPIO_OUT_BASE_ADDR, GPIO_APB_32_BITS_BUS);
80006d90:	4609                	li	a2,2
80006d92:	710045b7          	lui	a1,0x71004
80006d96:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80006d9a:	bb5fa0ef          	jal	ra,8000194e <GPIO_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:226
    GPIO_set_output(&g_gpio_out, LED1, 1);
80006d9e:	4605                	li	a2,1
80006da0:	4581                	li	a1,0
80006da2:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80006da6:	cc9fa0ef          	jal	ra,80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:228

    MRV_systick_config(SYS_CLK_FREQ / 1000);
80006daa:	6531                	lui	a0,0xc
80006dac:	35050513          	addi	a0,a0,848 # c350 <STACK_SIZE+0xbb50>
80006db0:	4581                	li	a1,0
80006db2:	941f90ef          	jal	ra,800006f2 <MRV_systick_config>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:230

    MRV_enable_local_irq(MRV32_MSYS_EIE0_IRQn);
80006db6:	01000537          	lui	a0,0x1000
80006dba:	cbbff0ef          	jal	ra,80006a74 <MRV_enable_local_irq>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:232

    HAL_enable_interrupts();
80006dbe:	e43f90ef          	jal	ra,80000c00 <HAL_enable_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:234

    GPIO_set_output(&g_gpio_out, MIPI_TRNG_RST, 0u);
80006dc2:	4601                	li	a2,0
80006dc4:	4591                	li	a1,4
80006dc6:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80006dca:	ca5fa0ef          	jal	ra,80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:235
    GPIO_set_output(&g_gpio_out, LED2, 1);
80006dce:	4605                	li	a2,1
80006dd0:	4585                	li	a1,1
80006dd2:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80006dd6:	c99fa0ef          	jal	ra,80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:238

    //Camera Initialization
    GPIO_set_output(&g_gpio_out, CAM1_RST, 1u);
80006dda:	4605                	li	a2,1
80006ddc:	45a1                	li	a1,8
80006dde:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80006de2:	c8dfa0ef          	jal	ra,80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:239
    GPIO_set_output(&g_gpio_out, CAM_CLK_EN, 0u);
80006de6:	4601                	li	a2,0
80006de8:	45a5                	li	a1,9
80006dea:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80006dee:	c81fa0ef          	jal	ra,80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:240
    imx334_cam_init();
80006df2:	826fb0ef          	jal	ra,80001e18 <imx334_cam_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:241
    imx334_cam_reginit(1u);
80006df6:	4505                	li	a0,1
80006df8:	880fb0ef          	jal	ra,80001e78 <imx334_cam_reginit>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:244

    //Setting LED
    GPIO_set_output(&g_gpio_out, LED3, 1);
80006dfc:	4605                	li	a2,1
80006dfe:	4589                	li	a1,2
80006e00:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80006e04:	c6bfa0ef          	jal	ra,80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:245
    msdelay(1000);
80006e08:	3e800513          	li	a0,1000
80006e0c:	c2ffb0ef          	jal	ra,80002a3a <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:247
//    delay_msec(100);
    GPIO_set_output(&g_gpio_out, MIPI_TRNG_RST, 1u);
80006e10:	4605                	li	a2,1
80006e12:	4591                	li	a1,4
80006e14:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80006e18:	c57fa0ef          	jal	ra,80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:248
    GPIO_set_output(&g_gpio_out, LED4, 1);
80006e1c:	4605                	li	a2,1
80006e1e:	458d                	li	a1,3
80006e20:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80006e24:	c4bfa0ef          	jal	ra,80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:251

    // =========================== DisplayPort ================================
    UART_init(&g_uart, COREUARTAPB0_BASE_ADDR, BAUD_VALUE_115200, (DATA_8_BITS | NO_PARITY));
80006e28:	4685                	li	a3,1
80006e2a:	4669                	li	a2,26
80006e2c:	710005b7          	lui	a1,0x71000
80006e30:	95818513          	addi	a0,gp,-1704 # 80007608 <g_uart>
80006e34:	ecbf90ef          	jal	ra,80000cfe <UART_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:252
    DPSourceInit(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80006e38:	fb842783          	lw	a5,-72(s0)
80006e3c:	c43e                	sw	a5,8(sp)
80006e3e:	fbc42783          	lw	a5,-68(s0)
80006e42:	c23e                	sw	a5,4(sp)
80006e44:	fc442783          	lw	a5,-60(s0)
80006e48:	c03e                	sw	a5,0(sp)
80006e4a:	fd042883          	lw	a7,-48(s0)
80006e4e:	fc042803          	lw	a6,-64(s0)
80006e52:	fc842783          	lw	a5,-56(s0)
80006e56:	fcc42703          	lw	a4,-52(s0)
80006e5a:	fd442683          	lw	a3,-44(s0)
80006e5e:	fd842603          	lw	a2,-40(s0)
80006e62:	fdc42583          	lw	a1,-36(s0)
80006e66:	fe042503          	lw	a0,-32(s0)
80006e6a:	c6dfb0ef          	jal	ra,80002ad6 <DPSourceInit>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:262
    {
        // ====================================================================
        // ===================== DisplayPort ==================================
        // ====================================================================
        // Check if there is Sink Interrupt
        DPSourceISR(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80006e6e:	fb842783          	lw	a5,-72(s0)
80006e72:	c43e                	sw	a5,8(sp)
80006e74:	fbc42783          	lw	a5,-68(s0)
80006e78:	c23e                	sw	a5,4(sp)
80006e7a:	fc442783          	lw	a5,-60(s0)
80006e7e:	c03e                	sw	a5,0(sp)
80006e80:	fd042883          	lw	a7,-48(s0)
80006e84:	fc042803          	lw	a6,-64(s0)
80006e88:	fc842783          	lw	a5,-56(s0)
80006e8c:	fcc42703          	lw	a4,-52(s0)
80006e90:	fd442683          	lw	a3,-44(s0)
80006e94:	fd842603          	lw	a2,-40(s0)
80006e98:	fdc42583          	lw	a1,-36(s0)
80006e9c:	fe042503          	lw	a0,-32(s0)
80006ea0:	dd9fb0ef          	jal	ra,80002c78 <DPSourceISR>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:263
        msdelay(30);
80006ea4:	4579                	li	a0,30
80006ea6:	b95fb0ef          	jal	ra,80002a3a <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:264
        auto_brightness(div);
80006eaa:	fac42503          	lw	a0,-84(s0)
80006eae:	2089                	jal	80006ef0 <auto_brightness>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:267


        counter = counter +1;
80006eb0:	fa842783          	lw	a5,-88(s0)
80006eb4:	0785                	addi	a5,a5,1
80006eb6:	faf42423          	sw	a5,-88(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:268
        if (counter <16){
80006eba:	fa842703          	lw	a4,-88(s0)
80006ebe:	47bd                	li	a5,15
80006ec0:	00e7e963          	bltu	a5,a4,80006ed2 <main+0x386>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:269
            GPIO_set_output(&g_gpio_out, LED1, 0);
80006ec4:	4601                	li	a2,0
80006ec6:	4581                	li	a1,0
80006ec8:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80006ecc:	ba3fa0ef          	jal	ra,80001a6e <GPIO_set_output>
80006ed0:	a039                	j	80006ede <main+0x392>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:272
        }
        else{
            GPIO_set_output(&g_gpio_out, LED1, 1);
80006ed2:	4605                	li	a2,1
80006ed4:	4581                	li	a1,0
80006ed6:	94c18513          	addi	a0,gp,-1716 # 800075fc <g_gpio_out>
80006eda:	b95fa0ef          	jal	ra,80001a6e <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:274
        }
        if (counter ==32){
80006ede:	fa842703          	lw	a4,-88(s0)
80006ee2:	02000793          	li	a5,32
80006ee6:	f8f714e3          	bne	a4,a5,80006e6e <main+0x322>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:275
            counter =0;
80006eea:	fa042423          	sw	zero,-88(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:262
        DPSourceISR(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80006eee:	b741                	j	80006e6e <main+0x322>

80006ef0 <auto_brightness>:
auto_brightness():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:288

/**********************************************************/
/**********************FUNCTION CALLS**********************/
/**********************************************************/
void auto_brightness(uint32_t div)
{
80006ef0:	7179                	addi	sp,sp,-48
80006ef2:	d606                	sw	ra,44(sp)
80006ef4:	d422                	sw	s0,40(sp)
80006ef6:	1800                	addi	s0,sp,48
80006ef8:	fca42e23          	sw	a0,-36(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:289
    uint32_t total_sum =  (uint32_t)(*(volatile int*) IE_INTENSITY_AVARAGE);
80006efc:	720307b7          	lui	a5,0x72030
80006f00:	07e1                	addi	a5,a5,24
80006f02:	439c                	lw	a5,0(a5)
80006f04:	fef42623          	sw	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:290
    uint32_t total_average = total_sum/div;
80006f08:	fec42703          	lw	a4,-20(s0)
80006f0c:	fdc42783          	lw	a5,-36(s0)
80006f10:	02f757b3          	divu	a5,a4,a5
80006f14:	fef42423          	sw	a5,-24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:292

    gain_cal(total_average);
80006f18:	fe842503          	lw	a0,-24(s0)
80006f1c:	2031                	jal	80006f28 <gain_cal>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:293
}
80006f1e:	0001                	nop
80006f20:	50b2                	lw	ra,44(sp)
80006f22:	5422                	lw	s0,40(sp)
80006f24:	6145                	addi	sp,sp,48
80006f26:	8082                	ret

80006f28 <gain_cal>:
gain_cal():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:296

void gain_cal(uint32_t total_average)
{
80006f28:	7179                	addi	sp,sp,-48
80006f2a:	d606                	sw	ra,44(sp)
80006f2c:	d422                	sw	s0,40(sp)
80006f2e:	1800                	addi	s0,sp,48
80006f30:	fca42e23          	sw	a0,-36(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:298
    //////////////////////////////////////////////////////
    const int16_t good_average=100;
80006f34:	06400793          	li	a5,100
80006f38:	fef41623          	sh	a5,-20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:299
    const int16_t hysteresis=4;
80006f3c:	4791                	li	a5,4
80006f3e:	fef41523          	sh	a5,-22(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:301
    int16_t step;
        if(total_average < (good_average - hysteresis))
80006f42:	fec41703          	lh	a4,-20(s0)
80006f46:	fea41783          	lh	a5,-22(s0)
80006f4a:	40f707b3          	sub	a5,a4,a5
80006f4e:	873e                	mv	a4,a5
80006f50:	fdc42783          	lw	a5,-36(s0)
80006f54:	00e7f663          	bgeu	a5,a4,80006f60 <gain_cal+0x38>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:302
            step = 1;
80006f58:	4785                	li	a5,1
80006f5a:	fef41723          	sh	a5,-18(s0)
80006f5e:	a00d                	j	80006f80 <gain_cal+0x58>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:304
        else
            if(total_average > (good_average + hysteresis))
80006f60:	fec41703          	lh	a4,-20(s0)
80006f64:	fea41783          	lh	a5,-22(s0)
80006f68:	97ba                	add	a5,a5,a4
80006f6a:	873e                	mv	a4,a5
80006f6c:	fdc42783          	lw	a5,-36(s0)
80006f70:	00f77663          	bgeu	a4,a5,80006f7c <gain_cal+0x54>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:305
                step = -1;
80006f74:	57fd                	li	a5,-1
80006f76:	fef41723          	sh	a5,-18(s0)
80006f7a:	a019                	j	80006f80 <gain_cal+0x58>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:307
            else
                step = 0;
80006f7c:	fe041723          	sh	zero,-18(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:309

        in_gain = in_gain + step;
80006f80:	00000797          	auipc	a5,0x0
80006f84:	53c78793          	addi	a5,a5,1340 # 800074bc <in_gain>
80006f88:	0007d703          	lhu	a4,0(a5)
80006f8c:	fee45783          	lhu	a5,-18(s0)
80006f90:	97ba                	add	a5,a5,a4
80006f92:	01079713          	slli	a4,a5,0x10
80006f96:	8341                	srli	a4,a4,0x10
80006f98:	00000797          	auipc	a5,0x0
80006f9c:	52478793          	addi	a5,a5,1316 # 800074bc <in_gain>
80006fa0:	00e79023          	sh	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:311

        if(in_gain < 5)
80006fa4:	00000797          	auipc	a5,0x0
80006fa8:	51878793          	addi	a5,a5,1304 # 800074bc <in_gain>
80006fac:	0007d703          	lhu	a4,0(a5)
80006fb0:	4791                	li	a5,4
80006fb2:	00e7ea63          	bltu	a5,a4,80006fc6 <gain_cal+0x9e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:312
            in_gain = 5;
80006fb6:	00000797          	auipc	a5,0x0
80006fba:	50678793          	addi	a5,a5,1286 # 800074bc <in_gain>
80006fbe:	4715                	li	a4,5
80006fc0:	00e79023          	sh	a4,0(a5)
80006fc4:	a01d                	j	80006fea <gain_cal+0xc2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:314
        else
            if(in_gain >= 100)
80006fc6:	00000797          	auipc	a5,0x0
80006fca:	4f678793          	addi	a5,a5,1270 # 800074bc <in_gain>
80006fce:	0007d703          	lhu	a4,0(a5)
80006fd2:	06300793          	li	a5,99
80006fd6:	00e7fa63          	bgeu	a5,a4,80006fea <gain_cal+0xc2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:315
                in_gain = 100;
80006fda:	00000797          	auipc	a5,0x0
80006fde:	4e278793          	addi	a5,a5,1250 # 800074bc <in_gain>
80006fe2:	06400713          	li	a4,100
80006fe6:	00e79023          	sh	a4,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:317
    ///////////////////////////////////////////////////////////
    gain_setting(1u,in_gain);
80006fea:	00000797          	auipc	a5,0x0
80006fee:	4d278793          	addi	a5,a5,1234 # 800074bc <in_gain>
80006ff2:	0007d783          	lhu	a5,0(a5)
80006ff6:	85be                	mv	a1,a5
80006ff8:	4505                	li	a0,1
80006ffa:	9f5fb0ef          	jal	ra,800029ee <gain_setting>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-debug/../src/application/main.c:318
}
80006ffe:	0001                	nop
80007000:	50b2                	lw	ra,44(sp)
80007002:	5422                	lw	s0,40(sp)
80007004:	6145                	addi	sp,sp,48
80007006:	8082                	ret

80007008 <memcpy>:
memcpy():
80007008:	832a                	mv	t1,a0
8000700a:	ca09                	beqz	a2,8000701c <memcpy+0x14>
8000700c:	00058383          	lb	t2,0(a1) # 71000000 <STACK_SIZE+0x70fff800>
80007010:	00730023          	sb	t2,0(t1)
80007014:	167d                	addi	a2,a2,-1
80007016:	0305                	addi	t1,t1,1
80007018:	0585                	addi	a1,a1,1
8000701a:	fa6d                	bnez	a2,8000700c <memcpy+0x4>
8000701c:	8082                	ret

8000701e <memset>:
memset():
8000701e:	832a                	mv	t1,a0
80007020:	c611                	beqz	a2,8000702c <memset+0xe>
80007022:	00b30023          	sb	a1,0(t1)
80007026:	167d                	addi	a2,a2,-1
80007028:	0305                	addi	t1,t1,1
8000702a:	fe65                	bnez	a2,80007022 <memset+0x4>
8000702c:	8082                	ret
	...

80007030 <local_irq_handler_table>:
80007030:	0b24 8000 0b16 8000 0b86 8000 0b86 8000     $...............
80007040:	0b86 8000 0b86 8000 0bae 8000 0b32 8000     ............2...
80007050:	6b30 8000 0b40 8000 0b4e 8000 0b5c 8000     0k..@...N...\...
80007060:	0b6a 8000 0b78 8000 0b92 8000 0ba0 8000     j...x...........
80007070:	a146 ffff a7b2 ffff a7b2 ffff a7b2 ffff     F...............
80007080:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007090:	a146 ffff a7b2 ffff a7b2 ffff a7b2 ffff     F...............
800070a0:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800070b0:	a216 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800070c0:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800070d0:	a1ee ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800070e0:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800070f0:	a216 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007100:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007110:	a2d0 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007120:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007130:	a1da ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007140:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007150:	a2f8 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007160:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007170:	a368 ffff a7b2 ffff a7b2 ffff a7b2 ffff     h...............
80007180:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007190:	a392 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800071a0:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800071b0:	a3e8 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800071c0:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800071d0:	a4b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800071e0:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800071f0:	a4a8 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007200:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007210:	a4b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007220:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007230:	a4a8 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007240:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007250:	a50a ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007260:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007270:	a464 ffff a7b2 ffff a7b2 ffff a7b2 ffff     d...............
80007280:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007290:	a50a ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800072a0:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800072b0:	a464 ffff a7b2 ffff a7b2 ffff a7b2 ffff     d...............
800072c0:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800072d0:	a590 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800072e0:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800072f0:	a68e ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007300:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007310:	a68e ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007320:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007330:	a68e ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007340:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007350:	a768 ffff a7b2 ffff a7b2 ffff a7b2 ffff     h...............
80007360:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007370:	a768 ffff a7b2 ffff a7b2 ffff a7b2 ffff     h...............
80007380:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
80007390:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800073a0:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800073b0:	a662 ffff a7b2 ffff a7b2 ffff a7b2 ffff     b...............
800073c0:	a7b2 ffff a7b2 ffff a7b2 ffff a7b2 ffff     ................
800073d0:	a800 ffff 200a 202a 6944 7073 616c 5079     ..... * DisplayP
800073e0:	726f 2074 6f53 7275 6563 4720 746f 4820     ort Source Got H
800073f0:	4450 4920 5152 3a20 0a20 0000 200a 202a     PD IRQ : .... * 
80007400:	6944 7073 616c 5079 726f 2074 6f53 7275     DisplayPort Sour
80007410:	6563 4720 746f 4820 4450 4320 6e6f 656e     ce Got HPD Conne
80007420:	7463 6f69 206e 203a 000a 0000 200a 202a     ction : ..... * 
80007430:	6944 7073 616c 5079 726f 2074 6f53 7275     DisplayPort Sour
80007440:	6563 4720 746f 4820 4450 4420 7369 6f63     ce Got HPD Disco
80007450:	6e6e 6365 6974 6e6f 3a20 0a20 0000 0000     nnection : .....
80007460:	0a0d 5054 3353 5320 7075 6f70 7472 6465     ..TPS3 Supported
80007470:	0d0a 0000 0a0d 5054 3353 6e20 746f 5320     ......TPS3 not S
80007480:	7075 6f70 7472 6465 0d0a 0000 6553 646e     upported....Send
80007490:	6e69 2067 7074 3373 0d0a 0000 6573 646e     ing tps3....send
800074a0:	6e69 2067 7074 3273 0d0a 0000 0000 0000     ing tps2........
