
miv-rv32-dp-tx.elf:     file format elf32-littleriscv
miv-rv32-dp-tx.elf
architecture: riscv:rv32, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x80000000

Program Header:
    LOAD off    0x00001000 vaddr 0x80000000 paddr 0x80000000 align 2**12
         filesz 0x000043b0 memsz 0x00005170 flags rwx

Sections:
Idx Name              Size      VMA       LMA       File off  Algn  Flags
  0 .entry            00000540  80000000  80000000  00001000  2**4  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .text             00003e50  80000540  80000540  00001540  2**4  CONTENTS, ALLOC, LOAD, READONLY, CODE
  2 .sdata            00000020  80004390  80004390  00005390  2**4  CONTENTS, ALLOC, LOAD, DATA
  3 .data             00000000  800043b0  800043b0  000053b0  2**4  CONTENTS, ALLOC, LOAD, DATA
  4 .sbss             000000a0  800043b0  800043b0  000053b0  2**4  ALLOC
  5 .bss              00000120  80004450  80004450  000053b0  2**4  ALLOC
  6 .heap             00000400  80004570  80004570  000053b0  2**4  ALLOC
  7 .stack            00000800  80004970  80004970  000053b0  2**4  ALLOC
  8 .riscv.attributes 00000026  00000000  00000000  000053b0  2**0  CONTENTS, READONLY
  9 .comment          00000051  00000000  00000000  000053d6  2**0  CONTENTS, READONLY
 10 .debug_line       0000aaa6  00000000  00000000  00005427  2**0  CONTENTS, READONLY, DEBUGGING
 11 .debug_info       0000da9a  00000000  00000000  0000fecd  2**0  CONTENTS, READONLY, DEBUGGING
 12 .debug_abbrev     00001e74  00000000  00000000  0001d967  2**0  CONTENTS, READONLY, DEBUGGING
 13 .debug_aranges    00000530  00000000  00000000  0001f7e0  2**3  CONTENTS, READONLY, DEBUGGING
 14 .debug_str        000023fb  00000000  00000000  0001fd10  2**0  CONTENTS, READONLY, DEBUGGING
 15 .debug_ranges     000006a0  00000000  00000000  00022110  2**3  CONTENTS, READONLY, DEBUGGING
 16 .debug_loc        00003d98  00000000  00000000  000227b0  2**0  CONTENTS, READONLY, DEBUGGING
 17 .debug_frame      000011cc  00000000  00000000  00026548  2**2  CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
80000000 l    d  .entry	00000000 .entry
80000540 l    d  .text	00000000 .text
80004390 l    d  .sdata	00000000 .sdata
800043b0 l    d  .data	00000000 .data
800043b0 l    d  .sbss	00000000 .sbss
80004450 l    d  .bss	00000000 .bss
80004570 l    d  .heap	00000000 .heap
80004970 l    d  .stack	00000000 .stack
00000000 l    d  .riscv.attributes	00000000 .riscv.attributes
00000000 l    d  .comment	00000000 .comment
00000000 l    d  .debug_line	00000000 .debug_line
00000000 l    d  .debug_info	00000000 .debug_info
00000000 l    d  .debug_abbrev	00000000 .debug_abbrev
00000000 l    d  .debug_aranges	00000000 .debug_aranges
00000000 l    d  .debug_str	00000000 .debug_str
00000000 l    d  .debug_ranges	00000000 .debug_ranges
00000000 l    d  .debug_loc	00000000 .debug_loc
00000000 l    d  .debug_frame	00000000 .debug_frame
00000000 l    df *ABS*	00000000 ./src/platform/miv_rv32_hal/miv_rv32_entry.o
80000540 l       .text	00000000 handle_reset
80000004 l       .entry	00000000 trap_entry
80000090 l       .entry	00000000 generic_trap_handler
80000010 l       .entry	00000000 sw_trap_entry
800000de l       .entry	00000000 vector_sw_trap_handler
80000020 l       .entry	00000000 tmr_trap_entry
80000124 l       .entry	00000000 vector_tmr_trap_handler
80000030 l       .entry	00000000 ext_trap_entry
8000016a l       .entry	00000000 vector_ext_trap_handler
80000044 l       .entry	00000000 MGEUI_trap_entry
800001b0 l       .entry	00000000 vector_MGEUI_trap_handler
80000048 l       .entry	00000000 MGECI_trap_entry
800001f6 l       .entry	00000000 vector_MGECI_trap_handler
8000005c l       .entry	00000000 MSYS_MIE22_trap_entry
800004b2 l       .entry	00000000 vector_SUBSYSR_IRQHandler
80000060 l       .entry	00000000 MSYS_MIE23_trap_entry
800003e0 l       .entry	00000000 vector_SUBSYS_IRQHandler
80000064 l       .entry	00000000 MSYS_MIE24_trap_entry
8000023c l       .entry	00000000 vector_MSYS_EI0_trap_handler
80000068 l       .entry	00000000 MSYS_MIE25_trap_entry
80000282 l       .entry	00000000 vector_MSYS_EI1_trap_handler
8000006c l       .entry	00000000 MSYS_MIE26_trap_entry
800002c8 l       .entry	00000000 vector_MSYS_EI2_trap_handler
80000070 l       .entry	00000000 MSYS_MIE27_trap_entry
8000030e l       .entry	00000000 vector_MSYS_EI3_trap_handler
80000074 l       .entry	00000000 MSYS_MIE28_trap_entry
80000354 l       .entry	00000000 vector_MSYS_EI4_trap_handler
80000078 l       .entry	00000000 MSYS_MIE29_trap_entry
8000039a l       .entry	00000000 vector_MSYS_EI5_trap_handler
8000007c l       .entry	00000000 MSYS_MIE30_trap_entry
80000426 l       .entry	00000000 vector_MSYS_EI6_trap_handler
80000080 l       .entry	00000000 MSYS_MIE31_trap_entry
8000046c l       .entry	00000000 vector_MSYS_EI7_trap_handler
800004f8 l       .entry	00000000 generic_restore
8000058c l       .text	00000000 ima_cores_setup
800005d2 l       .text	00000000 vector_address_not_matching
80000598 l       .text	00000000 generic_reset_handling
80000636 l       .text	00000000 block_copy
800005d4 l       .text	00000000 initializations
8000061a l       .text	00000000 zeroize_block
80000658 l       .text	00000000 block_copy_error
8000062a l       .text	00000000 zeroize_loop
80000646 l       .text	00000000 block_copy_loop
8000065a l       .text	00000000 block_copy_exit
00000000 l    df *ABS*	00000000 miv_rv32_hal.c
8000065c l     F .text	0000002a MRV_read_mtime
800043b0 l     O .sbss	00000008 g_systick_cmp_value
800043b8 l     O .sbss	00000008 g_systick_increment
00000000 l    df *ABS*	00000000 miv_rv32_init.c
00000000 l    df *ABS*	00000000 miv_rv32_stubs.c
80000816 l     F .text	00000008 Software_IRQHandler.localalias.0
00000000 l    df *ABS*	00000000 miv_rv32_syscall.c
00000000 l    df *ABS*	00000000 hal_irq.c
00000000 l    df *ABS*	00000000 core_uart_apb.c
00000000 l    df *ABS*	00000000 core_i2c.c
800009ae l     F .text	00000012 enable_slave_if_required
00000000 l    df *ABS*	00000000 i2c_interrupt.c
00000000 l    df *ABS*	00000000 core_gpio.c
00000000 l    df *ABS*	00000000 AXI4-Lite.c
00000000 l    df *ABS*	00000000 imx334_corei2c.c
80001128 l     F .text	0000004e sensor_i2c_write.isra.0
80001176 l     F .text	00000034 sensor_i2c_write_gain.isra.1
80004450 l     O .bss	00000040 tx_buffer
00000000 l    df *ABS*	00000000 msdelay.c
00000000 l    df *ABS*	00000000 dp_cmd_common.c
00000000 l    df *ABS*	00000000 dp_cmd_tx.c
00000000 l    df *ABS*	00000000 main.c
800043a8 l     O .sdata	00000002 in_gain
8000198a g     F .text	000001b6 DPSourceStartVideo
00000800 g       *ABS*	00000000 STACK_SIZE
800011f8 g     F .text	00000598 imx334_cam_reginit
8000278e g     F .text	0000090c vsw_pe
80004b90 g       .sdata	00000000 __global_pointer$
800043b0 g       *ABS*	00000000 __data_load
80003f34 g     F .text	00000066 SysTick_Handler
800008f4 g       .text	00000000 HW_get_8bit_reg_field
800043c4 g     O .sbss	00000004 SourceCmdSta
80001938 g     F .text	00000052 DPSourceTxI2CRdCmd
800044d8 g     O .bss	00000002 bayer
8000442c g     O .sbss	00000004 tps3_supported
800043b0 g       .sbss	00000000 __sbss_start
800007aa g     F .text	0000001c handle_local_ei_interrupts
800043cc g     O .sbss	00000004 lane_01_cr_done
800043f8 g     O .sbss	00000004 reply_data_vs0
80000858 g       .text	00000000 HW_set_32bit_reg
80004428 g     O .sbss	00000004 timestamp
800044dc g     O .bss	00000008 g_gpio_out
80000840 g     F .text	00000012 HAL_disable_interrupts
800043d4 g     O .sbss	00000004 pe
80001790 g     F .text	00000024 gain_setting
800044e4 g     O .bss	00000004 rx_ms_count1
80004244 g     F .text	00000016 memcpy
80004390 g       .sdata	00000000 __sdata_start
8000082c  w    F .text	00000002 MSYS_EI4_IRQHandler
80000852 g     F .text	00000006 HAL_restore_interrupts
800043a0 g     O .sdata	00000004 R_constant
800044e8 g     O .bss	00000008 g_uart
800008d2 g       .text	00000000 HW_set_8bit_reg_field
800043f4 g     O .sbss	00000004 reply_data_pe3
80000824  w    F .text	00000002 SUBSYS_IRQHandler
800007c6 g     F .text	00000044 handle_trap
80004418 g     O .sbss	00000004 reply_sw_0
80000832  w    F .text	00000002 MSYS_EI6_IRQHandler
80003cc4 g     F .text	00000270 DPSourceISR
80000836  w    F .text	00000002 SUBSYSR_IRQHandler
8000309a g     F .text	00000afe link_training
800017d4 g     F .text	00000006 write_dp
8000439c g     O .sdata	00000004 G_constant
80000686 g     F .text	0000009c MRV_systick_config
80000820  w    F .text	00000002 MGECI_IRQHandler
80000b10 g     F .text	0000042c I2C_isr
800043d0 g     O .sbss	00000004 lane_23_cr_done
80004970 g       .heap	00000000 _heap_end
80004270 g     O .text	00000040 local_irq_handler_table
80000834  w    F .text	00000002 MSYS_EI7_IRQHandler
80004408 g     O .sbss	00000004 reply_pe_0
80004570 g       .bss	00000000 __bss_end
8000080a g     F .text	0000000a _init
800017cc g     F .text	00000008 read_dp
80004438 g     O .sbss	00000004 rx_tmr_done
800008c6 g       .text	00000000 HW_set_8bit_reg
800008cc g       .text	00000000 HW_get_8bit_reg
80000826  w    F .text	00000002 MSYS_EI1_IRQHandler
80004390 g     O .sdata	00000004 iter
80004400 g     O .sbss	00000004 reply_data_vs2
80004450 g       .sbss	00000000 __sbss_end
80000860 g       .text	00000000 HW_set_32bit_reg_field
800044d0 g     O .bss	00000004 irq_value
80004440 g     O .sbss	00000004 timerdone
800044f0 g     O .bss	00000004 g_ms_count
800044f4 g     O .bss	00000004 rx_ms_count
800044d4 g     O .bss	00000004 MSA_VALUE
80004398 g     O .sdata	00000004 B_constant
80005170 g       .stack	00000000 __stack_top
800043e4 g     O .sbss	00000004 reply_data_eq_23
00000400 g       *ABS*	00000000 HEAP_SIZE
800017da g     F .text	00000084 DPSourceTxWrCmd
8000096a g     F .text	00000044 UART_send
800043e8 g     O .sbss	00000004 reply_data_pe0
80000000 g       .entry	00000000 _start
80000722 g     F .text	00000074 handle_m_timer_interrupt
80003c92 g     F .text	00000032 config_init
80004390 g       *ABS*	00000000 __sdata_load
800043b0 g       .data	00000000 __data_end
80004420 g     O .sbss	00000004 reply_sw_2
800043c8 g     O .sbss	00000004 SourceCmdTx
80000882 g       .text	00000000 HW_get_32bit_reg_field
800043c0 g     O .sbss	00000004 SPEED
80000f60 g     F .text	000000c0 GPIO_init
80004414 g     O .sbss	00000004 reply_pe_3
800043f0 g     O .sbss	00000004 reply_data_pe2
80004490 g     O .bss	00000040 SourceWrBytes
800044f8 g     O .bss	00000004 g_10ms_count
80004450 g       .bss	00000000 __bss_start
8000083a g     F .text	00000006 HAL_enable_interrupts
8000425a g     F .text	00000010 memset
80003fae g     F .text	00000296 main
80003b98 g     F .text	000000fa DPSourceInit
80004394 g     O .sdata	00000004 seq_rst
8000082e  w    F .text	00000002 MSYS_EI5_IRQHandler
800043dc g     O .sbss	00000004 reply_data_cr_23
80000f3c g     F .text	00000012 I2C_enable_irq
80000822  w    F .text	00000002 MGEUI_IRQHandler
800017b4 g     F .text	00000018 msdelay
80004430 g     O .sbss	00000004 vs
80000892 g       .text	00000000 HW_get_16bit_reg
800043b0 g       .sdata	00000000 __sdata_end
800011aa g     F .text	0000004e imx334_cam_init
80004970 g       .heap	00000000 __heap_end
8000440c g     O .sbss	00000004 reply_pe_1
8000443c g     O .sbss	00000004 second_constant
80000814 g     F .text	00000002 _fini
8000185e g     F .text	0000008e DPSourceTxI2CWrCmd
80004404 g     O .sbss	00000004 reply_data_vs3
80000898 g       .text	00000000 HW_set_16bit_reg_field
80000828  w    F .text	00000002 MSYS_EI2_IRQHandler
80004970 g       .stack	00000000 __stack_bottom
80000816  w    F .text	00000008 Software_IRQHandler
800043fc g     O .sbss	00000004 reply_data_vs1
80004570 g       .heap	00000000 __heap_start
800009c0 g     F .text	00000096 I2C_init
80000aee g     F .text	00000022 I2C_wait_complete
80001124 g     F .text	00000004 axi4litewrite
800043ec g     O .sbss	00000004 reply_data_pe1
80004570 g       .bss	00000000 _end
80000830  w    F .text	00000002 Reserved_IRQHandler
80000f4e g     F .text	00000012 I2C_disable_irq
800044fc g     O .bss	00000004 a
800043d8 g     O .sbss	00000004 reply_data_cr_01
80000900 g     F .text	0000006a UART_init
8000085c g       .text	00000000 HW_get_32bit_reg
80000838 g     F .text	00000002 _exit
80004434 g     O .sbss	00000004 process_data
8000088c g       .text	00000000 HW_set_16bit_reg
8000441c g     O .sbss	00000004 reply_sw_1
80004410 g     O .sbss	00000004 reply_pe_2
80004424 g     O .sbss	00000004 reply_sw_3
8000082a  w    F .text	00000002 MSYS_EI3_IRQHandler
8000081e  w    F .text	00000002 External_IRQHandler
80004500 g     O .bss	00000004 g_10ms_count1
800043b0 g       .data	00000000 __data_start
800043e0 g     O .sbss	00000004 reply_data_eq_01
800018ec g     F .text	0000004c DPSourceTxRdCmd
80004504 g     O .bss	0000006c g_i2c_instance_cam1
80001b40 g     F .text	00000c4e update_speed
80000796 g     F .text	00000014 handle_m_soft_interrupt
800008ba g       .text	00000000 HW_get_16bit_reg_field
80001020 g     F .text	00000104 GPIO_set_output
80000a56 g     F .text	00000098 I2C_write
80003f9a g     F .text	00000014 MSYS_EI0_IRQHandler
800043a4 g     O .sdata	00000004 g_state



Disassembly of section .entry:

80000000 <_start>:
_start():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:113

  .section      .entry, "ax"
  .globl _start

_start:
  j handle_reset
80000000:	5400006f          	j	80000540 <handle_reset>

80000004 <trap_entry>:
trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:124
   at the jump and you can at least look at mcause, mepc and get some hints
   about the crash. */
trap_entry:
.option push
.option norvc
j generic_trap_handler
80000004:	08c0006f          	j	80000090 <generic_trap_handler>
	...

80000010 <sw_trap_entry>:
sw_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:130
.option pop
  .word 0
  .word 0

sw_trap_entry:
  j vector_sw_trap_handler
80000010:	a0f9                	j	800000de <vector_sw_trap_handler>
	...

80000020 <tmr_trap_entry>:
tmr_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:139
  .word 0
  .word 0
  .word 0

tmr_trap_entry:
  j vector_tmr_trap_handler
80000020:	a211                	j	80000124 <vector_tmr_trap_handler>
	...

80000030 <ext_trap_entry>:
ext_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:148
  .word 0
  .word 0
  .word 0

ext_trap_entry:
  j vector_ext_trap_handler
80000030:	aa2d                	j	8000016a <vector_ext_trap_handler>
	...

80000044 <MGEUI_trap_entry>:
MGEUI_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:159
  .word 0
  .word 0

#ifndef MIV_LEGACY_RV32
MGEUI_trap_entry:
  j vector_MGEUI_trap_handler
80000044:	a2b5                	j	800001b0 <vector_MGEUI_trap_handler>
	...

80000048 <MGECI_trap_entry>:
MGECI_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:165
#ifdef __riscv_compressed
  .2byte 0
#endif

MGECI_trap_entry:
  j vector_MGECI_trap_handler
80000048:	a27d                	j	800001f6 <vector_MGECI_trap_handler>
	...

8000005c <MSYS_MIE22_trap_entry>:
MSYS_MIE22_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:177
  .word 0

#ifndef MIV_RV32_V3_0
MSYS_MIE22_trap_entry:
#ifndef MIV_RV32_V3_0 
  j vector_SUBSYSR_IRQHandler
8000005c:	a999                	j	800004b2 <vector_SUBSYSR_IRQHandler>
	...

80000060 <MSYS_MIE23_trap_entry>:
MSYS_MIE23_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:184
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE23_trap_entry:
  j vector_SUBSYS_IRQHandler
80000060:	a641                	j	800003e0 <vector_SUBSYS_IRQHandler>
	...

80000064 <MSYS_MIE24_trap_entry>:
MSYS_MIE24_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:191
  .2byte 0
#endif
#endif /*MIV_RV32_V3_0*/

MSYS_MIE24_trap_entry:
  j vector_MSYS_EI0_trap_handler
80000064:	aae1                	j	8000023c <vector_MSYS_EI0_trap_handler>
	...

80000068 <MSYS_MIE25_trap_entry>:
MSYS_MIE25_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:197
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE25_trap_entry:
  j vector_MSYS_EI1_trap_handler
80000068:	ac29                	j	80000282 <vector_MSYS_EI1_trap_handler>
	...

8000006c <MSYS_MIE26_trap_entry>:
MSYS_MIE26_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:203
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE26_trap_entry:
  j vector_MSYS_EI2_trap_handler
8000006c:	acb1                	j	800002c8 <vector_MSYS_EI2_trap_handler>
	...

80000070 <MSYS_MIE27_trap_entry>:
MSYS_MIE27_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:209
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE27_trap_entry:
  j vector_MSYS_EI3_trap_handler
80000070:	ac79                	j	8000030e <vector_MSYS_EI3_trap_handler>
	...

80000074 <MSYS_MIE28_trap_entry>:
MSYS_MIE28_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:215
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE28_trap_entry:
  j vector_MSYS_EI4_trap_handler
80000074:	a4c5                	j	80000354 <vector_MSYS_EI4_trap_handler>
	...

80000078 <MSYS_MIE29_trap_entry>:
MSYS_MIE29_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:221
#ifdef __riscv_compressed
  .2byte 0
#endif

MSYS_MIE29_trap_entry:
  j vector_MSYS_EI5_trap_handler
80000078:	a60d                	j	8000039a <vector_MSYS_EI5_trap_handler>
	...

8000007c <MSYS_MIE30_trap_entry>:
MSYS_MIE30_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:228
  .2byte 0
#endif

MSYS_MIE30_trap_entry:
#ifndef MIV_RV32_V3_0
  j vector_MSYS_EI6_trap_handler
8000007c:	a66d                	j	80000426 <vector_MSYS_EI6_trap_handler>
	...

80000080 <MSYS_MIE31_trap_entry>:
MSYS_MIE31_trap_entry():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:238
  .2byte 0
#endif

#ifndef MIV_RV32_V3_0
MSYS_MIE31_trap_entry:
  j vector_MSYS_EI7_trap_handler
80000080:	a6f5                	j	8000046c <vector_MSYS_EI7_trap_handler>
80000082:	0000                	unimp
80000084:	00000013          	nop
80000088:	00000013          	nop
8000008c:	00000013          	nop

80000090 <generic_trap_handler>:
generic_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:247
#endif /* MIV_RV32_V3_0 */
#endif /* MIV_LEGACY_RV32 */

.align 4
generic_trap_handler:
  STORE_CONTEXT
80000090:	7119                	addi	sp,sp,-128
80000092:	c006                	sw	ra,0(sp)
80000094:	c20a                	sw	sp,4(sp)
80000096:	c40e                	sw	gp,8(sp)
80000098:	c612                	sw	tp,12(sp)
8000009a:	c816                	sw	t0,16(sp)
8000009c:	ca1a                	sw	t1,20(sp)
8000009e:	cc1e                	sw	t2,24(sp)
800000a0:	ce22                	sw	s0,28(sp)
800000a2:	d026                	sw	s1,32(sp)
800000a4:	d22a                	sw	a0,36(sp)
800000a6:	d42e                	sw	a1,40(sp)
800000a8:	d632                	sw	a2,44(sp)
800000aa:	d836                	sw	a3,48(sp)
800000ac:	da3a                	sw	a4,52(sp)
800000ae:	dc3e                	sw	a5,56(sp)
800000b0:	de42                	sw	a6,60(sp)
800000b2:	c0c6                	sw	a7,64(sp)
800000b4:	c2ca                	sw	s2,68(sp)
800000b6:	c4ce                	sw	s3,72(sp)
800000b8:	c6d2                	sw	s4,76(sp)
800000ba:	c8d6                	sw	s5,80(sp)
800000bc:	cada                	sw	s6,84(sp)
800000be:	ccde                	sw	s7,88(sp)
800000c0:	cee2                	sw	s8,92(sp)
800000c2:	d0e6                	sw	s9,96(sp)
800000c4:	d2ea                	sw	s10,100(sp)
800000c6:	d4ee                	sw	s11,104(sp)
800000c8:	d6f2                	sw	t3,108(sp)
800000ca:	d8f6                	sw	t4,112(sp)
800000cc:	dafa                	sw	t5,116(sp)
800000ce:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:248
  csrr a0, mcause
800000d0:	34202573          	csrr	a0,mcause
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:249
  csrr a1, mepc
800000d4:	341025f3          	csrr	a1,mepc
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:250
  jal handle_trap
800000d8:	6ee000ef          	jal	ra,800007c6 <handle_trap>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:251
  j generic_restore
800000dc:	a931                	j	800004f8 <generic_restore>

800000de <vector_sw_trap_handler>:
vector_sw_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:254

vector_sw_trap_handler:
  STORE_CONTEXT
800000de:	7119                	addi	sp,sp,-128
800000e0:	c006                	sw	ra,0(sp)
800000e2:	c20a                	sw	sp,4(sp)
800000e4:	c40e                	sw	gp,8(sp)
800000e6:	c612                	sw	tp,12(sp)
800000e8:	c816                	sw	t0,16(sp)
800000ea:	ca1a                	sw	t1,20(sp)
800000ec:	cc1e                	sw	t2,24(sp)
800000ee:	ce22                	sw	s0,28(sp)
800000f0:	d026                	sw	s1,32(sp)
800000f2:	d22a                	sw	a0,36(sp)
800000f4:	d42e                	sw	a1,40(sp)
800000f6:	d632                	sw	a2,44(sp)
800000f8:	d836                	sw	a3,48(sp)
800000fa:	da3a                	sw	a4,52(sp)
800000fc:	dc3e                	sw	a5,56(sp)
800000fe:	de42                	sw	a6,60(sp)
80000100:	c0c6                	sw	a7,64(sp)
80000102:	c2ca                	sw	s2,68(sp)
80000104:	c4ce                	sw	s3,72(sp)
80000106:	c6d2                	sw	s4,76(sp)
80000108:	c8d6                	sw	s5,80(sp)
8000010a:	cada                	sw	s6,84(sp)
8000010c:	ccde                	sw	s7,88(sp)
8000010e:	cee2                	sw	s8,92(sp)
80000110:	d0e6                	sw	s9,96(sp)
80000112:	d2ea                	sw	s10,100(sp)
80000114:	d4ee                	sw	s11,104(sp)
80000116:	d6f2                	sw	t3,108(sp)
80000118:	d8f6                	sw	t4,112(sp)
8000011a:	dafa                	sw	t5,116(sp)
8000011c:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:255
  jal handle_m_soft_interrupt
8000011e:	678000ef          	jal	ra,80000796 <handle_m_soft_interrupt>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:256
  j generic_restore
80000122:	aed9                	j	800004f8 <generic_restore>

80000124 <vector_tmr_trap_handler>:
vector_tmr_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:259

vector_tmr_trap_handler:
  STORE_CONTEXT
80000124:	7119                	addi	sp,sp,-128
80000126:	c006                	sw	ra,0(sp)
80000128:	c20a                	sw	sp,4(sp)
8000012a:	c40e                	sw	gp,8(sp)
8000012c:	c612                	sw	tp,12(sp)
8000012e:	c816                	sw	t0,16(sp)
80000130:	ca1a                	sw	t1,20(sp)
80000132:	cc1e                	sw	t2,24(sp)
80000134:	ce22                	sw	s0,28(sp)
80000136:	d026                	sw	s1,32(sp)
80000138:	d22a                	sw	a0,36(sp)
8000013a:	d42e                	sw	a1,40(sp)
8000013c:	d632                	sw	a2,44(sp)
8000013e:	d836                	sw	a3,48(sp)
80000140:	da3a                	sw	a4,52(sp)
80000142:	dc3e                	sw	a5,56(sp)
80000144:	de42                	sw	a6,60(sp)
80000146:	c0c6                	sw	a7,64(sp)
80000148:	c2ca                	sw	s2,68(sp)
8000014a:	c4ce                	sw	s3,72(sp)
8000014c:	c6d2                	sw	s4,76(sp)
8000014e:	c8d6                	sw	s5,80(sp)
80000150:	cada                	sw	s6,84(sp)
80000152:	ccde                	sw	s7,88(sp)
80000154:	cee2                	sw	s8,92(sp)
80000156:	d0e6                	sw	s9,96(sp)
80000158:	d2ea                	sw	s10,100(sp)
8000015a:	d4ee                	sw	s11,104(sp)
8000015c:	d6f2                	sw	t3,108(sp)
8000015e:	d8f6                	sw	t4,112(sp)
80000160:	dafa                	sw	t5,116(sp)
80000162:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:260
  jal handle_m_timer_interrupt
80000164:	5be000ef          	jal	ra,80000722 <handle_m_timer_interrupt>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:261
  j generic_restore
80000168:	ae41                	j	800004f8 <generic_restore>

8000016a <vector_ext_trap_handler>:
vector_ext_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:264

vector_ext_trap_handler:
  STORE_CONTEXT
8000016a:	7119                	addi	sp,sp,-128
8000016c:	c006                	sw	ra,0(sp)
8000016e:	c20a                	sw	sp,4(sp)
80000170:	c40e                	sw	gp,8(sp)
80000172:	c612                	sw	tp,12(sp)
80000174:	c816                	sw	t0,16(sp)
80000176:	ca1a                	sw	t1,20(sp)
80000178:	cc1e                	sw	t2,24(sp)
8000017a:	ce22                	sw	s0,28(sp)
8000017c:	d026                	sw	s1,32(sp)
8000017e:	d22a                	sw	a0,36(sp)
80000180:	d42e                	sw	a1,40(sp)
80000182:	d632                	sw	a2,44(sp)
80000184:	d836                	sw	a3,48(sp)
80000186:	da3a                	sw	a4,52(sp)
80000188:	dc3e                	sw	a5,56(sp)
8000018a:	de42                	sw	a6,60(sp)
8000018c:	c0c6                	sw	a7,64(sp)
8000018e:	c2ca                	sw	s2,68(sp)
80000190:	c4ce                	sw	s3,72(sp)
80000192:	c6d2                	sw	s4,76(sp)
80000194:	c8d6                	sw	s5,80(sp)
80000196:	cada                	sw	s6,84(sp)
80000198:	ccde                	sw	s7,88(sp)
8000019a:	cee2                	sw	s8,92(sp)
8000019c:	d0e6                	sw	s9,96(sp)
8000019e:	d2ea                	sw	s10,100(sp)
800001a0:	d4ee                	sw	s11,104(sp)
800001a2:	d6f2                	sw	t3,108(sp)
800001a4:	d8f6                	sw	t4,112(sp)
800001a6:	dafa                	sw	t5,116(sp)
800001a8:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:268
#ifdef MIV_LEGACY_RV32
  jal handle_m_ext_interrupt
#else
  jal External_IRQHandler
800001aa:	674000ef          	jal	ra,8000081e <External_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:270
#endif /* MIV_LEGACY_RV32 */
  j generic_restore
800001ae:	a6a9                	j	800004f8 <generic_restore>

800001b0 <vector_MGEUI_trap_handler>:
vector_MGEUI_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:274

#ifndef MIV_LEGACY_RV32
vector_MGEUI_trap_handler:
  STORE_CONTEXT
800001b0:	7119                	addi	sp,sp,-128
800001b2:	c006                	sw	ra,0(sp)
800001b4:	c20a                	sw	sp,4(sp)
800001b6:	c40e                	sw	gp,8(sp)
800001b8:	c612                	sw	tp,12(sp)
800001ba:	c816                	sw	t0,16(sp)
800001bc:	ca1a                	sw	t1,20(sp)
800001be:	cc1e                	sw	t2,24(sp)
800001c0:	ce22                	sw	s0,28(sp)
800001c2:	d026                	sw	s1,32(sp)
800001c4:	d22a                	sw	a0,36(sp)
800001c6:	d42e                	sw	a1,40(sp)
800001c8:	d632                	sw	a2,44(sp)
800001ca:	d836                	sw	a3,48(sp)
800001cc:	da3a                	sw	a4,52(sp)
800001ce:	dc3e                	sw	a5,56(sp)
800001d0:	de42                	sw	a6,60(sp)
800001d2:	c0c6                	sw	a7,64(sp)
800001d4:	c2ca                	sw	s2,68(sp)
800001d6:	c4ce                	sw	s3,72(sp)
800001d8:	c6d2                	sw	s4,76(sp)
800001da:	c8d6                	sw	s5,80(sp)
800001dc:	cada                	sw	s6,84(sp)
800001de:	ccde                	sw	s7,88(sp)
800001e0:	cee2                	sw	s8,92(sp)
800001e2:	d0e6                	sw	s9,96(sp)
800001e4:	d2ea                	sw	s10,100(sp)
800001e6:	d4ee                	sw	s11,104(sp)
800001e8:	d6f2                	sw	t3,108(sp)
800001ea:	d8f6                	sw	t4,112(sp)
800001ec:	dafa                	sw	t5,116(sp)
800001ee:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:275
  jal MGEUI_IRQHandler
800001f0:	632000ef          	jal	ra,80000822 <MGEUI_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:276
  j generic_restore
800001f4:	a611                	j	800004f8 <generic_restore>

800001f6 <vector_MGECI_trap_handler>:
vector_MGECI_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:279

vector_MGECI_trap_handler:
  STORE_CONTEXT
800001f6:	7119                	addi	sp,sp,-128
800001f8:	c006                	sw	ra,0(sp)
800001fa:	c20a                	sw	sp,4(sp)
800001fc:	c40e                	sw	gp,8(sp)
800001fe:	c612                	sw	tp,12(sp)
80000200:	c816                	sw	t0,16(sp)
80000202:	ca1a                	sw	t1,20(sp)
80000204:	cc1e                	sw	t2,24(sp)
80000206:	ce22                	sw	s0,28(sp)
80000208:	d026                	sw	s1,32(sp)
8000020a:	d22a                	sw	a0,36(sp)
8000020c:	d42e                	sw	a1,40(sp)
8000020e:	d632                	sw	a2,44(sp)
80000210:	d836                	sw	a3,48(sp)
80000212:	da3a                	sw	a4,52(sp)
80000214:	dc3e                	sw	a5,56(sp)
80000216:	de42                	sw	a6,60(sp)
80000218:	c0c6                	sw	a7,64(sp)
8000021a:	c2ca                	sw	s2,68(sp)
8000021c:	c4ce                	sw	s3,72(sp)
8000021e:	c6d2                	sw	s4,76(sp)
80000220:	c8d6                	sw	s5,80(sp)
80000222:	cada                	sw	s6,84(sp)
80000224:	ccde                	sw	s7,88(sp)
80000226:	cee2                	sw	s8,92(sp)
80000228:	d0e6                	sw	s9,96(sp)
8000022a:	d2ea                	sw	s10,100(sp)
8000022c:	d4ee                	sw	s11,104(sp)
8000022e:	d6f2                	sw	t3,108(sp)
80000230:	d8f6                	sw	t4,112(sp)
80000232:	dafa                	sw	t5,116(sp)
80000234:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:280
  jal MGECI_IRQHandler
80000236:	5ea000ef          	jal	ra,80000820 <MGECI_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:281
  j generic_restore
8000023a:	ac7d                	j	800004f8 <generic_restore>

8000023c <vector_MSYS_EI0_trap_handler>:
vector_MSYS_EI0_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:284

vector_MSYS_EI0_trap_handler:
  STORE_CONTEXT
8000023c:	7119                	addi	sp,sp,-128
8000023e:	c006                	sw	ra,0(sp)
80000240:	c20a                	sw	sp,4(sp)
80000242:	c40e                	sw	gp,8(sp)
80000244:	c612                	sw	tp,12(sp)
80000246:	c816                	sw	t0,16(sp)
80000248:	ca1a                	sw	t1,20(sp)
8000024a:	cc1e                	sw	t2,24(sp)
8000024c:	ce22                	sw	s0,28(sp)
8000024e:	d026                	sw	s1,32(sp)
80000250:	d22a                	sw	a0,36(sp)
80000252:	d42e                	sw	a1,40(sp)
80000254:	d632                	sw	a2,44(sp)
80000256:	d836                	sw	a3,48(sp)
80000258:	da3a                	sw	a4,52(sp)
8000025a:	dc3e                	sw	a5,56(sp)
8000025c:	de42                	sw	a6,60(sp)
8000025e:	c0c6                	sw	a7,64(sp)
80000260:	c2ca                	sw	s2,68(sp)
80000262:	c4ce                	sw	s3,72(sp)
80000264:	c6d2                	sw	s4,76(sp)
80000266:	c8d6                	sw	s5,80(sp)
80000268:	cada                	sw	s6,84(sp)
8000026a:	ccde                	sw	s7,88(sp)
8000026c:	cee2                	sw	s8,92(sp)
8000026e:	d0e6                	sw	s9,96(sp)
80000270:	d2ea                	sw	s10,100(sp)
80000272:	d4ee                	sw	s11,104(sp)
80000274:	d6f2                	sw	t3,108(sp)
80000276:	d8f6                	sw	t4,112(sp)
80000278:	dafa                	sw	t5,116(sp)
8000027a:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:285
  jal MSYS_EI0_IRQHandler
8000027c:	51f030ef          	jal	ra,80003f9a <MSYS_EI0_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:286
  j generic_restore
80000280:	aca5                	j	800004f8 <generic_restore>

80000282 <vector_MSYS_EI1_trap_handler>:
vector_MSYS_EI1_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:289

vector_MSYS_EI1_trap_handler:
  STORE_CONTEXT
80000282:	7119                	addi	sp,sp,-128
80000284:	c006                	sw	ra,0(sp)
80000286:	c20a                	sw	sp,4(sp)
80000288:	c40e                	sw	gp,8(sp)
8000028a:	c612                	sw	tp,12(sp)
8000028c:	c816                	sw	t0,16(sp)
8000028e:	ca1a                	sw	t1,20(sp)
80000290:	cc1e                	sw	t2,24(sp)
80000292:	ce22                	sw	s0,28(sp)
80000294:	d026                	sw	s1,32(sp)
80000296:	d22a                	sw	a0,36(sp)
80000298:	d42e                	sw	a1,40(sp)
8000029a:	d632                	sw	a2,44(sp)
8000029c:	d836                	sw	a3,48(sp)
8000029e:	da3a                	sw	a4,52(sp)
800002a0:	dc3e                	sw	a5,56(sp)
800002a2:	de42                	sw	a6,60(sp)
800002a4:	c0c6                	sw	a7,64(sp)
800002a6:	c2ca                	sw	s2,68(sp)
800002a8:	c4ce                	sw	s3,72(sp)
800002aa:	c6d2                	sw	s4,76(sp)
800002ac:	c8d6                	sw	s5,80(sp)
800002ae:	cada                	sw	s6,84(sp)
800002b0:	ccde                	sw	s7,88(sp)
800002b2:	cee2                	sw	s8,92(sp)
800002b4:	d0e6                	sw	s9,96(sp)
800002b6:	d2ea                	sw	s10,100(sp)
800002b8:	d4ee                	sw	s11,104(sp)
800002ba:	d6f2                	sw	t3,108(sp)
800002bc:	d8f6                	sw	t4,112(sp)
800002be:	dafa                	sw	t5,116(sp)
800002c0:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:290
  jal MSYS_EI1_IRQHandler
800002c2:	564000ef          	jal	ra,80000826 <MSYS_EI1_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:291
  j generic_restore
800002c6:	ac0d                	j	800004f8 <generic_restore>

800002c8 <vector_MSYS_EI2_trap_handler>:
vector_MSYS_EI2_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:294

vector_MSYS_EI2_trap_handler:
  STORE_CONTEXT
800002c8:	7119                	addi	sp,sp,-128
800002ca:	c006                	sw	ra,0(sp)
800002cc:	c20a                	sw	sp,4(sp)
800002ce:	c40e                	sw	gp,8(sp)
800002d0:	c612                	sw	tp,12(sp)
800002d2:	c816                	sw	t0,16(sp)
800002d4:	ca1a                	sw	t1,20(sp)
800002d6:	cc1e                	sw	t2,24(sp)
800002d8:	ce22                	sw	s0,28(sp)
800002da:	d026                	sw	s1,32(sp)
800002dc:	d22a                	sw	a0,36(sp)
800002de:	d42e                	sw	a1,40(sp)
800002e0:	d632                	sw	a2,44(sp)
800002e2:	d836                	sw	a3,48(sp)
800002e4:	da3a                	sw	a4,52(sp)
800002e6:	dc3e                	sw	a5,56(sp)
800002e8:	de42                	sw	a6,60(sp)
800002ea:	c0c6                	sw	a7,64(sp)
800002ec:	c2ca                	sw	s2,68(sp)
800002ee:	c4ce                	sw	s3,72(sp)
800002f0:	c6d2                	sw	s4,76(sp)
800002f2:	c8d6                	sw	s5,80(sp)
800002f4:	cada                	sw	s6,84(sp)
800002f6:	ccde                	sw	s7,88(sp)
800002f8:	cee2                	sw	s8,92(sp)
800002fa:	d0e6                	sw	s9,96(sp)
800002fc:	d2ea                	sw	s10,100(sp)
800002fe:	d4ee                	sw	s11,104(sp)
80000300:	d6f2                	sw	t3,108(sp)
80000302:	d8f6                	sw	t4,112(sp)
80000304:	dafa                	sw	t5,116(sp)
80000306:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:295
  jal MSYS_EI2_IRQHandler
80000308:	520000ef          	jal	ra,80000828 <MSYS_EI2_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:296
  j generic_restore
8000030c:	a2f5                	j	800004f8 <generic_restore>

8000030e <vector_MSYS_EI3_trap_handler>:
vector_MSYS_EI3_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:299

vector_MSYS_EI3_trap_handler:
  STORE_CONTEXT
8000030e:	7119                	addi	sp,sp,-128
80000310:	c006                	sw	ra,0(sp)
80000312:	c20a                	sw	sp,4(sp)
80000314:	c40e                	sw	gp,8(sp)
80000316:	c612                	sw	tp,12(sp)
80000318:	c816                	sw	t0,16(sp)
8000031a:	ca1a                	sw	t1,20(sp)
8000031c:	cc1e                	sw	t2,24(sp)
8000031e:	ce22                	sw	s0,28(sp)
80000320:	d026                	sw	s1,32(sp)
80000322:	d22a                	sw	a0,36(sp)
80000324:	d42e                	sw	a1,40(sp)
80000326:	d632                	sw	a2,44(sp)
80000328:	d836                	sw	a3,48(sp)
8000032a:	da3a                	sw	a4,52(sp)
8000032c:	dc3e                	sw	a5,56(sp)
8000032e:	de42                	sw	a6,60(sp)
80000330:	c0c6                	sw	a7,64(sp)
80000332:	c2ca                	sw	s2,68(sp)
80000334:	c4ce                	sw	s3,72(sp)
80000336:	c6d2                	sw	s4,76(sp)
80000338:	c8d6                	sw	s5,80(sp)
8000033a:	cada                	sw	s6,84(sp)
8000033c:	ccde                	sw	s7,88(sp)
8000033e:	cee2                	sw	s8,92(sp)
80000340:	d0e6                	sw	s9,96(sp)
80000342:	d2ea                	sw	s10,100(sp)
80000344:	d4ee                	sw	s11,104(sp)
80000346:	d6f2                	sw	t3,108(sp)
80000348:	d8f6                	sw	t4,112(sp)
8000034a:	dafa                	sw	t5,116(sp)
8000034c:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:300
  jal MSYS_EI3_IRQHandler
8000034e:	4dc000ef          	jal	ra,8000082a <MSYS_EI3_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:301
  j generic_restore
80000352:	a25d                	j	800004f8 <generic_restore>

80000354 <vector_MSYS_EI4_trap_handler>:
vector_MSYS_EI4_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:304

vector_MSYS_EI4_trap_handler:
  STORE_CONTEXT
80000354:	7119                	addi	sp,sp,-128
80000356:	c006                	sw	ra,0(sp)
80000358:	c20a                	sw	sp,4(sp)
8000035a:	c40e                	sw	gp,8(sp)
8000035c:	c612                	sw	tp,12(sp)
8000035e:	c816                	sw	t0,16(sp)
80000360:	ca1a                	sw	t1,20(sp)
80000362:	cc1e                	sw	t2,24(sp)
80000364:	ce22                	sw	s0,28(sp)
80000366:	d026                	sw	s1,32(sp)
80000368:	d22a                	sw	a0,36(sp)
8000036a:	d42e                	sw	a1,40(sp)
8000036c:	d632                	sw	a2,44(sp)
8000036e:	d836                	sw	a3,48(sp)
80000370:	da3a                	sw	a4,52(sp)
80000372:	dc3e                	sw	a5,56(sp)
80000374:	de42                	sw	a6,60(sp)
80000376:	c0c6                	sw	a7,64(sp)
80000378:	c2ca                	sw	s2,68(sp)
8000037a:	c4ce                	sw	s3,72(sp)
8000037c:	c6d2                	sw	s4,76(sp)
8000037e:	c8d6                	sw	s5,80(sp)
80000380:	cada                	sw	s6,84(sp)
80000382:	ccde                	sw	s7,88(sp)
80000384:	cee2                	sw	s8,92(sp)
80000386:	d0e6                	sw	s9,96(sp)
80000388:	d2ea                	sw	s10,100(sp)
8000038a:	d4ee                	sw	s11,104(sp)
8000038c:	d6f2                	sw	t3,108(sp)
8000038e:	d8f6                	sw	t4,112(sp)
80000390:	dafa                	sw	t5,116(sp)
80000392:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:305
  jal MSYS_EI4_IRQHandler
80000394:	498000ef          	jal	ra,8000082c <MSYS_EI4_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:306
  j generic_restore
80000398:	a285                	j	800004f8 <generic_restore>

8000039a <vector_MSYS_EI5_trap_handler>:
vector_MSYS_EI5_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:309

vector_MSYS_EI5_trap_handler:
  STORE_CONTEXT
8000039a:	7119                	addi	sp,sp,-128
8000039c:	c006                	sw	ra,0(sp)
8000039e:	c20a                	sw	sp,4(sp)
800003a0:	c40e                	sw	gp,8(sp)
800003a2:	c612                	sw	tp,12(sp)
800003a4:	c816                	sw	t0,16(sp)
800003a6:	ca1a                	sw	t1,20(sp)
800003a8:	cc1e                	sw	t2,24(sp)
800003aa:	ce22                	sw	s0,28(sp)
800003ac:	d026                	sw	s1,32(sp)
800003ae:	d22a                	sw	a0,36(sp)
800003b0:	d42e                	sw	a1,40(sp)
800003b2:	d632                	sw	a2,44(sp)
800003b4:	d836                	sw	a3,48(sp)
800003b6:	da3a                	sw	a4,52(sp)
800003b8:	dc3e                	sw	a5,56(sp)
800003ba:	de42                	sw	a6,60(sp)
800003bc:	c0c6                	sw	a7,64(sp)
800003be:	c2ca                	sw	s2,68(sp)
800003c0:	c4ce                	sw	s3,72(sp)
800003c2:	c6d2                	sw	s4,76(sp)
800003c4:	c8d6                	sw	s5,80(sp)
800003c6:	cada                	sw	s6,84(sp)
800003c8:	ccde                	sw	s7,88(sp)
800003ca:	cee2                	sw	s8,92(sp)
800003cc:	d0e6                	sw	s9,96(sp)
800003ce:	d2ea                	sw	s10,100(sp)
800003d0:	d4ee                	sw	s11,104(sp)
800003d2:	d6f2                	sw	t3,108(sp)
800003d4:	d8f6                	sw	t4,112(sp)
800003d6:	dafa                	sw	t5,116(sp)
800003d8:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:310
  jal MSYS_EI5_IRQHandler
800003da:	454000ef          	jal	ra,8000082e <MSYS_EI5_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:311
  j generic_restore
800003de:	aa29                	j	800004f8 <generic_restore>

800003e0 <vector_SUBSYS_IRQHandler>:
vector_SUBSYS_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:314

vector_SUBSYS_IRQHandler:
  STORE_CONTEXT
800003e0:	7119                	addi	sp,sp,-128
800003e2:	c006                	sw	ra,0(sp)
800003e4:	c20a                	sw	sp,4(sp)
800003e6:	c40e                	sw	gp,8(sp)
800003e8:	c612                	sw	tp,12(sp)
800003ea:	c816                	sw	t0,16(sp)
800003ec:	ca1a                	sw	t1,20(sp)
800003ee:	cc1e                	sw	t2,24(sp)
800003f0:	ce22                	sw	s0,28(sp)
800003f2:	d026                	sw	s1,32(sp)
800003f4:	d22a                	sw	a0,36(sp)
800003f6:	d42e                	sw	a1,40(sp)
800003f8:	d632                	sw	a2,44(sp)
800003fa:	d836                	sw	a3,48(sp)
800003fc:	da3a                	sw	a4,52(sp)
800003fe:	dc3e                	sw	a5,56(sp)
80000400:	de42                	sw	a6,60(sp)
80000402:	c0c6                	sw	a7,64(sp)
80000404:	c2ca                	sw	s2,68(sp)
80000406:	c4ce                	sw	s3,72(sp)
80000408:	c6d2                	sw	s4,76(sp)
8000040a:	c8d6                	sw	s5,80(sp)
8000040c:	cada                	sw	s6,84(sp)
8000040e:	ccde                	sw	s7,88(sp)
80000410:	cee2                	sw	s8,92(sp)
80000412:	d0e6                	sw	s9,96(sp)
80000414:	d2ea                	sw	s10,100(sp)
80000416:	d4ee                	sw	s11,104(sp)
80000418:	d6f2                	sw	t3,108(sp)
8000041a:	d8f6                	sw	t4,112(sp)
8000041c:	dafa                	sw	t5,116(sp)
8000041e:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:315
  jal SUBSYS_IRQHandler
80000420:	404000ef          	jal	ra,80000824 <SUBSYS_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:316
  j generic_restore
80000424:	a8d1                	j	800004f8 <generic_restore>

80000426 <vector_MSYS_EI6_trap_handler>:
vector_MSYS_EI6_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:320

#ifndef MIV_RV32_V3_0
vector_MSYS_EI6_trap_handler:
  STORE_CONTEXT
80000426:	7119                	addi	sp,sp,-128
80000428:	c006                	sw	ra,0(sp)
8000042a:	c20a                	sw	sp,4(sp)
8000042c:	c40e                	sw	gp,8(sp)
8000042e:	c612                	sw	tp,12(sp)
80000430:	c816                	sw	t0,16(sp)
80000432:	ca1a                	sw	t1,20(sp)
80000434:	cc1e                	sw	t2,24(sp)
80000436:	ce22                	sw	s0,28(sp)
80000438:	d026                	sw	s1,32(sp)
8000043a:	d22a                	sw	a0,36(sp)
8000043c:	d42e                	sw	a1,40(sp)
8000043e:	d632                	sw	a2,44(sp)
80000440:	d836                	sw	a3,48(sp)
80000442:	da3a                	sw	a4,52(sp)
80000444:	dc3e                	sw	a5,56(sp)
80000446:	de42                	sw	a6,60(sp)
80000448:	c0c6                	sw	a7,64(sp)
8000044a:	c2ca                	sw	s2,68(sp)
8000044c:	c4ce                	sw	s3,72(sp)
8000044e:	c6d2                	sw	s4,76(sp)
80000450:	c8d6                	sw	s5,80(sp)
80000452:	cada                	sw	s6,84(sp)
80000454:	ccde                	sw	s7,88(sp)
80000456:	cee2                	sw	s8,92(sp)
80000458:	d0e6                	sw	s9,96(sp)
8000045a:	d2ea                	sw	s10,100(sp)
8000045c:	d4ee                	sw	s11,104(sp)
8000045e:	d6f2                	sw	t3,108(sp)
80000460:	d8f6                	sw	t4,112(sp)
80000462:	dafa                	sw	t5,116(sp)
80000464:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:321
  jal MSYS_EI6_IRQHandler
80000466:	3cc000ef          	jal	ra,80000832 <MSYS_EI6_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:322
  j generic_restore
8000046a:	a079                	j	800004f8 <generic_restore>

8000046c <vector_MSYS_EI7_trap_handler>:
vector_MSYS_EI7_trap_handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:325

vector_MSYS_EI7_trap_handler:
  STORE_CONTEXT
8000046c:	7119                	addi	sp,sp,-128
8000046e:	c006                	sw	ra,0(sp)
80000470:	c20a                	sw	sp,4(sp)
80000472:	c40e                	sw	gp,8(sp)
80000474:	c612                	sw	tp,12(sp)
80000476:	c816                	sw	t0,16(sp)
80000478:	ca1a                	sw	t1,20(sp)
8000047a:	cc1e                	sw	t2,24(sp)
8000047c:	ce22                	sw	s0,28(sp)
8000047e:	d026                	sw	s1,32(sp)
80000480:	d22a                	sw	a0,36(sp)
80000482:	d42e                	sw	a1,40(sp)
80000484:	d632                	sw	a2,44(sp)
80000486:	d836                	sw	a3,48(sp)
80000488:	da3a                	sw	a4,52(sp)
8000048a:	dc3e                	sw	a5,56(sp)
8000048c:	de42                	sw	a6,60(sp)
8000048e:	c0c6                	sw	a7,64(sp)
80000490:	c2ca                	sw	s2,68(sp)
80000492:	c4ce                	sw	s3,72(sp)
80000494:	c6d2                	sw	s4,76(sp)
80000496:	c8d6                	sw	s5,80(sp)
80000498:	cada                	sw	s6,84(sp)
8000049a:	ccde                	sw	s7,88(sp)
8000049c:	cee2                	sw	s8,92(sp)
8000049e:	d0e6                	sw	s9,96(sp)
800004a0:	d2ea                	sw	s10,100(sp)
800004a2:	d4ee                	sw	s11,104(sp)
800004a4:	d6f2                	sw	t3,108(sp)
800004a6:	d8f6                	sw	t4,112(sp)
800004a8:	dafa                	sw	t5,116(sp)
800004aa:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:326
  jal MSYS_EI7_IRQHandler
800004ac:	388000ef          	jal	ra,80000834 <MSYS_EI7_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:327
  j generic_restore
800004b0:	a0a1                	j	800004f8 <generic_restore>

800004b2 <vector_SUBSYSR_IRQHandler>:
vector_SUBSYSR_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:331


vector_SUBSYSR_IRQHandler:
  STORE_CONTEXT
800004b2:	7119                	addi	sp,sp,-128
800004b4:	c006                	sw	ra,0(sp)
800004b6:	c20a                	sw	sp,4(sp)
800004b8:	c40e                	sw	gp,8(sp)
800004ba:	c612                	sw	tp,12(sp)
800004bc:	c816                	sw	t0,16(sp)
800004be:	ca1a                	sw	t1,20(sp)
800004c0:	cc1e                	sw	t2,24(sp)
800004c2:	ce22                	sw	s0,28(sp)
800004c4:	d026                	sw	s1,32(sp)
800004c6:	d22a                	sw	a0,36(sp)
800004c8:	d42e                	sw	a1,40(sp)
800004ca:	d632                	sw	a2,44(sp)
800004cc:	d836                	sw	a3,48(sp)
800004ce:	da3a                	sw	a4,52(sp)
800004d0:	dc3e                	sw	a5,56(sp)
800004d2:	de42                	sw	a6,60(sp)
800004d4:	c0c6                	sw	a7,64(sp)
800004d6:	c2ca                	sw	s2,68(sp)
800004d8:	c4ce                	sw	s3,72(sp)
800004da:	c6d2                	sw	s4,76(sp)
800004dc:	c8d6                	sw	s5,80(sp)
800004de:	cada                	sw	s6,84(sp)
800004e0:	ccde                	sw	s7,88(sp)
800004e2:	cee2                	sw	s8,92(sp)
800004e4:	d0e6                	sw	s9,96(sp)
800004e6:	d2ea                	sw	s10,100(sp)
800004e8:	d4ee                	sw	s11,104(sp)
800004ea:	d6f2                	sw	t3,108(sp)
800004ec:	d8f6                	sw	t4,112(sp)
800004ee:	dafa                	sw	t5,116(sp)
800004f0:	dcfe                	sw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:332
  jal SUBSYSR_IRQHandler
800004f2:	344000ef          	jal	ra,80000836 <SUBSYSR_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:333
  j generic_restore
800004f6:	a009                	j	800004f8 <generic_restore>

800004f8 <generic_restore>:
generic_restore():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:339

#endif /*MIV_RV32_V3_0*/
#endif /* MIV_LEGACY_RV32 */

generic_restore:
  LREG x1, 0 * REGBYTES(sp)
800004f8:	4082                	lw	ra,0(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:340
  LREG x2, 1 * REGBYTES(sp)
800004fa:	4112                	lw	sp,4(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:341
  LREG x3, 2 * REGBYTES(sp)
800004fc:	41a2                	lw	gp,8(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:342
  LREG x4, 3 * REGBYTES(sp)
800004fe:	4232                	lw	tp,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:343
  LREG x5, 4 * REGBYTES(sp)
80000500:	42c2                	lw	t0,16(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:344
  LREG x6, 5 * REGBYTES(sp)
80000502:	4352                	lw	t1,20(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:345
  LREG x7, 6 * REGBYTES(sp)
80000504:	43e2                	lw	t2,24(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:346
  LREG x8, 7 * REGBYTES(sp)
80000506:	4472                	lw	s0,28(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:347
  LREG x9, 8 * REGBYTES(sp)
80000508:	5482                	lw	s1,32(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:348
  LREG x10, 9 * REGBYTES(sp)
8000050a:	5512                	lw	a0,36(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:349
  LREG x11, 10 * REGBYTES(sp)
8000050c:	55a2                	lw	a1,40(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:350
  LREG x12, 11 * REGBYTES(sp)
8000050e:	5632                	lw	a2,44(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:351
  LREG x13, 12 * REGBYTES(sp)
80000510:	56c2                	lw	a3,48(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:352
  LREG x14, 13 * REGBYTES(sp)
80000512:	5752                	lw	a4,52(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:353
  LREG x15, 14 * REGBYTES(sp)
80000514:	57e2                	lw	a5,56(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:354
  LREG x16, 15 * REGBYTES(sp)
80000516:	5872                	lw	a6,60(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:355
  LREG x17, 16 * REGBYTES(sp)
80000518:	4886                	lw	a7,64(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:356
  LREG x18, 17 * REGBYTES(sp)
8000051a:	4916                	lw	s2,68(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:357
  LREG x19, 18 * REGBYTES(sp)
8000051c:	49a6                	lw	s3,72(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:358
  LREG x20, 19 * REGBYTES(sp)
8000051e:	4a36                	lw	s4,76(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:359
  LREG x21, 20 * REGBYTES(sp)
80000520:	4ac6                	lw	s5,80(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:360
  LREG x22, 21 * REGBYTES(sp)
80000522:	4b56                	lw	s6,84(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:361
  LREG x23, 22 * REGBYTES(sp)
80000524:	4be6                	lw	s7,88(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:362
  LREG x24, 23 * REGBYTES(sp)
80000526:	4c76                	lw	s8,92(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:363
  LREG x25, 24 * REGBYTES(sp)
80000528:	5c86                	lw	s9,96(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:364
  LREG x26, 25 * REGBYTES(sp)
8000052a:	5d16                	lw	s10,100(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:365
  LREG x27, 26 * REGBYTES(sp)
8000052c:	5da6                	lw	s11,104(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:366
  LREG x28, 27 * REGBYTES(sp)
8000052e:	5e36                	lw	t3,108(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:367
  LREG x29, 28 * REGBYTES(sp)
80000530:	5ec6                	lw	t4,112(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:368
  LREG x30, 29 * REGBYTES(sp)
80000532:	5f56                	lw	t5,116(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:369
  LREG x31, 30 * REGBYTES(sp)
80000534:	5fe6                	lw	t6,120(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:408
  flw	f30, 61*REGBYTES(sp)
  flw	f31, 62*REGBYTES(sp)
  #endif /* __riscv_flen */
  #endif /* MIV_FP_CONTEXT_SAVE */

  addi sp, sp, SP_SHIFT_OFFSET*REGBYTES
80000536:	6109                	addi	sp,sp,128
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:409
  mret
80000538:	30200073          	mret
8000053c:	0000                	unimp
	...

Disassembly of section .text:

80000540 <handle_reset>:
handle_reset():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:418
/* Ensure instructions are not relaxed, since gp is not yet set */
.option push
.option norelax

#ifndef MIV_RV32_V3_0
  csrwi mstatus, 0
80000540:	30005073          	csrwi	mstatus,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:419
  csrwi mie, 0
80000544:	30405073          	csrwi	mie,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:420
  la ra, _start
80000548:	00000097          	auipc	ra,0x0
8000054c:	ab808093          	addi	ra,ra,-1352 # 80000000 <_start>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:424

/* Clearnig this to be on safer side as RTL doesnt seem to clear it on reset. */
#ifndef MIV_LEGACY_RV32
  li t0, MTIMEH_ADDR
80000550:	0200c2b7          	lui	t0,0x200c
80000554:	ffc28293          	addi	t0,t0,-4 # 200bffc <STACK_SIZE+0x200b7fc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:425
  sw x0, 0(t0)
80000558:	0002a023          	sw	zero,0(t0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:428
#endif

  csrr t0, misa
8000055c:	301022f3          	csrr	t0,misa
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:429
  andi t0, t0, A_EXTENSION_MASK
80000560:	0012f293          	andi	t0,t0,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:430
  bnez t0, ima_cores_setup          /* Jump to IMA core handling */
80000564:	02029463          	bnez	t0,8000058c <ima_cores_setup>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:438
/* For MIV_RV32 cores the mtvec exception base address is fixed at Reset vector
   address + 0x4. Check the mode bits. */
/* In the MIV_RV32 v3.1, the MTVEC exception base address is WARL, and can be 
   configured by the user at runtime */

  csrr t0, mtvec
80000568:	305022f3          	csrr	t0,mtvec
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:439
  andi t0, t0, MTVEC_MODE_BIT_MASK
8000056c:	0032f293          	andi	t0,t0,3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:440
  li t1, MTVEC_VECTORED_MODE_VAL
80000570:	4305                	li	t1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:441
  bne t0, t1, ima_cores_setup        /* Jump to IMA core handling */
80000572:	00629d63          	bne	t0,t1,8000058c <ima_cores_setup>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:445

  /* When mode = 1 => this is vectored mode on MIV_RV32 core.
     Verify that the trap_handler address matches the configuration in MTVEC */
  csrr t0, mtvec
80000576:	305022f3          	csrr	t0,mtvec
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:446
  andi t0, t0, 0xFFFFFFFC
8000057a:	ffc2f293          	andi	t0,t0,-4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:447
  la t1, trap_entry
8000057e:	00000317          	auipc	t1,0x0
80000582:	a8630313          	addi	t1,t1,-1402 # 80000004 <trap_entry>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:448
  bne t0, t1, vector_address_not_matching
80000586:	04629663          	bne	t0,t1,800005d2 <vector_address_not_matching>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:449
  j generic_reset_handling
8000058a:	a039                	j	80000598 <generic_reset_handling>

8000058c <ima_cores_setup>:
ima_cores_setup():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:476
  bne t0, t1, vector_address_not_matching
  j generic_reset_handling
#endif /*MIV_RV32_V3_0*/

ima_cores_setup:
  la t0, trap_entry
8000058c:	00000297          	auipc	t0,0x0
80000590:	a7828293          	addi	t0,t0,-1416 # 80000004 <trap_entry>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:482

#ifdef MIV_LEGACY_RV32_VECTORED_INTERRUPTS
  addi t0, t0, 0x01 /* Set the mode bit for IMA cores.
                       For both MIV_RV32 v3.1 and v3.0 cores this is done by configurator. */
#endif
  csrw mtvec, t0
80000594:	30529073          	csrw	mtvec,t0

80000598 <generic_reset_handling>:
generic_reset_handling():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:487

generic_reset_handling:
/* Copy sdata section first so that the gp is set and linker relaxation can be
   used */
    la a4, __sdata_load
80000598:	00004717          	auipc	a4,0x4
8000059c:	df870713          	addi	a4,a4,-520 # 80004390 <__sdata_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:488
    la a5, __sdata_start
800005a0:	00004797          	auipc	a5,0x4
800005a4:	df078793          	addi	a5,a5,-528 # 80004390 <__sdata_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:489
    la a6, __sdata_end
800005a8:	00004817          	auipc	a6,0x4
800005ac:	e0880813          	addi	a6,a6,-504 # 800043b0 <__data_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:490
    beq a4, a5, 1f     /* Exit if source and dest are same */
800005b0:	00f70863          	beq	a4,a5,800005c0 <generic_reset_handling+0x28>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:491
    beq a5, a6, 1f     /* Exit if section start and end addresses are same */
800005b4:	01078663          	beq	a5,a6,800005c0 <generic_reset_handling+0x28>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:492
    call block_copy
800005b8:	00000097          	auipc	ra,0x0
800005bc:	07e080e7          	jalr	126(ra) # 80000636 <block_copy>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:496

1:
  /* initialize global pointer */
  la gp, __global_pointer$
800005c0:	00004197          	auipc	gp,0x4
800005c4:	5d018193          	addi	gp,gp,1488 # 80004b90 <__global_pointer$>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:513
  csrw mstatus, t1

  lui t0, 0x0
  fscsr t0
#endif
  call initializations
800005c8:	2031                	jal	800005d4 <initializations>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:515
  /* Initialize stack pointer */
  la sp, __stack_top
800005ca:	5e018113          	addi	sp,gp,1504 # 80005170 <__stack_top>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:518

  /* Jump into C code */
  j _init
800005ce:	23c0006f          	j	8000080a <_init>

800005d2 <vector_address_not_matching>:
vector_address_not_matching():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:523

/* Error: trap_entry is not at the expected address of reset_vector+mtvec offset
   as configured in the MIV_RV32 core vectored mode */
vector_address_not_matching:
  ebreak
800005d2:	9002                	ebreak

800005d4 <initializations>:
initializations():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:527

initializations:
/* Initialize the .bss section */
    mv t0, ra           /* Store ra for future use */
800005d4:	8286                	mv	t0,ra
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:528
    la  a5, __bss_start
800005d6:	8c018793          	addi	a5,gp,-1856 # 80004450 <__sbss_end>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:529
    la  a6, __bss_end
800005da:	9e018813          	addi	a6,gp,-1568 # 80004570 <__bss_end>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:530
    beq a5, a6, 1f     /* Section start and end address are the same */
800005de:	01078363          	beq	a5,a6,800005e4 <initializations+0x10>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:531
    call zeroize_block
800005e2:	2825                	jal	8000061a <zeroize_block>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:535

1:
/* Initialize the .sbss section */
    la  a5, __sbss_start
800005e4:	82018793          	addi	a5,gp,-2016 # 800043b0 <__data_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:536
    la  a6, __sbss_end
800005e8:	8c018813          	addi	a6,gp,-1856 # 80004450 <__sbss_end>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:537
    beq a5, a6, 1f     /* Section start and end address are the same */
800005ec:	01078a63          	beq	a5,a6,80000600 <initializations+0x2c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:538
    call zeroize_block
800005f0:	202d                	jal	8000061a <zeroize_block>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:541

/* Clear heap */
    la  a5, __heap_start
800005f2:	9e018793          	addi	a5,gp,-1568 # 80004570 <__bss_end>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:542
    la  a6, __heap_end
800005f6:	de018813          	addi	a6,gp,-544 # 80004970 <__heap_end>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:543
    beq a5, a6, 1f     /* Section start and end address are the same */
800005fa:	01078363          	beq	a5,a6,80000600 <initializations+0x2c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:544
    call zeroize_block
800005fe:	2831                	jal	8000061a <zeroize_block>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:548

1:
/* Copy data section */
    la  a4, __data_load
80000600:	82018713          	addi	a4,gp,-2016 # 800043b0 <__data_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:549
    la  a5, __data_start
80000604:	82018793          	addi	a5,gp,-2016 # 800043b0 <__data_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:550
    la  a6, __data_end
80000608:	82018813          	addi	a6,gp,-2016 # 800043b0 <__data_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:551
    beq a4, a5, 1f     /* Exit early if source and dest are same */
8000060c:	00f70563          	beq	a4,a5,80000616 <initializations+0x42>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:552
    beq a5, a6, 1f     /* Section start and end addresses are the same */
80000610:	01078363          	beq	a5,a6,80000616 <initializations+0x42>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:553
    call block_copy
80000614:	200d                	jal	80000636 <block_copy>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:556

1:
    mv ra, t0           /* Retrieve ra */
80000616:	8096                	mv	ra,t0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:557
    ret
80000618:	8082                	ret

8000061a <zeroize_block>:
zeroize_block():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:560

zeroize_block:
    bltu a6, a5, block_copy_error   /* Error. End address is less than start */
8000061a:	02f86f63          	bltu	a6,a5,80000658 <block_copy_error>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:561
    or a7, a6, a5                   /* Check if start or end is unalined */
8000061e:	00f868b3          	or	a7,a6,a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:562
    andi a7, a7, 0x03u
80000622:	0038f893          	andi	a7,a7,3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:563
    bgtz a7, block_copy_error       /* Unaligned addresses error*/
80000626:	03104963          	bgtz	a7,80000658 <block_copy_error>

8000062a <zeroize_loop>:
zeroize_loop():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:565
zeroize_loop:
    sw x0, 0(a5)
8000062a:	0007a023          	sw	zero,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:566
    add a5, a5, __SIZEOF_POINTER__
8000062e:	0791                	addi	a5,a5,4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:567
    blt a5, a6, zeroize_loop
80000630:	ff07cde3          	blt	a5,a6,8000062a <zeroize_loop>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:568
    ret
80000634:	8082                	ret

80000636 <block_copy>:
block_copy():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:571

block_copy:
    bltu a6, a5, block_copy_error   /* Error. End address is less than start */
80000636:	02f86163          	bltu	a6,a5,80000658 <block_copy_error>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:572
    or a7, a6, a5                   /* Check if start or end is unalined */
8000063a:	00f868b3          	or	a7,a6,a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:573
    andi a7, a7, 0x03u
8000063e:	0038f893          	andi	a7,a7,3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:574
    bgtz a7, block_copy_error       /* Unaligned addresses error*/
80000642:	01104b63          	bgtz	a7,80000658 <block_copy_error>

80000646 <block_copy_loop>:
block_copy_loop():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:576
block_copy_loop:
    lw a7, 0(a4)
80000646:	00072883          	lw	a7,0(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:577
    sw a7, 0(a5)
8000064a:	0117a023          	sw	a7,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:578
    addi a5, a5, 0x04
8000064e:	0791                	addi	a5,a5,4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:579
    addi a4, a4, 0x04
80000650:	0711                	addi	a4,a4,4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:580
    blt a5, a6, block_copy_loop
80000652:	ff07cae3          	blt	a5,a6,80000646 <block_copy_loop>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:581
    j block_copy_exit
80000656:	a011                	j	8000065a <block_copy_exit>

80000658 <block_copy_error>:
block_copy_error():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:584

block_copy_error:
    j block_copy_error
80000658:	a001                	j	80000658 <block_copy_error>

8000065a <block_copy_exit>:
block_copy_exit():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_entry.S:587

block_copy_exit:
    ret
8000065a:	8082                	ret

8000065c <MRV_read_mtime>:
MRV_read_mtime():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:717

/***************************************************************************//**
  The MRV_read_mtime() function returns the current MTIME register value.
 */
static inline uint64_t MRV_read_mtime(void)
{
8000065c:	1141                	addi	sp,sp,-16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:718
    volatile uint32_t hi = 0u;
8000065e:	c402                	sw	zero,8(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:719
    volatile uint32_t lo = 0u;
80000660:	c602                	sw	zero,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:724

    /* when mtime lower word is 0xFFFFFFFF, there will be rollover and
     * returned value could be wrong. */
    do {
        hi = MTIMEH;
80000662:	0200c7b7          	lui	a5,0x200c
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:724 (discriminator 1)
80000666:	ffc7a683          	lw	a3,-4(a5) # 200bffc <STACK_SIZE+0x200b7fc>
8000066a:	c436                	sw	a3,8(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:725 (discriminator 1)
        lo = MTIME;
8000066c:	ff87a683          	lw	a3,-8(a5)
80000670:	c636                	sw	a3,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:726 (discriminator 1)
    } while(hi != MTIMEH);
80000672:	ffc7a603          	lw	a2,-4(a5)
80000676:	46a2                	lw	a3,8(sp)
80000678:	fed617e3          	bne	a2,a3,80000666 <MRV_read_mtime+0xa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:728

    return((((uint64_t)MTIMEH) << 32u) | lo);
8000067c:	ffc7a583          	lw	a1,-4(a5)
80000680:	4532                	lw	a0,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:729
}
80000682:	0141                	addi	sp,sp,16
80000684:	8082                	ret

80000686 <MRV_systick_config>:
MRV_systick_config():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:163

/*------------------------------------------------------------------------------
 * Configure the machine timer to generate an interrupt.
 */
uint32_t MRV_systick_config(uint64_t ticks)
{
80000686:	1141                	addi	sp,sp,-16
80000688:	c422                	sw	s0,8(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:166
    uint32_t ret_val = ERROR;
    uint64_t remainder = ticks;
    g_systick_increment = 0U;
8000068a:	4701                	li	a4,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:167
    g_systick_cmp_value = 0U;
8000068c:	82018793          	addi	a5,gp,-2016 # 800043b0 <__data_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:163
{
80000690:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:166
    g_systick_increment = 0U;
80000692:	82818413          	addi	s0,gp,-2008 # 800043b8 <g_systick_increment>
80000696:	4681                	li	a3,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:167
    g_systick_cmp_value = 0U;
80000698:	c3d8                	sw	a4,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:166
    g_systick_increment = 0U;
8000069a:	c058                	sw	a4,4(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:167
    g_systick_cmp_value = 0U;
8000069c:	c394                	sw	a3,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:166
    g_systick_increment = 0U;
8000069e:	c014                	sw	a3,0(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:169

    while (remainder >= MTIME_PRESCALER)
800006a0:	4781                	li	a5,0
800006a2:	4701                	li	a4,0
800006a4:	4601                	li	a2,0
800006a6:	02005837          	lui	a6,0x2005
800006aa:	00178893          	addi	a7,a5,1
800006ae:	00082303          	lw	t1,0(a6) # 2005000 <STACK_SIZE+0x2004800>
800006b2:	00f8b6b3          	sltu	a3,a7,a5
800006b6:	96ba                	add	a3,a3,a4
800006b8:	e9a9                	bnez	a1,8000070a <MRV_systick_config+0x84>
800006ba:	04657863          	bgeu	a0,t1,8000070a <MRV_systick_config+0x84>
800006be:	c609                	beqz	a2,800006c8 <MRV_systick_config+0x42>
800006c0:	82f1a423          	sw	a5,-2008(gp) # 800043b8 <g_systick_increment>
800006c4:	82e1a623          	sw	a4,-2004(gp) # 800043bc <g_systick_increment+0x4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:175
    {
        remainder -= MTIME_PRESCALER;
        g_systick_increment++;
    }

    g_systick_cmp_value = g_systick_increment + MRV_read_mtime();
800006c8:	3f51                	jal	8000065c <MRV_read_mtime>
800006ca:	401c                	lw	a5,0(s0)
800006cc:	4054                	lw	a3,4(s0)
800006ce:	00f50733          	add	a4,a0,a5
800006d2:	00a73533          	sltu	a0,a4,a0
800006d6:	95b6                	add	a1,a1,a3
800006d8:	95aa                	add	a1,a1,a0
800006da:	82e1a023          	sw	a4,-2016(gp) # 800043b0 <__data_load>
800006de:	82b1a223          	sw	a1,-2012(gp) # 800043b4 <__data_load+0x4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:177

    if (g_systick_increment > 0U)
800006e2:	8fd5                	or	a5,a5,a3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:164
    uint32_t ret_val = ERROR;
800006e4:	4505                	li	a0,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:177
    if (g_systick_increment > 0U)
800006e6:	cf91                	beqz	a5,80000702 <MRV_systick_config+0x7c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:179
    {
        WRITE_MTIMECMP(g_systick_cmp_value);
800006e8:	020047b7          	lui	a5,0x2004
800006ec:	56fd                	li	a3,-1
800006ee:	c3d4                	sw	a3,4(a5)
800006f0:	c398                	sw	a4,0(a5)
800006f2:	c3cc                	sw	a1,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:180
        set_csr(mie, MIP_MTIP);
800006f4:	08000793          	li	a5,128
800006f8:	3047a7f3          	csrrs	a5,mie,a5
MRV_enable_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:650
    set_csr(mstatus, MSTATUS_MIE);
800006fc:	300467f3          	csrrsi	a5,mstatus,8
MRV_systick_config():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:182
        MRV_enable_interrupts();
        ret_val = SUCCESS;
80000700:	4501                	li	a0,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:186
    }

    return ret_val;
}
80000702:	40b2                	lw	ra,12(sp)
80000704:	4422                	lw	s0,8(sp)
80000706:	0141                	addi	sp,sp,16
80000708:	8082                	ret
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:171
        remainder -= MTIME_PRESCALER;
8000070a:	00082783          	lw	a5,0(a6)
8000070e:	4605                	li	a2,1
80000710:	40f507b3          	sub	a5,a0,a5
80000714:	00f53733          	sltu	a4,a0,a5
80000718:	8d99                	sub	a1,a1,a4
8000071a:	853e                	mv	a0,a5
8000071c:	8736                	mv	a4,a3
8000071e:	87c6                	mv	a5,a7
80000720:	b769                	j	800006aa <MRV_systick_config+0x24>

80000722 <handle_m_timer_interrupt>:
handle_m_timer_interrupt():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:192

/*------------------------------------------------------------------------------
 * RISC-V interrupt handler for machine timer interrupts.
 */
void handle_m_timer_interrupt(void)
{
80000722:	1141                	addi	sp,sp,-16
80000724:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:193
    clear_csr(mie, MIP_MTIP);
80000726:	08000793          	li	a5,128
8000072a:	3047b7f3          	csrrc	a5,mie,a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:195

    uint64_t mtime_at_irq = MRV_read_mtime();
8000072e:	373d                	jal	8000065c <MRV_read_mtime>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:201

#ifndef NDEBUG
    static volatile uint32_t d_tick = 0u;
#endif

    while(g_systick_cmp_value < (mtime_at_irq + MTIME_DELTA)) {
80000730:	82018793          	addi	a5,gp,-2016 # 800043b0 <__data_load>
80000734:	4398                	lw	a4,0(a5)
80000736:	00550613          	addi	a2,a0,5
8000073a:	43dc                	lw	a5,4(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:202
        g_systick_cmp_value = g_systick_cmp_value + g_systick_increment;
8000073c:	82818693          	addi	a3,gp,-2008 # 800043b8 <g_systick_increment>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:201
    while(g_systick_cmp_value < (mtime_at_irq + MTIME_DELTA)) {
80000740:	00a63533          	sltu	a0,a2,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:202
        g_systick_cmp_value = g_systick_cmp_value + g_systick_increment;
80000744:	0006a803          	lw	a6,0(a3)
80000748:	0046a883          	lw	a7,4(a3)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:201
    while(g_systick_cmp_value < (mtime_at_irq + MTIME_DELTA)) {
8000074c:	95aa                	add	a1,a1,a0
8000074e:	4681                	li	a3,0
80000750:	02b7ea63          	bltu	a5,a1,80000784 <handle_m_timer_interrupt+0x62>
80000754:	00f59463          	bne	a1,a5,8000075c <handle_m_timer_interrupt+0x3a>
80000758:	02c76663          	bltu	a4,a2,80000784 <handle_m_timer_interrupt+0x62>
8000075c:	c689                	beqz	a3,80000766 <handle_m_timer_interrupt+0x44>
8000075e:	82e1a023          	sw	a4,-2016(gp) # 800043b0 <__data_load>
80000762:	82f1a223          	sw	a5,-2012(gp) # 800043b4 <__data_load+0x4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:223
     * If you are running the program using the debugger and halt the CPU at a 
     * breakpoint, MTIME will continue to increment and interrupts will be 
     * missed; resulting in d_tick > 1.
     */

    WRITE_MTIMECMP(g_systick_cmp_value);
80000766:	020046b7          	lui	a3,0x2004
8000076a:	567d                	li	a2,-1
8000076c:	c2d0                	sw	a2,4(a3)
8000076e:	c298                	sw	a4,0(a3)
80000770:	c2dc                	sw	a5,4(a3)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:225

    SysTick_Handler();
80000772:	7c2030ef          	jal	ra,80003f34 <SysTick_Handler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:227

    set_csr(mie, MIP_MTIP);
80000776:	08000793          	li	a5,128
8000077a:	3047a7f3          	csrrs	a5,mie,a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:228
}
8000077e:	40b2                	lw	ra,12(sp)
80000780:	0141                	addi	sp,sp,16
80000782:	8082                	ret
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:202
        g_systick_cmp_value = g_systick_cmp_value + g_systick_increment;
80000784:	010706b3          	add	a3,a4,a6
80000788:	00e6b533          	sltu	a0,a3,a4
8000078c:	97c6                	add	a5,a5,a7
8000078e:	8736                	mv	a4,a3
80000790:	97aa                	add	a5,a5,a0
80000792:	4685                	li	a3,1
80000794:	bf75                	j	80000750 <handle_m_timer_interrupt+0x2e>

80000796 <handle_m_soft_interrupt>:
handle_m_soft_interrupt():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:231

void handle_m_soft_interrupt(void)
{
80000796:	1141                	addi	sp,sp,-16
80000798:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:232
    Software_IRQHandler();
8000079a:	28b5                	jal	80000816 <Software_IRQHandler>
MRV_clear_soft_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:768
{
#ifdef MIV_LEGACY_RV32
    MSIP = 0x00u;   /* clear soft interrupt */
#else
    /* Clear soft IRQ on MIV_RV32 processor */
    SUBSYS->soft_reg &= ~SUBSYS_SOFT_IRQ;
8000079c:	6719                	lui	a4,0x6
8000079e:	531c                	lw	a5,32(a4)
handle_m_soft_interrupt():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:234
    MRV_clear_soft_irq();
}
800007a0:	40b2                	lw	ra,12(sp)
MRV_clear_soft_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.h:768
800007a2:	9bf5                	andi	a5,a5,-3
800007a4:	d31c                	sw	a5,32(a4)
handle_m_soft_interrupt():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:234
800007a6:	0141                	addi	sp,sp,16
800007a8:	8082                	ret

800007aa <handle_local_ei_interrupts>:
handle_local_ei_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:306
/*------------------------------------------------------------------------------
 * Jump to interrupt table containing local interrupts
 */
void handle_local_ei_interrupts(uint8_t irq_no)
{
    uint64_t mhart_id = read_csr(mhartid);
800007aa:	f14027f3          	csrr	a5,mhartid
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:310
    ASSERT(irq_no <= MIV_LOCAL_IRQ_MAX)
    ASSERT(irq_no >= MIV_LOCAL_IRQ_MIN)

    uint8_t ei_no = (uint8_t)(irq_no - MIV_LOCAL_IRQ_MIN);
800007ae:	1541                	addi	a0,a0,-16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:311
    (*local_irq_handler_table[ei_no])();
800007b0:	0ff57513          	andi	a0,a0,255
800007b4:	050a                	slli	a0,a0,0x2
800007b6:	00004797          	auipc	a5,0x4
800007ba:	aba78793          	addi	a5,a5,-1350 # 80004270 <local_irq_handler_table>
800007be:	953e                	add	a0,a0,a5
800007c0:	00052303          	lw	t1,0(a0)
800007c4:	8302                	jr	t1

800007c6 <handle_trap>:
handle_trap():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:323
 */
void handle_trap(uintptr_t mcause, uintptr_t mepc)
{   
    uint64_t is_interrupt = mcause & MCAUSE_INT;

    if (is_interrupt)
800007c6:	02055d63          	bgez	a0,80000800 <handle_trap+0x3a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:326
    {
#ifndef MIV_LEGACY_RV32
        if (((mcause & MCAUSE_CAUSE) >= MIV_LOCAL_IRQ_MIN) && ((mcause & MCAUSE_CAUSE) <= MIV_LOCAL_IRQ_MAX))
800007ca:	800007b7          	lui	a5,0x80000
800007ce:	ff07c713          	xori	a4,a5,-16
800007d2:	8f69                	and	a4,a4,a0
800007d4:	cb01                	beqz	a4,800007e4 <handle_trap+0x1e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:326 (discriminator 1)
800007d6:	fe07c793          	xori	a5,a5,-32
800007da:	8fe9                	and	a5,a5,a0
800007dc:	e781                	bnez	a5,800007e4 <handle_trap+0x1e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:328
        {
            handle_local_ei_interrupts((uint8_t)(mcause & MCAUSE_CAUSE));
800007de:	0ff57513          	andi	a0,a0,255
800007e2:	b7e1                	j	800007aa <handle_local_ei_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:330
        }
        else if ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT)
800007e4:	0506                	slli	a0,a0,0x1
800007e6:	8105                	srli	a0,a0,0x1
800007e8:	47ad                	li	a5,11
800007ea:	00f51363          	bne	a0,a5,800007f0 <handle_trap+0x2a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:336
#else
        if ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT)
#endif
        {
#ifndef MIV_LEGACY_RV32
            External_IRQHandler();
800007ee:	a805                	j	8000081e <External_IRQHandler>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:341
#else
            handle_m_ext_interrupt();
#endif
        }
        else if ((mcause & MCAUSE_CAUSE) == IRQ_M_SOFT)
800007f0:	478d                	li	a5,3
800007f2:	00f51363          	bne	a0,a5,800007f8 <handle_trap+0x32>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:343
        {
            handle_m_soft_interrupt();
800007f6:	b745                	j	80000796 <handle_m_soft_interrupt>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:345
        }
        else if ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)
800007f8:	479d                	li	a5,7
800007fa:	00f51763          	bne	a0,a5,80000808 <handle_trap+0x42>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:347
        {
            handle_m_timer_interrupt();
800007fe:	b715                	j	80000722 <handle_m_timer_interrupt>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:320
{   
80000800:	1141                	addi	sp,sp,-16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:402
         uintptr_t mmepc  = read_csr(mepc);

        /* breakpoint */
        __asm__("ebreak");
#else
        _exit(1 + mcause);
80000802:	0505                	addi	a0,a0,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:320
{   
80000804:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_hal.c:402
        _exit(1 + mcause);
80000806:	280d                	jal	80000838 <_exit>
80000808:	8082                	ret

8000080a <_init>:
_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_init.c:21
#endif

extern int main(void);

void _init(void)
{
8000080a:	1141                	addi	sp,sp,-16
8000080c:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_init.c:29
     * code. You can implement it here. */

    /* Jump to the application code after all initializations are completed */
    int code = 0;

    code = main();
8000080e:	7a0030ef          	jal	ra,80003fae <main>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_init.c:30
    _exit(code);
80000812:	201d                	jal	80000838 <_exit>

80000814 <_fini>:
_fini():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_init.c:37

/* Function called after main() finishes */
void
_fini(void)
{
}
80000814:	8082                	ret

80000816 <Software_IRQHandler>:
Software_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:23
#ifdef __cplusplus
extern "C" {
#endif

__attribute__((weak)) void Software_IRQHandler(void)
{
80000816:	1141                	addi	sp,sp,-16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:24
    _exit(10);
80000818:	4529                	li	a0,10
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:23
{
8000081a:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_stubs.c:24
    _exit(10);
8000081c:	2831                	jal	80000838 <_exit>

8000081e <External_IRQHandler>:
External_IRQHandler():
8000081e:	8082                	ret

80000820 <MGECI_IRQHandler>:
MGECI_IRQHandler():
80000820:	8082                	ret

80000822 <MGEUI_IRQHandler>:
MGEUI_IRQHandler():
80000822:	8082                	ret

80000824 <SUBSYS_IRQHandler>:
SUBSYS_IRQHandler():
80000824:	8082                	ret

80000826 <MSYS_EI1_IRQHandler>:
MSYS_EI1_IRQHandler():
80000826:	8082                	ret

80000828 <MSYS_EI2_IRQHandler>:
MSYS_EI2_IRQHandler():
80000828:	8082                	ret

8000082a <MSYS_EI3_IRQHandler>:
MSYS_EI3_IRQHandler():
8000082a:	8082                	ret

8000082c <MSYS_EI4_IRQHandler>:
MSYS_EI4_IRQHandler():
8000082c:	8082                	ret

8000082e <MSYS_EI5_IRQHandler>:
MSYS_EI5_IRQHandler():
8000082e:	8082                	ret

80000830 <Reserved_IRQHandler>:
Reserved_IRQHandler():
80000830:	b7dd                	j	80000816 <Software_IRQHandler>

80000832 <MSYS_EI6_IRQHandler>:
MSYS_EI6_IRQHandler():
80000832:	8082                	ret

80000834 <MSYS_EI7_IRQHandler>:
MSYS_EI7_IRQHandler():
80000834:	8082                	ret

80000836 <SUBSYSR_IRQHandler>:
SUBSYSR_IRQHandler():
80000836:	8082                	ret

80000838 <_exit>:
_exit():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/miv_rv32_hal/miv_rv32_syscall.c:150 (discriminator 1)

    write(STDERR_FILENO, message, strlen(message));
    write_hex(STDERR_FILENO, code);
#endif

    while (1){};
80000838:	a001                	j	80000838 <_exit>

8000083a <HAL_enable_interrupts>:
MRV_enable_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:650
  @return
  This functions returns the CORE_GPR_DED_RESET_REG bit value.
 */
static inline void MRV_enable_interrupts(void)
{
    set_csr(mstatus, MSTATUS_MIE);
8000083a:	300467f3          	csrrsi	a5,mstatus,8
HAL_enable_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hal_irq.c:24
/*------------------------------------------------------------------------------
 * 
 */
void HAL_enable_interrupts(void) {
    MRV_enable_interrupts();
}
8000083e:	8082                	ret

80000840 <HAL_disable_interrupts>:
HAL_disable_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hal_irq.c:31
/*------------------------------------------------------------------------------
 * 
 */
psr_t HAL_disable_interrupts(void) {
    psr_t psr;
    psr = read_csr(mstatus);
80000840:	30002573          	csrr	a0,mstatus
MRV_disable_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:664
  @return
  This functions returns the CORE_GPR_DED_RESET_REG bit value.
 */
static inline void MRV_disable_interrupts(void)
{
    clear_csr(mstatus, MSTATUS_MPIE);
80000844:	08000793          	li	a5,128
80000848:	3007b7f3          	csrrc	a5,mstatus,a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:665
    clear_csr(mstatus, MSTATUS_MIE);
8000084c:	300477f3          	csrrci	a5,mstatus,8
HAL_disable_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hal_irq.c:34
    MRV_disable_interrupts();
    return(psr);
}
80000850:	8082                	ret

80000852 <HAL_restore_interrupts>:
HAL_restore_interrupts():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hal_irq.c:40

/*------------------------------------------------------------------------------
 * 
 */
void HAL_restore_interrupts(psr_t saved_psr) {
    write_csr(mstatus, saved_psr);
80000852:	30051073          	csrw	mstatus,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hal_irq.c:41
}
80000856:	8082                	ret

80000858 <HW_set_32bit_reg>:
HW_set_32bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:39
 *
 * a0:   addr_t reg_addr
 * a1:   uint32_t value
 */
HW_set_32bit_reg:
    sw a1, 0(a0)
80000858:	c10c                	sw	a1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:40
    ret
8000085a:	8082                	ret

8000085c <HW_get_32bit_reg>:
HW_get_32bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:51
 * a0:   addr_t reg_addr

 * @return          32 bits value read from the peripheral register.
 */
HW_get_32bit_reg:
    lw a0, 0(a0)
8000085c:	4108                	lw	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:52
    ret
8000085e:	8082                	ret

80000860 <HW_set_32bit_reg_field>:
HW_set_32bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:64
 * a1:   int_fast8_t shift
 * a2:   uint32_t mask
 * a3:   uint32_t value
 */
HW_set_32bit_reg_field:
    mv t3, a3
80000860:	8e36                	mv	t3,a3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:65
    sll t3, t3, a1
80000862:	00be1e33          	sll	t3,t3,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:66
    and  t3, t3, a2
80000866:	00ce7e33          	and	t3,t3,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:67
    lw t1, 0(a0)
8000086a:	00052303          	lw	t1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:68
    mv t2, a2
8000086e:	83b2                	mv	t2,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:69
    not t2, t2
80000870:	fff3c393          	not	t2,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:70
    and t1, t1, t2
80000874:	00737333          	and	t1,t1,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:71
    or t1, t1, t3
80000878:	01c36333          	or	t1,t1,t3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:72
    sw t1, 0(a0)
8000087c:	00652023          	sw	t1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:73
    ret
80000880:	8082                	ret

80000882 <HW_get_32bit_reg_field>:
HW_get_32bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:87
 *
 * @return          32 bits value containing the register field value specified
 *                  as parameter.
 */
HW_get_32bit_reg_field:
    lw a0, 0(a0)
80000882:	4108                	lw	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:88
    and a0, a0, a2
80000884:	8d71                	and	a0,a0,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:89
    srl a0, a0, a1
80000886:	00b55533          	srl	a0,a0,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:90
    ret
8000088a:	8082                	ret

8000088c <HW_set_16bit_reg>:
HW_set_16bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:100
 *
 * a0:   addr_t reg_addr
 * a1:   uint_fast16_t value
 */
HW_set_16bit_reg:
    sh a1, 0(a0)
8000088c:	00b51023          	sh	a1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:101
    ret
80000890:	8082                	ret

80000892 <HW_get_16bit_reg>:
HW_get_16bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:112
 * a0:   addr_t reg_addr

 * @return          16 bits value read from the peripheral register.
 */
HW_get_16bit_reg:
    lh a0, (a0)
80000892:	00051503          	lh	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:113
    ret
80000896:	8082                	ret

80000898 <HW_set_16bit_reg_field>:
HW_set_16bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:126
 * a2:   uint_fast16_t mask
 * a3:   uint_fast16_t value
 * @param value     Value to be written in the specified field.
 */
HW_set_16bit_reg_field:
    mv t3, a3
80000898:	8e36                	mv	t3,a3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:127
    sll t3, t3, a1
8000089a:	00be1e33          	sll	t3,t3,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:128
    and  t3, t3, a2
8000089e:	00ce7e33          	and	t3,t3,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:129
    lh t1, 0(a0)
800008a2:	00051303          	lh	t1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:130
    mv t2, a2
800008a6:	83b2                	mv	t2,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:131
    not t2, t2
800008a8:	fff3c393          	not	t2,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:132
    and t1, t1, t2
800008ac:	00737333          	and	t1,t1,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:133
    or t1, t1, t3
800008b0:	01c36333          	or	t1,t1,t3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:134
    sh t1, 0(a0)
800008b4:	00651023          	sh	t1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:135
    ret
800008b8:	8082                	ret

800008ba <HW_get_16bit_reg_field>:
HW_get_16bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:149
 *
 * @return          16 bits value containing the register field value specified
 *                  as parameter.
 */
HW_get_16bit_reg_field:
    lh a0, 0(a0)
800008ba:	00051503          	lh	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:150
    and a0, a0, a2
800008be:	8d71                	and	a0,a0,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:151
    srl a0, a0, a1
800008c0:	00b55533          	srl	a0,a0,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:152
    ret
800008c4:	8082                	ret

800008c6 <HW_set_8bit_reg>:
HW_set_8bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:162
 *
 * a0:   addr_t reg_addr
 * a1:   uint_fast8_t value
 */
HW_set_8bit_reg:
    sb a1, 0(a0)
800008c6:	00b50023          	sb	a1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:163
    ret
800008ca:	8082                	ret

800008cc <HW_get_8bit_reg>:
HW_get_8bit_reg():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:174
 * a0:   addr_t reg_addr

 * @return          8 bits value read from the peripheral register.
 */
HW_get_8bit_reg:
    lb a0, 0(a0)
800008cc:	00050503          	lb	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:175
    ret
800008d0:	8082                	ret

800008d2 <HW_set_8bit_reg_field>:
HW_set_8bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:187
 * a1:   int_fast8_t shift
 * a2:   uint_fast8_t mask
 * a3:   uint_fast8_t value
 */
HW_set_8bit_reg_field:
    mv t3, a3
800008d2:	8e36                	mv	t3,a3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:188
    sll t3, t3, a1
800008d4:	00be1e33          	sll	t3,t3,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:189
    and  t3, t3, a2
800008d8:	00ce7e33          	and	t3,t3,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:190
    lb t1, 0(a0)
800008dc:	00050303          	lb	t1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:191
    mv t2, a2
800008e0:	83b2                	mv	t2,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:192
    not t2, t2
800008e2:	fff3c393          	not	t2,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:193
    and t1, t1, t2
800008e6:	00737333          	and	t1,t1,t2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:194
    or t1, t1, t3
800008ea:	01c36333          	or	t1,t1,t3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:195
    sb t1, 0(a0)
800008ee:	00650023          	sb	t1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:196
    ret
800008f2:	8082                	ret

800008f4 <HW_get_8bit_reg_field>:
HW_get_8bit_reg_field():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:210
 *
 * @return          8 bits value containing the register field value specified
 *                  as parameter.
 */
HW_get_8bit_reg_field:
    lb a0, 0(a0)
800008f4:	00050503          	lb	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:211
    and a0, a0, a2
800008f8:	8d71                	and	a0,a0,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:212
    srl a0, a0, a1
800008fa:	00b55533          	srl	a0,a0,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/hal/hw_reg_access.S:213
    ret
800008fe:	8082                	ret

80000900 <UART_init>:
UART_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:53
    
    HAL_ASSERT( this_uart != NULL_INSTANCE )
    HAL_ASSERT( line_config <= MAX_LINE_CONFIG )
    HAL_ASSERT( baud_value <= MAX_BAUD_VALUE )

    if( ( this_uart != NULL_INSTANCE ) &&
80000900:	c525                	beqz	a0,80000968 <UART_init+0x68>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:53 (discriminator 1)
80000902:	479d                	li	a5,7
80000904:	06d7e263          	bltu	a5,a3,80000968 <UART_init+0x68>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:54
        ( line_config <= MAX_LINE_CONFIG ) &&
80000908:	6789                	lui	a5,0x2
8000090a:	04f67f63          	bgeu	a2,a5,80000968 <UART_init+0x68>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:46
{
8000090e:	1101                	addi	sp,sp,-32
80000910:	cc22                	sw	s0,24(sp)
80000912:	c84a                	sw	s2,16(sp)
80000914:	8432                	mv	s0,a2
80000916:	892e                	mv	s2,a1
80000918:	ca26                	sw	s1,20(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:60
        ( baud_value <= MAX_BAUD_VALUE ) )
    {
        /*
         * Store lower 8-bits of baud value in CTRL1.
         */
        HAL_set_8bit_reg( base_addr, CTRL1, (uint_fast8_t)(baud_value &
8000091a:	0ff67593          	andi	a1,a2,255
8000091e:	84aa                	mv	s1,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:67
    
        /*
         * Extract higher 5-bits of baud value and store in higher 5-bits 
         * of CTRL2, along with line configuration in lower 3 three bits.
         */
        HAL_set_8bit_reg( base_addr, CTRL2, (uint_fast8_t)line_config | 
80000920:	8415                	srai	s0,s0,0x5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:60
        HAL_set_8bit_reg( base_addr, CTRL1, (uint_fast8_t)(baud_value &
80000922:	00890513          	addi	a0,s2,8
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:46
{
80000926:	ce06                	sw	ra,28(sp)
80000928:	c64e                	sw	s3,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:67
        HAL_set_8bit_reg( base_addr, CTRL2, (uint_fast8_t)line_config | 
8000092a:	7f847413          	andi	s0,s0,2040
8000092e:	89b6                	mv	s3,a3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:60
        HAL_set_8bit_reg( base_addr, CTRL1, (uint_fast8_t)(baud_value &
80000930:	3f59                	jal	800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:67
        HAL_set_8bit_reg( base_addr, CTRL2, (uint_fast8_t)line_config | 
80000932:	00c90513          	addi	a0,s2,12
80000936:	013465b3          	or	a1,s0,s3
8000093a:	3771                	jal	800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:94
        
        /*
         * Flush the receive FIFO of data that may have been received before the
         * driver was initialized.
         */
        rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) &
8000093c:	01090513          	addi	a0,s2,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:71
        this_uart->base_address = base_addr;
80000940:	0124a023          	sw	s2,0(s1)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:99
                                                    STATUS_RXFULL_MASK;
        while ( rx_full )
        {
            HAL_get_8bit_reg( this_uart->base_address, RXDATA );
            rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) &
80000944:	3761                	jal	800008cc <HW_get_8bit_reg>
80000946:	8909                	andi	a0,a0,2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:96
        while ( rx_full )
80000948:	e911                	bnez	a0,8000095c <UART_init+0x5c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:106
        }

        /*
         * Clear status of the UART instance.
         */
        this_uart->status = (uint8_t)0;
8000094a:	00048223          	sb	zero,4(s1)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:108
    }
}
8000094e:	40f2                	lw	ra,28(sp)
80000950:	4462                	lw	s0,24(sp)
80000952:	44d2                	lw	s1,20(sp)
80000954:	4942                	lw	s2,16(sp)
80000956:	49b2                	lw	s3,12(sp)
80000958:	6105                	addi	sp,sp,32
8000095a:	8082                	ret
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:98
            HAL_get_8bit_reg( this_uart->base_address, RXDATA );
8000095c:	4088                	lw	a0,0(s1)
8000095e:	0511                	addi	a0,a0,4
80000960:	37b5                	jal	800008cc <HW_get_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:99
            rx_full = HAL_get_8bit_reg( this_uart->base_address, STATUS ) &
80000962:	4088                	lw	a0,0(s1)
80000964:	0541                	addi	a0,a0,16
80000966:	bff9                	j	80000944 <UART_init+0x44>
80000968:	8082                	ret

8000096a <UART_send>:
UART_send():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:129

    HAL_ASSERT( this_uart != NULL_INSTANCE )
    HAL_ASSERT( tx_buffer != NULL_BUFFER )
    HAL_ASSERT( tx_size > 0 )
      
    if( (this_uart != NULL_INSTANCE) &&
8000096a:	c129                	beqz	a0,800009ac <UART_send+0x42>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:129 (discriminator 1)
8000096c:	c1a1                	beqz	a1,800009ac <UART_send+0x42>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:130
        (tx_buffer != NULL_BUFFER)   &&
8000096e:	ce1d                	beqz	a2,800009ac <UART_send+0x42>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:121
{
80000970:	1141                	addi	sp,sp,-16
80000972:	c422                	sw	s0,8(sp)
80000974:	c226                	sw	s1,4(sp)
80000976:	c04a                	sw	s2,0(sp)
80000978:	c606                	sw	ra,12(sp)
8000097a:	892a                	mv	s2,a0
8000097c:	842e                	mv	s0,a1
8000097e:	00c584b3          	add	s1,a1,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:133 (discriminator 1)
        (tx_size > (size_t)0) )
    {
        for ( char_idx = (size_t)0; char_idx < tx_size; char_idx++ )
80000982:	00941863          	bne	s0,s1,80000992 <UART_send+0x28>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:145
            /* Send next character in the buffer. */
            HAL_set_8bit_reg( this_uart->base_address, TXDATA,
                              (uint_fast8_t)tx_buffer[char_idx] );
        }
    }
}
80000986:	40b2                	lw	ra,12(sp)
80000988:	4422                	lw	s0,8(sp)
8000098a:	4492                	lw	s1,4(sp)
8000098c:	4902                	lw	s2,0(sp)
8000098e:	0141                	addi	sp,sp,16
80000990:	8082                	ret
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:137 (discriminator 1)
                tx_ready = HAL_get_8bit_reg( this_uart->base_address, STATUS ) &
80000992:	00092503          	lw	a0,0(s2)
80000996:	0541                	addi	a0,a0,16
80000998:	3f15                	jal	800008cc <HW_get_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:139 (discriminator 1)
            } while ( !tx_ready );
8000099a:	8905                	andi	a0,a0,1
8000099c:	d97d                	beqz	a0,80000992 <UART_send+0x28>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreUARTapb/core_uart_apb.c:141 (discriminator 2)
            HAL_set_8bit_reg( this_uart->base_address, TXDATA,
8000099e:	00044583          	lbu	a1,0(s0)
800009a2:	00092503          	lw	a0,0(s2)
800009a6:	0405                	addi	s0,s0,1
800009a8:	3f39                	jal	800008c6 <HW_set_8bit_reg>
800009aa:	bfe1                	j	80000982 <UART_send+0x18>
800009ac:	8082                	ret

800009ae <enable_slave_if_required>:
enable_slave_if_required():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:673
{
    /*
     * This function is only called from within the ISR and so does not need
     * guarding on the register access.
     */
    if( 0 != this_i2c->is_slave_enabled )
800009ae:	06054783          	lbu	a5,96(a0)
800009b2:	c791                	beqz	a5,800009be <enable_slave_if_required+0x10>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:675
    {
        HAL_set_8bit_reg_field( this_i2c->base_address, AA, 0x01u );
800009b4:	4108                	lw	a0,0(a0)
800009b6:	4685                	li	a3,1
800009b8:	4611                	li	a2,4
800009ba:	4589                	li	a1,2
800009bc:	bf19                	j	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:677
    }
}
800009be:	8082                	ret

800009c0 <I2C_init>:
I2C_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:100
{
800009c0:	1101                	addi	sp,sp,-32
800009c2:	ce06                	sw	ra,28(sp)
800009c4:	cc22                	sw	s0,24(sp)
800009c6:	ca26                	sw	s1,20(sp)
800009c8:	842a                	mv	s0,a0
800009ca:	c84a                	sw	s2,16(sp)
800009cc:	c64e                	sw	s3,12(sp)
800009ce:	c452                	sw	s4,8(sp)
800009d0:	84b6                	mv	s1,a3
800009d2:	89ae                	mv	s3,a1
800009d4:	8932                	mv	s2,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:108
    saved_psr = HAL_disable_interrupts();
800009d6:	35ad                	jal	80000840 <HAL_disable_interrupts>
800009d8:	8a2a                	mv	s4,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:116
    memset(this_i2c, 0, sizeof(i2c_instance_t));
800009da:	06400613          	li	a2,100
800009de:	4581                	li	a1,0
800009e0:	00840513          	addi	a0,s0,8
800009e4:	077030ef          	jal	ra,8000425a <memset>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:126
    this_i2c->ser_address = ((uint_fast8_t)ser_address << 1u);
800009e8:	0906                	slli	s2,s2,0x1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:121
    this_i2c->base_address = base_address;
800009ea:	01342023          	sw	s3,0(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:126
    this_i2c->ser_address = ((uint_fast8_t)ser_address << 1u);
800009ee:	01242223          	sw	s2,4(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:131
    HAL_set_8bit_reg_field(this_i2c->base_address, ENS1, 0x00); /* Reset I2C hardware. */
800009f2:	854e                	mv	a0,s3
800009f4:	4681                	li	a3,0
800009f6:	04000613          	li	a2,64
800009fa:	4599                	li	a1,6
800009fc:	3dd9                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:132
    HAL_set_8bit_reg_field(this_i2c->base_address, ENS1, 0x01); /* set enable bit */
800009fe:	4008                	lw	a0,0(s0)
80000a00:	4685                	li	a3,1
80000a02:	04000613          	li	a2,64
80000a06:	4599                	li	a1,6
80000a08:	35e9                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:133
    HAL_set_8bit_reg_field(this_i2c->base_address, CR2, ( (clock_speed >> 2) & 0x01) );
80000a0a:	4008                	lw	a0,0(s0)
80000a0c:	0024d693          	srli	a3,s1,0x2
80000a10:	8a85                	andi	a3,a3,1
80000a12:	08000613          	li	a2,128
80000a16:	459d                	li	a1,7
80000a18:	3d6d                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:134
    HAL_set_8bit_reg_field(this_i2c->base_address, CR1, ( (clock_speed >> 1) & 0x01) );
80000a1a:	4008                	lw	a0,0(s0)
80000a1c:	0014d693          	srli	a3,s1,0x1
80000a20:	8a85                	andi	a3,a3,1
80000a22:	4609                	li	a2,2
80000a24:	4585                	li	a1,1
80000a26:	3575                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:135
    HAL_set_8bit_reg_field(this_i2c->base_address, CR0, ( clock_speed & 0x01) );
80000a28:	4008                	lw	a0,0(s0)
80000a2a:	0014f693          	andi	a3,s1,1
80000a2e:	4605                	li	a2,1
80000a30:	4581                	li	a1,0
80000a32:	3545                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:137
    HAL_set_8bit_reg(this_i2c->base_address, ADDRESS, this_i2c->ser_address);
80000a34:	4008                	lw	a0,0(s0)
80000a36:	404c                	lw	a1,4(s0)
80000a38:	0531                	addi	a0,a0,12
80000a3a:	3571                	jal	800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:138
    HAL_set_8bit_reg(this_i2c->base_address, ADDRESS1, this_i2c->ser_address);
80000a3c:	4008                	lw	a0,0(s0)
80000a3e:	404c                	lw	a1,4(s0)
80000a40:	0571                	addi	a0,a0,28
80000a42:	3551                	jal	800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:144
}
80000a44:	4462                	lw	s0,24(sp)
80000a46:	40f2                	lw	ra,28(sp)
80000a48:	44d2                	lw	s1,20(sp)
80000a4a:	4942                	lw	s2,16(sp)
80000a4c:	49b2                	lw	s3,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:143
    HAL_restore_interrupts( saved_psr );
80000a4e:	8552                	mv	a0,s4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:144
}
80000a50:	4a22                	lw	s4,8(sp)
80000a52:	6105                	addi	sp,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:143
    HAL_restore_interrupts( saved_psr );
80000a54:	bbfd                	j	80000852 <HAL_restore_interrupts>

80000a56 <I2C_write>:
I2C_write():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:211
{
80000a56:	7179                	addi	sp,sp,-48
80000a58:	d422                	sw	s0,40(sp)
80000a5a:	d226                	sw	s1,36(sp)
80000a5c:	842a                	mv	s0,a0
80000a5e:	c62e                	sw	a1,12(sp)
80000a60:	c432                	sw	a2,8(sp)
80000a62:	c236                	sw	a3,4(sp)
80000a64:	c03a                	sw	a4,0(sp)
80000a66:	d606                	sw	ra,44(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:215
    saved_psr = HAL_disable_interrupts();
80000a68:	3be1                	jal	80000840 <HAL_disable_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:218
    if( this_i2c->transaction == NO_TRANSACTION)
80000a6a:	00c44783          	lbu	a5,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:215
    saved_psr = HAL_disable_interrupts();
80000a6e:	84aa                	mv	s1,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:218
    if( this_i2c->transaction == NO_TRANSACTION)
80000a70:	4702                	lw	a4,0(sp)
80000a72:	4692                	lw	a3,4(sp)
80000a74:	4622                	lw	a2,8(sp)
80000a76:	45b2                	lw	a1,12(sp)
80000a78:	e781                	bnez	a5,80000a80 <I2C_write+0x2a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:220
      this_i2c->transaction = MASTER_WRITE_TRANSACTION;
80000a7a:	4785                	li	a5,1
80000a7c:	00f40623          	sb	a5,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:224
    this_i2c->pending_transaction = MASTER_WRITE_TRANSACTION ;
80000a80:	4785                	li	a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:234
    this_i2c->master_status = I2C_IN_PROGRESS;
80000a82:	d85c                	sw	a5,52(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:235
    this_i2c->options = options;
80000a84:	00e40a23          	sb	a4,20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:237
    if(I2C_IN_PROGRESS == this_i2c->slave_status)
80000a88:	4878                	lw	a4,84(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:227
    this_i2c->target_addr = (uint_fast8_t)serial_addr << 1u;
80000a8a:	0586                	slli	a1,a1,0x1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:224
    this_i2c->pending_transaction = MASTER_WRITE_TRANSACTION ;
80000a8c:	06f40523          	sb	a5,106(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:227
    this_i2c->target_addr = (uint_fast8_t)serial_addr << 1u;
80000a90:	c40c                	sw	a1,8(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:228
    this_i2c->dir = WRITE_DIR;
80000a92:	02042223          	sw	zero,36(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:229
    this_i2c->master_tx_buffer = write_buffer;
80000a96:	cc10                	sw	a2,24(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:230
    this_i2c->master_tx_size = write_size;
80000a98:	cc54                	sw	a3,28(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:231
    this_i2c->master_tx_idx = 0u;
80000a9a:	02042023          	sw	zero,32(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:237
    if(I2C_IN_PROGRESS == this_i2c->slave_status)
80000a9e:	04f71163          	bne	a4,a5,80000ae0 <I2C_write+0x8a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:239
        this_i2c->is_transaction_pending = 1u;
80000aa2:	06e404a3          	sb	a4,105(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:251
    if ( I2C_HOLD_BUS == this_i2c->bus_status )
80000aa6:	06844703          	lbu	a4,104(s0)
80000aaa:	4785                	li	a5,1
80000aac:	00f71763          	bne	a4,a5,80000aba <I2C_write+0x64>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:253
        HAL_set_8bit_reg_field(this_i2c->base_address, SI, 0x00u);
80000ab0:	4008                	lw	a0,0(s0)
80000ab2:	4681                	li	a3,0
80000ab4:	4621                	li	a2,8
80000ab6:	458d                	li	a1,3
80000ab8:	3d29                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:256
    stat_ctrl = HAL_get_8bit_reg( this_i2c->base_address, STATUS);
80000aba:	4008                	lw	a0,0(s0)
80000abc:	0511                	addi	a0,a0,4
80000abe:	3539                	jal	800008cc <HW_get_8bit_reg>
80000ac0:	00a10fa3          	sb	a0,31(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:257
    stat_ctrl = stat_ctrl;  /* Avoids lint warning. */
80000ac4:	01f14783          	lbu	a5,31(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:260
    I2C_enable_irq( this_i2c );
80000ac8:	8522                	mv	a0,s0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:257
    stat_ctrl = stat_ctrl;  /* Avoids lint warning. */
80000aca:	0ff7f793          	andi	a5,a5,255
80000ace:	00f10fa3          	sb	a5,31(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:260
    I2C_enable_irq( this_i2c );
80000ad2:	21ad                	jal	80000f3c <I2C_enable_irq>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:263
}
80000ad4:	5422                	lw	s0,40(sp)
80000ad6:	50b2                	lw	ra,44(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:262
    HAL_restore_interrupts( saved_psr );
80000ad8:	8526                	mv	a0,s1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:263
}
80000ada:	5492                	lw	s1,36(sp)
80000adc:	6145                	addi	sp,sp,48
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:262
    HAL_restore_interrupts( saved_psr );
80000ade:	bb95                	j	80000852 <HAL_restore_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:243
        HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x01u);
80000ae0:	4008                	lw	a0,0(s0)
80000ae2:	4685                	li	a3,1
80000ae4:	02000613          	li	a2,32
80000ae8:	4595                	li	a1,5
80000aea:	33e5                	jal	800008d2 <HW_set_8bit_reg_field>
80000aec:	bf6d                	j	80000aa6 <I2C_write+0x50>

80000aee <I2C_wait_complete>:
I2C_wait_complete():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:442
{
80000aee:	1101                	addi	sp,sp,-32
80000af0:	ce06                	sw	ra,28(sp)
80000af2:	cc22                	sw	s0,24(sp)
80000af4:	c62e                	sw	a1,12(sp)
80000af6:	842a                	mv	s0,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:451
    saved_psr = HAL_disable_interrupts();
80000af8:	33a1                	jal	80000840 <HAL_disable_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:452
    this_i2c->master_timeout_ms = timeout_ms;
80000afa:	45b2                	lw	a1,12(sp)
80000afc:	dc0c                	sw	a1,56(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:453
    HAL_restore_interrupts( saved_psr );
80000afe:	3b91                	jal	80000852 <HAL_restore_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:458
    } while(I2C_IN_PROGRESS == i2c_status);
80000b00:	4785                	li	a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:457 (discriminator 1)
        i2c_status = this_i2c->master_status;
80000b02:	5848                	lw	a0,52(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:458 (discriminator 1)
    } while(I2C_IN_PROGRESS == i2c_status);
80000b04:	fef50fe3          	beq	a0,a5,80000b02 <I2C_wait_complete+0x14>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:460
}
80000b08:	40f2                	lw	ra,28(sp)
80000b0a:	4462                	lw	s0,24(sp)
80000b0c:	6105                	addi	sp,sp,32
80000b0e:	8082                	ret

80000b10 <I2C_isr>:
I2C_isr():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:772
 */
void I2C_isr
(
    i2c_instance_t * this_i2c
)
{
80000b10:	1101                	addi	sp,sp,-32
80000b12:	cc22                	sw	s0,24(sp)
80000b14:	842a                	mv	s0,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:778
    volatile uint8_t status;
    uint8_t data;
    uint8_t hold_bus;
    uint8_t clear_irq = 1u;

    status = HAL_get_8bit_reg( this_i2c->base_address, STATUS);
80000b16:	4108                	lw	a0,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:772
{
80000b18:	ce06                	sw	ra,28(sp)
80000b1a:	ca26                	sw	s1,20(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:778
    status = HAL_get_8bit_reg( this_i2c->base_address, STATUS);
80000b1c:	0511                	addi	a0,a0,4
80000b1e:	337d                	jal	800008cc <HW_get_8bit_reg>
80000b20:	00a107a3          	sb	a0,15(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:780
    
    switch( status )
80000b24:	00f14783          	lbu	a5,15(sp)
80000b28:	07000713          	li	a4,112
80000b2c:	0ff7f793          	andi	a5,a5,255
80000b30:	34e78263          	beq	a5,a4,80000e74 <I2C_isr+0x364>
80000b34:	0ef76863          	bltu	a4,a5,80000c24 <I2C_isr+0x114>
80000b38:	03800713          	li	a4,56
80000b3c:	26e78763          	beq	a5,a4,80000daa <I2C_isr+0x29a>
80000b40:	06f76b63          	bltu	a4,a5,80000bb6 <I2C_isr+0xa6>
80000b44:	4761                	li	a4,24
80000b46:	22e78c63          	beq	a5,a4,80000d7e <I2C_isr+0x26e>
80000b4a:	02f76e63          	bltu	a4,a5,80000b86 <I2C_isr+0x76>
80000b4e:	4721                	li	a4,8
80000b50:	1ce78d63          	beq	a5,a4,80000d2a <I2C_isr+0x21a>
80000b54:	4741                	li	a4,16
80000b56:	1ce78a63          	beq	a5,a4,80000d2a <I2C_isr+0x21a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1205
        case ST_RESET_ACTIVATED:
        case ST_BUS_ERROR: /* Bus error during MST or selected slave modes */
        default:
            /* Some undefined state has encountered. Clear Start bit to make
             * sure, next good transaction happen */
            HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x00u);
80000b5a:	4008                	lw	a0,0(s0)
80000b5c:	4681                	li	a3,0
80000b5e:	02000613          	li	a2,32
80000b62:	4595                	li	a1,5
80000b64:	33bd                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1219
             */
            this_i2c->slave_tx_idx = 0u;
            /*
             * Clear statuses to I2C_FAILED only if there was an operation in progress.
             */
            if(I2C_IN_PROGRESS == this_i2c->master_status)
80000b66:	5858                	lw	a4,52(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1210
            this_i2c->transaction = NO_TRANSACTION;
80000b68:	00040623          	sb	zero,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1215
            this_i2c->slave_tx_idx = 0u;
80000b6c:	04042223          	sw	zero,68(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1219
            if(I2C_IN_PROGRESS == this_i2c->master_status)
80000b70:	4785                	li	a5,1
80000b72:	00f71463          	bne	a4,a5,80000b7a <I2C_isr+0x6a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1221
            {
                this_i2c->master_status = I2C_FAILED;
80000b76:	4789                	li	a5,2
80000b78:	d85c                	sw	a5,52(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1224
            }

            if(I2C_IN_PROGRESS == this_i2c->slave_status)
80000b7a:	4878                	lw	a4,84(s0)
80000b7c:	4785                	li	a5,1
80000b7e:	1ef71763          	bne	a4,a5,80000d6c <I2C_isr+0x25c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1226
            {
                this_i2c->slave_status = I2C_FAILED;
80000b82:	4789                	li	a5,2
80000b84:	ae39                	j	80000ea2 <I2C_isr+0x392>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:780
    switch( status )
80000b86:	02800713          	li	a4,40
80000b8a:	1ee78a63          	beq	a5,a4,80000d7e <I2C_isr+0x26e>
80000b8e:	03000713          	li	a4,48
80000b92:	4008                	lw	a0,0(s0)
80000b94:	00e78663          	beq	a5,a4,80000ba0 <I2C_isr+0x90>
80000b98:	02000713          	li	a4,32
80000b9c:	fae79fe3          	bne	a5,a4,80000b5a <I2C_isr+0x4a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:917
            HAL_set_8bit_reg_field(this_i2c->base_address, STO, 0x01u);
80000ba0:	4685                	li	a3,1
80000ba2:	4641                	li	a2,16
80000ba4:	4591                	li	a1,4
80000ba6:	3335                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:918
            this_i2c->master_status = I2C_FAILED;
80000ba8:	4789                	li	a5,2
80000baa:	d85c                	sw	a5,52(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:924
            this_i2c->transaction = NO_TRANSACTION;
80000bac:	00040623          	sb	zero,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1132
            enable_slave_if_required(this_i2c); /* Make sure AA is set correctly */
80000bb0:	8522                	mv	a0,s0
80000bb2:	3bf5                	jal	800009ae <enable_slave_if_required>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1232
            }

            break;
    }
    
    if ( clear_irq )
80000bb4:	aa65                	j	80000d6c <I2C_isr+0x25c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:780
    switch( status )
80000bb6:	05000713          	li	a4,80
80000bba:	4008                	lw	a0,0(s0)
80000bbc:	26e78763          	beq	a5,a4,80000e2a <I2C_isr+0x31a>
80000bc0:	00f76963          	bltu	a4,a5,80000bd2 <I2C_isr+0xc2>
80000bc4:	04000713          	li	a4,64
80000bc8:	22e78863          	beq	a5,a4,80000df8 <I2C_isr+0x2e8>
80000bcc:	04800713          	li	a4,72
80000bd0:	b7f1                	j	80000b9c <I2C_isr+0x8c>
80000bd2:	06000713          	li	a4,96
80000bd6:	28e78f63          	beq	a5,a4,80000e74 <I2C_isr+0x364>
80000bda:	06800713          	li	a4,104
80000bde:	28e78863          	beq	a5,a4,80000e6e <I2C_isr+0x35e>
80000be2:	05800713          	li	a4,88
80000be6:	f6e79ae3          	bne	a5,a4,80000b5a <I2C_isr+0x4a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:941
            this_i2c->master_rx_buffer[this_i2c->master_rx_idx] = HAL_get_8bit_reg(this_i2c->base_address, DATA);
80000bea:	581c                	lw	a5,48(s0)
80000bec:	5404                	lw	s1,40(s0)
80000bee:	0521                	addi	a0,a0,8
80000bf0:	94be                	add	s1,s1,a5
80000bf2:	39e9                	jal	800008cc <HW_get_8bit_reg>
80000bf4:	00a48023          	sb	a0,0(s1)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:943
            hold_bus = this_i2c->options & I2C_HOLD_BUS; 
80000bf8:	01444783          	lbu	a5,20(s0)
80000bfc:	8b85                	andi	a5,a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:946
            this_i2c->bus_status  = hold_bus;
80000bfe:	06f40423          	sb	a5,104(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:947
            if ( hold_bus == 0u )
80000c02:	24079463          	bnez	a5,80000e4a <I2C_isr+0x33a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:949
                HAL_set_8bit_reg_field(this_i2c->base_address, STO, 0x01u);  /*xmt stop condition */
80000c06:	4008                	lw	a0,0(s0)
80000c08:	4685                	li	a3,1
80000c0a:	4641                	li	a2,16
80000c0c:	4591                	li	a1,4
80000c0e:	31d1                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:952
                   enable_slave_if_required(this_i2c);
80000c10:	8522                	mv	a0,s0
80000c12:	3b71                	jal	800009ae <enable_slave_if_required>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:776
    uint8_t clear_irq = 1u;
80000c14:	4785                	li	a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:963
            this_i2c->transaction = NO_TRANSACTION;
80000c16:	00040623          	sb	zero,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:964
            this_i2c->master_status = I2C_SUCCESS;
80000c1a:	02042a23          	sw	zero,52(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1232
    if ( clear_irq )
80000c1e:	14079763          	bnez	a5,80000d6c <I2C_isr+0x25c>
80000c22:	a2c9                	j	80000de4 <I2C_isr+0x2d4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:780
    switch( status )
80000c24:	0a800713          	li	a4,168
80000c28:	06e78663          	beq	a5,a4,80000c94 <I2C_isr+0x184>
80000c2c:	04f76663          	bltu	a4,a5,80000c78 <I2C_isr+0x168>
80000c30:	08800713          	li	a4,136
80000c34:	20e78f63          	beq	a5,a4,80000e52 <I2C_isr+0x342>
80000c38:	02f76563          	bltu	a4,a5,80000c62 <I2C_isr+0x152>
80000c3c:	07800713          	li	a4,120
80000c40:	22e78763          	beq	a5,a4,80000e6e <I2C_isr+0x35e>
80000c44:	08000713          	li	a4,128
80000c48:	f0e799e3          	bne	a5,a4,80000b5a <I2C_isr+0x4a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1015
            if((this_i2c->slave_rx_buffer != (uint8_t *)0)
80000c4c:	443c                	lw	a5,72(s0)
80000c4e:	26078b63          	beqz	a5,80000ec4 <I2C_isr+0x3b4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1016
               && (this_i2c->slave_rx_idx < this_i2c->slave_rx_size))
80000c52:	4838                	lw	a4,80(s0)
80000c54:	447c                	lw	a5,76(s0)
80000c56:	24f76863          	bltu	a4,a5,80000ea6 <I2C_isr+0x396>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1037
                HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x00u); 
80000c5a:	4681                	li	a3,0
80000c5c:	4611                	li	a2,4
80000c5e:	4589                	li	a1,2
80000c60:	aa89                	j	80000db2 <I2C_isr+0x2a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:780
    switch( status )
80000c62:	09800713          	li	a4,152
80000c66:	1ee78663          	beq	a5,a4,80000e52 <I2C_isr+0x342>
80000c6a:	0a000713          	li	a4,160
80000c6e:	24e78e63          	beq	a5,a4,80000eca <I2C_isr+0x3ba>
80000c72:	09000713          	li	a4,144
80000c76:	bfc9                	j	80000c48 <I2C_isr+0x138>
80000c78:	0c000713          	li	a4,192
80000c7c:	08e78f63          	beq	a5,a4,80000d1a <I2C_isr+0x20a>
80000c80:	08f76163          	bltu	a4,a5,80000d02 <I2C_isr+0x1f2>
80000c84:	0b000713          	li	a4,176
80000c88:	00e78663          	beq	a5,a4,80000c94 <I2C_isr+0x184>
80000c8c:	0b800713          	li	a4,184
80000c90:	ece795e3          	bne	a5,a4,80000b5a <I2C_isr+0x4a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1140
            if ( status == ST_SLAVE_SLAR_ACK )
80000c94:	00f14783          	lbu	a5,15(sp)
80000c98:	0a800713          	li	a4,168
80000c9c:	02f71763          	bne	a4,a5,80000cca <I2C_isr+0x1ba>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1148
                if(HAL_get_8bit_reg_field(this_i2c->base_address, STA))
80000ca0:	4008                	lw	a0,0(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1142
                this_i2c->transaction = READ_SLAVE_TRANSACTION;
80000ca2:	4795                	li	a5,5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1144
                this_i2c->slave_status = I2C_IN_PROGRESS;
80000ca4:	4485                	li	s1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1142
                this_i2c->transaction = READ_SLAVE_TRANSACTION;
80000ca6:	00f40623          	sb	a5,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1143
                this_i2c->random_read_addr = 0u;
80000caa:	00042823          	sw	zero,16(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1144
                this_i2c->slave_status = I2C_IN_PROGRESS;
80000cae:	c864                	sw	s1,84(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1148
                if(HAL_get_8bit_reg_field(this_i2c->base_address, STA))
80000cb0:	02000613          	li	a2,32
80000cb4:	4595                	li	a1,5
80000cb6:	393d                	jal	800008f4 <HW_get_8bit_reg_field>
80000cb8:	c909                	beqz	a0,80000cca <I2C_isr+0x1ba>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1150
                    HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x00u);
80000cba:	4008                	lw	a0,0(s0)
80000cbc:	4681                	li	a3,0
80000cbe:	02000613          	li	a2,32
80000cc2:	4595                	li	a1,5
80000cc4:	3139                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1151
                    this_i2c->is_transaction_pending = 1u;
80000cc6:	069404a3          	sb	s1,105(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1154
            if (this_i2c->slave_tx_idx >= this_i2c->slave_tx_size)
80000cca:	4008                	lw	a0,0(s0)
80000ccc:	4078                	lw	a4,68(s0)
80000cce:	403c                	lw	a5,64(s0)
80000cd0:	0521                	addi	a0,a0,8
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1158
                HAL_set_8bit_reg(this_i2c->base_address, DATA, 0xFFu);
80000cd2:	0ff00593          	li	a1,255
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1154
            if (this_i2c->slave_tx_idx >= this_i2c->slave_tx_size)
80000cd6:	00f77963          	bgeu	a4,a5,80000ce8 <I2C_isr+0x1d8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1163
                HAL_set_8bit_reg(this_i2c->base_address, DATA, (uint_fast8_t)this_i2c->slave_tx_buffer[this_i2c->slave_tx_idx++]);
80000cda:	5c5c                	lw	a5,60(s0)
80000cdc:	00170693          	addi	a3,a4,1 # 6001 <STACK_SIZE+0x5801>
80000ce0:	c074                	sw	a3,68(s0)
80000ce2:	97ba                	add	a5,a5,a4
80000ce4:	0007c583          	lbu	a1,0(a5) # 2000 <STACK_SIZE+0x1800>
80000ce8:	3ef9                	jal	800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1166
            if (this_i2c->slave_tx_idx >= this_i2c->slave_tx_size) /* last byte? */
80000cea:	4078                	lw	a4,68(s0)
80000cec:	403c                	lw	a5,64(s0)
80000cee:	06f76f63          	bltu	a4,a5,80000d6c <I2C_isr+0x25c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1168
                 HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x00u); 
80000cf2:	4008                	lw	a0,0(s0)
80000cf4:	4681                	li	a3,0
80000cf6:	4611                	li	a2,4
80000cf8:	4589                	li	a1,2
80000cfa:	3ee1                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1171
                this_i2c->slave_tx_idx = 0u;
80000cfc:	04042223          	sw	zero,68(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1232
    if ( clear_irq )
80000d00:	a0b5                	j	80000d6c <I2C_isr+0x25c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:780
    switch( status )
80000d02:	0d800713          	li	a4,216
80000d06:	22e78063          	beq	a5,a4,80000f26 <I2C_isr+0x416>
80000d0a:	0e000713          	li	a4,224
80000d0e:	04e78f63          	beq	a5,a4,80000d6c <I2C_isr+0x25c>
80000d12:	0c800713          	li	a4,200
80000d16:	e4e792e3          	bne	a5,a4,80000b5a <I2C_isr+0x4a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1180
            this_i2c->slave_tx_idx = 0u;
80000d1a:	04042223          	sw	zero,68(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1181
            HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x01u); 
80000d1e:	4008                	lw	a0,0(s0)
80000d20:	4685                	li	a3,1
80000d22:	4611                	li	a2,4
80000d24:	4589                	li	a1,2
80000d26:	3675                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1184
            this_i2c->slave_status = I2C_SUCCESS;
80000d28:	aaf9                	j	80000f06 <I2C_isr+0x3f6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:786
            HAL_set_8bit_reg_field( this_i2c->base_address, STA, 0x00u);
80000d2a:	4008                	lw	a0,0(s0)
80000d2c:	4681                	li	a3,0
80000d2e:	02000613          	li	a2,32
80000d32:	4595                	li	a1,5
80000d34:	3e79                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:787
            HAL_set_8bit_reg( this_i2c->base_address, DATA, this_i2c->target_addr); /* write call address */
80000d36:	4008                	lw	a0,0(s0)
80000d38:	440c                	lw	a1,8(s0)
80000d3a:	0521                	addi	a0,a0,8
80000d3c:	3669                	jal	800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:788
            HAL_set_8bit_reg_field( this_i2c->base_address, DIR, this_i2c->dir); /* set direction bit */
80000d3e:	4008                	lw	a0,0(s0)
80000d40:	5054                	lw	a3,36(s0)
80000d42:	4605                	li	a2,1
80000d44:	4581                	li	a1,0
80000d46:	0521                	addi	a0,a0,8
80000d48:	3669                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:789
            if(this_i2c->dir == WRITE_DIR)
80000d4a:	505c                	lw	a5,36(s0)
80000d4c:	e795                	bnez	a5,80000d78 <I2C_isr+0x268>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:791
                 this_i2c->master_tx_idx = 0u;
80000d4e:	02042023          	sw	zero,32(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:803
            if(this_i2c->is_transaction_pending)
80000d52:	06944783          	lbu	a5,105(s0)
80000d56:	c399                	beqz	a5,80000d5c <I2C_isr+0x24c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:805
                this_i2c->is_transaction_pending = 0u;
80000d58:	060404a3          	sb	zero,105(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:812
            if(this_i2c->transaction != this_i2c->pending_transaction)
80000d5c:	06a44783          	lbu	a5,106(s0)
80000d60:	00c44703          	lbu	a4,12(s0)
80000d64:	00f70463          	beq	a4,a5,80000d6c <I2C_isr+0x25c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:814
                this_i2c->transaction = this_i2c->pending_transaction;
80000d68:	00f40623          	sb	a5,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1235
    {
        /* clear interrupt. */
        HAL_set_8bit_reg_field(this_i2c->base_address, SI, 0x00u);
80000d6c:	4008                	lw	a0,0(s0)
80000d6e:	4681                	li	a3,0
80000d70:	4621                	li	a2,8
80000d72:	458d                	li	a1,3
80000d74:	3eb9                	jal	800008d2 <HW_set_8bit_reg_field>
80000d76:	a0bd                	j	80000de4 <I2C_isr+0x2d4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:795
                 this_i2c->master_rx_idx = 0u;
80000d78:	02042823          	sw	zero,48(s0)
80000d7c:	bfd9                	j	80000d52 <I2C_isr+0x242>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:839
            if (this_i2c->master_tx_idx < this_i2c->master_tx_size)
80000d7e:	5018                	lw	a4,32(s0)
80000d80:	4c5c                	lw	a5,28(s0)
80000d82:	00f77d63          	bgeu	a4,a5,80000d9c <I2C_isr+0x28c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:841
                HAL_set_8bit_reg(this_i2c->base_address, DATA, (uint_fast8_t)this_i2c->master_tx_buffer[this_i2c->master_tx_idx++]);
80000d86:	4c1c                	lw	a5,24(s0)
80000d88:	00170693          	addi	a3,a4,1
80000d8c:	4008                	lw	a0,0(s0)
80000d8e:	d014                	sw	a3,32(s0)
80000d90:	97ba                	add	a5,a5,a4
80000d92:	0007c583          	lbu	a1,0(a5)
80000d96:	0521                	addi	a0,a0,8
80000d98:	363d                	jal	800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1232
    if ( clear_irq )
80000d9a:	bfc9                	j	80000d6c <I2C_isr+0x25c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:843
            else if ( this_i2c->transaction == MASTER_RANDOM_READ_TRANSACTION )
80000d9c:	00c44703          	lbu	a4,12(s0)
80000da0:	478d                	li	a5,3
80000da2:	00f71b63          	bne	a4,a5,80000db8 <I2C_isr+0x2a8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:847
                 this_i2c->dir = READ_DIR;
80000da6:	4785                	li	a5,1
80000da8:	d05c                	sw	a5,36(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:848
                 HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x01u);
80000daa:	4685                	li	a3,1
80000dac:	02000613          	li	a2,32
80000db0:	4595                	li	a1,5
80000db2:	4008                	lw	a0,0(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:905
                HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x00u);
80000db4:	3e39                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1232
    if ( clear_irq )
80000db6:	bf5d                	j	80000d6c <I2C_isr+0x25c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:857
                hold_bus = this_i2c->options & I2C_HOLD_BUS;
80000db8:	01444783          	lbu	a5,20(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:856
                this_i2c->transaction = NO_TRANSACTION;
80000dbc:	00040623          	sb	zero,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:857
                hold_bus = this_i2c->options & I2C_HOLD_BUS;
80000dc0:	8b85                	andi	a5,a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:860
                this_i2c->bus_status  = hold_bus;
80000dc2:	06f40423          	sb	a5,104(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:861
                if ( hold_bus == 0u )
80000dc6:	eb99                	bnez	a5,80000ddc <I2C_isr+0x2cc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:863
                    HAL_set_8bit_reg_field(this_i2c->base_address, STO, 0x01u);  /*xmt stop condition */
80000dc8:	4008                	lw	a0,0(s0)
80000dca:	4685                	li	a3,1
80000dcc:	4641                	li	a2,16
80000dce:	4591                	li	a1,4
80000dd0:	3609                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:864
                    enable_slave_if_required(this_i2c);
80000dd2:	8522                	mv	a0,s0
80000dd4:	3ee9                	jal	800009ae <enable_slave_if_required>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:871
                this_i2c->master_status = I2C_SUCCESS;
80000dd6:	02042a23          	sw	zero,52(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1232
    if ( clear_irq )
80000dda:	bf49                	j	80000d6c <I2C_isr+0x25c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:868
                    I2C_disable_irq( this_i2c );
80000ddc:	8522                	mv	a0,s0
80000dde:	2a85                	jal	80000f4e <I2C_disable_irq>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:871
                this_i2c->master_status = I2C_SUCCESS;
80000de0:	02042a23          	sw	zero,52(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1240
    }
    
    /* Read the status register to ensure the last I2C registers write took place
     * in a system built around a bus making use of posted writes. */
    status = HAL_get_8bit_reg( this_i2c->base_address, STATUS);
80000de4:	4008                	lw	a0,0(s0)
80000de6:	0511                	addi	a0,a0,4
80000de8:	34d5                	jal	800008cc <HW_get_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1241
}
80000dea:	40f2                	lw	ra,28(sp)
80000dec:	4462                	lw	s0,24(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1240
    status = HAL_get_8bit_reg( this_i2c->base_address, STATUS);
80000dee:	00a107a3          	sb	a0,15(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1241
}
80000df2:	44d2                	lw	s1,20(sp)
80000df4:	6105                	addi	sp,sp,32
80000df6:	8082                	ret
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:899
            if(this_i2c->master_rx_size > 1u)
80000df8:	5458                	lw	a4,44(s0)
80000dfa:	4785                	li	a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:901
                HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x01u);
80000dfc:	4685                	li	a3,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:899
            if(this_i2c->master_rx_size > 1u)
80000dfe:	00e7e563          	bltu	a5,a4,80000e08 <I2C_isr+0x2f8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:903
            else if(1u == this_i2c->master_rx_size)
80000e02:	00f71663          	bne	a4,a5,80000e0e <I2C_isr+0x2fe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:905
                HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x00u);
80000e06:	4681                	li	a3,0
80000e08:	4611                	li	a2,4
80000e0a:	4589                	li	a1,2
80000e0c:	b765                	j	80000db4 <I2C_isr+0x2a4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:909
                HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x01u);
80000e0e:	4685                	li	a3,1
80000e10:	4611                	li	a2,4
80000e12:	4589                	li	a1,2
80000e14:	3c7d                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:910
                HAL_set_8bit_reg_field(this_i2c->base_address, STO, 0x01u);
80000e16:	4008                	lw	a0,0(s0)
80000e18:	4685                	li	a3,1
80000e1a:	4641                	li	a2,16
80000e1c:	4591                	li	a1,4
80000e1e:	3c55                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:911
                this_i2c->master_status = I2C_SUCCESS;
80000e20:	02042a23          	sw	zero,52(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1109
            this_i2c->transaction = NO_TRANSACTION;
80000e24:	00040623          	sb	zero,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1232
    if ( clear_irq )
80000e28:	b791                	j	80000d6c <I2C_isr+0x25c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:930
            this_i2c->master_rx_buffer[this_i2c->master_rx_idx++] = HAL_get_8bit_reg(this_i2c->base_address, DATA);
80000e2a:	581c                	lw	a5,48(s0)
80000e2c:	5404                	lw	s1,40(s0)
80000e2e:	0521                	addi	a0,a0,8
80000e30:	00178713          	addi	a4,a5,1
80000e34:	d818                	sw	a4,48(s0)
80000e36:	94be                	add	s1,s1,a5
80000e38:	3c51                	jal	800008cc <HW_get_8bit_reg>
80000e3a:	00a48023          	sb	a0,0(s1)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:931
            if( this_i2c->master_rx_idx >= (this_i2c->master_rx_size - 1u))
80000e3e:	545c                	lw	a5,44(s0)
80000e40:	5818                	lw	a4,48(s0)
80000e42:	17fd                	addi	a5,a5,-1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1034
            if(this_i2c->slave_rx_idx >= this_i2c->slave_rx_size)
80000e44:	f2f764e3          	bltu	a4,a5,80000d6c <I2C_isr+0x25c>
80000e48:	bd09                	j	80000c5a <I2C_isr+0x14a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:956
                I2C_disable_irq( this_i2c );
80000e4a:	8522                	mv	a0,s0
80000e4c:	2209                	jal	80000f4e <I2C_disable_irq>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:957
                clear_irq = 0u;
80000e4e:	4781                	li	a5,0
80000e50:	b3d9                	j	80000c16 <I2C_isr+0x106>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:970
            HAL_set_8bit_reg_field(this_i2c->base_address, AA, 0x01u);
80000e52:	4008                	lw	a0,0(s0)
80000e54:	4685                	li	a3,1
80000e56:	4611                	li	a2,4
80000e58:	4589                	li	a1,2
80000e5a:	3ca5                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:976
            if(this_i2c->is_transaction_pending)
80000e5c:	06944783          	lbu	a5,105(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:972
            this_i2c->transaction = NO_TRANSACTION;
80000e60:	00040623          	sb	zero,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:973
            this_i2c->slave_status = I2C_SUCCESS;
80000e64:	04042a23          	sw	zero,84(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:976
            if(this_i2c->is_transaction_pending)
80000e68:	f00782e3          	beqz	a5,80000d6c <I2C_isr+0x25c>
80000e6c:	bf3d                	j	80000daa <I2C_isr+0x29a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:988
            this_i2c->is_transaction_pending = 1u;
80000e6e:	4785                	li	a5,1
80000e70:	06f404a3          	sb	a5,105(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1000
            if(HAL_get_8bit_reg_field(this_i2c->base_address, STA))
80000e74:	4008                	lw	a0,0(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:993
            this_i2c->transaction = WRITE_SLAVE_TRANSACTION;
80000e76:	4791                	li	a5,4
80000e78:	00f40623          	sb	a5,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:994
            this_i2c->slave_rx_idx = 0u;
80000e7c:	04042823          	sw	zero,80(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:995
            this_i2c->random_read_addr = 0u;
80000e80:	00042823          	sw	zero,16(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1000
            if(HAL_get_8bit_reg_field(this_i2c->base_address, STA))
80000e84:	02000613          	li	a2,32
80000e88:	4595                	li	a1,5
80000e8a:	34ad                	jal	800008f4 <HW_get_8bit_reg_field>
80000e8c:	c911                	beqz	a0,80000ea0 <I2C_isr+0x390>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1002
                HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x00u);
80000e8e:	4008                	lw	a0,0(s0)
80000e90:	4681                	li	a3,0
80000e92:	02000613          	li	a2,32
80000e96:	4595                	li	a1,5
80000e98:	3c2d                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1003
                this_i2c->is_transaction_pending = 1u;
80000e9a:	4785                	li	a5,1
80000e9c:	06f404a3          	sb	a5,105(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1005
            this_i2c->slave_status = I2C_IN_PROGRESS;
80000ea0:	4785                	li	a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1226
                this_i2c->slave_status = I2C_FAILED;
80000ea2:	c87c                	sw	a5,84(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1232
    if ( clear_irq )
80000ea4:	b5e1                	j	80000d6c <I2C_isr+0x25c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1018
                data = HAL_get_8bit_reg(this_i2c->base_address, DATA);
80000ea6:	4008                	lw	a0,0(s0)
80000ea8:	0521                	addi	a0,a0,8
80000eaa:	340d                	jal	800008cc <HW_get_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1019
                this_i2c->slave_rx_buffer[this_i2c->slave_rx_idx++] = data;
80000eac:	483c                	lw	a5,80(s0)
80000eae:	4438                	lw	a4,72(s0)
80000eb0:	00178693          	addi	a3,a5,1
80000eb4:	973e                	add	a4,a4,a5
80000eb6:	c834                	sw	a3,80(s0)
80000eb8:	00a70023          	sb	a0,0(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1028
                    this_i2c->random_read_addr = (this_i2c->random_read_addr << 8) + data;
80000ebc:	481c                	lw	a5,16(s0)
80000ebe:	07a2                	slli	a5,a5,0x8
80000ec0:	97aa                	add	a5,a5,a0
80000ec2:	c81c                	sw	a5,16(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1034
            if(this_i2c->slave_rx_idx >= this_i2c->slave_rx_size)
80000ec4:	4838                	lw	a4,80(s0)
80000ec6:	447c                	lw	a5,76(s0)
80000ec8:	bfb5                	j	80000e44 <I2C_isr+0x334>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1047
            if ( this_i2c->transaction == WRITE_SLAVE_TRANSACTION )
80000eca:	00c44703          	lbu	a4,12(s0)
80000ece:	4791                	li	a5,4
80000ed0:	04f71863          	bne	a4,a5,80000f20 <I2C_isr+0x410>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1049
                if ( this_i2c->slave_rx_idx == this_i2c->slave_mem_offset_length )
80000ed4:	4830                	lw	a2,80(s0)
80000ed6:	4c3c                	lw	a5,88(s0)
80000ed8:	00f61463          	bne	a2,a5,80000ee0 <I2C_isr+0x3d0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1051
                    this_i2c->slave_tx_idx = this_i2c->random_read_addr;
80000edc:	481c                	lw	a5,16(s0)
80000ede:	c07c                	sw	a5,68(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1054
                if ( this_i2c->slave_write_handler != 0u )
80000ee0:	4c7c                	lw	a5,92(s0)
80000ee2:	e2078ee3          	beqz	a5,80000d1e <I2C_isr+0x20e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1057
                    h_ret = this_i2c->slave_write_handler( this_i2c, this_i2c->slave_rx_buffer, (uint16_t)this_i2c->slave_rx_idx );
80000ee6:	442c                	lw	a1,72(s0)
80000ee8:	0642                	slli	a2,a2,0x10
80000eea:	8241                	srli	a2,a2,0x10
80000eec:	8522                	mv	a0,s0
80000eee:	9782                	jalr	a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1058
                    if ( I2C_REENABLE_SLAVE_RX == h_ret )
80000ef0:	e501                	bnez	a0,80000ef8 <I2C_isr+0x3e8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1093
                enable_slave_if_required(this_i2c);
80000ef2:	8522                	mv	a0,s0
80000ef4:	3c6d                	jal	800009ae <enable_slave_if_required>
80000ef6:	a801                	j	80000f06 <I2C_isr+0x3f6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1068
                        HAL_set_8bit_reg_field( this_i2c->base_address, AA, 0x0u );
80000ef8:	4008                	lw	a0,0(s0)
80000efa:	4681                	li	a3,0
80000efc:	4611                	li	a2,4
80000efe:	4589                	li	a1,2
80000f00:	3ac9                	jal	800008d2 <HW_set_8bit_reg_field>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1072
                        this_i2c->is_slave_enabled = 0u;
80000f02:	06040023          	sb	zero,96(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1100
            if(this_i2c->is_transaction_pending)
80000f06:	06944783          	lbu	a5,105(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1097
            this_i2c->slave_status = I2C_SUCCESS;
80000f0a:	04042a23          	sw	zero,84(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1100
            if(this_i2c->is_transaction_pending)
80000f0e:	f0078be3          	beqz	a5,80000e24 <I2C_isr+0x314>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1102
                HAL_set_8bit_reg_field(this_i2c->base_address, STA, 0x01u);
80000f12:	4008                	lw	a0,0(s0)
80000f14:	4685                	li	a3,1
80000f16:	02000613          	li	a2,32
80000f1a:	4595                	li	a1,5
80000f1c:	3a5d                	jal	800008d2 <HW_set_8bit_reg_field>
80000f1e:	b719                	j	80000e24 <I2C_isr+0x314>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1087
                this_i2c->slave_tx_idx = 0u;
80000f20:	04042223          	sw	zero,68(s0)
80000f24:	b7f9                	j	80000ef2 <I2C_isr+0x3e2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1127
            if(I2C_IN_PROGRESS == this_i2c->slave_status)
80000f26:	4878                	lw	a4,84(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1118
            this_i2c->transaction = NO_TRANSACTION;
80000f28:	00040623          	sb	zero,12(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1123
            this_i2c->slave_tx_idx = 0u;
80000f2c:	04042223          	sw	zero,68(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1127
            if(I2C_IN_PROGRESS == this_i2c->slave_status)
80000f30:	4785                	li	a5,1
80000f32:	c6f71fe3          	bne	a4,a5,80000bb0 <I2C_isr+0xa0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/core_i2c.c:1129
                this_i2c->slave_status = I2C_FAILED;
80000f36:	4789                	li	a5,2
80000f38:	c87c                	sw	a5,84(s0)
80000f3a:	b99d                	j	80000bb0 <I2C_isr+0xa0>

80000f3c <I2C_enable_irq>:
I2C_enable_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:20
 * This function must be modified to enable interrupts generated from the
 * CoreI2C instance identified as parameter.
 */
void I2C_enable_irq( i2c_instance_t * this_i2c )
{
    if(this_i2c == &g_i2c_instance_cam1)
80000f3c:	97418793          	addi	a5,gp,-1676 # 80004504 <g_i2c_instance_cam1>
80000f40:	00a79663          	bne	a5,a0,80000f4c <I2C_enable_irq+0x10>
MRV_enable_local_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:620
    set_csr(mie, mask);
80000f44:	010007b7          	lui	a5,0x1000
80000f48:	3047a7f3          	csrrs	a5,mie,a5
I2C_enable_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:24
    {
        MRV_enable_local_irq(MRV32_MSYS_EIE0_IRQn);
    }
}
80000f4c:	8082                	ret

80000f4e <I2C_disable_irq>:
I2C_disable_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:32
 * This function must be modified to disable interrupts generated from the
 * CoreI2C instance identified as parameter.
 */
void I2C_disable_irq( i2c_instance_t * this_i2c )
{
    if(this_i2c == &g_i2c_instance_cam1)
80000f4e:	97418793          	addi	a5,gp,-1676 # 80004504 <g_i2c_instance_cam1>
80000f52:	00a79663          	bne	a5,a0,80000f5e <I2C_disable_irq+0x10>
MRV_disable_local_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:634
    clear_csr(mie, mask);
80000f56:	010007b7          	lui	a5,0x1000
80000f5a:	3047b7f3          	csrrc	a5,mie,a5
I2C_disable_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreI2C/i2c_interrupt.c:36
       {
           MRV_disable_local_irq(MRV32_MSYS_EIE0_IRQn);
       }
}
80000f5e:	8082                	ret

80000f60 <GPIO_init>:
GPIO_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:37
(
    gpio_instance_t *   this_gpio,
    addr_t              base_addr,
    gpio_apb_width_t    bus_width
)
{
80000f60:	1141                	addi	sp,sp,-16
80000f62:	c422                	sw	s0,8(sp)
80000f64:	842a                	mv	s0,a0
80000f66:	c226                	sw	s1,4(sp)
80000f68:	c04a                	sw	s2,0(sp)
80000f6a:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:41
    uint8_t i = 0;
    addr_t cfg_reg_addr = base_addr;
    
    this_gpio->base_addr = base_addr;
80000f6c:	c00c                	sw	a1,0(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:37
{
80000f6e:	84ae                	mv	s1,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:42
    this_gpio->apb_bus_width = bus_width;
80000f70:	c150                	sw	a2,4(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:45
    
    /* Clear configuration. */
    for( i = 0, cfg_reg_addr = base_addr; i < NB_OF_GPIO; ++i )
80000f72:	08058913          	addi	s2,a1,128
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:47 (discriminator 3)
    {
        HW_set_8bit_reg( cfg_reg_addr, 0 );
80000f76:	8526                	mv	a0,s1
80000f78:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:48 (discriminator 3)
        cfg_reg_addr += 4;
80000f7a:	0491                	addi	s1,s1,4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:47 (discriminator 3)
        HW_set_8bit_reg( cfg_reg_addr, 0 );
80000f7c:	94bff0ef          	jal	ra,800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:45 (discriminator 3)
    for( i = 0, cfg_reg_addr = base_addr; i < NB_OF_GPIO; ++i )
80000f80:	ff249be3          	bne	s1,s2,80000f76 <GPIO_init+0x16>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:51
    }
    /* Clear any pending interrupts */
    switch( this_gpio->apb_bus_width )
80000f84:	405c                	lw	a5,4(s0)
80000f86:	4705                	li	a4,1
80000f88:	02e78163          	beq	a5,a4,80000faa <GPIO_init+0x4a>
80000f8c:	c3b9                	beqz	a5,80000fd2 <GPIO_init+0x72>
80000f8e:	4709                	li	a4,2
80000f90:	08e79263          	bne	a5,a4,80001014 <GPIO_init+0xb4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:54
    {
        case GPIO_APB_32_BITS_BUS:
            HAL_set_32bit_reg( this_gpio->base_addr, IRQ, CLEAR_ALL_IRQ32 );
80000f94:	4008                	lw	a0,0(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:73
            
        default:
            HAL_ASSERT(0);
            break;
    }
}
80000f96:	4422                	lw	s0,8(sp)
80000f98:	40b2                	lw	ra,12(sp)
80000f9a:	4492                	lw	s1,4(sp)
80000f9c:	4902                	lw	s2,0(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:54
            HAL_set_32bit_reg( this_gpio->base_addr, IRQ, CLEAR_ALL_IRQ32 );
80000f9e:	55fd                	li	a1,-1
80000fa0:	08050513          	addi	a0,a0,128
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:73
}
80000fa4:	0141                	addi	sp,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:54
            HAL_set_32bit_reg( this_gpio->base_addr, IRQ, CLEAR_ALL_IRQ32 );
80000fa6:	8b3ff06f          	j	80000858 <HW_set_32bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:58
            HAL_set_16bit_reg( this_gpio->base_addr, IRQ0, (uint16_t)CLEAR_ALL_IRQ16 );
80000faa:	4008                	lw	a0,0(s0)
80000fac:	64c1                	lui	s1,0x10
80000fae:	fff48593          	addi	a1,s1,-1 # ffff <STACK_SIZE+0xf7ff>
80000fb2:	08050513          	addi	a0,a0,128
80000fb6:	8d7ff0ef          	jal	ra,8000088c <HW_set_16bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:59
            HAL_set_16bit_reg( this_gpio->base_addr, IRQ1, (uint16_t)CLEAR_ALL_IRQ16 );
80000fba:	4008                	lw	a0,0(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:73
}
80000fbc:	4422                	lw	s0,8(sp)
80000fbe:	40b2                	lw	ra,12(sp)
80000fc0:	4902                	lw	s2,0(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:59
            HAL_set_16bit_reg( this_gpio->base_addr, IRQ1, (uint16_t)CLEAR_ALL_IRQ16 );
80000fc2:	fff48593          	addi	a1,s1,-1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:73
}
80000fc6:	4492                	lw	s1,4(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:59
            HAL_set_16bit_reg( this_gpio->base_addr, IRQ1, (uint16_t)CLEAR_ALL_IRQ16 );
80000fc8:	08450513          	addi	a0,a0,132
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:73
}
80000fcc:	0141                	addi	sp,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:59
            HAL_set_16bit_reg( this_gpio->base_addr, IRQ1, (uint16_t)CLEAR_ALL_IRQ16 );
80000fce:	8bfff06f          	j	8000088c <HW_set_16bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:63
            HAL_set_8bit_reg( this_gpio->base_addr, IRQ0, (uint8_t)CLEAR_ALL_IRQ8 );
80000fd2:	4008                	lw	a0,0(s0)
80000fd4:	0ff00593          	li	a1,255
80000fd8:	08050513          	addi	a0,a0,128
80000fdc:	8ebff0ef          	jal	ra,800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:64
            HAL_set_8bit_reg( this_gpio->base_addr, IRQ1, (uint8_t)CLEAR_ALL_IRQ8 );
80000fe0:	4008                	lw	a0,0(s0)
80000fe2:	0ff00593          	li	a1,255
80000fe6:	08450513          	addi	a0,a0,132
80000fea:	8ddff0ef          	jal	ra,800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:65
            HAL_set_8bit_reg( this_gpio->base_addr, IRQ2, (uint8_t)CLEAR_ALL_IRQ8 );
80000fee:	4008                	lw	a0,0(s0)
80000ff0:	0ff00593          	li	a1,255
80000ff4:	08850513          	addi	a0,a0,136
80000ff8:	8cfff0ef          	jal	ra,800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:66
            HAL_set_8bit_reg( this_gpio->base_addr, IRQ3, (uint8_t)CLEAR_ALL_IRQ8 );
80000ffc:	4008                	lw	a0,0(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:73
}
80000ffe:	4422                	lw	s0,8(sp)
80001000:	40b2                	lw	ra,12(sp)
80001002:	4492                	lw	s1,4(sp)
80001004:	4902                	lw	s2,0(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:66
            HAL_set_8bit_reg( this_gpio->base_addr, IRQ3, (uint8_t)CLEAR_ALL_IRQ8 );
80001006:	0ff00593          	li	a1,255
8000100a:	08c50513          	addi	a0,a0,140
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:73
}
8000100e:	0141                	addi	sp,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:66
            HAL_set_8bit_reg( this_gpio->base_addr, IRQ3, (uint8_t)CLEAR_ALL_IRQ8 );
80001010:	8b7ff06f          	j	800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:73
}
80001014:	40b2                	lw	ra,12(sp)
80001016:	4422                	lw	s0,8(sp)
80001018:	4492                	lw	s1,4(sp)
8000101a:	4902                	lw	s2,0(sp)
8000101c:	0141                	addi	sp,sp,16
8000101e:	8082                	ret

80001020 <GPIO_set_output>:
GPIO_set_output():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:232
(
    gpio_instance_t *   this_gpio,
    gpio_id_t           port_id,
    uint8_t             value
)
{
80001020:	1101                	addi	sp,sp,-32
80001022:	ca26                	sw	s1,20(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:236
    HAL_ASSERT( port_id < NB_OF_GPIO );
    
            
    switch( this_gpio->apb_bus_width )
80001024:	4144                	lw	s1,4(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:232
{
80001026:	cc22                	sw	s0,24(sp)
80001028:	c84a                	sw	s2,16(sp)
8000102a:	c64e                	sw	s3,12(sp)
8000102c:	c256                	sw	s5,4(sp)
8000102e:	ce06                	sw	ra,28(sp)
80001030:	c452                	sw	s4,8(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:236
    switch( this_gpio->apb_bus_width )
80001032:	4405                	li	s0,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:232
{
80001034:	8aaa                	mv	s5,a0
80001036:	892e                	mv	s2,a1
80001038:	89b2                	mv	s3,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:236
    switch( this_gpio->apb_bus_width )
8000103a:	04848363          	beq	s1,s0,80001080 <GPIO_set_output+0x60>
8000103e:	c4d1                	beqz	s1,800010ca <GPIO_set_output+0xaa>
80001040:	4789                	li	a5,2
80001042:	0cf49863          	bne	s1,a5,80001112 <GPIO_set_output+0xf2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:242
    {
        case GPIO_APB_32_BITS_BUS:
            {
                uint32_t outputs_state;
                
                outputs_state = HAL_get_32bit_reg( this_gpio->base_addr, GPIO_OUT );
80001046:	4108                	lw	a0,0(a0)
80001048:	01241433          	sll	s0,s0,s2
8000104c:	0a050513          	addi	a0,a0,160
80001050:	80dff0ef          	jal	ra,8000085c <HW_get_32bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:249
                {
                    outputs_state &= ~(1 << port_id);
                }
                else
                {
                    outputs_state |= 1 << port_id;
80001054:	00a465b3          	or	a1,s0,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:243
                if ( 0 == value )
80001058:	00099663          	bnez	s3,80001064 <GPIO_set_output+0x44>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:245
                    outputs_state &= ~(1 << port_id);
8000105c:	fff44413          	not	s0,s0
80001060:	00a475b3          	and	a1,s0,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:251
                }
                HAL_set_32bit_reg( this_gpio->base_addr, GPIO_OUT, outputs_state );
80001064:	000aa503          	lw	a0,0(s5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:322
            
        default:
            HAL_ASSERT(0);
            break;
    }
}
80001068:	4462                	lw	s0,24(sp)
8000106a:	40f2                	lw	ra,28(sp)
8000106c:	44d2                	lw	s1,20(sp)
8000106e:	4942                	lw	s2,16(sp)
80001070:	49b2                	lw	s3,12(sp)
80001072:	4a22                	lw	s4,8(sp)
80001074:	4a92                	lw	s5,4(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:251
                HAL_set_32bit_reg( this_gpio->base_addr, GPIO_OUT, outputs_state );
80001076:	0a050513          	addi	a0,a0,160
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:322
}
8000107a:	6105                	addi	sp,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:251
                HAL_set_32bit_reg( this_gpio->base_addr, GPIO_OUT, outputs_state );
8000107c:	fdcff06f          	j	80000858 <HW_set_32bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:267
                uint32_t gpio_out_reg_addr = this_gpio->base_addr + GPIO_OUT_REG_OFFSET + ((port_id >> 4) * 4);
80001080:	411c                	lw	a5,0(a0)
80001082:	0045da13          	srli	s4,a1,0x4
80001086:	0a0a                	slli	s4,s4,0x2
80001088:	0a0a0a13          	addi	s4,s4,160
8000108c:	00f97413          	andi	s0,s2,15
80001090:	9a3e                	add	s4,s4,a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:269
                outputs_state = HW_get_16bit_reg( gpio_out_reg_addr );
80001092:	008494b3          	sll	s1,s1,s0
80001096:	8552                	mv	a0,s4
80001098:	04c2                	slli	s1,s1,0x10
8000109a:	ff8ff0ef          	jal	ra,80000892 <HW_get_16bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:270
                if ( 0 == value )
8000109e:	84c1                	srai	s1,s1,0x10
800010a0:	02099363          	bnez	s3,800010c6 <GPIO_set_output+0xa6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:272
                    outputs_state &= ~(1 << (port_id & 0x0F));
800010a4:	fff4c493          	not	s1,s1
800010a8:	8ce9                	and	s1,s1,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:322
}
800010aa:	4462                	lw	s0,24(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:276
                    outputs_state |= 1 << (port_id & 0x0F);
800010ac:	01049593          	slli	a1,s1,0x10
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:322
}
800010b0:	40f2                	lw	ra,28(sp)
800010b2:	44d2                	lw	s1,20(sp)
800010b4:	4942                	lw	s2,16(sp)
800010b6:	49b2                	lw	s3,12(sp)
800010b8:	4a92                	lw	s5,4(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:278
                HW_set_16bit_reg( gpio_out_reg_addr, outputs_state );
800010ba:	8552                	mv	a0,s4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:322
}
800010bc:	4a22                	lw	s4,8(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:276
                    outputs_state |= 1 << (port_id & 0x0F);
800010be:	81c1                	srli	a1,a1,0x10
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:322
}
800010c0:	6105                	addi	sp,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:278
                HW_set_16bit_reg( gpio_out_reg_addr, outputs_state );
800010c2:	fcaff06f          	j	8000088c <HW_set_16bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:276
                    outputs_state |= 1 << (port_id & 0x0F);
800010c6:	8cc9                	or	s1,s1,a0
800010c8:	b7cd                	j	800010aa <GPIO_set_output+0x8a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:294
                uint32_t gpio_out_reg_addr = this_gpio->base_addr + GPIO_OUT_REG_OFFSET + ((port_id >> 3) * 4);
800010ca:	411c                	lw	a5,0(a0)
800010cc:	0035d493          	srli	s1,a1,0x3
800010d0:	048a                	slli	s1,s1,0x2
800010d2:	0a048493          	addi	s1,s1,160
800010d6:	00797913          	andi	s2,s2,7
800010da:	94be                	add	s1,s1,a5
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:296
                outputs_state = HW_get_8bit_reg( gpio_out_reg_addr );
800010dc:	01241433          	sll	s0,s0,s2
800010e0:	8526                	mv	a0,s1
800010e2:	0462                	slli	s0,s0,0x18
800010e4:	fe8ff0ef          	jal	ra,800008cc <HW_get_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:297
                if ( 0 == value )
800010e8:	8461                	srai	s0,s0,0x18
800010ea:	02099263          	bnez	s3,8000110e <GPIO_set_output+0xee>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:299
                    outputs_state &= ~(1 << (port_id & 0x07));
800010ee:	fff44413          	not	s0,s0
800010f2:	8c69                	and	s0,s0,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:303
                    outputs_state |= 1 << (port_id & 0x07);
800010f4:	0ff47593          	andi	a1,s0,255
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:322
}
800010f8:	4462                	lw	s0,24(sp)
800010fa:	40f2                	lw	ra,28(sp)
800010fc:	4942                	lw	s2,16(sp)
800010fe:	49b2                	lw	s3,12(sp)
80001100:	4a22                	lw	s4,8(sp)
80001102:	4a92                	lw	s5,4(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:305
                HW_set_8bit_reg( gpio_out_reg_addr, outputs_state );
80001104:	8526                	mv	a0,s1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:322
}
80001106:	44d2                	lw	s1,20(sp)
80001108:	6105                	addi	sp,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:305
                HW_set_8bit_reg( gpio_out_reg_addr, outputs_state );
8000110a:	fbcff06f          	j	800008c6 <HW_set_8bit_reg>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:303
                    outputs_state |= 1 << (port_id & 0x07);
8000110e:	8c49                	or	s0,s0,a0
80001110:	b7d5                	j	800010f4 <GPIO_set_output+0xd4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreGPIO/core_gpio.c:322
}
80001112:	40f2                	lw	ra,28(sp)
80001114:	4462                	lw	s0,24(sp)
80001116:	44d2                	lw	s1,20(sp)
80001118:	4942                	lw	s2,16(sp)
8000111a:	49b2                	lw	s3,12(sp)
8000111c:	4a22                	lw	s4,8(sp)
8000111e:	4a92                	lw	s5,4(sp)
80001120:	6105                	addi	sp,sp,32
80001122:	8082                	ret

80001124 <axi4litewrite>:
axi4litewrite():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreAXI4-Lite/AXI4-Lite.c:24
}

 volatile void axi4litewrite(uint32_t address,uint32_t data)
 {

 	*(volatile int*) address = data;
80001124:	c10c                	sw	a1,0(a0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/platform/drivers/fpga_ip/CoreAXI4-Lite/AXI4-Lite.c:26

 }
80001126:	8082                	ret

80001128 <sensor_i2c_write.isra.0>:
sensor_i2c_write():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:13

static uint8_t tx_buffer[64];
static uint16_t write_length;
static i2c_status_t status;

static i2c_status_t sensor_i2c_write(uint8_t i2c_ch_sel, uint16_t data_reg, uint8_t data) {
80001128:	1141                	addi	sp,sp,-16
8000112a:	c422                	sw	s0,8(sp)
8000112c:	c226                	sw	s1,4(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:14
	tx_buffer[0] = data_reg >> 8;
8000112e:	8c018413          	addi	s0,gp,-1856 # 80004450 <__sbss_end>
80001132:	00851493          	slli	s1,a0,0x8
80001136:	8121                	srli	a0,a0,0x8
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:13
static i2c_status_t sensor_i2c_write(uint8_t i2c_ch_sel, uint16_t data_reg, uint8_t data) {
80001138:	c04a                	sw	s2,0(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:14
	tx_buffer[0] = data_reg >> 8;
8000113a:	8cc9                	or	s1,s1,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:13
static i2c_status_t sensor_i2c_write(uint8_t i2c_ch_sel, uint16_t data_reg, uint8_t data) {
8000113c:	892e                	mv	s2,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:16
	tx_buffer[1] = data_reg & 0xff;
	tx_buffer[2] = data;// >> 8;
8000113e:	00b40123          	sb	a1,2(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:20
	write_length = sizeof(data_reg) + sizeof(data);


		I2C_write(sensor1_i2c, IMX334_1_DEV_REG, (const uint8_t *) tx_buffer,
80001142:	8622                	mv	a2,s0
80001144:	4701                	li	a4,0
80001146:	468d                	li	a3,3
80001148:	45e9                	li	a1,26
8000114a:	97418513          	addi	a0,gp,-1676 # 80004504 <g_i2c_instance_cam1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:13
static i2c_status_t sensor_i2c_write(uint8_t i2c_ch_sel, uint16_t data_reg, uint8_t data) {
8000114e:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:14
	tx_buffer[0] = data_reg >> 8;
80001150:	00941023          	sh	s1,0(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:20
		I2C_write(sensor1_i2c, IMX334_1_DEV_REG, (const uint8_t *) tx_buffer,
80001154:	903ff0ef          	jal	ra,80000a56 <I2C_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:22
					write_length, I2C_RELEASE_BUS );
			status = I2C_wait_complete(sensor1_i2c, I2C_NO_TIMEOUT );
80001158:	4581                	li	a1,0
8000115a:	97418513          	addi	a0,gp,-1676 # 80004504 <g_i2c_instance_cam1>
8000115e:	991ff0ef          	jal	ra,80000aee <I2C_wait_complete>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:30
			tx_buffer[1] = data_reg & 0xff;
			tx_buffer[2] = data;
			write_length = sizeof(data_reg) + sizeof(data);

	return status;
}
80001162:	40b2                	lw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:24
			tx_buffer[0] = data_reg >> 8;
80001164:	00941023          	sh	s1,0(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:26
			tx_buffer[2] = data;
80001168:	01240123          	sb	s2,2(s0)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:30
}
8000116c:	4422                	lw	s0,8(sp)
8000116e:	4492                	lw	s1,4(sp)
80001170:	4902                	lw	s2,0(sp)
80001172:	0141                	addi	sp,sp,16
80001174:	8082                	ret

80001176 <sensor_i2c_write_gain.isra.1>:
sensor_i2c_write_gain():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:32

static i2c_status_t sensor_i2c_write_gain(uint8_t i2c_ch_sel, uint16_t data_reg, uint8_t data) {
80001176:	1141                	addi	sp,sp,-16
80001178:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:34

    tx_buffer[0] = data_reg >> 8;
8000117a:	8c018613          	addi	a2,gp,-1856 # 80004450 <__sbss_end>
8000117e:	03000793          	li	a5,48
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:35
    tx_buffer[1] = data_reg & 0xff;
80001182:	00a600a3          	sb	a0,1(a2)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:36
    tx_buffer[2] = data;// >> 8;
80001186:	00b60123          	sb	a1,2(a2)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:39
    write_length = sizeof(data_reg) + sizeof(data);

    I2C_write(sensor1_i2c, IMX334_1_DEV_REG, (const uint8_t *) tx_buffer,write_length, I2C_RELEASE_BUS );
8000118a:	97418513          	addi	a0,gp,-1676 # 80004504 <g_i2c_instance_cam1>
8000118e:	45e9                	li	a1,26
80001190:	4701                	li	a4,0
80001192:	468d                	li	a3,3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:34
    tx_buffer[0] = data_reg >> 8;
80001194:	00f60023          	sb	a5,0(a2)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:39
    I2C_write(sensor1_i2c, IMX334_1_DEV_REG, (const uint8_t *) tx_buffer,write_length, I2C_RELEASE_BUS );
80001198:	8bfff0ef          	jal	ra,80000a56 <I2C_write>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:43
    status = I2C_wait_complete(sensor1_i2c, I2C_NO_TIMEOUT );

    return status;
}
8000119c:	40b2                	lw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:40
    status = I2C_wait_complete(sensor1_i2c, I2C_NO_TIMEOUT );
8000119e:	4581                	li	a1,0
800011a0:	97418513          	addi	a0,gp,-1676 # 80004504 <g_i2c_instance_cam1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:43
}
800011a4:	0141                	addi	sp,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:40
    status = I2C_wait_complete(sensor1_i2c, I2C_NO_TIMEOUT );
800011a6:	949ff06f          	j	80000aee <I2C_wait_complete>

800011aa <imx334_cam_init>:
imx334_cam_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:45
void imx334_cam_init()
{
800011aa:	1141                	addi	sp,sp,-16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:46
	I2C_init( sensor1_i2c, COREI2C_IMX1_BASE_ADDR, IMX334_1_DEV_REG, I2C_PCLK_DIV_256 );
800011ac:	4681                	li	a3,0
800011ae:	4669                	li	a2,26
800011b0:	710035b7          	lui	a1,0x71003
800011b4:	97418513          	addi	a0,gp,-1676 # 80004504 <g_i2c_instance_cam1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:45
{
800011b8:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:46
	I2C_init( sensor1_i2c, COREI2C_IMX1_BASE_ADDR, IMX334_1_DEV_REG, I2C_PCLK_DIV_256 );
800011ba:	807ff0ef          	jal	ra,800009c0 <I2C_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:47
	GPIO_set_output(&g_gpio_out, CAM1_RST, 0u);
800011be:	4601                	li	a2,0
800011c0:	45a1                	li	a1,8
800011c2:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
800011c6:	3da9                	jal	80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:48
	msdelay(100);
800011c8:	06400513          	li	a0,100
800011cc:	5e8000ef          	jal	ra,800017b4 <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:49
	GPIO_set_output(&g_gpio_out, CAM1_RST, 1u); // Bring camera out of reset
800011d0:	4605                	li	a2,1
800011d2:	45a1                	li	a1,8
800011d4:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
800011d8:	35a1                	jal	80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:50
	msdelay(100);
800011da:	06400513          	li	a0,100
800011de:	5d6000ef          	jal	ra,800017b4 <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:51
	GPIO_set_output(&g_gpio_out, CAM_CLK_EN, 1u); //Enable Cam clock from FPGA
800011e2:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
800011e6:	4605                	li	a2,1
800011e8:	45a5                	li	a1,9
800011ea:	3d1d                	jal	80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:53
	msdelay(100);
}
800011ec:	40b2                	lw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:52
	msdelay(100);
800011ee:	06400513          	li	a0,100
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:53
}
800011f2:	0141                	addi	sp,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:52
	msdelay(100);
800011f4:	5c00006f          	j	800017b4 <msdelay>

800011f8 <imx334_cam_reginit>:
imx334_cam_reginit():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:56

void imx334_cam_reginit( uint8_t i2c_ch_sel)
{
800011f8:	1141                	addi	sp,sp,-16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:59
	uint32_t i;

	sensor_i2c_write(i2c_ch_sel, 0x3000, 0x01);// STANDBY MODE enabled
800011fa:	4585                	li	a1,1
800011fc:	650d                	lui	a0,0x3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:56
{
800011fe:	c606                	sw	ra,12(sp)
80001200:	c422                	sw	s0,8(sp)
80001202:	c226                	sw	s1,4(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:60
	sensor_i2c_write(i2c_ch_sel, 0x3018, 0x04);//WINMODE
80001204:	640d                	lui	s0,0x3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:59
	sensor_i2c_write(i2c_ch_sel, 0x3000, 0x01);// STANDBY MODE enabled
80001206:	370d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:60
	sensor_i2c_write(i2c_ch_sel, 0x3018, 0x04);//WINMODE
80001208:	4591                	li	a1,4
8000120a:	01840513          	addi	a0,s0,24 # 3018 <STACK_SIZE+0x2818>
8000120e:	3f29                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:61
	sensor_i2c_write(i2c_ch_sel, 0x3030, 0xCA);//VMAX
80001210:	0ca00593          	li	a1,202
80001214:	03040513          	addi	a0,s0,48
80001218:	3f01                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:62
	sensor_i2c_write(i2c_ch_sel, 0x3031, 0x08);//VMAX
8000121a:	45a1                	li	a1,8
8000121c:	03140513          	addi	a0,s0,49
80001220:	3721                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:63
	sensor_i2c_write(i2c_ch_sel, 0x3032, 0x00);//VMAX
80001222:	4581                	li	a1,0
80001224:	03240513          	addi	a0,s0,50
80001228:	3701                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:64
	sensor_i2c_write(i2c_ch_sel, 0x3034, 0x4C);//HMAX
8000122a:	04c00593          	li	a1,76
8000122e:	03440513          	addi	a0,s0,52
80001232:	3ddd                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:65
	sensor_i2c_write(i2c_ch_sel, 0x3035, 0x04);//HMAX
80001234:	4591                	li	a1,4
80001236:	03540513          	addi	a0,s0,53
8000123a:	35fd                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:67
#if CAM_CONFIG_4K_1_2M
	sensor_i2c_write(i2c_ch_sel, 0x302C, 0x30);//TRIM_START
8000123c:	03000593          	li	a1,48
80001240:	02c40513          	addi	a0,s0,44
80001244:	35d5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:68
	sensor_i2c_write(i2c_ch_sel, 0x302D, 0x00);//TRIM_START
80001246:	4581                	li	a1,0
80001248:	02d40513          	addi	a0,s0,45
8000124c:	3df1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:69
	sensor_i2c_write(i2c_ch_sel, 0x302E, 0x00);//HNUM
8000124e:	4581                	li	a1,0
80001250:	02e40513          	addi	a0,s0,46
80001254:	3dd1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:70
	sensor_i2c_write(i2c_ch_sel, 0x302F, 0x0F);//HNUM
80001256:	45bd                	li	a1,15
80001258:	02f40513          	addi	a0,s0,47
8000125c:	35f1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:71
	sensor_i2c_write(i2c_ch_sel, 0x3074, 0xB0);//AREA3_ST_ADR_1
8000125e:	0b000593          	li	a1,176
80001262:	07440513          	addi	a0,s0,116
80001266:	35c9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:72
	sensor_i2c_write(i2c_ch_sel, 0x3075, 0x00);//AREA3_ST_ADR_1
80001268:	4581                	li	a1,0
8000126a:	07540513          	addi	a0,s0,117
8000126e:	3d6d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:73
	sensor_i2c_write(i2c_ch_sel, 0x308E, 0xB1);//AREA3_ST_ADR_2
80001270:	0b100593          	li	a1,177
80001274:	08e40513          	addi	a0,s0,142
80001278:	3d45                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:74
	sensor_i2c_write(i2c_ch_sel, 0x308F, 0x00);//AREA3_ST_ADR_2
8000127a:	4581                	li	a1,0
8000127c:	08f40513          	addi	a0,s0,143
80001280:	3565                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:75
	sensor_i2c_write(i2c_ch_sel, 0x3076, 0x70);//AREA3_WIDTH_1
80001282:	07000593          	li	a1,112
80001286:	07640513          	addi	a0,s0,118
8000128a:	3d79                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:76
	sensor_i2c_write(i2c_ch_sel, 0x3077, 0x08);//AREA3_WIDTH_1
8000128c:	45a1                	li	a1,8
8000128e:	07740513          	addi	a0,s0,119
80001292:	3d59                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:77
	sensor_i2c_write(i2c_ch_sel, 0x3090, 0x70);//AREA3_WIDTH_2
80001294:	07000593          	li	a1,112
80001298:	09040513          	addi	a0,s0,144
8000129c:	3571                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:78
	sensor_i2c_write(i2c_ch_sel, 0x3091, 0x08);//AREA3_WIDTH_2
8000129e:	45a1                	li	a1,8
800012a0:	09140513          	addi	a0,s0,145
800012a4:	3551                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:79
	sensor_i2c_write(i2c_ch_sel, 0x3308, 0x70);//Y_OUT_SIZE
800012a6:	07000593          	li	a1,112
800012aa:	30840513          	addi	a0,s0,776
800012ae:	3dad                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:80
	sensor_i2c_write(i2c_ch_sel, 0x3309, 0x08);//Y_OUT_SIZE
800012b0:	45a1                	li	a1,8
800012b2:	30940513          	addi	a0,s0,777
800012b6:	3d8d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:81
	sensor_i2c_write(i2c_ch_sel, 0x30C6, 0x00);//BLACK_OFSET_ADR
800012b8:	4581                	li	a1,0
800012ba:	0c640513          	addi	a0,s0,198
800012be:	35ad                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:82
	sensor_i2c_write(i2c_ch_sel, 0x30C7, 0x00);//BLACK_OFSET_ADR
800012c0:	4581                	li	a1,0
800012c2:	0c740513          	addi	a0,s0,199
800012c6:	358d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:83
	sensor_i2c_write(i2c_ch_sel, 0x30CE, 0x00);//UNRD_LINE_MAX
800012c8:	4581                	li	a1,0
800012ca:	0ce40513          	addi	a0,s0,206
800012ce:	3da9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:84
	sensor_i2c_write(i2c_ch_sel, 0x30CF, 0x00);//UNRD_LINE_MAX
800012d0:	4581                	li	a1,0
800012d2:	0cf40513          	addi	a0,s0,207
800012d6:	3d89                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:85
	sensor_i2c_write(i2c_ch_sel, 0x30D8, 0x20);//UNREAD_ED_ADR
800012d8:	02000593          	li	a1,32
800012dc:	0d840513          	addi	a0,s0,216
800012e0:	35a1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:86
	sensor_i2c_write(i2c_ch_sel, 0x30D9, 0x12);//UNREAD_ED_ADR
800012e2:	45c9                	li	a1,18
800012e4:	0d940513          	addi	a0,s0,217
800012e8:	3581                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:87
	sensor_i2c_write(i2c_ch_sel, 0x304C, 0x00);//OPB_SIZE_V-OPTICAL BLACK
800012ea:	4581                	li	a1,0
800012ec:	04c40513          	addi	a0,s0,76
800012f0:	3d25                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:112
	sensor_i2c_write(i2c_ch_sel, 0x30D8, 0x18);//UNREAD_ED_ADR
	sensor_i2c_write(i2c_ch_sel, 0x30D9, 0x0A);//UNREAD_ED_ADR
	sensor_i2c_write(i2c_ch_sel, 0x304C, 0x00);//OPB_SIZE_V-OPTICAL BLACK
#endif

	sensor_i2c_write(i2c_ch_sel, 0x304E, 0x00);//H_REVERSE
800012f2:	4581                	li	a1,0
800012f4:	04e40513          	addi	a0,s0,78
800012f8:	3d05                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:113
	sensor_i2c_write(i2c_ch_sel, 0x304F, 0x00);//V_REVERSE
800012fa:	4581                	li	a1,0
800012fc:	04f40513          	addi	a0,s0,79
80001300:	3525                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:114
	sensor_i2c_write(i2c_ch_sel, 0x3050, 0x0);//ADBIT-0-10BIT/ 1-12BIT
80001302:	4581                	li	a1,0
80001304:	05040513          	addi	a0,s0,80
80001308:	3505                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:116

	sensor_i2c_write(i2c_ch_sel, 0x30B6, 0x00);//UNREAD_PARAM5
8000130a:	4581                	li	a1,0
8000130c:	0b640513          	addi	a0,s0,182
80001310:	3d21                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:117
	sensor_i2c_write(i2c_ch_sel, 0x30B7, 0x00);//UNREAD_PARAM5
80001312:	4581                	li	a1,0
80001314:	0b740513          	addi	a0,s0,183
80001318:	3d01                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:118
	sensor_i2c_write(i2c_ch_sel, 0x3116, 0x08);//UNREAD_PARAM6
8000131a:	45a1                	li	a1,8
8000131c:	11640513          	addi	a0,s0,278
80001320:	3521                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:119
	sensor_i2c_write(i2c_ch_sel, 0x3117, 0x00);//UNREAD_PARAM6
80001322:	4581                	li	a1,0
80001324:	11740513          	addi	a0,s0,279
80001328:	3501                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:122

	/*Change this if slave mode is used*/
	sensor_i2c_write(i2c_ch_sel, 0x31A0, 0x20);//XVS,XHS output tied to ground
8000132a:	02000593          	li	a1,32
8000132e:	1a040513          	addi	a0,s0,416
80001332:	3bdd                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:123
	sensor_i2c_write(i2c_ch_sel, 0x31A1, 0x0F);//XVS,XHS output tied to ground
80001334:	45bd                	li	a1,15
80001336:	1a140513          	addi	a0,s0,417
8000133a:	33fd                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:126
#if CAM_CONFIG_4K_1_2M
	/*1188 Mbps*/
	sensor_i2c_write(i2c_ch_sel, 0x300C, 0x42);//BC_WAIT_TIME
8000133c:	04200593          	li	a1,66
80001340:	00c40513          	addi	a0,s0,12
80001344:	33d5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:127
	sensor_i2c_write(i2c_ch_sel, 0x300D, 0x2E);//CP_WAIT_TIME
80001346:	02e00593          	li	a1,46
8000134a:	00d40513          	addi	a0,s0,13
8000134e:	3be9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:128
	sensor_i2c_write(i2c_ch_sel, 0x314C, 0xB0);//INCKSEL1
80001350:	0b000593          	li	a1,176
80001354:	14c40513          	addi	a0,s0,332
80001358:	3bc1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:129
	sensor_i2c_write(i2c_ch_sel, 0x314D, 0x00);//INCKSEL1
8000135a:	4581                	li	a1,0
8000135c:	14d40513          	addi	a0,s0,333
80001360:	33e1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:130
	sensor_i2c_write(i2c_ch_sel, 0x315A, 0x02);//INCKSEL2
80001362:	4589                	li	a1,2
80001364:	15a40513          	addi	a0,s0,346
80001368:	33c1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:131
	sensor_i2c_write(i2c_ch_sel, 0x3168, 0x8F);//INCKSEL3
8000136a:	08f00593          	li	a1,143
8000136e:	16840513          	addi	a0,s0,360
80001372:	3b5d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:132
	sensor_i2c_write(i2c_ch_sel, 0x316A, 0x7E);//INCKSEL4
80001374:	07e00593          	li	a1,126
80001378:	16a40513          	addi	a0,s0,362
8000137c:	3375                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:133
	sensor_i2c_write(i2c_ch_sel, 0x319E, 0x01);//SYS_MODE
8000137e:	4585                	li	a1,1
80001380:	19e40513          	addi	a0,s0,414
80001384:	3355                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:145
	sensor_i2c_write(i2c_ch_sel, 0x315A, 0x0A);//INCKSEL2
	sensor_i2c_write(i2c_ch_sel, 0x3168, 0xA0);//INCKSEL3
	sensor_i2c_write(i2c_ch_sel, 0x316A, 0x7E);//INCKSEL4
	sensor_i2c_write(i2c_ch_sel, 0x319E, 0x02);//SYS_MODE
#endif
	sensor_i2c_write(i2c_ch_sel, 0x3199, 0x00);//HADD,VADD - 0 All pix scan, 3-2/2binning
80001386:	4581                	li	a1,0
80001388:	19940513          	addi	a0,s0,409
8000138c:	3b71                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:146
	sensor_i2c_write(i2c_ch_sel, 0x319D, 0x00);//MDBIT-0-10bit,1-12bit
8000138e:	4581                	li	a1,0
80001390:	19d40513          	addi	a0,s0,413
80001394:	3b51                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:148

	sensor_i2c_write(i2c_ch_sel, 0x31DD, 0x03);//VALID_EXPAND
80001396:	458d                	li	a1,3
80001398:	1dd40513          	addi	a0,s0,477
8000139c:	3371                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:149
	sensor_i2c_write(i2c_ch_sel, 0x3300, 0x00);//TCYCLE
8000139e:	4581                	li	a1,0
800013a0:	30040513          	addi	a0,s0,768
800013a4:	3351                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:151

	sensor_i2c_write(i2c_ch_sel, 0x341C, 0xFF);//ADBIT1 FFh-10bit, 47h-12bit
800013a6:	0ff00593          	li	a1,255
800013aa:	41c40513          	addi	a0,s0,1052
800013ae:	3bad                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:152
	sensor_i2c_write(i2c_ch_sel, 0x341D, 0x01);//ADBIT1 01h-10bit, 00h-12bit
800013b0:	4585                	li	a1,1
800013b2:	41d40513          	addi	a0,s0,1053
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:153
	sensor_i2c_write(i2c_ch_sel, 0x3A01, 0x03);//LANE_MODE
800013b6:	6491                	lui	s1,0x4
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:152
	sensor_i2c_write(i2c_ch_sel, 0x341D, 0x01);//ADBIT1 01h-10bit, 00h-12bit
800013b8:	3b85                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:153
	sensor_i2c_write(i2c_ch_sel, 0x3A01, 0x03);//LANE_MODE
800013ba:	458d                	li	a1,3
800013bc:	a0148513          	addi	a0,s1,-1535 # 3a01 <STACK_SIZE+0x3201>
800013c0:	33a5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:155

	sensor_i2c_write(i2c_ch_sel, 0x3A18, 0x7F);//TCLKPOST
800013c2:	07f00593          	li	a1,127
800013c6:	a1848513          	addi	a0,s1,-1512
800013ca:	3bb9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:156
	sensor_i2c_write(i2c_ch_sel, 0x3A19, 0x00);//TCLKPOST
800013cc:	4581                	li	a1,0
800013ce:	a1948513          	addi	a0,s1,-1511
800013d2:	3b99                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:157
	sensor_i2c_write(i2c_ch_sel, 0x3A1A, 0x37);//TCLKPPREPARE
800013d4:	03700593          	li	a1,55
800013d8:	a1a48513          	addi	a0,s1,-1510
800013dc:	33b1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:158
	sensor_i2c_write(i2c_ch_sel, 0x3A1B, 0x00);//TCLKPREPARE
800013de:	4581                	li	a1,0
800013e0:	a1b48513          	addi	a0,s1,-1509
800013e4:	3391                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:159
	sensor_i2c_write(i2c_ch_sel, 0x3A1C, 0x37);//TCLKTRAIL
800013e6:	03700593          	li	a1,55
800013ea:	a1c48513          	addi	a0,s1,-1508
800013ee:	3b2d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:160
	sensor_i2c_write(i2c_ch_sel, 0x3A1D, 0x00);//TCLKTRAIL
800013f0:	4581                	li	a1,0
800013f2:	a1d48513          	addi	a0,s1,-1507
800013f6:	3b0d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:161
	sensor_i2c_write(i2c_ch_sel, 0x3A1E, 0xF7);//TCLKZERO
800013f8:	0f700593          	li	a1,247
800013fc:	a1e48513          	addi	a0,s1,-1506
80001400:	3325                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:162
	sensor_i2c_write(i2c_ch_sel, 0x3A1F, 0x00);//TCLKZERO
80001402:	4581                	li	a1,0
80001404:	a1f48513          	addi	a0,s1,-1505
80001408:	3305                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:163
	sensor_i2c_write(i2c_ch_sel, 0x3A20, 0x3F);//THSPREPARE
8000140a:	03f00593          	li	a1,63
8000140e:	a2048513          	addi	a0,s1,-1504
80001412:	3b19                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:164
	sensor_i2c_write(i2c_ch_sel, 0x3A21, 0x00);//THSPREPARE
80001414:	4581                	li	a1,0
80001416:	a2148513          	addi	a0,s1,-1503
8000141a:	3339                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:165
	sensor_i2c_write(i2c_ch_sel, 0x3A20, 0x6F);//THSZERO
8000141c:	06f00593          	li	a1,111
80001420:	a2048513          	addi	a0,s1,-1504
80001424:	3311                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:166
	sensor_i2c_write(i2c_ch_sel, 0x3A21, 0x00);//THSZERO
80001426:	4581                	li	a1,0
80001428:	a2148513          	addi	a0,s1,-1503
8000142c:	39f5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:167
	sensor_i2c_write(i2c_ch_sel, 0x3A20, 0x3F);//THSTRAIL
8000142e:	03f00593          	li	a1,63
80001432:	a2048513          	addi	a0,s1,-1504
80001436:	39cd                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:168
	sensor_i2c_write(i2c_ch_sel, 0x3A21, 0x00);//THSTRAIL
80001438:	4581                	li	a1,0
8000143a:	a2148513          	addi	a0,s1,-1503
8000143e:	31ed                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:169
	sensor_i2c_write(i2c_ch_sel, 0x3A20, 0x5F);//THSEXIT
80001440:	05f00593          	li	a1,95
80001444:	a2048513          	addi	a0,s1,-1504
80001448:	31c5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:170
	sensor_i2c_write(i2c_ch_sel, 0x3A21, 0x00);//THSEXIT
8000144a:	4581                	li	a1,0
8000144c:	a2148513          	addi	a0,s1,-1503
80001450:	39e1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:171
	sensor_i2c_write(i2c_ch_sel, 0x3A20, 0x2F);//TLPX
80001452:	02f00593          	li	a1,47
80001456:	a2048513          	addi	a0,s1,-1504
8000145a:	31f9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:172
	sensor_i2c_write(i2c_ch_sel, 0x3A21, 0x00);//TLPX
8000145c:	4581                	li	a1,0
8000145e:	a2148513          	addi	a0,s1,-1503
80001462:	31d9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:188
	sensor_i2c_write(i2c_ch_sel, 0x3303, 0x00);// Black level LSB
	sensor_i2c_write(i2c_ch_sel, 0x336C, 0x01);// WRJ_OPEN
#endif

	/*Additional settings for All scan mode */
	sensor_i2c_write(i2c_ch_sel, 0x3078, 0x02);
80001464:	4589                	li	a1,2
80001466:	07840513          	addi	a0,s0,120
8000146a:	397d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:189
	sensor_i2c_write(i2c_ch_sel, 0x3079, 0x00);
8000146c:	4581                	li	a1,0
8000146e:	07940513          	addi	a0,s0,121
80001472:	395d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:190
	sensor_i2c_write(i2c_ch_sel, 0x307A, 0x00);
80001474:	4581                	li	a1,0
80001476:	07a40513          	addi	a0,s0,122
8000147a:	317d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:191
	sensor_i2c_write(i2c_ch_sel, 0x307B, 0x00);
8000147c:	4581                	li	a1,0
8000147e:	07b40513          	addi	a0,s0,123
80001482:	315d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:192
	sensor_i2c_write(i2c_ch_sel, 0x3080, 0x02);//0xFE if inverted vertical readout
80001484:	4589                	li	a1,2
80001486:	08040513          	addi	a0,s0,128
8000148a:	3979                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:193
	sensor_i2c_write(i2c_ch_sel, 0x3081, 0x00);
8000148c:	4581                	li	a1,0
8000148e:	08140513          	addi	a0,s0,129
80001492:	3959                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:194
	sensor_i2c_write(i2c_ch_sel, 0x3082, 0x00);
80001494:	4581                	li	a1,0
80001496:	08240513          	addi	a0,s0,130
8000149a:	3179                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:195
	sensor_i2c_write(i2c_ch_sel, 0x3083, 0x00);
8000149c:	4581                	li	a1,0
8000149e:	08340513          	addi	a0,s0,131
800014a2:	3159                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:196
	sensor_i2c_write(i2c_ch_sel, 0x3088, 0x02);
800014a4:	4589                	li	a1,2
800014a6:	08840513          	addi	a0,s0,136
800014aa:	39bd                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:197
	sensor_i2c_write(i2c_ch_sel, 0x3094, 0x00);
800014ac:	4581                	li	a1,0
800014ae:	09440513          	addi	a0,s0,148
800014b2:	399d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:198
	sensor_i2c_write(i2c_ch_sel, 0x3095, 0x00);
800014b4:	4581                	li	a1,0
800014b6:	09540513          	addi	a0,s0,149
800014ba:	31bd                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:199
	sensor_i2c_write(i2c_ch_sel, 0x3096, 0x00);
800014bc:	4581                	li	a1,0
800014be:	09640513          	addi	a0,s0,150
800014c2:	319d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:200
	sensor_i2c_write(i2c_ch_sel, 0x309B, 0x02);//0xFE if inverted vertical readout
800014c4:	4589                	li	a1,2
800014c6:	09b40513          	addi	a0,s0,155
800014ca:	39b9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:201
	sensor_i2c_write(i2c_ch_sel, 0x309C, 0x00);
800014cc:	4581                	li	a1,0
800014ce:	09c40513          	addi	a0,s0,156
800014d2:	3999                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:202
	sensor_i2c_write(i2c_ch_sel, 0x309D, 0x00);
800014d4:	4581                	li	a1,0
800014d6:	09d40513          	addi	a0,s0,157
800014da:	31b9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:203
	sensor_i2c_write(i2c_ch_sel, 0x309E, 0x00);
800014dc:	4581                	li	a1,0
800014de:	09e40513          	addi	a0,s0,158
800014e2:	3199                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:204
	sensor_i2c_write(i2c_ch_sel, 0x30A4, 0x00);
800014e4:	4581                	li	a1,0
800014e6:	0a440513          	addi	a0,s0,164
800014ea:	393d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:205
	sensor_i2c_write(i2c_ch_sel, 0x30A5, 0x00);
800014ec:	4581                	li	a1,0
800014ee:	0a540513          	addi	a0,s0,165
800014f2:	391d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:210
	/*End of additional settings for all scan mode*/


	/*Additional Mandatory Settings*/
	sensor_i2c_write(i2c_ch_sel, 0x3288, 0x21);
800014f4:	02100593          	li	a1,33
800014f8:	28840513          	addi	a0,s0,648
800014fc:	3135                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:211
	sensor_i2c_write(i2c_ch_sel, 0x328A, 0x02);
800014fe:	4589                	li	a1,2
80001500:	28a40513          	addi	a0,s0,650
80001504:	3115                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:212
	sensor_i2c_write(i2c_ch_sel, 0x3414, 0x05);
80001506:	4595                	li	a1,5
80001508:	41440513          	addi	a0,s0,1044
8000150c:	3931                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:213
	sensor_i2c_write(i2c_ch_sel, 0x3416, 0x18);
8000150e:	45e1                	li	a1,24
80001510:	41640513          	addi	a0,s0,1046
80001514:	3911                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:214
	sensor_i2c_write(i2c_ch_sel, 0x35AC, 0x0E);
80001516:	45b9                	li	a1,14
80001518:	5ac40513          	addi	a0,s0,1452
8000151c:	3131                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:215
	sensor_i2c_write(i2c_ch_sel, 0x3648, 0x01);
8000151e:	4585                	li	a1,1
80001520:	64840513          	addi	a0,s0,1608
80001524:	3111                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:216
	sensor_i2c_write(i2c_ch_sel, 0x364A, 0x04);
80001526:	4591                	li	a1,4
80001528:	64a40513          	addi	a0,s0,1610
8000152c:	3ef5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:217
	sensor_i2c_write(i2c_ch_sel, 0x364C, 0x04);
8000152e:	4591                	li	a1,4
80001530:	64c40513          	addi	a0,s0,1612
80001534:	3ed5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:218
	sensor_i2c_write(i2c_ch_sel, 0x3678, 0x01);
80001536:	4585                	li	a1,1
80001538:	67840513          	addi	a0,s0,1656
8000153c:	36f5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:219
	sensor_i2c_write(i2c_ch_sel, 0x367C, 0x31);
8000153e:	03100593          	li	a1,49
80001542:	67c40513          	addi	a0,s0,1660
80001546:	36cd                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:220
	sensor_i2c_write(i2c_ch_sel, 0x367E, 0x31);
80001548:	03100593          	li	a1,49
8000154c:	67e40513          	addi	a0,s0,1662
80001550:	3ee1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:221
	sensor_i2c_write(i2c_ch_sel, 0x3708, 0x02);
80001552:	4589                	li	a1,2
80001554:	70840513          	addi	a0,s0,1800
80001558:	3ec1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:222
	sensor_i2c_write(i2c_ch_sel, 0x3714, 0x01);
8000155a:	4585                	li	a1,1
8000155c:	71440513          	addi	a0,s0,1812
80001560:	36e1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:223
	sensor_i2c_write(i2c_ch_sel, 0x3715, 0x02);
80001562:	4589                	li	a1,2
80001564:	71540513          	addi	a0,s0,1813
80001568:	36c1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:224
	sensor_i2c_write(i2c_ch_sel, 0x3716, 0x02);
8000156a:	4589                	li	a1,2
8000156c:	71640513          	addi	a0,s0,1814
80001570:	3e65                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:225
	sensor_i2c_write(i2c_ch_sel, 0x3717, 0x02);
80001572:	4589                	li	a1,2
80001574:	71740513          	addi	a0,s0,1815
80001578:	3e45                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:226
	sensor_i2c_write(i2c_ch_sel, 0x371C, 0x3D);
8000157a:	03d00593          	li	a1,61
8000157e:	71c40513          	addi	a0,s0,1820
80001582:	365d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:227
	sensor_i2c_write(i2c_ch_sel, 0x371D, 0x3F);
80001584:	03f00593          	li	a1,63
80001588:	71d40513          	addi	a0,s0,1821
8000158c:	3e71                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:228
	sensor_i2c_write(i2c_ch_sel, 0x372C, 0x00);
8000158e:	4581                	li	a1,0
80001590:	72c40513          	addi	a0,s0,1836
80001594:	3e51                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:229
	sensor_i2c_write(i2c_ch_sel, 0x372D, 0x00);
80001596:	4581                	li	a1,0
80001598:	72d40513          	addi	a0,s0,1837
8000159c:	3671                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:230
	sensor_i2c_write(i2c_ch_sel, 0x372E, 0x46);
8000159e:	04600593          	li	a1,70
800015a2:	72e40513          	addi	a0,s0,1838
800015a6:	3649                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:231
	sensor_i2c_write(i2c_ch_sel, 0x372F, 0x00);
800015a8:	4581                	li	a1,0
800015aa:	72f40513          	addi	a0,s0,1839
800015ae:	3ead                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:232
	sensor_i2c_write(i2c_ch_sel, 0x3730, 0x89);
800015b0:	08900593          	li	a1,137
800015b4:	73040513          	addi	a0,s0,1840
800015b8:	3e85                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:233
	sensor_i2c_write(i2c_ch_sel, 0x3731, 0x00);
800015ba:	4581                	li	a1,0
800015bc:	73140513          	addi	a0,s0,1841
800015c0:	36a5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:234
	sensor_i2c_write(i2c_ch_sel, 0x3732, 0x08);
800015c2:	45a1                	li	a1,8
800015c4:	73240513          	addi	a0,s0,1842
800015c8:	3685                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:235
	sensor_i2c_write(i2c_ch_sel, 0x3733, 0x01);
800015ca:	4585                	li	a1,1
800015cc:	73340513          	addi	a0,s0,1843
800015d0:	3ea1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:236
	sensor_i2c_write(i2c_ch_sel, 0x3734, 0xFE);
800015d2:	0fe00593          	li	a1,254
800015d6:	73440513          	addi	a0,s0,1844
800015da:	36b9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:237
	sensor_i2c_write(i2c_ch_sel, 0x3735, 0x05);
800015dc:	4595                	li	a1,5
800015de:	73540513          	addi	a0,s0,1845
800015e2:	3699                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:238
	sensor_i2c_write(i2c_ch_sel, 0x375D, 0x00);
800015e4:	4581                	li	a1,0
800015e6:	75d40513          	addi	a0,s0,1885
800015ea:	3e3d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:239
	sensor_i2c_write(i2c_ch_sel, 0x375E, 0x00);
800015ec:	4581                	li	a1,0
800015ee:	75e40513          	addi	a0,s0,1886
800015f2:	3e1d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:240
	sensor_i2c_write(i2c_ch_sel, 0x375F, 0x61);
800015f4:	06100593          	li	a1,97
800015f8:	75f40513          	addi	a0,s0,1887
800015fc:	3635                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:241
	sensor_i2c_write(i2c_ch_sel, 0x3760, 0x06);
800015fe:	4599                	li	a1,6
80001600:	76040513          	addi	a0,s0,1888
80001604:	3615                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:242
	sensor_i2c_write(i2c_ch_sel, 0x3768, 0x1B);
80001606:	45ed                	li	a1,27
80001608:	76840513          	addi	a0,s0,1896
8000160c:	3e31                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:243
	sensor_i2c_write(i2c_ch_sel, 0x3769, 0x1B);
8000160e:	45ed                	li	a1,27
80001610:	76940513          	addi	a0,s0,1897
80001614:	3e11                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:244
	sensor_i2c_write(i2c_ch_sel, 0x376A, 0x1A);
80001616:	45e9                	li	a1,26
80001618:	76a40513          	addi	a0,s0,1898
8000161c:	3631                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:245
	sensor_i2c_write(i2c_ch_sel, 0x376B, 0x19);
8000161e:	45e5                	li	a1,25
80001620:	76b40513          	addi	a0,s0,1899
80001624:	3611                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:246
	sensor_i2c_write(i2c_ch_sel, 0x376C, 0x18);
80001626:	45e1                	li	a1,24
80001628:	76c40513          	addi	a0,s0,1900
8000162c:	3cf5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:247
	sensor_i2c_write(i2c_ch_sel, 0x376D, 0x14);
8000162e:	45d1                	li	a1,20
80001630:	76d40513          	addi	a0,s0,1901
80001634:	3cd5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:248
	sensor_i2c_write(i2c_ch_sel, 0x376E, 0x0F);
80001636:	45bd                	li	a1,15
80001638:	76e40513          	addi	a0,s0,1902
8000163c:	34f5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:249
	sensor_i2c_write(i2c_ch_sel, 0x3776, 0x00);
8000163e:	4581                	li	a1,0
80001640:	77640513          	addi	a0,s0,1910
80001644:	34d5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:250
	sensor_i2c_write(i2c_ch_sel, 0x3777, 0x00);
80001646:	4581                	li	a1,0
80001648:	77740513          	addi	a0,s0,1911
8000164c:	3cf1                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:251
	sensor_i2c_write(i2c_ch_sel, 0x3778, 0x46);
8000164e:	04600593          	li	a1,70
80001652:	77840513          	addi	a0,s0,1912
80001656:	3cc9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:252
	sensor_i2c_write(i2c_ch_sel, 0x3779, 0x00);
80001658:	4581                	li	a1,0
8000165a:	77940513          	addi	a0,s0,1913
8000165e:	34e9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:253
	sensor_i2c_write(i2c_ch_sel, 0x377A, 0x08);
80001660:	45a1                	li	a1,8
80001662:	77a40513          	addi	a0,s0,1914
80001666:	34c9                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:254
	sensor_i2c_write(i2c_ch_sel, 0x377B, 0x01);
80001668:	4585                	li	a1,1
8000166a:	77b40513          	addi	a0,s0,1915
8000166e:	3c6d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:255
	sensor_i2c_write(i2c_ch_sel, 0x377C, 0x45);
80001670:	04500593          	li	a1,69
80001674:	77c40513          	addi	a0,s0,1916
80001678:	3c45                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:256
	sensor_i2c_write(i2c_ch_sel, 0x377D, 0x01);
8000167a:	4585                	li	a1,1
8000167c:	77d40513          	addi	a0,s0,1917
80001680:	3465                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:257
	sensor_i2c_write(i2c_ch_sel, 0x377E, 0x23);
80001682:	02300593          	li	a1,35
80001686:	77e40513          	addi	a0,s0,1918
8000168a:	3c79                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:258
	sensor_i2c_write(i2c_ch_sel, 0x377F, 0x02);
8000168c:	4589                	li	a1,2
8000168e:	77f40513          	addi	a0,s0,1919
80001692:	3c59                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:259
	sensor_i2c_write(i2c_ch_sel, 0x3780, 0xD9);
80001694:	0d900593          	li	a1,217
80001698:	78040513          	addi	a0,s0,1920
8000169c:	3471                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:260
	sensor_i2c_write(i2c_ch_sel, 0x3781, 0x03);
8000169e:	458d                	li	a1,3
800016a0:	78140513          	addi	a0,s0,1921
800016a4:	3451                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:261
	sensor_i2c_write(i2c_ch_sel, 0x3782, 0xF5);
800016a6:	0f500593          	li	a1,245
800016aa:	78240513          	addi	a0,s0,1922
800016ae:	3cad                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:262
	sensor_i2c_write(i2c_ch_sel, 0x3783, 0x06);
800016b0:	4599                	li	a1,6
800016b2:	78340513          	addi	a0,s0,1923
800016b6:	3c8d                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:263
	sensor_i2c_write(i2c_ch_sel, 0x3784, 0xA5);
800016b8:	0a500593          	li	a1,165
800016bc:	78440513          	addi	a0,s0,1924
800016c0:	34a5                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:264
	sensor_i2c_write(i2c_ch_sel, 0x3788, 0x0F);
800016c2:	45bd                	li	a1,15
800016c4:	78840513          	addi	a0,s0,1928
800016c8:	3485                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:265
	sensor_i2c_write(i2c_ch_sel, 0x378A, 0xD9);
800016ca:	0d900593          	li	a1,217
800016ce:	78a40513          	addi	a0,s0,1930
800016d2:	3c99                	jal	80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:266
	sensor_i2c_write(i2c_ch_sel, 0x378B, 0x03);
800016d4:	458d                	li	a1,3
800016d6:	78b40513          	addi	a0,s0,1931
800016da:	a4fff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:267
	sensor_i2c_write(i2c_ch_sel, 0x378C, 0xEB);
800016de:	0eb00593          	li	a1,235
800016e2:	78c40513          	addi	a0,s0,1932
800016e6:	a43ff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:268
	sensor_i2c_write(i2c_ch_sel, 0x378D, 0x05);
800016ea:	4595                	li	a1,5
800016ec:	78d40513          	addi	a0,s0,1933
800016f0:	a39ff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:269
	sensor_i2c_write(i2c_ch_sel, 0x378E, 0x87);
800016f4:	08700593          	li	a1,135
800016f8:	78e40513          	addi	a0,s0,1934
800016fc:	a2dff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:270
	sensor_i2c_write(i2c_ch_sel, 0x378F, 0x06);
80001700:	4599                	li	a1,6
80001702:	78f40513          	addi	a0,s0,1935
80001706:	a23ff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:271
	sensor_i2c_write(i2c_ch_sel, 0x3790, 0xF5);
8000170a:	0f500593          	li	a1,245
8000170e:	79040513          	addi	a0,s0,1936
80001712:	a17ff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:272
	sensor_i2c_write(i2c_ch_sel, 0x3792, 0x43);
80001716:	04300593          	li	a1,67
8000171a:	79240513          	addi	a0,s0,1938
8000171e:	a0bff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:273
	sensor_i2c_write(i2c_ch_sel, 0x3794, 0x7A);
80001722:	07a00593          	li	a1,122
80001726:	79440513          	addi	a0,s0,1940
8000172a:	9ffff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:274
	sensor_i2c_write(i2c_ch_sel, 0x3796, 0xA1);
8000172e:	0a100593          	li	a1,161
80001732:	79640513          	addi	a0,s0,1942
80001736:	9f3ff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:275
	sensor_i2c_write(i2c_ch_sel, 0x37B0, 0x37);// Xmaster pin high = 37h, else 36h
8000173a:	03700593          	li	a1,55
8000173e:	7b040513          	addi	a0,s0,1968
80001742:	9e7ff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:276
	sensor_i2c_write(i2c_ch_sel, 0x3E04, 0x0E);
80001746:	45b9                	li	a1,14
80001748:	e0448513          	addi	a0,s1,-508
8000174c:	9ddff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:279
	/*End of additional mandatory settings */

	sensor_i2c_write(i2c_ch_sel, 0x30E8, 0x30);// Gain setting LSB
80001750:	03000593          	li	a1,48
80001754:	0e840513          	addi	a0,s0,232
80001758:	9d1ff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:280
	sensor_i2c_write(i2c_ch_sel, 0x30E9, 0x00);// Gain setting MSB
8000175c:	4581                	li	a1,0
8000175e:	0e940513          	addi	a0,s0,233
80001762:	9c7ff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:281
	sensor_i2c_write(i2c_ch_sel, 0x3E04, 0x0E);// Mandatory value as per data sheet
80001766:	45b9                	li	a1,14
80001768:	e0448513          	addi	a0,s1,-508
8000176c:	9bdff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:282
	sensor_i2c_write(i2c_ch_sel, 0x3002, 0x00);// Master mode
80001770:	4581                	li	a1,0
80001772:	00240513          	addi	a0,s0,2
80001776:	9b3ff0ef          	jal	ra,80001128 <sensor_i2c_write.isra.0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:283
	msdelay(1000);
8000177a:	3e800513          	li	a0,1000
8000177e:	281d                	jal	800017b4 <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:288

	sensor_i2c_write(i2c_ch_sel, 0x3000, 0x00);// STANDBY mode disabled
	//sensor_i2c_write_bits(0x301A, 0x0004, 1);  	//Enable Streaming
	for(i = 0; i < 50000; i++);
}
80001780:	4422                	lw	s0,8(sp)
80001782:	40b2                	lw	ra,12(sp)
80001784:	4492                	lw	s1,4(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:285
	sensor_i2c_write(i2c_ch_sel, 0x3000, 0x00);// STANDBY mode disabled
80001786:	4581                	li	a1,0
80001788:	650d                	lui	a0,0x3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:288
}
8000178a:	0141                	addi	sp,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:285
	sensor_i2c_write(i2c_ch_sel, 0x3000, 0x00);// STANDBY mode disabled
8000178c:	99dff06f          	j	80001128 <sensor_i2c_write.isra.0>

80001790 <gain_setting>:
gain_setting():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:291

void gain_setting( uint8_t i2c_ch_sel,uint16_t in_gain)
{
80001790:	1141                	addi	sp,sp,-16
80001792:	c422                	sw	s0,8(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:292
sensor_i2c_write_gain(i2c_ch_sel, 0x30E8, in_gain);// Gain setting LSB
80001794:	640d                	lui	s0,0x3
80001796:	0ff5f593          	andi	a1,a1,255
8000179a:	0e840513          	addi	a0,s0,232 # 30e8 <STACK_SIZE+0x28e8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:291
{
8000179e:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:292
sensor_i2c_write_gain(i2c_ch_sel, 0x30E8, in_gain);// Gain setting LSB
800017a0:	9d7ff0ef          	jal	ra,80001176 <sensor_i2c_write_gain.isra.1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:293
sensor_i2c_write_gain(i2c_ch_sel, 0x30E9, 0);// Gain setting MSB
800017a4:	0e940513          	addi	a0,s0,233
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:295

}
800017a8:	4422                	lw	s0,8(sp)
800017aa:	40b2                	lw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:293
sensor_i2c_write_gain(i2c_ch_sel, 0x30E9, 0);// Gain setting MSB
800017ac:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:295
}
800017ae:	0141                	addi	sp,sp,16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/imx334_corei2c/imx334_corei2c.c:293
sensor_i2c_write_gain(i2c_ch_sel, 0x30E9, 0);// Gain setting MSB
800017b0:	9c7ff06f          	j	80001176 <sensor_i2c_write_gain.isra.1>

800017b4 <msdelay>:
msdelay():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/delay/msdelay.c:20
extern volatile uint32_t g_10ms_count1;
extern volatile uint32_t g_ms_count;

void msdelay(uint32_t tms)
{
    g_ms_count = tms;
800017b4:	96a1a023          	sw	a0,-1696(gp) # 800044f0 <g_ms_count>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/delay/msdelay.c:21
    g_10ms_count1 = 0;
800017b8:	9601a823          	sw	zero,-1680(gp) # 80004500 <g_10ms_count1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/delay/msdelay.c:22
    timerdone = 1;
800017bc:	4785                	li	a5,1
800017be:	8af1a823          	sw	a5,-1872(gp) # 80004440 <timerdone>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/delay/msdelay.c:23
    while(timerdone != 0)
800017c2:	8b018713          	addi	a4,gp,-1872 # 80004440 <timerdone>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/delay/msdelay.c:23 (discriminator 1)
800017c6:	431c                	lw	a5,0(a4)
800017c8:	fffd                	bnez	a5,800017c6 <msdelay+0x12>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/delay/msdelay.c:28
	{
		//busy wait loop
	}

}
800017ca:	8082                	ret

800017cc <read_dp>:
read_dp():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_common.c:29
// ------------------------------------------------------------
// Read DisplayPort IP APB interface
// ------------------------------------------------------------
void read_dp(uint32_t rd_base_addr, uint32_t offset, uint32_t *rd_data)
{
    uint32_t raddr = rd_base_addr | offset;
800017cc:	8dc9                	or	a1,a1,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_common.c:30
    rd_data[0] = *((uint32_t*)raddr);
800017ce:	419c                	lw	a5,0(a1)
800017d0:	c21c                	sw	a5,0(a2)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_common.c:31
}
800017d2:	8082                	ret

800017d4 <write_dp>:
write_dp():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_common.c:38
// ------------------------------------------------------------
// Write DisplayPort IP APB interface
// ------------------------------------------------------------
void write_dp(uint32_t wr_base_addr, uint32_t offset, uint32_t wdata)
{
    uint32_t wraddr = wr_base_addr | offset;
800017d4:	8dc9                	or	a1,a1,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_common.c:39
    *((uint32_t *)wraddr) = wdata;
800017d6:	c190                	sw	a2,0(a1)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_common.c:40
}
800017d8:	8082                	ret

800017da <DPSourceTxWrCmd>:
DPSourceTxWrCmd():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:211
   read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_DRV_CTRL, &SER_1_PMA_L0_SER_DRV_CTRL_R);
   read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_DRV_CTRL_SEL, &SER_1_PMA_L0_SER_DRV_CTRL_SEL_R);
}

void DPSourceTxWrCmd(uint32_t addr,uint32_t lenVal,uint32_t txByteNum)
{
800017da:	1101                	addi	sp,sp,-32
800017dc:	ca26                	sw	s1,20(sp)
800017de:	c64e                	sw	s3,12(sp)
800017e0:	90018493          	addi	s1,gp,-1792 # 80004490 <SourceWrBytes>
800017e4:	00261993          	slli	s3,a2,0x2
800017e8:	cc22                	sw	s0,24(sp)
800017ea:	c84a                	sw	s2,16(sp)
800017ec:	c452                	sw	s4,8(sp)
800017ee:	ce06                	sw	ra,28(sp)
800017f0:	8a2a                	mv	s4,a0
800017f2:	892e                	mv	s2,a1
800017f4:	8432                	mv	s0,a2
800017f6:	99a6                	add	s3,s3,s1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:212 (discriminator 1)
    for(uint32_t idx = 0;idx < txByteNum;idx++)
800017f8:	05349b63          	bne	s1,s3,8000184e <DPSourceTxWrCmd+0x74>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:219
        write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_WRITING_DATA_OFFSET, SourceWrBytes[idx]);
        //delay_msec(1);
    }

    uint32_t len = txByteNum - 1;
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_ADDRESS_OFFSET, addr);
800017fc:	8652                	mv	a2,s4
800017fe:	10400593          	li	a1,260
80001802:	71001537          	lui	a0,0x71001
80001806:	37f9                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:220
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_LENGTH_OFFSET, len);
80001808:	fff40613          	addi	a2,s0,-1
8000180c:	10800593          	li	a1,264
80001810:	71001537          	lui	a0,0x71001
80001814:	37c1                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:222
    //AUX_Tx_Data_Byte_Num[23:16], AUX_TX_LengthField_Val[8], AUX_Tx_Command[3:0]
    uint32_t txCmdReg = (txByteNum << 16) | (lenVal << 8) | 0x00000008;
80001816:	0442                	slli	s0,s0,0x10
80001818:	00891613          	slli	a2,s2,0x8
8000181c:	8e41                	or	a2,a2,s0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:223
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_COMMAND_OFFSET, txCmdReg);
8000181e:	00866613          	ori	a2,a2,8
80001822:	10000593          	li	a1,256
80001826:	71001537          	lui	a0,0x71001
8000182a:	376d                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:225

    SourceCmdSta++;
8000182c:	83418793          	addi	a5,gp,-1996 # 800043c4 <SourceCmdSta>
80001830:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:227
    SourceCmdTx = 1;
}
80001832:	40f2                	lw	ra,28(sp)
80001834:	4462                	lw	s0,24(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:225
    SourceCmdSta++;
80001836:	0785                	addi	a5,a5,1
80001838:	82f1aa23          	sw	a5,-1996(gp) # 800043c4 <SourceCmdSta>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:226
    SourceCmdTx = 1;
8000183c:	4785                	li	a5,1
8000183e:	82f1ac23          	sw	a5,-1992(gp) # 800043c8 <SourceCmdTx>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:227
}
80001842:	44d2                	lw	s1,20(sp)
80001844:	4942                	lw	s2,16(sp)
80001846:	49b2                	lw	s3,12(sp)
80001848:	4a22                	lw	s4,8(sp)
8000184a:	6105                	addi	sp,sp,32
8000184c:	8082                	ret
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:214 (discriminator 3)
        write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_WRITING_DATA_OFFSET, SourceWrBytes[idx]);
8000184e:	4090                	lw	a2,0(s1)
80001850:	10c00593          	li	a1,268
80001854:	71001537          	lui	a0,0x71001
80001858:	3fb5                	jal	800017d4 <write_dp>
8000185a:	0491                	addi	s1,s1,4
8000185c:	bf71                	j	800017f8 <DPSourceTxWrCmd+0x1e>

8000185e <DPSourceTxI2CWrCmd>:
DPSourceTxI2CWrCmd():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:231


void DPSourceTxI2CWrCmd(uint32_t addr,uint32_t lenVal,uint32_t txByteNum,uint32_t mot)
{
8000185e:	1101                	addi	sp,sp,-32
80001860:	c84a                	sw	s2,16(sp)
80001862:	c452                	sw	s4,8(sp)
80001864:	90018913          	addi	s2,gp,-1792 # 80004490 <SourceWrBytes>
80001868:	00261a13          	slli	s4,a2,0x2
8000186c:	cc22                	sw	s0,24(sp)
8000186e:	ca26                	sw	s1,20(sp)
80001870:	c64e                	sw	s3,12(sp)
80001872:	c256                	sw	s5,4(sp)
80001874:	ce06                	sw	ra,28(sp)
80001876:	8aaa                	mv	s5,a0
80001878:	84ae                	mv	s1,a1
8000187a:	8432                	mv	s0,a2
8000187c:	89b6                	mv	s3,a3
8000187e:	9a4a                	add	s4,s4,s2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:232 (discriminator 1)
    for(uint32_t idx = 0;idx < txByteNum;idx++)
80001880:	05491d63          	bne	s2,s4,800018da <DPSourceTxI2CWrCmd+0x7c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:238
    {
        write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_WRITING_DATA_OFFSET, SourceWrBytes[idx]);
    }

    uint32_t len = txByteNum - 1;
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_ADDRESS_OFFSET, addr);
80001884:	8656                	mv	a2,s5
80001886:	10400593          	li	a1,260
8000188a:	71001537          	lui	a0,0x71001
8000188e:	3799                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:239
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_LENGTH_OFFSET, len);
80001890:	fff40613          	addi	a2,s0,-1
80001894:	10800593          	li	a1,264
80001898:	71001537          	lui	a0,0x71001
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:242

    //AUX_Tx_Data_Byte_Num[23:16], AUX_TX_LengthField_Val[8], AUX_Tx_Command[3:0]
    uint32_t txCmdReg = (txByteNum << 16) | (lenVal << 8) | (mot << 2) | 0x00000000;
8000189c:	098a                	slli	s3,s3,0x2
8000189e:	04a2                	slli	s1,s1,0x8
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:239
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_LENGTH_OFFSET, len);
800018a0:	3f15                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:242
    uint32_t txCmdReg = (txByteNum << 16) | (lenVal << 8) | (mot << 2) | 0x00000000;
800018a2:	0134e4b3          	or	s1,s1,s3
800018a6:	0442                	slli	s0,s0,0x10
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:243
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_COMMAND_OFFSET, txCmdReg);
800018a8:	0084e633          	or	a2,s1,s0
800018ac:	10000593          	li	a1,256
800018b0:	71001537          	lui	a0,0x71001
800018b4:	3705                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:245

    SourceCmdSta++;
800018b6:	83418793          	addi	a5,gp,-1996 # 800043c4 <SourceCmdSta>
800018ba:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:247
    SourceCmdTx = 1;
}
800018bc:	40f2                	lw	ra,28(sp)
800018be:	4462                	lw	s0,24(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:245
    SourceCmdSta++;
800018c0:	0785                	addi	a5,a5,1
800018c2:	82f1aa23          	sw	a5,-1996(gp) # 800043c4 <SourceCmdSta>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:246
    SourceCmdTx = 1;
800018c6:	4785                	li	a5,1
800018c8:	82f1ac23          	sw	a5,-1992(gp) # 800043c8 <SourceCmdTx>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:247
}
800018cc:	44d2                	lw	s1,20(sp)
800018ce:	4942                	lw	s2,16(sp)
800018d0:	49b2                	lw	s3,12(sp)
800018d2:	4a22                	lw	s4,8(sp)
800018d4:	4a92                	lw	s5,4(sp)
800018d6:	6105                	addi	sp,sp,32
800018d8:	8082                	ret
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:234 (discriminator 3)
        write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_WRITING_DATA_OFFSET, SourceWrBytes[idx]);
800018da:	00092603          	lw	a2,0(s2)
800018de:	10c00593          	li	a1,268
800018e2:	71001537          	lui	a0,0x71001
800018e6:	35fd                	jal	800017d4 <write_dp>
800018e8:	0911                	addi	s2,s2,4
800018ea:	bf59                	j	80001880 <DPSourceTxI2CWrCmd+0x22>

800018ec <DPSourceTxRdCmd>:
DPSourceTxRdCmd():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:250

void DPSourceTxRdCmd(uint32_t addr,uint32_t lenVal,uint32_t rxByteNum)
{
800018ec:	1141                	addi	sp,sp,-16
800018ee:	c422                	sw	s0,8(sp)
800018f0:	c226                	sw	s1,4(sp)
800018f2:	842e                	mv	s0,a1
800018f4:	84b2                	mv	s1,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:252
    uint32_t len = rxByteNum - 1;
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_ADDRESS_OFFSET, addr);
800018f6:	10400593          	li	a1,260
800018fa:	862a                	mv	a2,a0
800018fc:	71001537          	lui	a0,0x71001
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:250
{
80001900:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:252
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_ADDRESS_OFFSET, addr);
80001902:	3dc9                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:253
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_LENGTH_OFFSET, len);
80001904:	fff48613          	addi	a2,s1,-1
80001908:	10800593          	li	a1,264
8000190c:	71001537          	lui	a0,0x71001
80001910:	35d1                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:256

    //AUX_Tx_Data_Byte_Num[23:16], AUX_TX_LengthField_Val[8], AUX_Tx_Command[3:0]
    uint32_t txCmdReg = (lenVal << 8) | 0x00000009;
80001912:	00841613          	slli	a2,s0,0x8
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:257
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_COMMAND_OFFSET, txCmdReg);
80001916:	00966613          	ori	a2,a2,9
8000191a:	10000593          	li	a1,256
8000191e:	71001537          	lui	a0,0x71001
80001922:	3d4d                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:259

    SourceCmdSta++;
80001924:	83418713          	addi	a4,gp,-1996 # 800043c4 <SourceCmdSta>
80001928:	431c                	lw	a5,0(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:260
}
8000192a:	40b2                	lw	ra,12(sp)
8000192c:	4422                	lw	s0,8(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:259
    SourceCmdSta++;
8000192e:	0785                	addi	a5,a5,1
80001930:	c31c                	sw	a5,0(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:260
}
80001932:	4492                	lw	s1,4(sp)
80001934:	0141                	addi	sp,sp,16
80001936:	8082                	ret

80001938 <DPSourceTxI2CRdCmd>:
DPSourceTxI2CRdCmd():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:262
void DPSourceTxI2CRdCmd(uint32_t addr,uint32_t lenVal,uint32_t rxByteNum,uint32_t mot)
{
80001938:	1101                	addi	sp,sp,-32
8000193a:	cc22                	sw	s0,24(sp)
8000193c:	ca26                	sw	s1,20(sp)
8000193e:	842e                	mv	s0,a1
80001940:	84b2                	mv	s1,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:264
    uint32_t len = rxByteNum - 1;
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_ADDRESS_OFFSET, addr);
80001942:	10400593          	li	a1,260
80001946:	862a                	mv	a2,a0
80001948:	71001537          	lui	a0,0x71001
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:262
{
8000194c:	ce06                	sw	ra,28(sp)
8000194e:	c636                	sw	a3,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:264
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_ADDRESS_OFFSET, addr);
80001950:	3551                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:265
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_LENGTH_OFFSET, len);
80001952:	fff48613          	addi	a2,s1,-1
80001956:	10800593          	li	a1,264
8000195a:	71001537          	lui	a0,0x71001
8000195e:	3d9d                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:268

    //AUX_Tx_Data_Byte_Num[23:16], AUX_TX_LengthField_Val[8], AUX_Tx_Command[3:0]
    uint32_t txCmdReg = (lenVal << 8) | (mot << 2) | 0x00000001;
80001960:	46b2                	lw	a3,12(sp)
80001962:	0422                	slli	s0,s0,0x8
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:269
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_COMMAND_OFFSET, txCmdReg);
80001964:	10000593          	li	a1,256
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:268
    uint32_t txCmdReg = (lenVal << 8) | (mot << 2) | 0x00000001;
80001968:	068a                	slli	a3,a3,0x2
8000196a:	8c55                	or	s0,s0,a3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:269
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_COMMAND_OFFSET, txCmdReg);
8000196c:	00146613          	ori	a2,s0,1
80001970:	71001537          	lui	a0,0x71001
80001974:	3585                	jal	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:271

    SourceCmdSta++;
80001976:	83418713          	addi	a4,gp,-1996 # 800043c4 <SourceCmdSta>
8000197a:	431c                	lw	a5,0(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:272
}
8000197c:	40f2                	lw	ra,28(sp)
8000197e:	4462                	lw	s0,24(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:271
    SourceCmdSta++;
80001980:	0785                	addi	a5,a5,1
80001982:	c31c                	sw	a5,0(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:272
}
80001984:	44d2                	lw	s1,20(sp)
80001986:	6105                	addi	sp,sp,32
80001988:	8082                	ret

8000198a <DPSourceStartVideo>:
DPSourceStartVideo():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:276


void DPSourceStartVideo(uint32_t SPEED_MODE,uint32_t HRES,uint32_t VRES,uint32_t HFP,uint32_t HBP,uint32_t VFP,uint32_t VBP,uint32_t HSW,uint32_t VSW,uint32_t VSP,uint32_t LANE_NO)
{
8000198a:	7179                	addi	sp,sp,-48
8000198c:	cc52                	sw	s4,24(sp)
8000198e:	ca56                	sw	s5,20(sp)
80001990:	c462                	sw	s8,8(sp)
80001992:	8aae                	mv	s5,a1
80001994:	8c2a                	mv	s8,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:278
    SourceWrBytes[0] = 0x00000000;
    DPSourceTxWrCmd(0x00000102,0x00000001,0x00000001);
80001996:	4585                	li	a1,1
80001998:	10200513          	li	a0,258
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:276
{
8000199c:	8a32                	mv	s4,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:278
    DPSourceTxWrCmd(0x00000102,0x00000001,0x00000001);
8000199e:	4605                	li	a2,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:276
{
800019a0:	d606                	sw	ra,44(sp)
800019a2:	d422                	sw	s0,40(sp)
800019a4:	d226                	sw	s1,36(sp)
800019a6:	843e                	mv	s0,a5
800019a8:	d04a                	sw	s2,32(sp)
800019aa:	ce4e                	sw	s3,28(sp)
800019ac:	c85a                	sw	s6,16(sp)
800019ae:	c65e                	sw	s7,12(sp)
800019b0:	84b6                	mv	s1,a3
800019b2:	8bba                	mv	s7,a4
800019b4:	8b42                	mv	s6,a6
800019b6:	89c6                	mv	s3,a7
800019b8:	5942                	lw	s2,48(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:277
    SourceWrBytes[0] = 0x00000000;
800019ba:	9001a023          	sw	zero,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:278
    DPSourceTxWrCmd(0x00000102,0x00000001,0x00000001);
800019be:	e1dff0ef          	jal	ra,800017da <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:287

    // --------------------------------------
    //      DPSourceStartVideo();
    // -----------------------------------------
    // DP-TX lane number
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_LANE_NUMBER_OFFSET, LANE_NO);
800019c2:	5662                	lw	a2,56(sp)
800019c4:	45a1                	li	a1,8
800019c6:	71001537          	lui	a0,0x71001
800019ca:	e0bff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:288
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_LANE_ENABLE_OFFSET, 0x0000000F);
800019ce:	463d                	li	a2,15
800019d0:	45b1                	li	a1,12
800019d2:	71001537          	lui	a0,0x71001
800019d6:	dffff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:291

    // DP-TX Video Enable
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_VIDEO_STREAM_ENABLE_OFFSET, 0x00000001);
800019da:	4605                	li	a2,1
800019dc:	4581                	li	a1,0
800019de:	71001537          	lui	a0,0x71001
800019e2:	df3ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:292
    if(SPEED_MODE==0)
800019e6:	120c1d63          	bnez	s8,80001b20 <DPSourceStartVideo+0x196>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:294
        {
            MSA_VALUE=0x00075555;
800019ea:	000757b7          	lui	a5,0x75
800019ee:	55578793          	addi	a5,a5,1365 # 75555 <STACK_SIZE+0x74d55>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:302
        {
            MSA_VALUE=0x00046666;
        }
        else if (SPEED_MODE==2)
        {
            MSA_VALUE=0x0003F35F;
800019f2:	94f1a223          	sw	a5,-1724(gp) # 800044d4 <MSA_VALUE>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:305
        }
    // DP-TX 4K MSA
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_MVID_OFFSET, MSA_VALUE);//0x001f9a1);//0x00023333);//0x0008ccd);
800019f6:	94418793          	addi	a5,gp,-1724 # 800044d4 <MSA_VALUE>
800019fa:	4390                	lw	a2,0(a5)
800019fc:	0c000593          	li	a1,192
80001a00:	71001537          	lui	a0,0x71001
80001a04:	dd1ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:306
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_NVID_OFFSET, 0x00080000);
80001a08:	00080637          	lui	a2,0x80
80001a0c:	0c400593          	li	a1,196
80001a10:	71001537          	lui	a0,0x71001
80001a14:	dc1ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:307
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_HTOTAL_OFFSET, (HRES+HBP+HFP+HSW));
80001a18:	01348633          	add	a2,s1,s3
80001a1c:	965e                	add	a2,a2,s7
80001a1e:	9656                	add	a2,a2,s5
80001a20:	0c800593          	li	a1,200
80001a24:	71001537          	lui	a0,0x71001
80001a28:	dadff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:308
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_VTOTAL_OFFSET, (VRES+VBP+VFP+VSW));
80001a2c:	01240633          	add	a2,s0,s2
80001a30:	965a                	add	a2,a2,s6
80001a32:	9652                	add	a2,a2,s4
80001a34:	0cc00593          	li	a1,204
80001a38:	71001537          	lui	a0,0x71001
80001a3c:	d99ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:309
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_HSTART_OFFSET, (HSW+HBP));
80001a40:	013b8633          	add	a2,s7,s3
80001a44:	0d000593          	li	a1,208
80001a48:	71001537          	lui	a0,0x71001
80001a4c:	d89ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:310
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_VSTART_OFFSET, (VSW+VBP));
80001a50:	012b0633          	add	a2,s6,s2
80001a54:	0d400593          	li	a1,212
80001a58:	71001537          	lui	a0,0x71001
80001a5c:	d79ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:311
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_HSYNC_OFFSET, HSW);
80001a60:	864e                	mv	a2,s3
80001a62:	0d800593          	li	a1,216
80001a66:	71001537          	lui	a0,0x71001
80001a6a:	d6bff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:312
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_VSYNC_OFFSET, (VSP+VSW));// neg pol
80001a6e:	5652                	lw	a2,52(sp)
80001a70:	0dc00593          	li	a1,220
80001a74:	71001537          	lui	a0,0x71001
80001a78:	964a                	add	a2,a2,s2
80001a7a:	d5bff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:313
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_MISC0_OFFSET, 0x00000021);
80001a7e:	02100613          	li	a2,33
80001a82:	0e000593          	li	a1,224
80001a86:	71001537          	lui	a0,0x71001
80001a8a:	d4bff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:314
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_MISC1_OFFSET, 0x00000000);
80001a8e:	4601                	li	a2,0
80001a90:	0e400593          	li	a1,228
80001a94:	71001537          	lui	a0,0x71001
80001a98:	d3dff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:315
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_HWIDTH_OFFSET, HRES);
80001a9c:	8656                	mv	a2,s5
80001a9e:	0e800593          	li	a1,232
80001aa2:	71001537          	lui	a0,0x71001
80001aa6:	d2fff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:316
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_MSA_VWIDTH_OFFSET, VRES);
80001aaa:	8652                	mv	a2,s4
80001aac:	0ec00593          	li	a1,236
80001ab0:	71001537          	lui	a0,0x71001
80001ab4:	d21ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:319
          // ------------------------------------------
    // DP-TX Video Enable
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_VIDEO_STREAM_ENABLE_OFFSET, 0x00000001);
80001ab8:	4605                	li	a2,1
80001aba:	4581                	li	a1,0
80001abc:	71001537          	lui	a0,0x71001
80001ac0:	d15ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:321
    // Enable Scrambler
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_SCRAMBLER_ENABLE_OFFSET, 0x00000001);
80001ac4:	4605                	li	a2,1
80001ac6:	45c1                	li	a1,16
80001ac8:	71001537          	lui	a0,0x71001
80001acc:	d09ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:323
    // Disable TPS
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_TRAINING_PATTERN_MODE_OFFSET, 0x00000000);
80001ad0:	4601                	li	a2,0
80001ad2:	45e1                	li	a1,24
80001ad4:	71001537          	lui	a0,0x71001
80001ad8:	cfdff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:326

    // Output data from DP-TX
    write_dp(DP_TX_IP_APB_BASE_ADDRESS1, DP_TX_OUTPUT_DATA_OFFSET, 0x80000000);
80001adc:	80000637          	lui	a2,0x80000
80001ae0:	4581                	li	a1,0
80001ae2:	7000a537          	lui	a0,0x7000a
80001ae6:	cefff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:328

    iter++;
80001aea:	00003797          	auipc	a5,0x3
80001aee:	8a678793          	addi	a5,a5,-1882 # 80004390 <__sdata_load>
80001af2:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:330
    seq_rst = 1;
}
80001af4:	50b2                	lw	ra,44(sp)
80001af6:	5422                	lw	s0,40(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:328
    iter++;
80001af8:	0785                	addi	a5,a5,1
80001afa:	00003717          	auipc	a4,0x3
80001afe:	88f72b23          	sw	a5,-1898(a4) # 80004390 <__sdata_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:329
    seq_rst = 1;
80001b02:	4785                	li	a5,1
80001b04:	00003717          	auipc	a4,0x3
80001b08:	88f72823          	sw	a5,-1904(a4) # 80004394 <seq_rst>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:330
}
80001b0c:	5492                	lw	s1,36(sp)
80001b0e:	5902                	lw	s2,32(sp)
80001b10:	49f2                	lw	s3,28(sp)
80001b12:	4a62                	lw	s4,24(sp)
80001b14:	4ad2                	lw	s5,20(sp)
80001b16:	4b42                	lw	s6,16(sp)
80001b18:	4bb2                	lw	s7,12(sp)
80001b1a:	4c22                	lw	s8,8(sp)
80001b1c:	6145                	addi	sp,sp,48
80001b1e:	8082                	ret
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:296
        else if (SPEED_MODE==1)
80001b20:	4785                	li	a5,1
80001b22:	00fc1763          	bne	s8,a5,80001b30 <DPSourceStartVideo+0x1a6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:298
            MSA_VALUE=0x00046666;
80001b26:	000467b7          	lui	a5,0x46
80001b2a:	66678793          	addi	a5,a5,1638 # 46666 <STACK_SIZE+0x45e66>
80001b2e:	b5d1                	j	800019f2 <DPSourceStartVideo+0x68>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:300
        else if (SPEED_MODE==2)
80001b30:	4789                	li	a5,2
80001b32:	ecfc12e3          	bne	s8,a5,800019f6 <DPSourceStartVideo+0x6c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:302
            MSA_VALUE=0x0003F35F;
80001b36:	0003f7b7          	lui	a5,0x3f
80001b3a:	35f78793          	addi	a5,a5,863 # 3f35f <STACK_SIZE+0x3eb5f>
80001b3e:	bd55                	j	800019f2 <DPSourceStartVideo+0x68>

80001b40 <update_speed>:
update_speed():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:977



//DRI
void update_speed(uint32_t data )
{
80001b40:	1101                	addi	sp,sp,-32
80001b42:	c64e                	sw	s3,12(sp)
80001b44:	ce06                	sw	ra,28(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1015
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
# endif
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b46:	010819b7          	lui	s3,0x1081
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:977
{
80001b4a:	cc22                	sw	s0,24(sp)
80001b4c:	ca26                	sw	s1,20(sp)
80001b4e:	c84a                	sw	s2,16(sp)
80001b50:	c452                	sw	s4,8(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:979
    if (data == 0x01) //2.7G
80001b52:	4785                	li	a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1015
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b54:	03300613          	li	a2,51
80001b58:	04c98593          	addi	a1,s3,76 # 108104c <STACK_SIZE+0x108084c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:979
    if (data == 0x01) //2.7G
80001b5c:	3ef51463          	bne	a0,a5,80001f44 <update_speed+0x404>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1015
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b60:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1016
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b64:	01082937          	lui	s2,0x1082
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1015
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b68:	c6dff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1016
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b6c:	03300613          	li	a2,51
80001b70:	04c90593          	addi	a1,s2,76 # 108204c <STACK_SIZE+0x108184c>
80001b74:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1017
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b78:	010844b7          	lui	s1,0x1084
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1016
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b7c:	c59ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1017
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b80:	03300613          	li	a2,51
80001b84:	04c48593          	addi	a1,s1,76 # 108404c <STACK_SIZE+0x108384c>
80001b88:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1018
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b8c:	01088437          	lui	s0,0x1088
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1017
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b90:	c45ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1018
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001b94:	03300613          	li	a2,51
80001b98:	04c40593          	addi	a1,s0,76 # 108804c <STACK_SIZE+0x108784c>
80001b9c:	60000537          	lui	a0,0x60000
80001ba0:	c35ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1019
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80001ba4:	460d                	li	a2,3
80001ba6:	07898593          	addi	a1,s3,120
80001baa:	60000537          	lui	a0,0x60000
80001bae:	c27ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1020
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80001bb2:	460d                	li	a2,3
80001bb4:	07890593          	addi	a1,s2,120
80001bb8:	60000537          	lui	a0,0x60000
80001bbc:	c19ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1021
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80001bc0:	460d                	li	a2,3
80001bc2:	07848593          	addi	a1,s1,120
80001bc6:	60000537          	lui	a0,0x60000
80001bca:	c0bff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1022
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80001bce:	460d                	li	a2,3
80001bd0:	07840593          	addi	a1,s0,120
80001bd4:	60000537          	lui	a0,0x60000
80001bd8:	bfdff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1024

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80001bdc:	6a05                	lui	s4,0x1
80001bde:	f15a0613          	addi	a2,s4,-235 # f15 <STACK_SIZE+0x715>
80001be2:	00898593          	addi	a1,s3,8
80001be6:	60000537          	lui	a0,0x60000
80001bea:	bebff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1025
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80001bee:	f15a0613          	addi	a2,s4,-235
80001bf2:	00890593          	addi	a1,s2,8
80001bf6:	60000537          	lui	a0,0x60000
80001bfa:	bdbff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1026
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80001bfe:	f15a0613          	addi	a2,s4,-235
80001c02:	00848593          	addi	a1,s1,8
80001c06:	60000537          	lui	a0,0x60000
80001c0a:	bcbff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1027
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80001c0e:	f15a0613          	addi	a2,s4,-235
80001c12:	00840593          	addi	a1,s0,8
80001c16:	60000537          	lui	a0,0x60000
80001c1a:	bbbff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1029

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80001c1e:	4601                	li	a2,0
80001c20:	00c98593          	addi	a1,s3,12
80001c24:	60000537          	lui	a0,0x60000
80001c28:	badff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1030
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80001c2c:	4601                	li	a2,0
80001c2e:	00c90593          	addi	a1,s2,12
80001c32:	60000537          	lui	a0,0x60000
80001c36:	b9fff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1031
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80001c3a:	4601                	li	a2,0
80001c3c:	00c48593          	addi	a1,s1,12
80001c40:	60000537          	lui	a0,0x60000
80001c44:	b91ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1032
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80001c48:	4601                	li	a2,0
80001c4a:	00c40593          	addi	a1,s0,12
80001c4e:	60000537          	lui	a0,0x60000
80001c52:	b83ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1034

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80001c56:	4655                	li	a2,21
80001c58:	01098593          	addi	a1,s3,16
80001c5c:	60000537          	lui	a0,0x60000
80001c60:	b75ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1035
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80001c64:	4655                	li	a2,21
80001c66:	01090593          	addi	a1,s2,16
80001c6a:	60000537          	lui	a0,0x60000
80001c6e:	b67ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1036
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80001c72:	4655                	li	a2,21
80001c74:	01048593          	addi	a1,s1,16
80001c78:	60000537          	lui	a0,0x60000
80001c7c:	b59ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1037
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80001c80:	4655                	li	a2,21
80001c82:	01040593          	addi	a1,s0,16
80001c86:	60000537          	lui	a0,0x60000
80001c8a:	b4bff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1039

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80001c8e:	4601                	li	a2,0
80001c90:	01498593          	addi	a1,s3,20
80001c94:	60000537          	lui	a0,0x60000
80001c98:	b3dff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1040
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80001c9c:	4601                	li	a2,0
80001c9e:	01490593          	addi	a1,s2,20
80001ca2:	60000537          	lui	a0,0x60000
80001ca6:	b2fff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1041
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80001caa:	4601                	li	a2,0
80001cac:	01448593          	addi	a1,s1,20
80001cb0:	60000537          	lui	a0,0x60000
80001cb4:	b21ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1042
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80001cb8:	4601                	li	a2,0
80001cba:	01440593          	addi	a1,s0,20
80001cbe:	60000537          	lui	a0,0x60000
80001cc2:	b13ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1044

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80001cc6:	4601                	li	a2,0
80001cc8:	01898593          	addi	a1,s3,24
80001ccc:	60000537          	lui	a0,0x60000
80001cd0:	b05ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1045
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80001cd4:	4601                	li	a2,0
80001cd6:	01890593          	addi	a1,s2,24
80001cda:	60000537          	lui	a0,0x60000
80001cde:	af7ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1046
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80001ce2:	4601                	li	a2,0
80001ce4:	01848593          	addi	a1,s1,24
80001ce8:	60000537          	lui	a0,0x60000
80001cec:	ae9ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1047
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80001cf0:	4601                	li	a2,0
80001cf2:	01840593          	addi	a1,s0,24
80001cf6:	60000537          	lui	a0,0x60000
80001cfa:	adbff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1049

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80001cfe:	4601                	li	a2,0
80001d00:	02498593          	addi	a1,s3,36
80001d04:	60000537          	lui	a0,0x60000
80001d08:	acdff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1050
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80001d0c:	4601                	li	a2,0
80001d0e:	02490593          	addi	a1,s2,36
80001d12:	60000537          	lui	a0,0x60000
80001d16:	abfff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1051
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80001d1a:	4601                	li	a2,0
80001d1c:	02448593          	addi	a1,s1,36
80001d20:	60000537          	lui	a0,0x60000
80001d24:	ab1ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1052
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80001d28:	4601                	li	a2,0
80001d2a:	02440593          	addi	a1,s0,36
80001d2e:	60000537          	lui	a0,0x60000
80001d32:	aa3ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1054

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80001d36:	4601                	li	a2,0
80001d38:	02c98593          	addi	a1,s3,44
80001d3c:	60000537          	lui	a0,0x60000
80001d40:	a95ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1055
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80001d44:	4601                	li	a2,0
80001d46:	02c90593          	addi	a1,s2,44
80001d4a:	60000537          	lui	a0,0x60000
80001d4e:	a87ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1056
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80001d52:	4601                	li	a2,0
80001d54:	02c48593          	addi	a1,s1,44
80001d58:	60000537          	lui	a0,0x60000
80001d5c:	a79ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1057
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80001d60:	4601                	li	a2,0
80001d62:	02c40593          	addi	a1,s0,44
80001d66:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1059

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80001d6a:	6a09                	lui	s4,0x2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1057
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80001d6c:	a69ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1059
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80001d70:	219a0613          	addi	a2,s4,537 # 2219 <STACK_SIZE+0x1a19>
80001d74:	04098593          	addi	a1,s3,64
80001d78:	60000537          	lui	a0,0x60000
80001d7c:	a59ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1060
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80001d80:	219a0613          	addi	a2,s4,537
80001d84:	04090593          	addi	a1,s2,64
80001d88:	60000537          	lui	a0,0x60000
80001d8c:	a49ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1061
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80001d90:	219a0613          	addi	a2,s4,537
80001d94:	04048593          	addi	a1,s1,64
80001d98:	60000537          	lui	a0,0x60000
80001d9c:	a39ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1062
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80001da0:	219a0613          	addi	a2,s4,537
80001da4:	04040593          	addi	a1,s0,64
80001da8:	60000537          	lui	a0,0x60000
80001dac:	a29ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1064

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
80001db0:	07100613          	li	a2,113
80001db4:	07498593          	addi	a1,s3,116
80001db8:	60000537          	lui	a0,0x60000
80001dbc:	a19ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1065
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
80001dc0:	07100613          	li	a2,113
80001dc4:	07490593          	addi	a1,s2,116
80001dc8:	60000537          	lui	a0,0x60000
80001dcc:	a09ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1066
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
80001dd0:	07100613          	li	a2,113
80001dd4:	07448593          	addi	a1,s1,116
80001dd8:	60000537          	lui	a0,0x60000
80001ddc:	9f9ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1067
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
80001de0:	07100613          	li	a2,113
80001de4:	07440593          	addi	a1,s0,116
80001de8:	60000537          	lui	a0,0x60000
80001dec:	9e9ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1069

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80001df0:	4601                	li	a2,0
80001df2:	0c098593          	addi	a1,s3,192
80001df6:	60000537          	lui	a0,0x60000
80001dfa:	9dbff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1070
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80001dfe:	4601                	li	a2,0
80001e00:	0c090593          	addi	a1,s2,192
80001e04:	60000537          	lui	a0,0x60000
80001e08:	9cdff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1071
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80001e0c:	4601                	li	a2,0
80001e0e:	0c048593          	addi	a1,s1,192
80001e12:	60000537          	lui	a0,0x60000
80001e16:	9bfff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1072
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80001e1a:	4601                	li	a2,0
80001e1c:	0c040593          	addi	a1,s0,192
80001e20:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1074

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80001e24:	64100a37          	lui	s4,0x64100
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1072
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80001e28:	9adff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1074
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80001e2c:	702a0613          	addi	a2,s4,1794 # 64100702 <STACK_SIZE+0x640fff02>
80001e30:	0d098593          	addi	a1,s3,208
80001e34:	60000537          	lui	a0,0x60000
80001e38:	99dff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1075
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80001e3c:	702a0613          	addi	a2,s4,1794
80001e40:	0d090593          	addi	a1,s2,208
80001e44:	60000537          	lui	a0,0x60000
80001e48:	98dff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1076
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80001e4c:	702a0613          	addi	a2,s4,1794
80001e50:	0d048593          	addi	a1,s1,208
80001e54:	60000537          	lui	a0,0x60000
80001e58:	97dff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1077
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80001e5c:	702a0613          	addi	a2,s4,1794
80001e60:	0d040593          	addi	a1,s0,208
80001e64:	60000537          	lui	a0,0x60000
80001e68:	96dff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1079

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80001e6c:	01034a37          	lui	s4,0x1034
80001e70:	018a0613          	addi	a2,s4,24 # 1034018 <STACK_SIZE+0x1033818>
80001e74:	0d498593          	addi	a1,s3,212
80001e78:	60000537          	lui	a0,0x60000
80001e7c:	959ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1080
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80001e80:	018a0613          	addi	a2,s4,24
80001e84:	0d490593          	addi	a1,s2,212
80001e88:	60000537          	lui	a0,0x60000
80001e8c:	949ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1081
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80001e90:	018a0613          	addi	a2,s4,24
80001e94:	0d448593          	addi	a1,s1,212
80001e98:	60000537          	lui	a0,0x60000
80001e9c:	939ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1082
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80001ea0:	018a0613          	addi	a2,s4,24
80001ea4:	0d440593          	addi	a1,s0,212
80001ea8:	60000537          	lui	a0,0x60000
80001eac:	929ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1084

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80001eb0:	00800637          	lui	a2,0x800
80001eb4:	0d898593          	addi	a1,s3,216
80001eb8:	60000537          	lui	a0,0x60000
80001ebc:	919ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1085
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80001ec0:	00800637          	lui	a2,0x800
80001ec4:	0d890593          	addi	a1,s2,216
80001ec8:	60000537          	lui	a0,0x60000
80001ecc:	909ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1086
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80001ed0:	00800637          	lui	a2,0x800
80001ed4:	0d848593          	addi	a1,s1,216
80001ed8:	60000537          	lui	a0,0x60000
80001edc:	8f9ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1087
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80001ee0:	00800637          	lui	a2,0x800
80001ee4:	0d840593          	addi	a1,s0,216
80001ee8:	60000537          	lui	a0,0x60000
80001eec:	8e9ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1089

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80001ef0:	4601                	li	a2,0
80001ef2:	0dc98593          	addi	a1,s3,220
80001ef6:	60000537          	lui	a0,0x60000
80001efa:	8dbff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1090
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80001efe:	4601                	li	a2,0
80001f00:	0dc90593          	addi	a1,s2,220
80001f04:	60000537          	lui	a0,0x60000
80001f08:	8cdff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1091
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80001f0c:	4601                	li	a2,0
80001f0e:	0dc48593          	addi	a1,s1,220
80001f12:	60000537          	lui	a0,0x60000
80001f16:	8bfff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1092
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80001f1a:	4601                	li	a2,0
80001f1c:	0dc40593          	addi	a1,s0,220
80001f20:	60000537          	lui	a0,0x60000
80001f24:	8b1ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1094

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_1,0x14000C );//TXPLL_DIV_1//IN PMA cmn
80001f28:	00140637          	lui	a2,0x140
80001f2c:	0631                	addi	a2,a2,12
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1283
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE

       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_1,0x280016 );//TXPLL_DIV_1//IN PMA cmn
80001f2e:	01090a37          	lui	s4,0x1090
80001f32:	010a0593          	addi	a1,s4,16 # 1090010 <STACK_SIZE+0x108f810>
80001f36:	60000537          	lui	a0,0x60000
80001f3a:	89bff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1284
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_2,0x1000000 );//TXPLL_DIV_2//IN PMA cmn
80001f3e:	01000637          	lui	a2,0x1000
80001f42:	a6e5                	j	8000232a <update_speed+0x7ea>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1108
    else if(data == 0x00) //1.62G
80001f44:	46051c63          	bnez	a0,800023bc <update_speed+0x87c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1110
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001f48:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1111
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001f4c:	01082937          	lui	s2,0x1082
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1110
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001f50:	885ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1111
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001f54:	03300613          	li	a2,51
80001f58:	04c90593          	addi	a1,s2,76 # 108204c <STACK_SIZE+0x108184c>
80001f5c:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1112
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001f60:	010844b7          	lui	s1,0x1084
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1111
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001f64:	871ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1112
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001f68:	03300613          	li	a2,51
80001f6c:	04c48593          	addi	a1,s1,76 # 108404c <STACK_SIZE+0x108384c>
80001f70:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1113
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001f74:	01088437          	lui	s0,0x1088
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1112
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001f78:	85dff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1113
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80001f7c:	03300613          	li	a2,51
80001f80:	04c40593          	addi	a1,s0,76 # 108804c <STACK_SIZE+0x108784c>
80001f84:	60000537          	lui	a0,0x60000
80001f88:	84dff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1114
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80001f8c:	460d                	li	a2,3
80001f8e:	07898593          	addi	a1,s3,120
80001f92:	60000537          	lui	a0,0x60000
80001f96:	83fff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1115
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80001f9a:	460d                	li	a2,3
80001f9c:	07890593          	addi	a1,s2,120
80001fa0:	60000537          	lui	a0,0x60000
80001fa4:	831ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1116
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80001fa8:	460d                	li	a2,3
80001faa:	07848593          	addi	a1,s1,120
80001fae:	60000537          	lui	a0,0x60000
80001fb2:	823ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1117
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80001fb6:	460d                	li	a2,3
80001fb8:	07840593          	addi	a1,s0,120
80001fbc:	60000537          	lui	a0,0x60000
80001fc0:	815ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1119
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80001fc4:	6a05                	lui	s4,0x1
80001fc6:	f15a0613          	addi	a2,s4,-235 # f15 <STACK_SIZE+0x715>
80001fca:	00898593          	addi	a1,s3,8
80001fce:	60000537          	lui	a0,0x60000
80001fd2:	803ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1120
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80001fd6:	f15a0613          	addi	a2,s4,-235
80001fda:	00890593          	addi	a1,s2,8
80001fde:	60000537          	lui	a0,0x60000
80001fe2:	ff2ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1121
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80001fe6:	f15a0613          	addi	a2,s4,-235
80001fea:	00848593          	addi	a1,s1,8
80001fee:	60000537          	lui	a0,0x60000
80001ff2:	fe2ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1122
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80001ff6:	f15a0613          	addi	a2,s4,-235
80001ffa:	00840593          	addi	a1,s0,8
80001ffe:	60000537          	lui	a0,0x60000
80002002:	fd2ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1124
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80002006:	4601                	li	a2,0
80002008:	00c98593          	addi	a1,s3,12
8000200c:	60000537          	lui	a0,0x60000
80002010:	fc4ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1125
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80002014:	4601                	li	a2,0
80002016:	00c90593          	addi	a1,s2,12
8000201a:	60000537          	lui	a0,0x60000
8000201e:	fb6ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1126
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80002022:	4601                	li	a2,0
80002024:	00c48593          	addi	a1,s1,12
80002028:	60000537          	lui	a0,0x60000
8000202c:	fa8ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1127
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80002030:	4601                	li	a2,0
80002032:	00c40593          	addi	a1,s0,12
80002036:	60000537          	lui	a0,0x60000
8000203a:	f9aff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1129
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
8000203e:	4655                	li	a2,21
80002040:	01098593          	addi	a1,s3,16
80002044:	60000537          	lui	a0,0x60000
80002048:	f8cff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1130
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
8000204c:	4655                	li	a2,21
8000204e:	01090593          	addi	a1,s2,16
80002052:	60000537          	lui	a0,0x60000
80002056:	f7eff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1131
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
8000205a:	4655                	li	a2,21
8000205c:	01048593          	addi	a1,s1,16
80002060:	60000537          	lui	a0,0x60000
80002064:	f70ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1132
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
80002068:	4655                	li	a2,21
8000206a:	01040593          	addi	a1,s0,16
8000206e:	60000537          	lui	a0,0x60000
80002072:	f62ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1134
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80002076:	4601                	li	a2,0
80002078:	01498593          	addi	a1,s3,20
8000207c:	60000537          	lui	a0,0x60000
80002080:	f54ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1135
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80002084:	4601                	li	a2,0
80002086:	01490593          	addi	a1,s2,20
8000208a:	60000537          	lui	a0,0x60000
8000208e:	f46ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1136
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80002092:	4601                	li	a2,0
80002094:	01448593          	addi	a1,s1,20
80002098:	60000537          	lui	a0,0x60000
8000209c:	f38ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1137
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
800020a0:	4601                	li	a2,0
800020a2:	01440593          	addi	a1,s0,20
800020a6:	60000537          	lui	a0,0x60000
800020aa:	f2aff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1139
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
800020ae:	4601                	li	a2,0
800020b0:	01898593          	addi	a1,s3,24
800020b4:	60000537          	lui	a0,0x60000
800020b8:	f1cff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1140
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
800020bc:	4601                	li	a2,0
800020be:	01890593          	addi	a1,s2,24
800020c2:	60000537          	lui	a0,0x60000
800020c6:	f0eff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1141
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
800020ca:	4601                	li	a2,0
800020cc:	01848593          	addi	a1,s1,24
800020d0:	60000537          	lui	a0,0x60000
800020d4:	f00ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1142
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
800020d8:	4601                	li	a2,0
800020da:	01840593          	addi	a1,s0,24
800020de:	60000537          	lui	a0,0x60000
800020e2:	ef2ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1144
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
800020e6:	4601                	li	a2,0
800020e8:	02498593          	addi	a1,s3,36
800020ec:	60000537          	lui	a0,0x60000
800020f0:	ee4ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1145
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
800020f4:	4601                	li	a2,0
800020f6:	02490593          	addi	a1,s2,36
800020fa:	60000537          	lui	a0,0x60000
800020fe:	ed6ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1146
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80002102:	4601                	li	a2,0
80002104:	02448593          	addi	a1,s1,36
80002108:	60000537          	lui	a0,0x60000
8000210c:	ec8ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1147
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80002110:	4601                	li	a2,0
80002112:	02440593          	addi	a1,s0,36
80002116:	60000537          	lui	a0,0x60000
8000211a:	ebaff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1149
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
8000211e:	4601                	li	a2,0
80002120:	02c98593          	addi	a1,s3,44
80002124:	60000537          	lui	a0,0x60000
80002128:	eacff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1150
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
8000212c:	4601                	li	a2,0
8000212e:	02c90593          	addi	a1,s2,44
80002132:	60000537          	lui	a0,0x60000
80002136:	e9eff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1151
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
8000213a:	4601                	li	a2,0
8000213c:	02c48593          	addi	a1,s1,44
80002140:	60000537          	lui	a0,0x60000
80002144:	e90ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1152
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80002148:	4601                	li	a2,0
8000214a:	02c40593          	addi	a1,s0,44
8000214e:	60000537          	lui	a0,0x60000
80002152:	e82ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1154
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80002156:	6a09                	lui	s4,0x2
80002158:	219a0613          	addi	a2,s4,537 # 2219 <STACK_SIZE+0x1a19>
8000215c:	04098593          	addi	a1,s3,64
80002160:	60000537          	lui	a0,0x60000
80002164:	e70ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1155
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80002168:	219a0613          	addi	a2,s4,537
8000216c:	04090593          	addi	a1,s2,64
80002170:	60000537          	lui	a0,0x60000
80002174:	e60ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1156
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80002178:	219a0613          	addi	a2,s4,537
8000217c:	04048593          	addi	a1,s1,64
80002180:	60000537          	lui	a0,0x60000
80002184:	e50ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1157
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
80002188:	219a0613          	addi	a2,s4,537
8000218c:	04040593          	addi	a1,s0,64
80002190:	60000537          	lui	a0,0x60000
80002194:	e40ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1159
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
80002198:	07100613          	li	a2,113
8000219c:	07498593          	addi	a1,s3,116
800021a0:	60000537          	lui	a0,0x60000
800021a4:	e30ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1160
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
800021a8:	07100613          	li	a2,113
800021ac:	07490593          	addi	a1,s2,116
800021b0:	60000537          	lui	a0,0x60000
800021b4:	e20ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1161
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
800021b8:	07100613          	li	a2,113
800021bc:	07448593          	addi	a1,s1,116
800021c0:	60000537          	lui	a0,0x60000
800021c4:	e10ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1162
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
800021c8:	07100613          	li	a2,113
800021cc:	07440593          	addi	a1,s0,116
800021d0:	60000537          	lui	a0,0x60000
800021d4:	e00ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1164
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
800021d8:	4601                	li	a2,0
800021da:	0c098593          	addi	a1,s3,192
800021de:	60000537          	lui	a0,0x60000
800021e2:	df2ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1165
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
800021e6:	4601                	li	a2,0
800021e8:	0c090593          	addi	a1,s2,192
800021ec:	60000537          	lui	a0,0x60000
800021f0:	de4ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1166
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
800021f4:	4601                	li	a2,0
800021f6:	0c048593          	addi	a1,s1,192
800021fa:	60000537          	lui	a0,0x60000
800021fe:	dd6ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1167
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80002202:	4601                	li	a2,0
80002204:	0c040593          	addi	a1,s0,192
80002208:	60000537          	lui	a0,0x60000
8000220c:	dc8ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1169
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80002210:	64100a37          	lui	s4,0x64100
80002214:	702a0613          	addi	a2,s4,1794 # 64100702 <STACK_SIZE+0x640fff02>
80002218:	0d098593          	addi	a1,s3,208
8000221c:	60000537          	lui	a0,0x60000
80002220:	db4ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1170
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80002224:	702a0613          	addi	a2,s4,1794
80002228:	0d090593          	addi	a1,s2,208
8000222c:	60000537          	lui	a0,0x60000
80002230:	da4ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1171
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80002234:	702a0613          	addi	a2,s4,1794
80002238:	0d048593          	addi	a1,s1,208
8000223c:	60000537          	lui	a0,0x60000
80002240:	d94ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1172
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80002244:	702a0613          	addi	a2,s4,1794
80002248:	0d040593          	addi	a1,s0,208
8000224c:	60000537          	lui	a0,0x60000
80002250:	d84ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1174
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80002254:	01034a37          	lui	s4,0x1034
80002258:	018a0613          	addi	a2,s4,24 # 1034018 <STACK_SIZE+0x1033818>
8000225c:	0d498593          	addi	a1,s3,212
80002260:	60000537          	lui	a0,0x60000
80002264:	d70ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1175
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80002268:	018a0613          	addi	a2,s4,24
8000226c:	0d490593          	addi	a1,s2,212
80002270:	60000537          	lui	a0,0x60000
80002274:	d60ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1176
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80002278:	018a0613          	addi	a2,s4,24
8000227c:	0d448593          	addi	a1,s1,212
80002280:	60000537          	lui	a0,0x60000
80002284:	d50ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1177
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80002288:	018a0613          	addi	a2,s4,24
8000228c:	0d440593          	addi	a1,s0,212
80002290:	60000537          	lui	a0,0x60000
80002294:	d40ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1179
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
80002298:	00800637          	lui	a2,0x800
8000229c:	0d898593          	addi	a1,s3,216
800022a0:	60000537          	lui	a0,0x60000
800022a4:	d30ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1180
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
800022a8:	00800637          	lui	a2,0x800
800022ac:	0d890593          	addi	a1,s2,216
800022b0:	60000537          	lui	a0,0x60000
800022b4:	d20ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1181
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
800022b8:	00800637          	lui	a2,0x800
800022bc:	0d848593          	addi	a1,s1,216
800022c0:	60000537          	lui	a0,0x60000
800022c4:	d10ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1182
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
800022c8:	00800637          	lui	a2,0x800
800022cc:	0d840593          	addi	a1,s0,216
800022d0:	60000537          	lui	a0,0x60000
800022d4:	d00ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1184
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
800022d8:	4601                	li	a2,0
800022da:	0dc98593          	addi	a1,s3,220
800022de:	60000537          	lui	a0,0x60000
800022e2:	cf2ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1185
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
800022e6:	4601                	li	a2,0
800022e8:	0dc90593          	addi	a1,s2,220
800022ec:	60000537          	lui	a0,0x60000
800022f0:	ce4ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1186
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
800022f4:	4601                	li	a2,0
800022f6:	0dc48593          	addi	a1,s1,220
800022fa:	60000537          	lui	a0,0x60000
800022fe:	cd6ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1187
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80002302:	4601                	li	a2,0
80002304:	0dc40593          	addi	a1,s0,220
80002308:	60000537          	lui	a0,0x60000
8000230c:	cc8ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1189
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_1,0x180008 );//TXPLL_DIV_1//IN PMA cmn
80002310:	00180637          	lui	a2,0x180
80002314:	01090a37          	lui	s4,0x1090
80002318:	0621                	addi	a2,a2,8
8000231a:	010a0593          	addi	a1,s4,16 # 1090010 <STACK_SIZE+0x108f810>
8000231e:	60000537          	lui	a0,0x60000
80002322:	cb2ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1190
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_2,0x2000000 );//TXPLL_DIV_2//IN PMA cmn
80002326:	02000637          	lui	a2,0x2000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1284
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_2,0x1000000 );//TXPLL_DIV_2//IN PMA cmn
8000232a:	014a0593          	addi	a1,s4,20
8000232e:	60000537          	lui	a0,0x60000
80002332:	ca2ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1286

        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80002336:	04c98593          	addi	a1,s3,76
8000233a:	4605                	li	a2,1
8000233c:	60000537          	lui	a0,0x60000
80002340:	c94ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1287
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80002344:	04c90593          	addi	a1,s2,76
80002348:	4605                	li	a2,1
8000234a:	60000537          	lui	a0,0x60000
8000234e:	c86ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1288
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80002352:	04c48593          	addi	a1,s1,76
80002356:	4605                	li	a2,1
80002358:	60000537          	lui	a0,0x60000
8000235c:	c78ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1289
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80002360:	04c40593          	addi	a1,s0,76
80002364:	4605                	li	a2,1
80002366:	60000537          	lui	a0,0x60000
8000236a:	c6aff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1290
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
8000236e:	07898593          	addi	a1,s3,120
80002372:	03000613          	li	a2,48
80002376:	60000537          	lui	a0,0x60000
8000237a:	c5aff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1291
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
8000237e:	07890593          	addi	a1,s2,120
80002382:	03000613          	li	a2,48
80002386:	60000537          	lui	a0,0x60000
8000238a:	c4aff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1292
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
8000238e:	07848593          	addi	a1,s1,120
80002392:	03000613          	li	a2,48
80002396:	60000537          	lui	a0,0x60000
8000239a:	c3aff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1293
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
8000239e:	07840593          	addi	a1,s0,120
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1296
    }

}
800023a2:	4462                	lw	s0,24(sp)
800023a4:	40f2                	lw	ra,28(sp)
800023a6:	44d2                	lw	s1,20(sp)
800023a8:	4942                	lw	s2,16(sp)
800023aa:	49b2                	lw	s3,12(sp)
800023ac:	4a22                	lw	s4,8(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1293
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
800023ae:	03000613          	li	a2,48
800023b2:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1296
}
800023b6:	6105                	addi	sp,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1293
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
800023b8:	c1cff06f          	j	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1204
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800023bc:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1205
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800023c0:	01082937          	lui	s2,0x1082
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1204
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800023c4:	c10ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1205
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800023c8:	03300613          	li	a2,51
800023cc:	04c90593          	addi	a1,s2,76 # 108204c <STACK_SIZE+0x108184c>
800023d0:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1206
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800023d4:	010844b7          	lui	s1,0x1084
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1205
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800023d8:	bfcff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1206
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800023dc:	03300613          	li	a2,51
800023e0:	04c48593          	addi	a1,s1,76 # 108404c <STACK_SIZE+0x108384c>
800023e4:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1207
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800023e8:	01088437          	lui	s0,0x1088
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1206
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800023ec:	be8ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1207
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800023f0:	03300613          	li	a2,51
800023f4:	04c40593          	addi	a1,s0,76 # 108804c <STACK_SIZE+0x108784c>
800023f8:	60000537          	lui	a0,0x60000
800023fc:	bd8ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1208
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80002400:	460d                	li	a2,3
80002402:	07898593          	addi	a1,s3,120
80002406:	60000537          	lui	a0,0x60000
8000240a:	bcaff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1209
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
8000240e:	460d                	li	a2,3
80002410:	07890593          	addi	a1,s2,120
80002414:	60000537          	lui	a0,0x60000
80002418:	bbcff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1210
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
8000241c:	460d                	li	a2,3
8000241e:	07848593          	addi	a1,s1,120
80002422:	60000537          	lui	a0,0x60000
80002426:	baeff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1211
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
8000242a:	460d                	li	a2,3
8000242c:	07840593          	addi	a1,s0,120
80002430:	60000537          	lui	a0,0x60000
80002434:	ba0ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1213
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
80002438:	6a05                	lui	s4,0x1
8000243a:	f15a0613          	addi	a2,s4,-235 # f15 <STACK_SIZE+0x715>
8000243e:	00898593          	addi	a1,s3,8
80002442:	60000537          	lui	a0,0x60000
80002446:	b8eff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1214
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
8000244a:	f15a0613          	addi	a2,s4,-235
8000244e:	00890593          	addi	a1,s2,8
80002452:	60000537          	lui	a0,0x60000
80002456:	b7eff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1215
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
8000245a:	f15a0613          	addi	a2,s4,-235
8000245e:	00848593          	addi	a1,s1,8
80002462:	60000537          	lui	a0,0x60000
80002466:	b6eff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1216
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_2, 0xf15);//DES_CDR_CTRL_2//IN PMA LANE
8000246a:	f15a0613          	addi	a2,s4,-235
8000246e:	00840593          	addi	a1,s0,8
80002472:	60000537          	lui	a0,0x60000
80002476:	b5eff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1218
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
8000247a:	4601                	li	a2,0
8000247c:	00c98593          	addi	a1,s3,12
80002480:	60000537          	lui	a0,0x60000
80002484:	b50ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1219
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80002488:	4601                	li	a2,0
8000248a:	00c90593          	addi	a1,s2,12
8000248e:	60000537          	lui	a0,0x60000
80002492:	b42ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1220
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
80002496:	4601                	li	a2,0
80002498:	00c48593          	addi	a1,s1,12
8000249c:	60000537          	lui	a0,0x60000
800024a0:	b34ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1221
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_CDR_CTRL_3, 0x0);//DES_CDR_CTRL_3//IN PMA LANE
800024a4:	4601                	li	a2,0
800024a6:	00c40593          	addi	a1,s0,12
800024aa:	60000537          	lui	a0,0x60000
800024ae:	b26ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1223
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
800024b2:	4655                	li	a2,21
800024b4:	01098593          	addi	a1,s3,16
800024b8:	60000537          	lui	a0,0x60000
800024bc:	b18ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1224
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
800024c0:	4655                	li	a2,21
800024c2:	01090593          	addi	a1,s2,16
800024c6:	60000537          	lui	a0,0x60000
800024ca:	b0aff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1225
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
800024ce:	4655                	li	a2,21
800024d0:	01048593          	addi	a1,s1,16
800024d4:	60000537          	lui	a0,0x60000
800024d8:	afcff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1226
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_1, 0x15);//DES_DFEEM_CTRL_1//IN PMA LANE
800024dc:	4655                	li	a2,21
800024de:	01040593          	addi	a1,s0,16
800024e2:	60000537          	lui	a0,0x60000
800024e6:	aeeff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1228
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
800024ea:	4601                	li	a2,0
800024ec:	01498593          	addi	a1,s3,20
800024f0:	60000537          	lui	a0,0x60000
800024f4:	ae0ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1229
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
800024f8:	4601                	li	a2,0
800024fa:	01490593          	addi	a1,s2,20
800024fe:	60000537          	lui	a0,0x60000
80002502:	ad2ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1230
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80002506:	4601                	li	a2,0
80002508:	01448593          	addi	a1,s1,20
8000250c:	60000537          	lui	a0,0x60000
80002510:	ac4ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1231
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_2, 0x0);//DES_DFEEM_CTRL_2//IN PMA LANE
80002514:	4601                	li	a2,0
80002516:	01440593          	addi	a1,s0,20
8000251a:	60000537          	lui	a0,0x60000
8000251e:	ab6ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1233
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80002522:	4601                	li	a2,0
80002524:	01898593          	addi	a1,s3,24
80002528:	60000537          	lui	a0,0x60000
8000252c:	aa8ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1234
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
80002530:	4601                	li	a2,0
80002532:	01890593          	addi	a1,s2,24
80002536:	60000537          	lui	a0,0x60000
8000253a:	a9aff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1235
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
8000253e:	4601                	li	a2,0
80002540:	01848593          	addi	a1,s1,24
80002544:	60000537          	lui	a0,0x60000
80002548:	a8cff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1236
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFEEM_CTRL_3, 0x0);//DES_DFEEM_CTRL_3//IN PMA LANE
8000254c:	4601                	li	a2,0
8000254e:	01840593          	addi	a1,s0,24
80002552:	60000537          	lui	a0,0x60000
80002556:	a7eff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1238
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
8000255a:	4601                	li	a2,0
8000255c:	02498593          	addi	a1,s3,36
80002560:	60000537          	lui	a0,0x60000
80002564:	a70ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1239
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80002568:	4601                	li	a2,0
8000256a:	02490593          	addi	a1,s2,36
8000256e:	60000537          	lui	a0,0x60000
80002572:	a62ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1240
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80002576:	4601                	li	a2,0
80002578:	02448593          	addi	a1,s1,36
8000257c:	60000537          	lui	a0,0x60000
80002580:	a54ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1241
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CTRL_2, 0x0);//DES_DFE_CTRL_2//IN PMA LANE
80002584:	4601                	li	a2,0
80002586:	02440593          	addi	a1,s0,36
8000258a:	60000537          	lui	a0,0x60000
8000258e:	a46ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1243
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
80002592:	4601                	li	a2,0
80002594:	02c98593          	addi	a1,s3,44
80002598:	60000537          	lui	a0,0x60000
8000259c:	a38ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1244
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
800025a0:	4601                	li	a2,0
800025a2:	02c90593          	addi	a1,s2,44
800025a6:	60000537          	lui	a0,0x60000
800025aa:	a2aff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1245
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
800025ae:	4601                	li	a2,0
800025b0:	02c48593          	addi	a1,s1,44
800025b4:	60000537          	lui	a0,0x60000
800025b8:	a1cff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1246
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
800025bc:	4601                	li	a2,0
800025be:	02c40593          	addi	a1,s0,44
800025c2:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1248
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
800025c6:	6a09                	lui	s4,0x2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1246
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_EM_CTRL_2, 0x0);//DES_EM_CTRL_2//IN PMA LANE
800025c8:	a0cff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1248
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
800025cc:	219a0613          	addi	a2,s4,537 # 2219 <STACK_SIZE+0x1a19>
800025d0:	04098593          	addi	a1,s3,64
800025d4:	60000537          	lui	a0,0x60000
800025d8:	9fcff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1249
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
800025dc:	219a0613          	addi	a2,s4,537
800025e0:	04090593          	addi	a1,s2,64
800025e4:	60000537          	lui	a0,0x60000
800025e8:	9ecff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1250
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
800025ec:	219a0613          	addi	a2,s4,537
800025f0:	04048593          	addi	a1,s1,64
800025f4:	60000537          	lui	a0,0x60000
800025f8:	9dcff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1251
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RXPLL_DIV, 0x2219);//DES_RXPLL_DIV//IN PMA LANE
800025fc:	219a0613          	addi	a2,s4,537
80002600:	04040593          	addi	a1,s0,64
80002604:	60000537          	lui	a0,0x60000
80002608:	9ccff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1253
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
8000260c:	07100613          	li	a2,113
80002610:	07498593          	addi	a1,s3,116
80002614:	60000537          	lui	a0,0x60000
80002618:	9bcff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1254
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
8000261c:	07100613          	li	a2,113
80002620:	07490593          	addi	a1,s2,116
80002624:	60000537          	lui	a0,0x60000
80002628:	9acff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1255
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
8000262c:	07100613          	li	a2,113
80002630:	07448593          	addi	a1,s1,116
80002634:	60000537          	lui	a0,0x60000
80002638:	99cff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1256
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_CLK_CTRL, 0x71);//SER_CLK_CTRL//IN PMA LANE
8000263c:	07100613          	li	a2,113
80002640:	07440593          	addi	a1,s0,116
80002644:	60000537          	lui	a0,0x60000
80002648:	98cff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1258
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
8000264c:	4601                	li	a2,0
8000264e:	0c098593          	addi	a1,s3,192
80002652:	60000537          	lui	a0,0x60000
80002656:	97eff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1259
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
8000265a:	4601                	li	a2,0
8000265c:	0c090593          	addi	a1,s2,192
80002660:	60000537          	lui	a0,0x60000
80002664:	970ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1260
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80002668:	4601                	li	a2,0
8000266a:	0c048593          	addi	a1,s1,192
8000266e:	60000537          	lui	a0,0x60000
80002672:	962ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1261
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80002676:	4601                	li	a2,0
80002678:	0c040593          	addi	a1,s0,192
8000267c:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1263
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80002680:	64100a37          	lui	s4,0x64100
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1261
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SERDES_RTL_CTRL, 0x0);//SERDES_RTL_CTRL//IN PMA LANE
80002684:	950ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1263
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80002688:	702a0613          	addi	a2,s4,1794 # 64100702 <STACK_SIZE+0x640fff02>
8000268c:	0d098593          	addi	a1,s3,208
80002690:	60000537          	lui	a0,0x60000
80002694:	940ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1264
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
80002698:	702a0613          	addi	a2,s4,1794
8000269c:	0d090593          	addi	a1,s2,208
800026a0:	60000537          	lui	a0,0x60000
800026a4:	930ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1265
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
800026a8:	702a0613          	addi	a2,s4,1794
800026ac:	0d048593          	addi	a1,s1,208
800026b0:	60000537          	lui	a0,0x60000
800026b4:	920ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1266
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_0, 0x64100702);//DES_DFE_CAL_CTRL_0//IN PMA LANE
800026b8:	702a0613          	addi	a2,s4,1794
800026bc:	0d040593          	addi	a1,s0,208
800026c0:	60000537          	lui	a0,0x60000
800026c4:	910ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1268
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
800026c8:	01034a37          	lui	s4,0x1034
800026cc:	018a0613          	addi	a2,s4,24 # 1034018 <STACK_SIZE+0x1033818>
800026d0:	0d498593          	addi	a1,s3,212
800026d4:	60000537          	lui	a0,0x60000
800026d8:	8fcff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1269
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
800026dc:	018a0613          	addi	a2,s4,24
800026e0:	0d490593          	addi	a1,s2,212
800026e4:	60000537          	lui	a0,0x60000
800026e8:	8ecff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1270
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
800026ec:	018a0613          	addi	a2,s4,24
800026f0:	0d448593          	addi	a1,s1,212
800026f4:	60000537          	lui	a0,0x60000
800026f8:	8dcff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1271
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_1, 0x1034018);//DES_DFE_CAL_CTRL_1//IN PMA LANE
800026fc:	018a0613          	addi	a2,s4,24
80002700:	0d440593          	addi	a1,s0,212
80002704:	60000537          	lui	a0,0x60000
80002708:	8ccff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1273
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
8000270c:	00800637          	lui	a2,0x800
80002710:	0d898593          	addi	a1,s3,216
80002714:	60000537          	lui	a0,0x60000
80002718:	8bcff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1274
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
8000271c:	00800637          	lui	a2,0x800
80002720:	0d890593          	addi	a1,s2,216
80002724:	60000537          	lui	a0,0x60000
80002728:	8acff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1275
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
8000272c:	00800637          	lui	a2,0x800
80002730:	0d848593          	addi	a1,s1,216
80002734:	60000537          	lui	a0,0x60000
80002738:	89cff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1276
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CTRL_2, 0x800000);//DES_DFE_CAL_CTRL_1//IN PMA LANE
8000273c:	00800637          	lui	a2,0x800
80002740:	0d840593          	addi	a1,s0,216
80002744:	60000537          	lui	a0,0x60000
80002748:	88cff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1278
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
8000274c:	4601                	li	a2,0
8000274e:	0dc98593          	addi	a1,s3,220
80002752:	60000537          	lui	a0,0x60000
80002756:	87eff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1279
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
8000275a:	4601                	li	a2,0
8000275c:	0dc90593          	addi	a1,s2,220
80002760:	60000537          	lui	a0,0x60000
80002764:	870ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1280
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80002768:	4601                	li	a2,0
8000276a:	0dc48593          	addi	a1,s1,220
8000276e:	60000537          	lui	a0,0x60000
80002772:	862ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1281
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_DFE_CAL_CMD, 0x00);//DES_DFE_CAL_CMD//IN PMA LANE
80002776:	4601                	li	a2,0
80002778:	0dc40593          	addi	a1,s0,220
8000277c:	60000537          	lui	a0,0x60000
80002780:	854ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1283
       write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_TXPLL_DIV_1,0x280016 );//TXPLL_DIV_1//IN PMA cmn
80002784:	00280637          	lui	a2,0x280
80002788:	0659                	addi	a2,a2,22
8000278a:	fa4ff06f          	j	80001f2e <update_speed+0x3ee>

8000278e <vsw_pe>:
vsw_pe():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1299
//voltage swing and pre emphasis
void vsw_pe(uint32_t sw,uint32_t pe)
{
8000278e:	1101                	addi	sp,sp,-32
80002790:	cc22                	sw	s0,24(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1300
    write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
80002792:	01081437          	lui	s0,0x1081
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1299
{
80002796:	ca26                	sw	s1,20(sp)
80002798:	c84a                	sw	s2,16(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1300
    write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
8000279a:	03300613          	li	a2,51
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1299
{
8000279e:	892a                	mv	s2,a0
800027a0:	84ae                	mv	s1,a1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1300
    write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800027a2:	60000537          	lui	a0,0x60000
800027a6:	04c40593          	addi	a1,s0,76 # 108104c <STACK_SIZE+0x108084c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1299
{
800027aa:	ce06                	sw	ra,28(sp)
800027ac:	c64e                	sw	s3,12(sp)
800027ae:	c452                	sw	s4,8(sp)
800027b0:	c256                	sw	s5,4(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1300
    write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800027b2:	822ff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1301
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800027b6:	01082ab7          	lui	s5,0x1082
800027ba:	03300613          	li	a2,51
800027be:	04ca8593          	addi	a1,s5,76 # 108204c <STACK_SIZE+0x108184c>
800027c2:	60000537          	lui	a0,0x60000
800027c6:	80eff0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1302
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800027ca:	01084a37          	lui	s4,0x1084
800027ce:	03300613          	li	a2,51
800027d2:	04ca0593          	addi	a1,s4,76 # 108404c <STACK_SIZE+0x108384c>
800027d6:	60000537          	lui	a0,0x60000
800027da:	ffbfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1303
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x33);//DES_RSTPD//  IN PMA LANE
800027de:	010889b7          	lui	s3,0x1088
800027e2:	03300613          	li	a2,51
800027e6:	04c98593          	addi	a1,s3,76 # 108804c <STACK_SIZE+0x108784c>
800027ea:	60000537          	lui	a0,0x60000
800027ee:	fe7fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1304
           write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
800027f2:	460d                	li	a2,3
800027f4:	07840593          	addi	a1,s0,120
800027f8:	60000537          	lui	a0,0x60000
800027fc:	fd9fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1305
           write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
80002800:	460d                	li	a2,3
80002802:	078a8593          	addi	a1,s5,120
80002806:	60000537          	lui	a0,0x60000
8000280a:	fcbfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1306
           write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
8000280e:	460d                	li	a2,3
80002810:	078a0593          	addi	a1,s4,120
80002814:	60000537          	lui	a0,0x60000
80002818:	fbdfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1307
           write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x3);//SER_RSTPD// IN PMA LANE
8000281c:	460d                	li	a2,3
8000281e:	07898593          	addi	a1,s3,120
80002822:	60000537          	lui	a0,0x60000
80002826:	faffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1308
    if (sw == 0x00 && pe == 0x00)
8000282a:	1e091a63          	bnez	s2,80002a1e <vsw_pe+0x290>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1308 (discriminator 1)
8000282e:	e8c5                	bnez	s1,800028de <vsw_pe+0x150>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1310
    {
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80002830:	4601                	li	a2,0
80002832:	09840593          	addi	a1,s0,152
80002836:	60000537          	lui	a0,0x60000
8000283a:	f9bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1311
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x25);
8000283e:	02500613          	li	a2,37
80002842:	0a040593          	addi	a1,s0,160
80002846:	60000537          	lui	a0,0x60000
8000284a:	f8bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1312
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
8000284e:	11000637          	lui	a2,0x11000
80002852:	09c40593          	addi	a1,s0,156
80002856:	60000537          	lui	a0,0x60000
8000285a:	f7bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1313
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
8000285e:	4601                	li	a2,0
80002860:	09840593          	addi	a1,s0,152
80002864:	60000537          	lui	a0,0x60000
80002868:	f6dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1314
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x25);
8000286c:	02500613          	li	a2,37
80002870:	0a040593          	addi	a1,s0,160
80002874:	60000537          	lui	a0,0x60000
80002878:	f5dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1315
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
8000287c:	11000637          	lui	a2,0x11000
80002880:	09c40593          	addi	a1,s0,156
80002884:	60000537          	lui	a0,0x60000
80002888:	f4dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1316
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
8000288c:	4601                	li	a2,0
8000288e:	09840593          	addi	a1,s0,152
80002892:	60000537          	lui	a0,0x60000
80002896:	f3ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1317
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x25);
8000289a:	02500613          	li	a2,37
8000289e:	0a040593          	addi	a1,s0,160
800028a2:	60000537          	lui	a0,0x60000
800028a6:	f2ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1318
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
800028aa:	11000637          	lui	a2,0x11000
800028ae:	09c40593          	addi	a1,s0,156
800028b2:	60000537          	lui	a0,0x60000
800028b6:	f1ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1319
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
800028ba:	4601                	li	a2,0
800028bc:	09840593          	addi	a1,s0,152
800028c0:	60000537          	lui	a0,0x60000
800028c4:	f11fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1320
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x25);
800028c8:	02500613          	li	a2,37
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1485
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x41);
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x41);
800028cc:	0a040593          	addi	a1,s0,160
800028d0:	60000537          	lui	a0,0x60000
800028d4:	f01fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1486
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
800028d8:	11000637          	lui	a2,0x11000
800028dc:	a6cd                	j	80002cbe <vsw_pe+0x530>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1323 (discriminator 1)
    else if(sw == 0x00 && pe == 0x01)
800028de:	4785                	li	a5,1
800028e0:	08f49d63          	bne	s1,a5,8000297a <vsw_pe+0x1ec>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1325
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
800028e4:	4601                	li	a2,0
800028e6:	09840593          	addi	a1,s0,152
800028ea:	60000537          	lui	a0,0x60000
800028ee:	ee7fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1326
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0xd);
800028f2:	4635                	li	a2,13
800028f4:	0a040593          	addi	a1,s0,160
800028f8:	60000537          	lui	a0,0x60000
800028fc:	ed9fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1327
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80002900:	11000637          	lui	a2,0x11000
80002904:	09c40593          	addi	a1,s0,156
80002908:	60000537          	lui	a0,0x60000
8000290c:	ec9fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1328
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80002910:	4601                	li	a2,0
80002912:	09840593          	addi	a1,s0,152
80002916:	60000537          	lui	a0,0x60000
8000291a:	ebbfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1329
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0xd);
8000291e:	4635                	li	a2,13
80002920:	0a040593          	addi	a1,s0,160
80002924:	60000537          	lui	a0,0x60000
80002928:	eadfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1330
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
8000292c:	11000637          	lui	a2,0x11000
80002930:	09c40593          	addi	a1,s0,156
80002934:	60000537          	lui	a0,0x60000
80002938:	e9dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1331
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
8000293c:	4601                	li	a2,0
8000293e:	09840593          	addi	a1,s0,152
80002942:	60000537          	lui	a0,0x60000
80002946:	e8ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1332
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0xd);
8000294a:	4635                	li	a2,13
8000294c:	0a040593          	addi	a1,s0,160
80002950:	60000537          	lui	a0,0x60000
80002954:	e81fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1333
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80002958:	11000637          	lui	a2,0x11000
8000295c:	09c40593          	addi	a1,s0,156
80002960:	60000537          	lui	a0,0x60000
80002964:	e71fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1334
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80002968:	4601                	li	a2,0
8000296a:	09840593          	addi	a1,s0,152
8000296e:	60000537          	lui	a0,0x60000
80002972:	e63fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1335
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0xd);
80002976:	4635                	li	a2,13
80002978:	bf91                	j	800028cc <vsw_pe+0x13e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1338 (discriminator 1)
    else if (sw == 0x00 && pe == 0x02)
8000297a:	4789                	li	a5,2
8000297c:	66f49d63          	bne	s1,a5,80002ff6 <vsw_pe+0x868>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1340
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80002980:	4601                	li	a2,0
80002982:	09840593          	addi	a1,s0,152
80002986:	60000537          	lui	a0,0x60000
8000298a:	e4bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1341
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x4d);
8000298e:	04d00613          	li	a2,77
80002992:	0a040593          	addi	a1,s0,160
80002996:	60000537          	lui	a0,0x60000
8000299a:	e3bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1342
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
8000299e:	11000637          	lui	a2,0x11000
800029a2:	09c40593          	addi	a1,s0,156
800029a6:	60000537          	lui	a0,0x60000
800029aa:	e2bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1343
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
800029ae:	4601                	li	a2,0
800029b0:	09840593          	addi	a1,s0,152
800029b4:	60000537          	lui	a0,0x60000
800029b8:	e1dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1344
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x4d);
800029bc:	04d00613          	li	a2,77
800029c0:	0a040593          	addi	a1,s0,160
800029c4:	60000537          	lui	a0,0x60000
800029c8:	e0dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1345
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
800029cc:	11000637          	lui	a2,0x11000
800029d0:	09c40593          	addi	a1,s0,156
800029d4:	60000537          	lui	a0,0x60000
800029d8:	dfdfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1346
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
800029dc:	4601                	li	a2,0
800029de:	09840593          	addi	a1,s0,152
800029e2:	60000537          	lui	a0,0x60000
800029e6:	deffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1347
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x4d);
800029ea:	04d00613          	li	a2,77
800029ee:	0a040593          	addi	a1,s0,160
800029f2:	60000537          	lui	a0,0x60000
800029f6:	ddffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1348
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
800029fa:	11000637          	lui	a2,0x11000
800029fe:	09c40593          	addi	a1,s0,156
80002a02:	60000537          	lui	a0,0x60000
80002a06:	dcffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1349
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80002a0a:	4601                	li	a2,0
80002a0c:	09840593          	addi	a1,s0,152
80002a10:	60000537          	lui	a0,0x60000
80002a14:	dc1fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1350
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x4d);
80002a18:	04d00613          	li	a2,77
80002a1c:	bd45                	j	800028cc <vsw_pe+0x13e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1353
    else if (sw == 0x01 && pe == 0x00 )
80002a1e:	4785                	li	a5,1
80002a20:	1ef91163          	bne	s2,a5,80002c02 <vsw_pe+0x474>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1353 (discriminator 1)
80002a24:	e0c5                	bnez	s1,80002ac4 <vsw_pe+0x336>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1355
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80002a26:	4601                	li	a2,0
80002a28:	09840593          	addi	a1,s0,152
80002a2c:	60000537          	lui	a0,0x60000
80002a30:	da5fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1356
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x21);
80002a34:	02100613          	li	a2,33
80002a38:	0a040593          	addi	a1,s0,160
80002a3c:	60000537          	lui	a0,0x60000
80002a40:	d95fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1357
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80002a44:	11000637          	lui	a2,0x11000
80002a48:	09c40593          	addi	a1,s0,156
80002a4c:	60000537          	lui	a0,0x60000
80002a50:	d85fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1358
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80002a54:	4601                	li	a2,0
80002a56:	09840593          	addi	a1,s0,152
80002a5a:	60000537          	lui	a0,0x60000
80002a5e:	d77fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1359
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x21);
80002a62:	02100613          	li	a2,33
80002a66:	0a040593          	addi	a1,s0,160
80002a6a:	60000537          	lui	a0,0x60000
80002a6e:	d67fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1360
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80002a72:	11000637          	lui	a2,0x11000
80002a76:	09c40593          	addi	a1,s0,156
80002a7a:	60000537          	lui	a0,0x60000
80002a7e:	d57fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1361
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80002a82:	4601                	li	a2,0
80002a84:	09840593          	addi	a1,s0,152
80002a88:	60000537          	lui	a0,0x60000
80002a8c:	d49fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1362
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x21);
80002a90:	02100613          	li	a2,33
80002a94:	0a040593          	addi	a1,s0,160
80002a98:	60000537          	lui	a0,0x60000
80002a9c:	d39fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1363
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80002aa0:	11000637          	lui	a2,0x11000
80002aa4:	09c40593          	addi	a1,s0,156
80002aa8:	60000537          	lui	a0,0x60000
80002aac:	d29fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1364
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80002ab0:	4601                	li	a2,0
80002ab2:	09840593          	addi	a1,s0,152
80002ab6:	60000537          	lui	a0,0x60000
80002aba:	d1bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1365
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x21);
80002abe:	02100613          	li	a2,33
80002ac2:	b529                	j	800028cc <vsw_pe+0x13e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1368 (discriminator 1)
    else if (sw == 0x01 && pe == 0x01 )
80002ac4:	09249d63          	bne	s1,s2,80002b5e <vsw_pe+0x3d0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1370
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80002ac8:	4601                	li	a2,0
80002aca:	09840593          	addi	a1,s0,152
80002ace:	60000537          	lui	a0,0x60000
80002ad2:	d03fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1371
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x9);
80002ad6:	4625                	li	a2,9
80002ad8:	0a040593          	addi	a1,s0,160
80002adc:	60000537          	lui	a0,0x60000
80002ae0:	cf5fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1372
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80002ae4:	11000637          	lui	a2,0x11000
80002ae8:	09c40593          	addi	a1,s0,156
80002aec:	60000537          	lui	a0,0x60000
80002af0:	ce5fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1373
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80002af4:	4601                	li	a2,0
80002af6:	09840593          	addi	a1,s0,152
80002afa:	60000537          	lui	a0,0x60000
80002afe:	cd7fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1374
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x9);
80002b02:	4625                	li	a2,9
80002b04:	0a040593          	addi	a1,s0,160
80002b08:	60000537          	lui	a0,0x60000
80002b0c:	cc9fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1375
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80002b10:	11000637          	lui	a2,0x11000
80002b14:	09c40593          	addi	a1,s0,156
80002b18:	60000537          	lui	a0,0x60000
80002b1c:	cb9fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1376
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80002b20:	4601                	li	a2,0
80002b22:	09840593          	addi	a1,s0,152
80002b26:	60000537          	lui	a0,0x60000
80002b2a:	cabfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1377
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x9);
80002b2e:	4625                	li	a2,9
80002b30:	0a040593          	addi	a1,s0,160
80002b34:	60000537          	lui	a0,0x60000
80002b38:	c9dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1378
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80002b3c:	11000637          	lui	a2,0x11000
80002b40:	09c40593          	addi	a1,s0,156
80002b44:	60000537          	lui	a0,0x60000
80002b48:	c8dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1379
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80002b4c:	4601                	li	a2,0
80002b4e:	09840593          	addi	a1,s0,152
80002b52:	60000537          	lui	a0,0x60000
80002b56:	c7ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1380
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x9);
80002b5a:	4625                	li	a2,9
80002b5c:	bb85                	j	800028cc <vsw_pe+0x13e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1383 (discriminator 1)
    else if (sw == 0x01 && pe == 0x02 )
80002b5e:	4789                	li	a5,2
80002b60:	48f49b63          	bne	s1,a5,80002ff6 <vsw_pe+0x868>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1385
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80002b64:	4601                	li	a2,0
80002b66:	09840593          	addi	a1,s0,152
80002b6a:	60000537          	lui	a0,0x60000
80002b6e:	c67fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1386
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x49);
80002b72:	04900613          	li	a2,73
80002b76:	0a040593          	addi	a1,s0,160
80002b7a:	60000537          	lui	a0,0x60000
80002b7e:	c57fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1387
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80002b82:	11000637          	lui	a2,0x11000
80002b86:	09c40593          	addi	a1,s0,156
80002b8a:	60000537          	lui	a0,0x60000
80002b8e:	c47fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1388
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80002b92:	4601                	li	a2,0
80002b94:	09840593          	addi	a1,s0,152
80002b98:	60000537          	lui	a0,0x60000
80002b9c:	c39fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1389
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x49);
80002ba0:	04900613          	li	a2,73
80002ba4:	0a040593          	addi	a1,s0,160
80002ba8:	60000537          	lui	a0,0x60000
80002bac:	c29fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1390
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80002bb0:	11000637          	lui	a2,0x11000
80002bb4:	09c40593          	addi	a1,s0,156
80002bb8:	60000537          	lui	a0,0x60000
80002bbc:	c19fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1391
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80002bc0:	4601                	li	a2,0
80002bc2:	09840593          	addi	a1,s0,152
80002bc6:	60000537          	lui	a0,0x60000
80002bca:	c0bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1392
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x49);
80002bce:	04900613          	li	a2,73
80002bd2:	0a040593          	addi	a1,s0,160
80002bd6:	60000537          	lui	a0,0x60000
80002bda:	bfbfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1393
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80002bde:	11000637          	lui	a2,0x11000
80002be2:	09c40593          	addi	a1,s0,156
80002be6:	60000537          	lui	a0,0x60000
80002bea:	bebfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1394
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80002bee:	4601                	li	a2,0
80002bf0:	09840593          	addi	a1,s0,152
80002bf4:	60000537          	lui	a0,0x60000
80002bf8:	bddfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1395
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x49);
80002bfc:	04900613          	li	a2,73
80002c00:	b1f1                	j	800028cc <vsw_pe+0x13e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1398
    else if (sw == 0x02 && pe == 0x00 )
80002c02:	4709                	li	a4,2
80002c04:	28e91d63          	bne	s2,a4,80002e9e <vsw_pe+0x710>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1398 (discriminator 1)
80002c08:	14049d63          	bnez	s1,80002d62 <vsw_pe+0x5d4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1400
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0xAAAA);
80002c0c:	692d                	lui	s2,0xb
80002c0e:	aaa90613          	addi	a2,s2,-1366 # aaaa <STACK_SIZE+0xa2aa>
80002c12:	09840593          	addi	a1,s0,152
80002c16:	60000537          	lui	a0,0x60000
80002c1a:	bbbfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1401
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x0);
80002c1e:	4601                	li	a2,0
80002c20:	0a040593          	addi	a1,s0,160
80002c24:	60000537          	lui	a0,0x60000
80002c28:	badfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1402
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x36FFFFEC);
80002c2c:	370004b7          	lui	s1,0x37000
80002c30:	fec48613          	addi	a2,s1,-20 # 36ffffec <STACK_SIZE+0x36fff7ec>
80002c34:	09c40593          	addi	a1,s0,156
80002c38:	60000537          	lui	a0,0x60000
80002c3c:	b99fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1403
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0xAAAA);
80002c40:	aaa90613          	addi	a2,s2,-1366
80002c44:	09840593          	addi	a1,s0,152
80002c48:	60000537          	lui	a0,0x60000
80002c4c:	b89fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1404
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x0);
80002c50:	4601                	li	a2,0
80002c52:	0a040593          	addi	a1,s0,160
80002c56:	60000537          	lui	a0,0x60000
80002c5a:	b7bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1405
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x36FFFFEC);
80002c5e:	fec48613          	addi	a2,s1,-20
80002c62:	09c40593          	addi	a1,s0,156
80002c66:	60000537          	lui	a0,0x60000
80002c6a:	b6bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1406
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0xAAAA);
80002c6e:	aaa90613          	addi	a2,s2,-1366
80002c72:	09840593          	addi	a1,s0,152
80002c76:	60000537          	lui	a0,0x60000
80002c7a:	b5bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1407
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x0);
80002c7e:	4601                	li	a2,0
80002c80:	0a040593          	addi	a1,s0,160
80002c84:	60000537          	lui	a0,0x60000
80002c88:	b4dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1408
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x36FFFFEC);
80002c8c:	fec48613          	addi	a2,s1,-20
80002c90:	09c40593          	addi	a1,s0,156
80002c94:	60000537          	lui	a0,0x60000
80002c98:	b3dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1409
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0xAAAA);
80002c9c:	aaa90613          	addi	a2,s2,-1366
80002ca0:	09840593          	addi	a1,s0,152
80002ca4:	60000537          	lui	a0,0x60000
80002ca8:	b2dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1410
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x0);
80002cac:	4601                	li	a2,0
80002cae:	0a040593          	addi	a1,s0,160
80002cb2:	60000537          	lui	a0,0x60000
80002cb6:	b1ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1411
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x36FFFFEC);
80002cba:	fec48613          	addi	a2,s1,-20
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1486
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);
80002cbe:	09c40593          	addi	a1,s0,156
80002cc2:	60000537          	lui	a0,0x60000
80002cc6:	b0ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1505
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x41);
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x11000000);

        }

            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80002cca:	010819b7          	lui	s3,0x1081
80002cce:	04c98593          	addi	a1,s3,76 # 108104c <STACK_SIZE+0x108084c>
80002cd2:	4605                	li	a2,1
80002cd4:	60000537          	lui	a0,0x60000
80002cd8:	afdfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1506
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80002cdc:	01082937          	lui	s2,0x1082
80002ce0:	04c90593          	addi	a1,s2,76 # 108204c <STACK_SIZE+0x108184c>
80002ce4:	4605                	li	a2,1
80002ce6:	60000537          	lui	a0,0x60000
80002cea:	aebfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1507
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80002cee:	010844b7          	lui	s1,0x1084
80002cf2:	04c48593          	addi	a1,s1,76 # 108404c <STACK_SIZE+0x108384c>
80002cf6:	4605                	li	a2,1
80002cf8:	60000537          	lui	a0,0x60000
80002cfc:	ad9fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1508
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_DES_RSTPD, 0x1);//DES_RSTPD//  IN PMA LANE
80002d00:	01088437          	lui	s0,0x1088
80002d04:	04c40593          	addi	a1,s0,76 # 108804c <STACK_SIZE+0x108784c>
80002d08:	4605                	li	a2,1
80002d0a:	60000537          	lui	a0,0x60000
80002d0e:	ac7fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1509
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80002d12:	07898593          	addi	a1,s3,120
80002d16:	03000613          	li	a2,48
80002d1a:	60000537          	lui	a0,0x60000
80002d1e:	ab7fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1510
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80002d22:	07890593          	addi	a1,s2,120
80002d26:	03000613          	li	a2,48
80002d2a:	60000537          	lui	a0,0x60000
80002d2e:	aa7fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1511
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80002d32:	07848593          	addi	a1,s1,120
80002d36:	03000613          	li	a2,48
80002d3a:	60000537          	lui	a0,0x60000
80002d3e:	a97fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1512
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80002d42:	07840593          	addi	a1,s0,120
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1514

}
80002d46:	4462                	lw	s0,24(sp)
80002d48:	40f2                	lw	ra,28(sp)
80002d4a:	44d2                	lw	s1,20(sp)
80002d4c:	4942                	lw	s2,16(sp)
80002d4e:	49b2                	lw	s3,12(sp)
80002d50:	4a22                	lw	s4,8(sp)
80002d52:	4a92                	lw	s5,4(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1512
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80002d54:	03000613          	li	a2,48
80002d58:	60000537          	lui	a0,0x60000
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1514
}
80002d5c:	6105                	addi	sp,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1512
            write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_RSTPD, 0x30);//SER_RSTPD// IN PMA LANE
80002d5e:	a77fe06f          	j	800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1413 (discriminator 1)
    else if (sw == 0x02 && pe == 0x01 )
80002d62:	08f49d63          	bne	s1,a5,80002dfc <vsw_pe+0x66e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1415
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80002d66:	4601                	li	a2,0
80002d68:	09840593          	addi	a1,s0,152
80002d6c:	60000537          	lui	a0,0x60000
80002d70:	a65fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1416
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x5);
80002d74:	4615                	li	a2,5
80002d76:	0a040593          	addi	a1,s0,160
80002d7a:	60000537          	lui	a0,0x60000
80002d7e:	a57fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1417
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80002d82:	11000637          	lui	a2,0x11000
80002d86:	09c40593          	addi	a1,s0,156
80002d8a:	60000537          	lui	a0,0x60000
80002d8e:	a47fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1418
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80002d92:	4601                	li	a2,0
80002d94:	09840593          	addi	a1,s0,152
80002d98:	60000537          	lui	a0,0x60000
80002d9c:	a39fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1419
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x5);
80002da0:	4615                	li	a2,5
80002da2:	0a040593          	addi	a1,s0,160
80002da6:	60000537          	lui	a0,0x60000
80002daa:	a2bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1420
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80002dae:	11000637          	lui	a2,0x11000
80002db2:	09c40593          	addi	a1,s0,156
80002db6:	60000537          	lui	a0,0x60000
80002dba:	a1bfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1421
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80002dbe:	4601                	li	a2,0
80002dc0:	09840593          	addi	a1,s0,152
80002dc4:	60000537          	lui	a0,0x60000
80002dc8:	a0dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1422
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x5);
80002dcc:	4615                	li	a2,5
80002dce:	0a040593          	addi	a1,s0,160
80002dd2:	60000537          	lui	a0,0x60000
80002dd6:	9fffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1423
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80002dda:	11000637          	lui	a2,0x11000
80002dde:	09c40593          	addi	a1,s0,156
80002de2:	60000537          	lui	a0,0x60000
80002de6:	9effe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1424
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80002dea:	4601                	li	a2,0
80002dec:	09840593          	addi	a1,s0,152
80002df0:	60000537          	lui	a0,0x60000
80002df4:	9e1fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1425
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x5);
80002df8:	4615                	li	a2,5
80002dfa:	bcc9                	j	800028cc <vsw_pe+0x13e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1428 (discriminator 1)
    else if (sw == 0x02 && pe == 0x02 )
80002dfc:	1f249d63          	bne	s1,s2,80002ff6 <vsw_pe+0x868>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1430
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80002e00:	4601                	li	a2,0
80002e02:	09840593          	addi	a1,s0,152
80002e06:	60000537          	lui	a0,0x60000
80002e0a:	9cbfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1431
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x45);
80002e0e:	04500613          	li	a2,69
80002e12:	0a040593          	addi	a1,s0,160
80002e16:	60000537          	lui	a0,0x60000
80002e1a:	9bbfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1432
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80002e1e:	11000637          	lui	a2,0x11000
80002e22:	09c40593          	addi	a1,s0,156
80002e26:	60000537          	lui	a0,0x60000
80002e2a:	9abfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1433
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80002e2e:	4601                	li	a2,0
80002e30:	09840593          	addi	a1,s0,152
80002e34:	60000537          	lui	a0,0x60000
80002e38:	99dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1434
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x45);
80002e3c:	04500613          	li	a2,69
80002e40:	0a040593          	addi	a1,s0,160
80002e44:	60000537          	lui	a0,0x60000
80002e48:	98dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1435
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80002e4c:	11000637          	lui	a2,0x11000
80002e50:	09c40593          	addi	a1,s0,156
80002e54:	60000537          	lui	a0,0x60000
80002e58:	97dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1436
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80002e5c:	4601                	li	a2,0
80002e5e:	09840593          	addi	a1,s0,152
80002e62:	60000537          	lui	a0,0x60000
80002e66:	96ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1437
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x45);
80002e6a:	04500613          	li	a2,69
80002e6e:	0a040593          	addi	a1,s0,160
80002e72:	60000537          	lui	a0,0x60000
80002e76:	95ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1438
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80002e7a:	11000637          	lui	a2,0x11000
80002e7e:	09c40593          	addi	a1,s0,156
80002e82:	60000537          	lui	a0,0x60000
80002e86:	94ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1439
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80002e8a:	4601                	li	a2,0
80002e8c:	09840593          	addi	a1,s0,152
80002e90:	60000537          	lui	a0,0x60000
80002e94:	941fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1440
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x45);
80002e98:	04500613          	li	a2,69
80002e9c:	bc05                	j	800028cc <vsw_pe+0x13e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1443
    else if (sw == 0x03 && pe == 0x00 )
80002e9e:	470d                	li	a4,3
80002ea0:	14e91b63          	bne	s2,a4,80002ff6 <vsw_pe+0x868>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1443 (discriminator 1)
80002ea4:	e8dd                	bnez	s1,80002f5a <vsw_pe+0x7cc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1445
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0xAAAA);
80002ea6:	692d                	lui	s2,0xb
80002ea8:	aaa90613          	addi	a2,s2,-1366 # aaaa <STACK_SIZE+0xa2aa>
80002eac:	09840593          	addi	a1,s0,152
80002eb0:	60000537          	lui	a0,0x60000
80002eb4:	921fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1446
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x0);
80002eb8:	4601                	li	a2,0
80002eba:	0a040593          	addi	a1,s0,160
80002ebe:	60000537          	lui	a0,0x60000
80002ec2:	913fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1447
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x56FFFFED);
80002ec6:	570004b7          	lui	s1,0x57000
80002eca:	fed48613          	addi	a2,s1,-19 # 56ffffed <STACK_SIZE+0x56fff7ed>
80002ece:	09c40593          	addi	a1,s0,156
80002ed2:	60000537          	lui	a0,0x60000
80002ed6:	8fffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1448
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0xAAAA);
80002eda:	aaa90613          	addi	a2,s2,-1366
80002ede:	09840593          	addi	a1,s0,152
80002ee2:	60000537          	lui	a0,0x60000
80002ee6:	8effe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1449
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x0);
80002eea:	4601                	li	a2,0
80002eec:	0a040593          	addi	a1,s0,160
80002ef0:	60000537          	lui	a0,0x60000
80002ef4:	8e1fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1450
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x56FFFFED);
80002ef8:	fed48613          	addi	a2,s1,-19
80002efc:	09c40593          	addi	a1,s0,156
80002f00:	60000537          	lui	a0,0x60000
80002f04:	8d1fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1451
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0xAAAA);
80002f08:	aaa90613          	addi	a2,s2,-1366
80002f0c:	09840593          	addi	a1,s0,152
80002f10:	60000537          	lui	a0,0x60000
80002f14:	8c1fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1452
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x0);
80002f18:	4601                	li	a2,0
80002f1a:	0a040593          	addi	a1,s0,160
80002f1e:	60000537          	lui	a0,0x60000
80002f22:	8b3fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1453
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x56FFFFED);
80002f26:	fed48613          	addi	a2,s1,-19
80002f2a:	09c40593          	addi	a1,s0,156
80002f2e:	60000537          	lui	a0,0x60000
80002f32:	8a3fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1454
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0xAAAA);
80002f36:	aaa90613          	addi	a2,s2,-1366
80002f3a:	09840593          	addi	a1,s0,152
80002f3e:	60000537          	lui	a0,0x60000
80002f42:	893fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1455
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x0);
80002f46:	4601                	li	a2,0
80002f48:	0a040593          	addi	a1,s0,160
80002f4c:	60000537          	lui	a0,0x60000
80002f50:	885fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1456
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL, 0x56FFFFED);
80002f54:	fed48613          	addi	a2,s1,-19
80002f58:	b39d                	j	80002cbe <vsw_pe+0x530>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1458 (discriminator 1)
    else if (sw == 0x03 && pe == 0x01 )
80002f5a:	08f49e63          	bne	s1,a5,80002ff6 <vsw_pe+0x868>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1460
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80002f5e:	4601                	li	a2,0
80002f60:	09840593          	addi	a1,s0,152
80002f64:	60000537          	lui	a0,0x60000
80002f68:	86dfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1461
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x1);
80002f6c:	4605                	li	a2,1
80002f6e:	0a040593          	addi	a1,s0,160
80002f72:	60000537          	lui	a0,0x60000
80002f76:	85ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1462
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80002f7a:	11000637          	lui	a2,0x11000
80002f7e:	09c40593          	addi	a1,s0,156
80002f82:	60000537          	lui	a0,0x60000
80002f86:	84ffe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1463
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80002f8a:	4601                	li	a2,0
80002f8c:	09840593          	addi	a1,s0,152
80002f90:	60000537          	lui	a0,0x60000
80002f94:	841fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1464
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x1);
80002f98:	4605                	li	a2,1
80002f9a:	0a040593          	addi	a1,s0,160
80002f9e:	60000537          	lui	a0,0x60000
80002fa2:	833fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1465
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80002fa6:	11000637          	lui	a2,0x11000
80002faa:	09c40593          	addi	a1,s0,156
80002fae:	60000537          	lui	a0,0x60000
80002fb2:	823fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1466
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80002fb6:	4601                	li	a2,0
80002fb8:	09840593          	addi	a1,s0,152
80002fbc:	60000537          	lui	a0,0x60000
80002fc0:	815fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1467
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x1);
80002fc4:	4605                	li	a2,1
80002fc6:	0a040593          	addi	a1,s0,160
80002fca:	60000537          	lui	a0,0x60000
80002fce:	807fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1468
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80002fd2:	11000637          	lui	a2,0x11000
80002fd6:	09c40593          	addi	a1,s0,156
80002fda:	60000537          	lui	a0,0x60000
80002fde:	ff6fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1469
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80002fe2:	4601                	li	a2,0
80002fe4:	09840593          	addi	a1,s0,152
80002fe8:	60000537          	lui	a0,0x60000
80002fec:	fe8fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1470
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x1);
80002ff0:	4605                	li	a2,1
80002ff2:	8dbff06f          	j	800028cc <vsw_pe+0x13e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1475
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_DATA_CTRL, 0x0);
80002ff6:	01081437          	lui	s0,0x1081
80002ffa:	4601                	li	a2,0
80002ffc:	09840593          	addi	a1,s0,152 # 1081098 <STACK_SIZE+0x1080898>
80003000:	60000537          	lui	a0,0x60000
80003004:	fd0fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1476
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL_SEL, 0x41);
80003008:	04100613          	li	a2,65
8000300c:	0a040593          	addi	a1,s0,160
80003010:	60000537          	lui	a0,0x60000
80003014:	fc0fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1477
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L0_SER_DRV_CTRL, 0x11000000);
80003018:	11000637          	lui	a2,0x11000
8000301c:	09c40593          	addi	a1,s0,156
80003020:	60000537          	lui	a0,0x60000
80003024:	fb0fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1478
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_DATA_CTRL, 0x0);
80003028:	4601                	li	a2,0
8000302a:	09840593          	addi	a1,s0,152
8000302e:	60000537          	lui	a0,0x60000
80003032:	fa2fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1479
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL_SEL, 0x41);
80003036:	04100613          	li	a2,65
8000303a:	0a040593          	addi	a1,s0,160
8000303e:	60000537          	lui	a0,0x60000
80003042:	f92fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1480
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L1_SER_DRV_CTRL, 0x11000000);
80003046:	11000637          	lui	a2,0x11000
8000304a:	09c40593          	addi	a1,s0,156
8000304e:	60000537          	lui	a0,0x60000
80003052:	f82fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1481
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_DATA_CTRL, 0x0);
80003056:	4601                	li	a2,0
80003058:	09840593          	addi	a1,s0,152
8000305c:	60000537          	lui	a0,0x60000
80003060:	f74fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1482
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL_SEL, 0x41);
80003064:	04100613          	li	a2,65
80003068:	0a040593          	addi	a1,s0,160
8000306c:	60000537          	lui	a0,0x60000
80003070:	f64fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1483
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L2_SER_DRV_CTRL, 0x11000000);
80003074:	11000637          	lui	a2,0x11000
80003078:	09c40593          	addi	a1,s0,156
8000307c:	60000537          	lui	a0,0x60000
80003080:	f54fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1484
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_DATA_CTRL, 0x0);
80003084:	4601                	li	a2,0
80003086:	09840593          	addi	a1,s0,152
8000308a:	60000537          	lui	a0,0x60000
8000308e:	f46fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:1485
        write_dp(DP_DRI_APB_BASE_ADDRESS,SER_1_PMA_L3_SER_DRV_CTRL_SEL, 0x41);
80003092:	04100613          	li	a2,65
80003096:	837ff06f          	j	800028cc <vsw_pe+0x13e>

8000309a <link_training>:
link_training():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:333
{
8000309a:	7119                	addi	sp,sp,-128
8000309c:	daa6                	sw	s1,116(sp)
8000309e:	ce2e                	sw	a1,28(sp)
800030a0:	d032                	sw	a2,32(sp)
800030a2:	84aa                	mv	s1,a0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:339
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_RX_REPLY_LENGTH_OFFSET, &reply_bytes);
800030a4:	1830                	addi	a2,sp,56
800030a6:	12c00593          	li	a1,300
800030aa:	71001537          	lui	a0,0x71001
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:333
{
800030ae:	dca2                	sw	s0,120(sp)
800030b0:	d8ca                	sw	s2,112(sp)
800030b2:	d6ce                	sw	s3,108(sp)
800030b4:	d4d2                	sw	s4,104(sp)
800030b6:	d2d6                	sw	s5,100(sp)
800030b8:	d0da                	sw	s6,96(sp)
800030ba:	cede                	sw	s7,92(sp)
800030bc:	cce2                	sw	s8,88(sp)
800030be:	cae6                	sw	s9,84(sp)
800030c0:	c8ea                	sw	s10,80(sp)
800030c2:	c6ee                	sw	s11,76(sp)
800030c4:	de86                	sw	ra,124(sp)
800030c6:	d236                	sw	a3,36(sp)
800030c8:	d43a                	sw	a4,40(sp)
800030ca:	d63e                	sw	a5,44(sp)
800030cc:	8ac2                	mv	s5,a6
800030ce:	8b46                	mv	s6,a7
800030d0:	442a                	lw	s0,136(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:340
    for(uint32_t i=0;i<reply_bytes;i++)
800030d2:	4981                	li	s3,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:339
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_RX_REPLY_LENGTH_OFFSET, &reply_bytes);
800030d4:	ef8fe0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:340
    for(uint32_t i=0;i<reply_bytes;i++)
800030d8:	83418a13          	addi	s4,gp,-1996 # 800043c4 <SourceCmdSta>
800030dc:	84818b93          	addi	s7,gp,-1976 # 800043d8 <reply_data_cr_01>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:588
                          if(reply_data_eq_01==0x77 )
800030e0:	85018913          	addi	s2,gp,-1968 # 800043e0 <reply_data_eq_01>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:568
                if(reply_data_cr_01==0x11 & reply_data_cr_23==0x11)
800030e4:	84c18c13          	addi	s8,gp,-1972 # 800043dc <reply_data_cr_23>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:570
                    if(reply_data_eq_01==0x77 & reply_data_eq_23 ==0x77)
800030e8:	85418c93          	addi	s9,gp,-1964 # 800043e4 <reply_data_eq_23>
800030ec:	83c18d13          	addi	s10,gp,-1988 # 800043cc <lane_01_cr_done>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:451
                    if(lane_01_cr_done==0x01 && lane_23_cr_done==0x01) // cr done for all lanes goto tps2
800030f0:	84018d93          	addi	s11,gp,-1984 # 800043d0 <lane_23_cr_done>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:340 (discriminator 2)
    for(uint32_t i=0;i<reply_bytes;i++)
800030f4:	5762                	lw	a4,56(sp)
800030f6:	00e9ee63          	bltu	s3,a4,80003112 <link_training+0x78>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:606
    if(SourceCmdSta == 0x00000001)
800030fa:	000a2783          	lw	a5,0(s4)
800030fe:	4705                	li	a4,1
80003100:	40e79d63          	bne	a5,a4,8000351a <link_training+0x480>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:608
        DPSourceTxRdCmd(0x00000200,0x00000001,0x00000001);
80003104:	4605                	li	a2,1
80003106:	4585                	li	a1,1
80003108:	20000513          	li	a0,512
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:963
        DPSourceTxRdCmd(0x00000202,0x00000001,0x00000006);
8000310c:	fe0fe0ef          	jal	ra,800018ec <DPSourceTxRdCmd>
80003110:	a9e1                	j	800035e8 <link_training+0x54e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:343
        read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_RX_REPLY_READING_DATA_OFFSET, &reply_data);
80003112:	1870                	addi	a2,sp,60
80003114:	12400593          	li	a1,292
80003118:	71001537          	lui	a0,0x71001
8000311c:	eb0fe0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:344
        if(SourceCmdSta == 0x0000000B)
80003120:	000a2683          	lw	a3,0(s4)
80003124:	472d                	li	a4,11
80003126:	02e69463          	bne	a3,a4,8000314e <link_training+0xb4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:346
            if(i==3)
8000312a:	470d                	li	a4,3
8000312c:	0ce99563          	bne	s3,a4,800031f6 <link_training+0x15c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:348
                tps3_supported= reply_data&0x40;
80003130:	5772                	lw	a4,60(sp)
80003132:	04077713          	andi	a4,a4,64
80003136:	88e1ae23          	sw	a4,-1892(gp) # 8000442c <tps3_supported>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:349
                if(tps3_supported)
8000313a:	cf41                	beqz	a4,800031d2 <link_training+0x138>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:350
                    UART_send(&g_uart,"\r\nTPS3 Supported\n\r",sizeof("\r\nTPS3 Supported\n\r"));
8000313c:	464d                	li	a2,19
8000313e:	00001597          	auipc	a1,0x1
80003142:	1fe58593          	addi	a1,a1,510 # 8000433c <local_irq_handler_table+0xcc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:352
                    UART_send(&g_uart,"\r\nTPS3 not Supported\n\r",sizeof("\r\nTPS3 not Supported\n\r"));
80003146:	95818513          	addi	a0,gp,-1704 # 800044e8 <g_uart>
8000314a:	821fd0ef          	jal	ra,8000096a <UART_send>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:356
         if(SourceCmdSta == 0x00000025 || SourceCmdSta == 0x00000027 )
8000314e:	000a2703          	lw	a4,0(s4)
80003152:	02500693          	li	a3,37
80003156:	9b75                	andi	a4,a4,-3
80003158:	08d71f63          	bne	a4,a3,800031f6 <link_training+0x15c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:358
            if(i==1)
8000315c:	4505                	li	a0,1
8000315e:	08a99363          	bne	s3,a0,800031e4 <link_training+0x14a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:360
                if(reply_data==0x11)
80003162:	56f2                	lw	a3,60(sp)
80003164:	4745                	li	a4,17
80003166:	06e69c63          	bne	a3,a4,800031de <link_training+0x144>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:361
                    lane_01_cr_done = 0x01;
8000316a:	8331ae23          	sw	s3,-1988(gp) # 800043cc <lane_01_cr_done>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:411
            if(i==6)
8000316e:	4719                	li	a4,6
80003170:	24e99863          	bne	s3,a4,800033c0 <link_training+0x326>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:413
                reply_data_pe3 = reply_data&0xc0;
80003174:	5772                	lw	a4,60(sp)
80003176:	0c077693          	andi	a3,a4,192
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:414
                reply_data_vs3 = reply_data&0x30;
8000317a:	03077593          	andi	a1,a4,48
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:415
                reply_data_pe2 = reply_data&0x0c;
8000317e:	00c77613          	andi	a2,a4,12
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:416
                reply_data_vs2 = reply_data&0x03;
80003182:	8b0d                	andi	a4,a4,3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:413
                reply_data_pe3 = reply_data&0xc0;
80003184:	86d1a223          	sw	a3,-1948(gp) # 800043f4 <reply_data_pe3>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:414
                reply_data_vs3 = reply_data&0x30;
80003188:	86b1aa23          	sw	a1,-1932(gp) # 80004404 <reply_data_vs3>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:415
                reply_data_pe2 = reply_data&0x0c;
8000318c:	86c1a023          	sw	a2,-1952(gp) # 800043f0 <reply_data_pe2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:416
                reply_data_vs2 = reply_data&0x03;
80003190:	86e1a823          	sw	a4,-1936(gp) # 80004400 <reply_data_vs2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:417
                if(reply_data_vs2==0)
80003194:	18071763          	bnez	a4,80003322 <link_training+0x288>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:418
                    reply_sw_2 = 0;
80003198:	8801a823          	sw	zero,-1904(gp) # 80004420 <reply_sw_2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:425
                if(reply_data_vs3==0)
8000319c:	18059e63          	bnez	a1,80003338 <link_training+0x29e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:426
                    reply_sw_3 = 0;
800031a0:	8801aa23          	sw	zero,-1900(gp) # 80004424 <reply_sw_3>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:433
                if(reply_data_pe2==0)
800031a4:	1a061d63          	bnez	a2,8000335e <link_training+0x2c4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:434
                    reply_pe_2 = 0;
800031a8:	8801a023          	sw	zero,-1920(gp) # 80004410 <reply_pe_2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:441
                if(reply_data_pe3==0)
800031ac:	1c069a63          	bnez	a3,80003380 <link_training+0x2e6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:442
                    reply_pe_3 = 0;
800031b0:	8801a223          	sw	zero,-1916(gp) # 80004414 <reply_pe_3>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:449
                if(LANE_NO==0x4)
800031b4:	4691                	li	a3,4
800031b6:	000d2703          	lw	a4,0(s10)
800031ba:	1ed41763          	bne	s0,a3,800033a8 <link_training+0x30e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:451
                    if(lane_01_cr_done==0x01 && lane_23_cr_done==0x01) // cr done for all lanes goto tps2
800031be:	4685                	li	a3,1
800031c0:	34d71063          	bne	a4,a3,80003500 <link_training+0x466>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:451 (discriminator 1)
800031c4:	000da683          	lw	a3,0(s11)
800031c8:	32e69c63          	bne	a3,a4,80003500 <link_training+0x466>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:576
                        SourceCmdSta = 0x00000028;
800031cc:	02800713          	li	a4,40
800031d0:	a87d                	j	8000328e <link_training+0x1f4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:352
                    UART_send(&g_uart,"\r\nTPS3 not Supported\n\r",sizeof("\r\nTPS3 not Supported\n\r"));
800031d2:	465d                	li	a2,23
800031d4:	00001597          	auipc	a1,0x1
800031d8:	17c58593          	addi	a1,a1,380 # 80004350 <local_irq_handler_table+0xe0>
800031dc:	b7ad                	j	80003146 <link_training+0xac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:363
                    lane_01_cr_done = 0x00;
800031de:	8201ae23          	sw	zero,-1988(gp) # 800043cc <lane_01_cr_done>
800031e2:	b771                	j	8000316e <link_training+0xd4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:365
            if(i==2)
800031e4:	4889                	li	a7,2
800031e6:	171994e3          	bne	s3,a7,80003b4e <link_training+0xab4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:367
                if(reply_data==0x11)
800031ea:	56f2                	lw	a3,60(sp)
800031ec:	4745                	li	a4,17
800031ee:	0ae69363          	bne	a3,a4,80003294 <link_training+0x1fa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:368
                    lane_23_cr_done = 0x01;
800031f2:	84a1a023          	sw	a0,-1984(gp) # 800043d0 <lane_23_cr_done>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:474
         if(SourceCmdSta == 0x0000002A )
800031f6:	000a2683          	lw	a3,0(s4)
800031fa:	02a00713          	li	a4,42
800031fe:	1ce69163          	bne	a3,a4,800033c0 <link_training+0x326>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:476
            if(i==1)
80003202:	4885                	li	a7,1
80003204:	1b199463          	bne	s3,a7,800033ac <link_training+0x312>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:478
                reply_data_cr_01 = reply_data&0x11;
80003208:	5772                	lw	a4,60(sp)
8000320a:	01177693          	andi	a3,a4,17
8000320e:	84d1a423          	sw	a3,-1976(gp) # 800043d8 <reply_data_cr_01>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:479
                reply_data_eq_01 = reply_data;
80003212:	84e1a823          	sw	a4,-1968(gp) # 800043e0 <reply_data_eq_01>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:525
            if(i==6)
80003216:	4719                	li	a4,6
80003218:	1ae99463          	bne	s3,a4,800033c0 <link_training+0x326>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:527
                reply_data_pe3 = reply_data&0xc0;
8000321c:	5772                	lw	a4,60(sp)
8000321e:	0c077693          	andi	a3,a4,192
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:528
                reply_data_vs3 = reply_data&0x30;
80003222:	03077593          	andi	a1,a4,48
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:529
                reply_data_pe2 = reply_data&0x0c;
80003226:	00c77613          	andi	a2,a4,12
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:530
                reply_data_vs2 = reply_data&0x03;
8000322a:	8b0d                	andi	a4,a4,3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:527
                reply_data_pe3 = reply_data&0xc0;
8000322c:	86d1a223          	sw	a3,-1948(gp) # 800043f4 <reply_data_pe3>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:528
                reply_data_vs3 = reply_data&0x30;
80003230:	86b1aa23          	sw	a1,-1932(gp) # 80004404 <reply_data_vs3>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:529
                reply_data_pe2 = reply_data&0x0c;
80003234:	86c1a023          	sw	a2,-1952(gp) # 800043f0 <reply_data_pe2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:530
                reply_data_vs2 = reply_data&0x03;
80003238:	86e1a823          	sw	a4,-1936(gp) # 80004400 <reply_data_vs2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:531
                if(reply_data_vs2==0)
8000323c:	22071f63          	bnez	a4,8000347a <link_training+0x3e0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:532
                    reply_sw_2 = 0;
80003240:	8801a823          	sw	zero,-1904(gp) # 80004420 <reply_sw_2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:539
                if(reply_data_vs3==0)
80003244:	24059663          	bnez	a1,80003490 <link_training+0x3f6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:540
                    reply_sw_3 = 0;
80003248:	8801aa23          	sw	zero,-1900(gp) # 80004424 <reply_sw_3>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:547
                if(reply_data_pe2==0)
8000324c:	26061563          	bnez	a2,800034b6 <link_training+0x41c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:548
                    reply_pe_2 = 0;
80003250:	8801a023          	sw	zero,-1920(gp) # 80004410 <reply_pe_2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:555
                if(reply_data_pe3==0)
80003254:	28069263          	bnez	a3,800034d8 <link_training+0x43e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:556
                    reply_pe_3 = 0;
80003258:	8801a223          	sw	zero,-1916(gp) # 80004414 <reply_pe_3>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:566
               if(LANE_NO==4)
8000325c:	4691                	li	a3,4
8000325e:	000ba703          	lw	a4,0(s7)
80003262:	2ad41263          	bne	s0,a3,80003506 <link_training+0x46c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:568
                if(reply_data_cr_01==0x11 & reply_data_cr_23==0x11)
80003266:	000c2683          	lw	a3,0(s8)
8000326a:	16bd                	addi	a3,a3,-17
8000326c:	28069a63          	bnez	a3,80003500 <link_training+0x466>
80003270:	173d                	addi	a4,a4,-17
80003272:	28071763          	bnez	a4,80003500 <link_training+0x466>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:570
                    if(reply_data_eq_01==0x77 & reply_data_eq_23 ==0x77)
80003276:	00092703          	lw	a4,0(s2)
8000327a:	f8970713          	addi	a4,a4,-119
8000327e:	f739                	bnez	a4,800031cc <link_training+0x132>
80003280:	000ca703          	lw	a4,0(s9)
80003284:	f8970713          	addi	a4,a4,-119
80003288:	f331                	bnez	a4,800031cc <link_training+0x132>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:572
                        SourceCmdSta = 0x0000002B;
8000328a:	02b00713          	li	a4,43
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:581
                    SourceCmdSta = 0x00000025;
8000328e:	82e1aa23          	sw	a4,-1996(gp) # 800043c4 <SourceCmdSta>
80003292:	a23d                	j	800033c0 <link_training+0x326>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:370
                    lane_23_cr_done = 0x00;
80003294:	8401a023          	sw	zero,-1984(gp) # 800043d0 <lane_23_cr_done>
80003298:	bfb9                	j	800031f6 <link_training+0x15c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:380
                else if (reply_data_vs0==0x1)
8000329a:	00a71663          	bne	a4,a0,800032a6 <link_training+0x20c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:385
                    reply_sw_0 = 7;
8000329e:	88e1a423          	sw	a4,-1912(gp) # 80004418 <reply_sw_0>
800032a2:	0db0006f          	j	80003b7c <link_training+0xae2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:382
                else if (reply_data_vs0==0x2)
800032a6:	ff170ce3          	beq	a4,a7,8000329e <link_training+0x204>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:385
                    reply_sw_0 = 7;
800032aa:	471d                	li	a4,7
800032ac:	bfcd                	j	8000329e <link_training+0x204>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:388
                else if (reply_data_vs1==0x10)
800032ae:	4741                	li	a4,16
800032b0:	00e59763          	bne	a1,a4,800032be <link_training+0x224>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:389
                    reply_sw_1 = 1;
800032b4:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:393
                    reply_sw_1 = 7;
800032b6:	88e1a623          	sw	a4,-1908(gp) # 8000441c <reply_sw_1>
800032ba:	0cb0006f          	j	80003b84 <link_training+0xaea>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:390
                else if (reply_data_vs1==0x20)
800032be:	02000713          	li	a4,32
800032c2:	00e59463          	bne	a1,a4,800032ca <link_training+0x230>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:391
                    reply_sw_1 = 2;
800032c6:	4709                	li	a4,2
800032c8:	b7fd                	j	800032b6 <link_training+0x21c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:392
                else if (reply_data_vs1==0x30)
800032ca:	03000713          	li	a4,48
800032ce:	0ae59be3          	bne	a1,a4,80003b84 <link_training+0xaea>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:393
                    reply_sw_1 = 7;
800032d2:	471d                	li	a4,7
800032d4:	b7cd                	j	800032b6 <link_training+0x21c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:396
                else if (reply_data_pe0==0x4)
800032d6:	4711                	li	a4,4
800032d8:	00e61763          	bne	a2,a4,800032e6 <link_training+0x24c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:397
                    reply_pe_0 = 1;
800032dc:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:401
                    reply_pe_0 = 7;
800032de:	86e1ac23          	sw	a4,-1928(gp) # 80004408 <reply_pe_0>
800032e2:	0ab0006f          	j	80003b8c <link_training+0xaf2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:398
                else if (reply_data_pe0==0x8)
800032e6:	4721                	li	a4,8
800032e8:	00e61463          	bne	a2,a4,800032f0 <link_training+0x256>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:399
                    reply_pe_0 = 2;
800032ec:	4709                	li	a4,2
800032ee:	bfc5                	j	800032de <link_training+0x244>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:400
                else if (reply_data_pe0==0xc)
800032f0:	4731                	li	a4,12
800032f2:	08e61de3          	bne	a2,a4,80003b8c <link_training+0xaf2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:401
                    reply_pe_0 = 7;
800032f6:	471d                	li	a4,7
800032f8:	b7dd                	j	800032de <link_training+0x244>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:404
                else if (reply_data_pe1==0x40)
800032fa:	04000713          	li	a4,64
800032fe:	00e69463          	bne	a3,a4,80003306 <link_training+0x26c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:519
                    reply_pe_1 = 1;
80003302:	4705                	li	a4,1
80003304:	a821                	j	8000331c <link_training+0x282>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:406
                else if (reply_data_pe1==0x80)
80003306:	08000713          	li	a4,128
8000330a:	00e69463          	bne	a3,a4,80003312 <link_training+0x278>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:521
                    reply_pe_1 = 2;
8000330e:	4709                	li	a4,2
80003310:	a031                	j	8000331c <link_training+0x282>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:408
                else if (reply_data_pe1==0xc0)
80003312:	0c000713          	li	a4,192
80003316:	0ae69563          	bne	a3,a4,800033c0 <link_training+0x326>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:409
                    reply_pe_1 = 7;
8000331a:	471d                	li	a4,7
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:521
                    reply_pe_1 = 2;
8000331c:	86e1ae23          	sw	a4,-1924(gp) # 8000440c <reply_pe_1>
80003320:	a045                	j	800033c0 <link_training+0x326>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:419
                else if (reply_data_vs2==0x1)
80003322:	4505                	li	a0,1
80003324:	00a71563          	bne	a4,a0,8000332e <link_training+0x294>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:424
                    reply_sw_2 = 7;
80003328:	88e1a823          	sw	a4,-1904(gp) # 80004420 <reply_sw_2>
8000332c:	bd85                	j	8000319c <link_training+0x102>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:421
                else if (reply_data_vs2==0x2)
8000332e:	4509                	li	a0,2
80003330:	fea70ce3          	beq	a4,a0,80003328 <link_training+0x28e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:424
                    reply_sw_2 = 7;
80003334:	471d                	li	a4,7
80003336:	bfcd                	j	80003328 <link_training+0x28e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:427
                else if (reply_data_vs3==0x10)
80003338:	4741                	li	a4,16
8000333a:	00e59663          	bne	a1,a4,80003346 <link_training+0x2ac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:428
                    reply_sw_3 = 1;
8000333e:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:432
                    reply_sw_3 = 7;
80003340:	88e1aa23          	sw	a4,-1900(gp) # 80004424 <reply_sw_3>
80003344:	b585                	j	800031a4 <link_training+0x10a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:429
                else if (reply_data_vs3==0x20)
80003346:	02000713          	li	a4,32
8000334a:	00e59463          	bne	a1,a4,80003352 <link_training+0x2b8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:430
                    reply_sw_3 = 2;
8000334e:	4709                	li	a4,2
80003350:	bfc5                	j	80003340 <link_training+0x2a6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:431
                else if (reply_data_vs3==0x30)
80003352:	03000713          	li	a4,48
80003356:	e4e597e3          	bne	a1,a4,800031a4 <link_training+0x10a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:432
                    reply_sw_3 = 7;
8000335a:	471d                	li	a4,7
8000335c:	b7d5                	j	80003340 <link_training+0x2a6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:435
                else if (reply_data_pe2==0x4)
8000335e:	4711                	li	a4,4
80003360:	00e61663          	bne	a2,a4,8000336c <link_training+0x2d2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:436
                    reply_pe_2 = 1;
80003364:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:440
                    reply_pe_2 = 7;
80003366:	88e1a023          	sw	a4,-1920(gp) # 80004410 <reply_pe_2>
8000336a:	b589                	j	800031ac <link_training+0x112>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:437
                else if (reply_data_pe2==0x8)
8000336c:	4721                	li	a4,8
8000336e:	00e61463          	bne	a2,a4,80003376 <link_training+0x2dc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:438
                    reply_pe_2 = 2;
80003372:	4709                	li	a4,2
80003374:	bfcd                	j	80003366 <link_training+0x2cc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:439
                else if (reply_data_pe2==0xc)
80003376:	4731                	li	a4,12
80003378:	e2e61ae3          	bne	a2,a4,800031ac <link_training+0x112>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:440
                    reply_pe_2 = 7;
8000337c:	471d                	li	a4,7
8000337e:	b7e5                	j	80003366 <link_training+0x2cc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:443
                else if (reply_data_pe3==0x40)
80003380:	04000713          	li	a4,64
80003384:	00e69663          	bne	a3,a4,80003390 <link_training+0x2f6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:444
                    reply_pe_3 = 1;
80003388:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:448
                    reply_pe_3 = 7;
8000338a:	88e1a223          	sw	a4,-1916(gp) # 80004414 <reply_pe_3>
8000338e:	b51d                	j	800031b4 <link_training+0x11a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:445
                else if (reply_data_pe3==0x80)
80003390:	08000713          	li	a4,128
80003394:	00e69463          	bne	a3,a4,8000339c <link_training+0x302>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:446
                    reply_pe_3 = 2;
80003398:	4709                	li	a4,2
8000339a:	bfc5                	j	8000338a <link_training+0x2f0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:447
                else if (reply_data_pe3==0xc0)
8000339c:	0c000713          	li	a4,192
800033a0:	e0e69ae3          	bne	a3,a4,800031b4 <link_training+0x11a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:448
                    reply_pe_3 = 7;
800033a4:	471d                	li	a4,7
800033a6:	b7d5                	j	8000338a <link_training+0x2f0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:462
                    if(lane_01_cr_done==0x01) // cr done for all lanes goto tps2
800033a8:	4685                	li	a3,1
800033aa:	bd39                	j	800031c8 <link_training+0x12e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:481
            if(i==2)
800033ac:	4509                	li	a0,2
800033ae:	00a99b63          	bne	s3,a0,800033c4 <link_training+0x32a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:483
                reply_data_cr_23 = reply_data&0x11;
800033b2:	5772                	lw	a4,60(sp)
800033b4:	01177693          	andi	a3,a4,17
800033b8:	84d1a623          	sw	a3,-1972(gp) # 800043dc <reply_data_cr_23>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:484
                reply_data_eq_23 = reply_data;
800033bc:	84e1aa23          	sw	a4,-1964(gp) # 800043e4 <reply_data_eq_23>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:340 (discriminator 2)
    for(uint32_t i=0;i<reply_bytes;i++)
800033c0:	0985                	addi	s3,s3,1
800033c2:	bb0d                	j	800030f4 <link_training+0x5a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:486
            if(i==5)
800033c4:	4715                	li	a4,5
800033c6:	e4e998e3          	bne	s3,a4,80003216 <link_training+0x17c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:488
                reply_data_pe1 = reply_data&0xc0;
800033ca:	5772                	lw	a4,60(sp)
800033cc:	0c077693          	andi	a3,a4,192
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:489
                reply_data_vs1 = reply_data&0x30;
800033d0:	03077593          	andi	a1,a4,48
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:490
                reply_data_pe0 = reply_data&0x0c;
800033d4:	00c77613          	andi	a2,a4,12
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:491
                reply_data_vs0 = reply_data&0x03;
800033d8:	8b0d                	andi	a4,a4,3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:488
                reply_data_pe1 = reply_data&0xc0;
800033da:	84d1ae23          	sw	a3,-1956(gp) # 800043ec <reply_data_pe1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:489
                reply_data_vs1 = reply_data&0x30;
800033de:	86b1a623          	sw	a1,-1940(gp) # 800043fc <reply_data_vs1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:490
                reply_data_pe0 = reply_data&0x0c;
800033e2:	84c1ac23          	sw	a2,-1960(gp) # 800043e8 <reply_data_pe0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:491
                reply_data_vs0 = reply_data&0x03;
800033e6:	86e1a423          	sw	a4,-1944(gp) # 800043f8 <reply_data_vs0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:492
                if(reply_data_vs0==0)
800033ea:	eb1d                	bnez	a4,80003420 <link_training+0x386>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:493
                    reply_sw_0 = 0;
800033ec:	8801a423          	sw	zero,-1912(gp) # 80004418 <reply_sw_0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:500
                if(reply_data_vs1==0)
800033f0:	e1a9                	bnez	a1,80003432 <link_training+0x398>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:501
                    reply_sw_1 = 0;
800033f2:	8801a623          	sw	zero,-1908(gp) # 8000441c <reply_sw_1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:508
                if(reply_data_pe0==0)
800033f6:	e22d                	bnez	a2,80003458 <link_training+0x3be>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:509
                    reply_pe_0 = 0;
800033f8:	8601ac23          	sw	zero,-1928(gp) # 80004408 <reply_pe_0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:516
                if(reply_data_pe1==0)
800033fc:	78068a63          	beqz	a3,80003b90 <link_training+0xaf6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:518
                else if (reply_data_pe1==0x40)
80003400:	04000713          	li	a4,64
80003404:	eee68fe3          	beq	a3,a4,80003302 <link_training+0x268>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:520
                else if (reply_data_pe1==0x80)
80003408:	08000713          	li	a4,128
8000340c:	f0e681e3          	beq	a3,a4,8000330e <link_training+0x274>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:522
                else if (reply_data_pe1==0xc0)
80003410:	0c000713          	li	a4,192
80003414:	fae696e3          	bne	a3,a4,800033c0 <link_training+0x326>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:523
                    reply_pe_0 = 7;
80003418:	471d                	li	a4,7
8000341a:	86e1ac23          	sw	a4,-1928(gp) # 80004408 <reply_pe_0>
8000341e:	b74d                	j	800033c0 <link_training+0x326>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:494
                else if (reply_data_vs0==0x1)
80003420:	01171563          	bne	a4,a7,8000342a <link_training+0x390>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:499
                    reply_sw_0 = 7;
80003424:	88e1a423          	sw	a4,-1912(gp) # 80004418 <reply_sw_0>
80003428:	b7e1                	j	800033f0 <link_training+0x356>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:496
                else if (reply_data_vs0==0x2)
8000342a:	fea70de3          	beq	a4,a0,80003424 <link_training+0x38a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:499
                    reply_sw_0 = 7;
8000342e:	471d                	li	a4,7
80003430:	bfd5                	j	80003424 <link_training+0x38a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:502
                else if (reply_data_vs1==0x10)
80003432:	4741                	li	a4,16
80003434:	00e59663          	bne	a1,a4,80003440 <link_training+0x3a6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:503
                    reply_sw_1 = 1;
80003438:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:507
                    reply_sw_1 = 7;
8000343a:	88e1a623          	sw	a4,-1908(gp) # 8000441c <reply_sw_1>
8000343e:	bf65                	j	800033f6 <link_training+0x35c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:504
                else if (reply_data_vs1==0x20)
80003440:	02000713          	li	a4,32
80003444:	00e59463          	bne	a1,a4,8000344c <link_training+0x3b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:505
                    reply_sw_1 = 2;
80003448:	4709                	li	a4,2
8000344a:	bfc5                	j	8000343a <link_training+0x3a0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:506
                else if (reply_data_vs1==0x30)
8000344c:	03000713          	li	a4,48
80003450:	fae593e3          	bne	a1,a4,800033f6 <link_training+0x35c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:507
                    reply_sw_1 = 7;
80003454:	471d                	li	a4,7
80003456:	b7d5                	j	8000343a <link_training+0x3a0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:510
                else if (reply_data_pe0==0x4)
80003458:	4711                	li	a4,4
8000345a:	00e61663          	bne	a2,a4,80003466 <link_training+0x3cc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:511
                    reply_pe_0 = 1;
8000345e:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:515
                    reply_pe_0 = 7;
80003460:	86e1ac23          	sw	a4,-1928(gp) # 80004408 <reply_pe_0>
80003464:	bf61                	j	800033fc <link_training+0x362>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:512
                else if (reply_data_pe0==0x8)
80003466:	4721                	li	a4,8
80003468:	00e61463          	bne	a2,a4,80003470 <link_training+0x3d6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:513
                    reply_pe_0 = 2;
8000346c:	4709                	li	a4,2
8000346e:	bfcd                	j	80003460 <link_training+0x3c6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:514
                else if (reply_data_pe0==0xc)
80003470:	4731                	li	a4,12
80003472:	f8e615e3          	bne	a2,a4,800033fc <link_training+0x362>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:515
                    reply_pe_0 = 7;
80003476:	471d                	li	a4,7
80003478:	b7e5                	j	80003460 <link_training+0x3c6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:533
                else if (reply_data_vs2==0x1)
8000347a:	4505                	li	a0,1
8000347c:	00a71563          	bne	a4,a0,80003486 <link_training+0x3ec>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:538
                    reply_sw_2 = 7;
80003480:	88e1a823          	sw	a4,-1904(gp) # 80004420 <reply_sw_2>
80003484:	b3c1                	j	80003244 <link_training+0x1aa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:535
                else if (reply_data_vs2==0x2)
80003486:	4509                	li	a0,2
80003488:	fea70ce3          	beq	a4,a0,80003480 <link_training+0x3e6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:538
                    reply_sw_2 = 7;
8000348c:	471d                	li	a4,7
8000348e:	bfcd                	j	80003480 <link_training+0x3e6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:541
                else if (reply_data_vs3==0x10)
80003490:	4741                	li	a4,16
80003492:	00e59663          	bne	a1,a4,8000349e <link_training+0x404>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:542
                    reply_sw_3 = 1;
80003496:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:546
                    reply_sw_3 = 7;
80003498:	88e1aa23          	sw	a4,-1900(gp) # 80004424 <reply_sw_3>
8000349c:	bb45                	j	8000324c <link_training+0x1b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:543
                else if (reply_data_vs3==0x20)
8000349e:	02000713          	li	a4,32
800034a2:	00e59463          	bne	a1,a4,800034aa <link_training+0x410>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:544
                    reply_sw_3 = 2;
800034a6:	4709                	li	a4,2
800034a8:	bfc5                	j	80003498 <link_training+0x3fe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:545
                else if (reply_data_vs3==0x30)
800034aa:	03000713          	li	a4,48
800034ae:	d8e59fe3          	bne	a1,a4,8000324c <link_training+0x1b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:546
                    reply_sw_3 = 7;
800034b2:	471d                	li	a4,7
800034b4:	b7d5                	j	80003498 <link_training+0x3fe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:549
                else if (reply_data_pe2==0x4)
800034b6:	4711                	li	a4,4
800034b8:	00e61663          	bne	a2,a4,800034c4 <link_training+0x42a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:550
                    reply_pe_2 = 1;
800034bc:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:554
                    reply_pe_2 = 7;
800034be:	88e1a023          	sw	a4,-1920(gp) # 80004410 <reply_pe_2>
800034c2:	bb49                	j	80003254 <link_training+0x1ba>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:551
                else if (reply_data_pe2==0x8)
800034c4:	4721                	li	a4,8
800034c6:	00e61463          	bne	a2,a4,800034ce <link_training+0x434>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:552
                    reply_pe_2 = 2;
800034ca:	4709                	li	a4,2
800034cc:	bfcd                	j	800034be <link_training+0x424>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:553
                else if (reply_data_pe2==0xc)
800034ce:	4731                	li	a4,12
800034d0:	d8e612e3          	bne	a2,a4,80003254 <link_training+0x1ba>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:554
                    reply_pe_2 = 7;
800034d4:	471d                	li	a4,7
800034d6:	b7e5                	j	800034be <link_training+0x424>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:557
                else if (reply_data_pe3==0x40)
800034d8:	04000713          	li	a4,64
800034dc:	00e69663          	bne	a3,a4,800034e8 <link_training+0x44e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:558
                    reply_pe_3 = 1;
800034e0:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:562
                    reply_pe_3 = 7;
800034e2:	88e1a223          	sw	a4,-1916(gp) # 80004414 <reply_pe_3>
800034e6:	bb9d                	j	8000325c <link_training+0x1c2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:559
                else if (reply_data_pe3==0x80)
800034e8:	08000713          	li	a4,128
800034ec:	00e69463          	bne	a3,a4,800034f4 <link_training+0x45a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:560
                    reply_pe_3 = 2;
800034f0:	4709                	li	a4,2
800034f2:	bfc5                	j	800034e2 <link_training+0x448>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:561
                else if (reply_data_pe3==0xc0)
800034f4:	0c000713          	li	a4,192
800034f8:	d6e692e3          	bne	a3,a4,8000325c <link_training+0x1c2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:562
                    reply_pe_3 = 7;
800034fc:	471d                	li	a4,7
800034fe:	b7d5                	j	800034e2 <link_training+0x448>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:581
                    SourceCmdSta = 0x00000025;
80003500:	02500713          	li	a4,37
80003504:	b369                	j	8000328e <link_training+0x1f4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:586
                   if(reply_data_cr_01==0x11 )
80003506:	46c5                	li	a3,17
80003508:	fed71ce3          	bne	a4,a3,80003500 <link_training+0x466>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:588
                          if(reply_data_eq_01==0x77 )
8000350c:	00092683          	lw	a3,0(s2)
80003510:	07700713          	li	a4,119
80003514:	cae69ce3          	bne	a3,a4,800031cc <link_training+0x132>
80003518:	bb8d                	j	8000328a <link_training+0x1f0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:610
    else if(SourceCmdSta == 0x00000002)
8000351a:	4709                	li	a4,2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:612
        DPSourceTxRdCmd(0x00000000,0x00000001,0x00000001);
8000351c:	4605                	li	a2,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:610
    else if(SourceCmdSta == 0x00000002)
8000351e:	08e78e63          	beq	a5,a4,800035ba <link_training+0x520>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:614
    else if(SourceCmdSta == 0x00000003)
80003522:	470d                	li	a4,3
80003524:	00e79763          	bne	a5,a4,80003532 <link_training+0x498>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:616
        DPSourceTxRdCmd(0x00000500,0x00000001,0x0000000B);
80003528:	462d                	li	a2,11
8000352a:	4585                	li	a1,1
8000352c:	50000513          	li	a0,1280
80003530:	bef1                	j	8000310c <link_training+0x72>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:618
    else if(SourceCmdSta == 0x00000004)
80003532:	4711                	li	a4,4
80003534:	00e79763          	bne	a5,a4,80003542 <link_training+0x4a8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:620
        DPSourceTxRdCmd(0x00000600,0x00000001,0x00000001);
80003538:	4605                	li	a2,1
8000353a:	4585                	li	a1,1
8000353c:	60000513          	li	a0,1536
80003540:	b6f1                	j	8000310c <link_training+0x72>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:622
    else if(SourceCmdSta == 0x00000005)
80003542:	4715                	li	a4,5
80003544:	00e79c63          	bne	a5,a4,8000355c <link_training+0x4c2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:624
        SourceWrBytes[0] = 0x00000001;
80003548:	4785                	li	a5,1
8000354a:	90f1a023          	sw	a5,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:625
        DPSourceTxWrCmd(0x00000600,0x00000001,0x00000001); //SET_POWER & SET_DP_PWR_VOLTAGE
8000354e:	4605                	li	a2,1
80003550:	4585                	li	a1,1
80003552:	60000513          	li	a0,1536
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:957
        DPSourceTxWrCmd(0x00000102,0x00000001,0x00000005);
80003556:	a84fe0ef          	jal	ra,800017da <DPSourceTxWrCmd>
8000355a:	a079                	j	800035e8 <link_training+0x54e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:627
    else if(SourceCmdSta == 0x00000006)
8000355c:	4719                	li	a4,6
8000355e:	00e79b63          	bne	a5,a4,80003574 <link_training+0x4da>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:629
       SourceWrBytes[0] = 0x00000080;
80003562:	08000793          	li	a5,128
80003566:	90f1a023          	sw	a5,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:630
        DPSourceTxWrCmd(0x00000300,0x00000001,0x00000001);
8000356a:	4605                	li	a2,1
8000356c:	4585                	li	a1,1
8000356e:	30000513          	li	a0,768
80003572:	b7d5                	j	80003556 <link_training+0x4bc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:632
    else if(SourceCmdSta == 0x00000007)
80003574:	471d                	li	a4,7
80003576:	00e79b63          	bne	a5,a4,8000358c <link_training+0x4f2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:634
       SourceWrBytes[0] = 0x00000034;
8000357a:	03400793          	li	a5,52
8000357e:	90f1a023          	sw	a5,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:635
        DPSourceTxWrCmd(0x00000301,0x00000001,0x00000001);
80003582:	4605                	li	a2,1
80003584:	4585                	li	a1,1
80003586:	30100513          	li	a0,769
8000358a:	b7f1                	j	80003556 <link_training+0x4bc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:637
    else if(SourceCmdSta == 0x00000008)
8000358c:	4721                	li	a4,8
8000358e:	00e79b63          	bne	a5,a4,800035a4 <link_training+0x50a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:639
       SourceWrBytes[0] = 0x00000028;
80003592:	02800793          	li	a5,40
80003596:	90f1a023          	sw	a5,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:640
        DPSourceTxWrCmd(0x00000302,0x00000001,0x00000001);
8000359a:	4605                	li	a2,1
8000359c:	4585                	li	a1,1
8000359e:	30200513          	li	a0,770
800035a2:	bf55                	j	80003556 <link_training+0x4bc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:642
    else if(SourceCmdSta == 0x00000009)
800035a4:	4725                	li	a4,9
800035a6:	00e79663          	bne	a5,a4,800035b2 <link_training+0x518>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:644
       DPSourceTxRdCmd(0x0000000E,0x00000001,0x00000001);
800035aa:	4605                	li	a2,1
800035ac:	4585                	li	a1,1
800035ae:	4539                	li	a0,14
800035b0:	beb1                	j	8000310c <link_training+0x72>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:646
    else if(SourceCmdSta == 0x0000000A)
800035b2:	4729                	li	a4,10
800035b4:	00e79663          	bne	a5,a4,800035c0 <link_training+0x526>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:648
       DPSourceTxRdCmd(0x00000000,0x00000001,0x0000000E);
800035b8:	4639                	li	a2,14
800035ba:	4585                	li	a1,1
800035bc:	4501                	li	a0,0
800035be:	b6b9                	j	8000310c <link_training+0x72>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:650
    else if(SourceCmdSta == 0x0000000B)
800035c0:	472d                	li	a4,11
800035c2:	00e79763          	bne	a5,a4,800035d0 <link_training+0x536>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:652
       DPSourceTxRdCmd(0x00000080,0x00000001,0x00000004);
800035c6:	4611                	li	a2,4
800035c8:	4585                	li	a1,1
800035ca:	08000513          	li	a0,128
800035ce:	be3d                	j	8000310c <link_training+0x72>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:654
    else if(SourceCmdSta == 0x0000000C)
800035d0:	4731                	li	a4,12
800035d2:	02e79a63          	bne	a5,a4,80003606 <link_training+0x56c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:656
        SourceWrBytes[0] = 0x00000000;
800035d6:	9001a023          	sw	zero,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:666
        DPSourceTxI2CWrCmd(0x00000050,0x00000001,0x00000001,0x00000001);
800035da:	4685                	li	a3,1
800035dc:	4605                	li	a2,1
800035de:	4585                	li	a1,1
800035e0:	05000513          	li	a0,80
800035e4:	a7afe0ef          	jal	ra,8000185e <DPSourceTxI2CWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:971
}
800035e8:	50f6                	lw	ra,124(sp)
800035ea:	5466                	lw	s0,120(sp)
800035ec:	54d6                	lw	s1,116(sp)
800035ee:	5946                	lw	s2,112(sp)
800035f0:	59b6                	lw	s3,108(sp)
800035f2:	5a26                	lw	s4,104(sp)
800035f4:	5a96                	lw	s5,100(sp)
800035f6:	5b06                	lw	s6,96(sp)
800035f8:	4bf6                	lw	s7,92(sp)
800035fa:	4c66                	lw	s8,88(sp)
800035fc:	4cd6                	lw	s9,84(sp)
800035fe:	4d46                	lw	s10,80(sp)
80003600:	4db6                	lw	s11,76(sp)
80003602:	6109                	addi	sp,sp,128
80003604:	8082                	ret
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:659
    else if(SourceCmdSta >= 0x000000D && SourceCmdSta <= 0x00000014)
80003606:	ff378713          	addi	a4,a5,-13
8000360a:	469d                	li	a3,7
8000360c:	00e6ea63          	bltu	a3,a4,80003620 <link_training+0x586>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:661
        DPSourceTxI2CRdCmd(0x00000050,0x00000001,0x00000010,0x00000001);
80003610:	4685                	li	a3,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:674
        DPSourceTxI2CRdCmd(0x00000050,0x00000001,0x00000010,0x00000000);
80003612:	4641                	li	a2,16
80003614:	4585                	li	a1,1
80003616:	05000513          	li	a0,80
8000361a:	b1efe0ef          	jal	ra,80001938 <DPSourceTxI2CRdCmd>
8000361e:	b7e9                	j	800035e8 <link_training+0x54e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:663
    else if(SourceCmdSta == 0x0000015)
80003620:	4755                	li	a4,21
80003622:	00e79763          	bne	a5,a4,80003630 <link_training+0x596>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:665
        SourceWrBytes[0] = 0x00000080;
80003626:	08000793          	li	a5,128
8000362a:	90f1a023          	sw	a5,-1792(gp) # 80004490 <SourceWrBytes>
8000362e:	b775                	j	800035da <link_training+0x540>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:668
    else if(SourceCmdSta >= 0x0000016 && SourceCmdSta <= 0x0000001C)
80003630:	fea78713          	addi	a4,a5,-22
80003634:	4699                	li	a3,6
80003636:	fce6fde3          	bgeu	a3,a4,80003610 <link_training+0x576>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:672
    else if(SourceCmdSta == 0x0000001D)
8000363a:	4775                	li	a4,29
8000363c:	00e79463          	bne	a5,a4,80003644 <link_training+0x5aa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:674
        DPSourceTxI2CRdCmd(0x00000050,0x00000001,0x00000010,0x00000000);
80003640:	4681                	li	a3,0
80003642:	bfc1                	j	80003612 <link_training+0x578>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:676
    else if(SourceCmdSta == 0x0000001E)
80003644:	4779                	li	a4,30
80003646:	00e79963          	bne	a5,a4,80003658 <link_training+0x5be>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:678
        SourceWrBytes[0] = 0x00000000;
8000364a:	9001a023          	sw	zero,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:679
        DPSourceTxWrCmd(0x00000111,0x00000001,0x00000001); //00111h MSTM_CTRL
8000364e:	4605                	li	a2,1
80003650:	4585                	li	a1,1
80003652:	11100513          	li	a0,273
80003656:	b701                	j	80003556 <link_training+0x4bc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:682
    else if(SourceCmdSta == 0x0000001F)
80003658:	477d                	li	a4,31
8000365a:	00e79963          	bne	a5,a4,8000366c <link_training+0x5d2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:684
        SourceWrBytes[0] = 0x00000000;
8000365e:	9001a023          	sw	zero,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:685
        DPSourceTxWrCmd(0x00000107,0x00000001,0x00000001); //DOWNSPREAD_CTRL
80003662:	4605                	li	a2,1
80003664:	4585                	li	a1,1
80003666:	10700513          	li	a0,263
8000366a:	b5f5                	j	80003556 <link_training+0x4bc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:687
    else if(SourceCmdSta == 0x00000020)
8000366c:	02000713          	li	a4,32
80003670:	ece78ce3          	beq	a5,a4,80003548 <link_training+0x4ae>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:692
    else if(SourceCmdSta == 0x00000021)
80003674:	02100c13          	li	s8,33
80003678:	01879b63          	bne	a5,s8,8000368e <link_training+0x5f4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:694
        SourceWrBytes[0] = 0x00000020;
8000367c:	02000793          	li	a5,32
80003680:	90f1a023          	sw	a5,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:695
        DPSourceTxWrCmd(0x00000102,0x00000001,0x00000001); //TRAINING_PATTERN_SET
80003684:	4605                	li	a2,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:957
        DPSourceTxWrCmd(0x00000102,0x00000001,0x00000005);
80003686:	4585                	li	a1,1
80003688:	10200513          	li	a0,258
8000368c:	b5e9                	j	80003556 <link_training+0x4bc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:699
    else if(SourceCmdSta == 0x00000022)
8000368e:	02200913          	li	s2,34
80003692:	03279b63          	bne	a5,s2,800036c8 <link_training+0x62e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:703
                SPEED=0x00000006;
80003696:	4799                	li	a5,6
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:701
        if(SPEED_MODE==0)
80003698:	c489                	beqz	s1,800036a2 <link_training+0x608>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:705
            else if (SPEED_MODE==1)
8000369a:	4785                	li	a5,1
8000369c:	02f49163          	bne	s1,a5,800036be <link_training+0x624>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:707
                SPEED=0x0000000A;
800036a0:	47a9                	li	a5,10
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:711
                SPEED=0x00000014;
800036a2:	82f1a823          	sw	a5,-2000(gp) # 800043c0 <SPEED>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:713
        SourceWrBytes[0] = SPEED;  //2.7Gbps   //0x00000014;
800036a6:	83018793          	addi	a5,gp,-2000 # 800043c0 <SPEED>
800036aa:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:716
        DPSourceTxWrCmd(0x00000100,0x00000001,0x00000002);//LINK_BW_SET
800036ac:	4609                	li	a2,2
800036ae:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:713
        SourceWrBytes[0] = SPEED;  //2.7Gbps   //0x00000014;
800036b0:	90f1a023          	sw	a5,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:716
        DPSourceTxWrCmd(0x00000100,0x00000001,0x00000002);//LINK_BW_SET
800036b4:	10000513          	li	a0,256
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:715
        SourceWrBytes[1] = LANE_NO;
800036b8:	9081a223          	sw	s0,-1788(gp) # 80004494 <SourceWrBytes+0x4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:716
        DPSourceTxWrCmd(0x00000100,0x00000001,0x00000002);//LINK_BW_SET
800036bc:	bd69                	j	80003556 <link_training+0x4bc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:709
            else if (SPEED_MODE==2)
800036be:	4789                	li	a5,2
800036c0:	fef493e3          	bne	s1,a5,800036a6 <link_training+0x60c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:711
                SPEED=0x00000014;
800036c4:	47d1                	li	a5,20
800036c6:	bff1                	j	800036a2 <link_training+0x608>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:718
    else if(SourceCmdSta == 0x00000023)
800036c8:	02300b93          	li	s7,35
800036cc:	11779a63          	bne	a5,s7,800037e0 <link_training+0x746>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:722
         write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_SCRAMBLER_ENABLE_OFFSET, 0x00000000);
800036d0:	4601                	li	a2,0
800036d2:	45c1                	li	a1,16
800036d4:	71001537          	lui	a0,0x71001
800036d8:	8fcfe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:723
         write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_TRAINING_PATTERN_MODE_OFFSET, 0x00000001);  //TPS1
800036dc:	4605                	li	a2,1
800036de:	45e1                	li	a1,24
800036e0:	71001537          	lui	a0,0x71001
800036e4:	8f0fe0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:725
        SourceWrBytes[0] = 0x00000021;//TRAINING_PATTERN_SET
800036e8:	9181a023          	sw	s8,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:727
        if(reply_data_vs0==0)
800036ec:	86818793          	addi	a5,gp,-1944 # 800043f8 <reply_data_vs0>
800036f0:	439c                	lw	a5,0(a5)
800036f2:	e7b9                	bnez	a5,80003740 <link_training+0x6a6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:728
                   vs = 0;
800036f4:	8a01a023          	sw	zero,-1888(gp) # 80004430 <vs>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:736
               if(reply_data_pe0==0)
800036f8:	85818793          	addi	a5,gp,-1960 # 800043e8 <reply_data_pe0>
800036fc:	439c                	lw	a5,0(a5)
800036fe:	efb1                	bnez	a5,8000375a <link_training+0x6c0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:737
                   pe = 0;
80003700:	8401a223          	sw	zero,-1980(gp) # 800043d4 <pe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:745
                if(vs==0 && pe==0)
80003704:	8a018793          	addi	a5,gp,-1888 # 80004430 <vs>
80003708:	439c                	lw	a5,0(a5)
8000370a:	ebad                	bnez	a5,8000377c <link_training+0x6e2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:745 (discriminator 1)
8000370c:	84418793          	addi	a5,gp,-1980 # 800043d4 <pe>
80003710:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:746 (discriminator 1)
                    vsw_pe(0x0,0x0);
80003712:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:745 (discriminator 1)
                if(vs==0 && pe==0)
80003714:	cb89                	beqz	a5,80003726 <link_training+0x68c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:747 (discriminator 1)
                else if (vs==0 && pe==1)
80003716:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:748 (discriminator 1)
                    vsw_pe(0x0,0x1);
80003718:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:747 (discriminator 1)
                else if (vs==0 && pe==1)
8000371a:	00e78663          	beq	a5,a4,80003726 <link_training+0x68c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:749 (discriminator 1)
                else if (vs==0 && pe==2)
8000371e:	4709                	li	a4,2
80003720:	0ae79d63          	bne	a5,a4,800037da <link_training+0x740>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:750
                    vsw_pe(0x0,0x2);
80003724:	4589                	li	a1,2
80003726:	4501                	li	a0,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:770
                    vsw_pe(0x3,0x3);
80003728:	866ff0ef          	jal	ra,8000278e <vsw_pe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:773
        SourceWrBytes[1] = 0x00000000;//TRAINING_LANE0_SET
8000372c:	9001a223          	sw	zero,-1788(gp) # 80004494 <SourceWrBytes+0x4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:774
        SourceWrBytes[2] = 0x00000000;
80003730:	9001a423          	sw	zero,-1784(gp) # 80004498 <SourceWrBytes+0x8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:775
        SourceWrBytes[3] = 0x00000000;
80003734:	9001a623          	sw	zero,-1780(gp) # 8000449c <SourceWrBytes+0xc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:776
        SourceWrBytes[4] = 0x00000000;
80003738:	9001a823          	sw	zero,-1776(gp) # 800044a0 <SourceWrBytes+0x10>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:957
        DPSourceTxWrCmd(0x00000102,0x00000001,0x00000005);
8000373c:	4615                	li	a2,5
8000373e:	b7a1                	j	80003686 <link_training+0x5ec>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:729
               else if (reply_data_vs0==0x1)
80003740:	4705                	li	a4,1
80003742:	00e79563          	bne	a5,a4,8000374c <link_training+0x6b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:734
                   vs = 3;
80003746:	8af1a023          	sw	a5,-1888(gp) # 80004430 <vs>
8000374a:	b77d                	j	800036f8 <link_training+0x65e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:731
               else if (reply_data_vs0==0x2)
8000374c:	4709                	li	a4,2
8000374e:	fee78ce3          	beq	a5,a4,80003746 <link_training+0x6ac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:733
               else if (reply_data_vs0==0x3)
80003752:	470d                	li	a4,3
80003754:	fae792e3          	bne	a5,a4,800036f8 <link_training+0x65e>
80003758:	b7fd                	j	80003746 <link_training+0x6ac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:738
               else if (reply_data_pe0==0x4)
8000375a:	4711                	li	a4,4
8000375c:	00e79663          	bne	a5,a4,80003768 <link_training+0x6ce>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:739
                   pe = 1;
80003760:	4785                	li	a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:743
                   pe = 3;
80003762:	84f1a223          	sw	a5,-1980(gp) # 800043d4 <pe>
80003766:	bf79                	j	80003704 <link_training+0x66a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:740
               else if (reply_data_pe0==0x8)
80003768:	4721                	li	a4,8
8000376a:	00e79463          	bne	a5,a4,80003772 <link_training+0x6d8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:741
                   pe = 2;
8000376e:	4789                	li	a5,2
80003770:	bfcd                	j	80003762 <link_training+0x6c8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:742
               else if (reply_data_pe0==0xc)
80003772:	4731                	li	a4,12
80003774:	f8e798e3          	bne	a5,a4,80003704 <link_training+0x66a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:743
                   pe = 3;
80003778:	478d                	li	a5,3
8000377a:	b7e5                	j	80003762 <link_training+0x6c8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:751
                else if (vs==1 && pe==0)
8000377c:	4705                	li	a4,1
8000377e:	02e79063          	bne	a5,a4,8000379e <link_training+0x704>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:751 (discriminator 1)
80003782:	84418713          	addi	a4,gp,-1980 # 800043d4 <pe>
80003786:	4318                	lw	a4,0(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:752 (discriminator 1)
                    vsw_pe(0x1,0x0);
80003788:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:751 (discriminator 1)
                else if (vs==1 && pe==0)
8000378a:	cb01                	beqz	a4,8000379a <link_training+0x700>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:754 (discriminator 1)
                    vsw_pe(0x1,0x1);
8000378c:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:753 (discriminator 1)
                else if (vs==1 && pe==1)
8000378e:	00f70663          	beq	a4,a5,8000379a <link_training+0x700>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:755 (discriminator 1)
                else if (vs==1 && pe==2)
80003792:	4789                	li	a5,2
80003794:	04f71363          	bne	a4,a5,800037da <link_training+0x740>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:756
                    vsw_pe(0x1,0x2);
80003798:	4589                	li	a1,2
8000379a:	4505                	li	a0,1
8000379c:	b771                	j	80003728 <link_training+0x68e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:757
                else if (vs==2 && pe==0)
8000379e:	4689                	li	a3,2
800037a0:	00d79f63          	bne	a5,a3,800037be <link_training+0x724>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:757 (discriminator 1)
800037a4:	84418693          	addi	a3,gp,-1980 # 800043d4 <pe>
800037a8:	4294                	lw	a3,0(a3)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:758 (discriminator 1)
                    vsw_pe(0x2,0x0);
800037aa:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:757 (discriminator 1)
                else if (vs==2 && pe==0)
800037ac:	c699                	beqz	a3,800037ba <link_training+0x720>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:760 (discriminator 1)
                    vsw_pe(0x2,0x1);
800037ae:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:759 (discriminator 1)
                else if (vs==2 && pe==1)
800037b0:	00e68563          	beq	a3,a4,800037ba <link_training+0x720>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:761 (discriminator 1)
                else if (vs==2 && pe==2)
800037b4:	02f69363          	bne	a3,a5,800037da <link_training+0x740>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:762
                    vsw_pe(0x2,0x2);
800037b8:	4589                	li	a1,2
800037ba:	4509                	li	a0,2
800037bc:	b7b5                	j	80003728 <link_training+0x68e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:763
                else if (vs==3 && pe==0)
800037be:	460d                	li	a2,3
800037c0:	00c79d63          	bne	a5,a2,800037da <link_training+0x740>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:763 (discriminator 1)
800037c4:	84418793          	addi	a5,gp,-1980 # 800043d4 <pe>
800037c8:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:764 (discriminator 1)
                    vsw_pe(0x3,0x0);
800037ca:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:763 (discriminator 1)
                else if (vs==3 && pe==0)
800037cc:	cb81                	beqz	a5,800037dc <link_training+0x742>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:766 (discriminator 1)
                    vsw_pe(0x3,0x1);
800037ce:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:765 (discriminator 1)
                else if (vs==3 && pe==1)
800037d0:	00e78663          	beq	a5,a4,800037dc <link_training+0x742>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:768 (discriminator 1)
                    vsw_pe(0x3,0x2);
800037d4:	4589                	li	a1,2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:767 (discriminator 1)
                else if (vs==3 && pe==2)
800037d6:	00d78363          	beq	a5,a3,800037dc <link_training+0x742>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:770
                    vsw_pe(0x3,0x3);
800037da:	458d                	li	a1,3
800037dc:	450d                	li	a0,3
800037de:	b7a9                	j	80003728 <link_training+0x68e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:780
    else if(SourceCmdSta == 0x00000024)
800037e0:	02400713          	li	a4,36
800037e4:	00e79b63          	bne	a5,a4,800037fa <link_training+0x760>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:784
        msdelay(10);
800037e8:	4529                	li	a0,10
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:962
        msdelay(100);
800037ea:	fcbfd0ef          	jal	ra,800017b4 <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:963
        DPSourceTxRdCmd(0x00000202,0x00000001,0x00000006);
800037ee:	4619                	li	a2,6
800037f0:	4585                	li	a1,1
800037f2:	20200513          	li	a0,514
800037f6:	917ff06f          	j	8000310c <link_training+0x72>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:788
    else if(SourceCmdSta == 0x00000025)
800037fa:	02500713          	li	a4,37
800037fe:	1ae79663          	bne	a5,a4,800039aa <link_training+0x910>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:791
        SourceWrBytes[0] = 0x00000021;
80003802:	9181a023          	sw	s8,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:792
        if(reply_data_vs0==0)
80003806:	86818793          	addi	a5,gp,-1944 # 800043f8 <reply_data_vs0>
8000380a:	439c                	lw	a5,0(a5)
8000380c:	e3c5                	bnez	a5,800038ac <link_training+0x812>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:793
           vs = 0;
8000380e:	8a01a023          	sw	zero,-1888(gp) # 80004430 <vs>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:801
       if(reply_data_pe0==0)
80003812:	85818793          	addi	a5,gp,-1960 # 800043e8 <reply_data_pe0>
80003816:	439c                	lw	a5,0(a5)
80003818:	e7dd                	bnez	a5,800038c6 <link_training+0x82c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:802
           pe = 0;
8000381a:	8401a223          	sw	zero,-1980(gp) # 800043d4 <pe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:810
        if(vs==0 && pe==0)
8000381e:	8a018793          	addi	a5,gp,-1888 # 80004430 <vs>
80003822:	439c                	lw	a5,0(a5)
80003824:	0c079263          	bnez	a5,800038e8 <link_training+0x84e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:810 (discriminator 1)
80003828:	84418793          	addi	a5,gp,-1980 # 800043d4 <pe>
8000382c:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:811 (discriminator 1)
            vsw_pe(0x0,0x0);
8000382e:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:810 (discriminator 1)
        if(vs==0 && pe==0)
80003830:	cb89                	beqz	a5,80003842 <link_training+0x7a8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:812 (discriminator 1)
        else if (vs==0 && pe==1)
80003832:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:813 (discriminator 1)
            vsw_pe(0x0,0x1);
80003834:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:812 (discriminator 1)
        else if (vs==0 && pe==1)
80003836:	00e78663          	beq	a5,a4,80003842 <link_training+0x7a8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:814 (discriminator 1)
        else if (vs==0 && pe==2)
8000383a:	4709                	li	a4,2
8000383c:	10e79563          	bne	a5,a4,80003946 <link_training+0x8ac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:815
            vsw_pe(0x0,0x2);
80003840:	4589                	li	a1,2
80003842:	4501                	li	a0,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:835
            vsw_pe(0x3,0x3);
80003844:	f4bfe0ef          	jal	ra,8000278e <vsw_pe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:837
        if(LANE_NO==4)
80003848:	88818793          	addi	a5,gp,-1912 # 80004418 <reply_sw_0>
8000384c:	88c18713          	addi	a4,gp,-1908 # 8000441c <reply_sw_1>
80003850:	4691                	li	a3,4
80003852:	439c                	lw	a5,0(a5)
80003854:	4318                	lw	a4,0(a4)
80003856:	10d41863          	bne	s0,a3,80003966 <link_training+0x8cc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:839
        if(reply_sw_0==reply_sw_1&&reply_sw_1==reply_sw_2&&reply_sw_2==reply_sw_3&&reply_sw_3==reply_sw_0)
8000385a:	0ef71963          	bne	a4,a5,8000394c <link_training+0x8b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:839 (discriminator 1)
8000385e:	89018793          	addi	a5,gp,-1904 # 80004420 <reply_sw_2>
80003862:	439c                	lw	a5,0(a5)
80003864:	0ee79463          	bne	a5,a4,8000394c <link_training+0x8b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:839 (discriminator 2)
80003868:	89418713          	addi	a4,gp,-1900 # 80004424 <reply_sw_3>
8000386c:	4318                	lw	a4,0(a4)
8000386e:	0ce79f63          	bne	a5,a4,8000394c <link_training+0x8b2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:841
            SourceWrBytes[1] = ((reply_pe_0*8)+reply_sw_0);
80003872:	87818713          	addi	a4,gp,-1928 # 80004408 <reply_pe_0>
80003876:	4318                	lw	a4,0(a4)
80003878:	070e                	slli	a4,a4,0x3
8000387a:	973e                	add	a4,a4,a5
8000387c:	90e1a223          	sw	a4,-1788(gp) # 80004494 <SourceWrBytes+0x4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:842
           SourceWrBytes[2] = ((reply_pe_1*8)+reply_sw_1);
80003880:	87c18713          	addi	a4,gp,-1924 # 8000440c <reply_pe_1>
80003884:	4318                	lw	a4,0(a4)
80003886:	070e                	slli	a4,a4,0x3
80003888:	973e                	add	a4,a4,a5
8000388a:	90e1a423          	sw	a4,-1784(gp) # 80004498 <SourceWrBytes+0x8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:843
           SourceWrBytes[3] = ((reply_pe_2*8)+reply_sw_2);
8000388e:	88018713          	addi	a4,gp,-1920 # 80004410 <reply_pe_2>
80003892:	4318                	lw	a4,0(a4)
80003894:	070e                	slli	a4,a4,0x3
80003896:	973e                	add	a4,a4,a5
80003898:	90e1a623          	sw	a4,-1780(gp) # 8000449c <SourceWrBytes+0xc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:844
           SourceWrBytes[4] = ((reply_pe_3*8)+reply_sw_3);
8000389c:	88418713          	addi	a4,gp,-1916 # 80004414 <reply_pe_3>
800038a0:	4318                	lw	a4,0(a4)
800038a2:	070e                	slli	a4,a4,0x3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:956
        SourceWrBytes[4]  =  ((reply_pe_3*8)+reply_sw_3);
800038a4:	97ba                	add	a5,a5,a4
800038a6:	90f1a823          	sw	a5,-1776(gp) # 800044a0 <SourceWrBytes+0x10>
800038aa:	bd49                	j	8000373c <link_training+0x6a2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:794
       else if (reply_data_vs0==0x1)
800038ac:	4705                	li	a4,1
800038ae:	00e79563          	bne	a5,a4,800038b8 <link_training+0x81e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:799
           vs = 3;
800038b2:	8af1a023          	sw	a5,-1888(gp) # 80004430 <vs>
800038b6:	bfb1                	j	80003812 <link_training+0x778>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:796
       else if (reply_data_vs0==0x2)
800038b8:	4709                	li	a4,2
800038ba:	fee78ce3          	beq	a5,a4,800038b2 <link_training+0x818>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:798
       else if (reply_data_vs0==0x3)
800038be:	470d                	li	a4,3
800038c0:	f4e799e3          	bne	a5,a4,80003812 <link_training+0x778>
800038c4:	b7fd                	j	800038b2 <link_training+0x818>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:803
       else if (reply_data_pe0==0x4)
800038c6:	4711                	li	a4,4
800038c8:	00e79663          	bne	a5,a4,800038d4 <link_training+0x83a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:804
           pe = 1;
800038cc:	4785                	li	a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:808
           pe = 3;
800038ce:	84f1a223          	sw	a5,-1980(gp) # 800043d4 <pe>
800038d2:	b7b1                	j	8000381e <link_training+0x784>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:805
       else if (reply_data_pe0==0x8)
800038d4:	4721                	li	a4,8
800038d6:	00e79463          	bne	a5,a4,800038de <link_training+0x844>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:806
           pe = 2;
800038da:	4789                	li	a5,2
800038dc:	bfcd                	j	800038ce <link_training+0x834>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:807
       else if (reply_data_pe0==0xc)
800038de:	4731                	li	a4,12
800038e0:	f2e79fe3          	bne	a5,a4,8000381e <link_training+0x784>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:808
           pe = 3;
800038e4:	478d                	li	a5,3
800038e6:	b7e5                	j	800038ce <link_training+0x834>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:816
        else if (vs==1 && pe==0)
800038e8:	4705                	li	a4,1
800038ea:	02e79063          	bne	a5,a4,8000390a <link_training+0x870>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:816 (discriminator 1)
800038ee:	84418713          	addi	a4,gp,-1980 # 800043d4 <pe>
800038f2:	4318                	lw	a4,0(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:817 (discriminator 1)
            vsw_pe(0x1,0x0);
800038f4:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:816 (discriminator 1)
        else if (vs==1 && pe==0)
800038f6:	cb01                	beqz	a4,80003906 <link_training+0x86c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:819 (discriminator 1)
            vsw_pe(0x1,0x1);
800038f8:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:818 (discriminator 1)
        else if (vs==1 && pe==1)
800038fa:	00f70663          	beq	a4,a5,80003906 <link_training+0x86c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:820 (discriminator 1)
        else if (vs==1 && pe==2)
800038fe:	4789                	li	a5,2
80003900:	04f71363          	bne	a4,a5,80003946 <link_training+0x8ac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:821
            vsw_pe(0x1,0x2);
80003904:	4589                	li	a1,2
80003906:	4505                	li	a0,1
80003908:	bf35                	j	80003844 <link_training+0x7aa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:822
        else if (vs==2 && pe==0)
8000390a:	4689                	li	a3,2
8000390c:	00d79f63          	bne	a5,a3,8000392a <link_training+0x890>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:822 (discriminator 1)
80003910:	84418693          	addi	a3,gp,-1980 # 800043d4 <pe>
80003914:	4294                	lw	a3,0(a3)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:823 (discriminator 1)
            vsw_pe(0x2,0x0);
80003916:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:822 (discriminator 1)
        else if (vs==2 && pe==0)
80003918:	c699                	beqz	a3,80003926 <link_training+0x88c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:825 (discriminator 1)
            vsw_pe(0x2,0x1);
8000391a:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:824 (discriminator 1)
        else if (vs==2 && pe==1)
8000391c:	00e68563          	beq	a3,a4,80003926 <link_training+0x88c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:826 (discriminator 1)
        else if (vs==2 && pe==2)
80003920:	02f69363          	bne	a3,a5,80003946 <link_training+0x8ac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:827
            vsw_pe(0x2,0x2);
80003924:	4589                	li	a1,2
80003926:	4509                	li	a0,2
80003928:	bf31                	j	80003844 <link_training+0x7aa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:828
        else if (vs==3 && pe==0)
8000392a:	460d                	li	a2,3
8000392c:	00c79d63          	bne	a5,a2,80003946 <link_training+0x8ac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:828 (discriminator 1)
80003930:	84418793          	addi	a5,gp,-1980 # 800043d4 <pe>
80003934:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:829 (discriminator 1)
            vsw_pe(0x3,0x0);
80003936:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:828 (discriminator 1)
        else if (vs==3 && pe==0)
80003938:	cb81                	beqz	a5,80003948 <link_training+0x8ae>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:831 (discriminator 1)
            vsw_pe(0x3,0x1);
8000393a:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:830 (discriminator 1)
        else if (vs==3 && pe==1)
8000393c:	00e78663          	beq	a5,a4,80003948 <link_training+0x8ae>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:833 (discriminator 1)
            vsw_pe(0x3,0x2);
80003940:	4589                	li	a1,2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:832 (discriminator 1)
        else if (vs==3 && pe==2)
80003942:	00d78363          	beq	a5,a3,80003948 <link_training+0x8ae>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:835
            vsw_pe(0x3,0x3);
80003946:	458d                	li	a1,3
80003948:	450d                	li	a0,3
8000394a:	bded                	j	80003844 <link_training+0x7aa>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:850
                DPSourceTxRdCmd(0x00000202,0x00000001,0x00000006);
8000394c:	4619                	li	a2,6
8000394e:	4585                	li	a1,1
80003950:	20200513          	li	a0,514
80003954:	f99fd0ef          	jal	ra,800018ec <DPSourceTxRdCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:851
                SourceCmdSta = 0x00000001;
80003958:	4785                	li	a5,1
8000395a:	82f1aa23          	sw	a5,-1996(gp) # 800043c4 <SourceCmdSta>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:852
                irq_value = 0x00000008;
8000395e:	47a1                	li	a5,8
80003960:	94f1a023          	sw	a5,-1728(gp) # 800044d0 <irq_value>
80003964:	b151                	j	800035e8 <link_training+0x54e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:857
            if(reply_sw_0==reply_sw_1)
80003966:	e8f714e3          	bne	a4,a5,800037ee <link_training+0x754>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:859
                SourceWrBytes[1] = ((reply_pe_0*8)+reply_sw_0);
8000396a:	87818793          	addi	a5,gp,-1928 # 80004408 <reply_pe_0>
8000396e:	439c                	lw	a5,0(a5)
80003970:	078e                	slli	a5,a5,0x3
80003972:	97ba                	add	a5,a5,a4
80003974:	90f1a223          	sw	a5,-1788(gp) # 80004494 <SourceWrBytes+0x4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:860
               SourceWrBytes[2] = ((reply_pe_1*8)+reply_sw_1);
80003978:	87c18793          	addi	a5,gp,-1924 # 8000440c <reply_pe_1>
8000397c:	439c                	lw	a5,0(a5)
8000397e:	078e                	slli	a5,a5,0x3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:954
        SourceWrBytes[2]  =  ((reply_pe_1*8)+reply_sw_1);
80003980:	97ba                	add	a5,a5,a4
80003982:	90f1a423          	sw	a5,-1784(gp) # 80004498 <SourceWrBytes+0x8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:955
         SourceWrBytes[3] = ((reply_pe_2*8)+reply_sw_2);
80003986:	88018793          	addi	a5,gp,-1920 # 80004410 <reply_pe_2>
8000398a:	439c                	lw	a5,0(a5)
8000398c:	89018713          	addi	a4,gp,-1904 # 80004420 <reply_sw_2>
80003990:	4318                	lw	a4,0(a4)
80003992:	078e                	slli	a5,a5,0x3
80003994:	97ba                	add	a5,a5,a4
80003996:	90f1a623          	sw	a5,-1780(gp) # 8000449c <SourceWrBytes+0xc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:956
        SourceWrBytes[4]  =  ((reply_pe_3*8)+reply_sw_3);
8000399a:	88418793          	addi	a5,gp,-1916 # 80004414 <reply_pe_3>
8000399e:	439c                	lw	a5,0(a5)
800039a0:	89418713          	addi	a4,gp,-1900 # 80004424 <reply_sw_3>
800039a4:	4318                	lw	a4,0(a4)
800039a6:	078e                	slli	a5,a5,0x3
800039a8:	bdf5                	j	800038a4 <link_training+0x80a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:878
    else if(SourceCmdSta == 0x00000026)
800039aa:	02600713          	li	a4,38
800039ae:	e2e78de3          	beq	a5,a4,800037e8 <link_training+0x74e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:887
    else if(SourceCmdSta == 0x00000028)
800039b2:	02800713          	li	a4,40
800039b6:	14e79d63          	bne	a5,a4,80003b10 <link_training+0xa76>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:895
        write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_SCRAMBLER_ENABLE_OFFSET, 0x00000000);
800039ba:	4601                	li	a2,0
800039bc:	45c1                	li	a1,16
800039be:	71001537          	lui	a0,0x71001
800039c2:	e13fd0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:896
        if(tps3_supported )
800039c6:	89c18793          	addi	a5,gp,-1892 # 8000442c <tps3_supported>
800039ca:	439c                	lw	a5,0(a5)
800039cc:	c7c1                	beqz	a5,80003a54 <link_training+0x9ba>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:898
            write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_TRAINING_PATTERN_MODE_OFFSET, 0x00000003);  //TPS3
800039ce:	460d                	li	a2,3
800039d0:	45e1                	li	a1,24
800039d2:	71001537          	lui	a0,0x71001
800039d6:	dfffd0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:900
            UART_send(&g_uart,(const uint8_t *)"Sending tps3\n\r",sizeof("sending tps3\n\r"));
800039da:	463d                	li	a2,15
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:899
            SourceWrBytes[0] = 0x00000023;
800039dc:	9171a023          	sw	s7,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:900
            UART_send(&g_uart,(const uint8_t *)"Sending tps3\n\r",sizeof("sending tps3\n\r"));
800039e0:	00001597          	auipc	a1,0x1
800039e4:	98858593          	addi	a1,a1,-1656 # 80004368 <local_irq_handler_table+0xf8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:906
            UART_send(&g_uart,(const uint8_t *)"sending tps2\n\r",sizeof("sending tps2\n\r"));
800039e8:	95818513          	addi	a0,gp,-1704 # 800044e8 <g_uart>
800039ec:	f7ffc0ef          	jal	ra,8000096a <UART_send>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:908
        if(reply_data_vs0==0)
800039f0:	86818793          	addi	a5,gp,-1944 # 800043f8 <reply_data_vs0>
800039f4:	439c                	lw	a5,0(a5)
800039f6:	efad                	bnez	a5,80003a70 <link_training+0x9d6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:909
           vs = 0;
800039f8:	8a01a023          	sw	zero,-1888(gp) # 80004430 <vs>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:917
       if(reply_data_pe0==0)
800039fc:	85818793          	addi	a5,gp,-1960 # 800043e8 <reply_data_pe0>
80003a00:	439c                	lw	a5,0(a5)
80003a02:	e7c1                	bnez	a5,80003a8a <link_training+0x9f0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:918
           pe = 0;
80003a04:	8401a223          	sw	zero,-1980(gp) # 800043d4 <pe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:926
        if(vs==0 && pe==0)
80003a08:	8a018793          	addi	a5,gp,-1888 # 80004430 <vs>
80003a0c:	439c                	lw	a5,0(a5)
80003a0e:	efd9                	bnez	a5,80003aac <link_training+0xa12>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:926 (discriminator 1)
80003a10:	84418793          	addi	a5,gp,-1980 # 800043d4 <pe>
80003a14:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:927 (discriminator 1)
            vsw_pe(0x0,0x0);
80003a16:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:926 (discriminator 1)
        if(vs==0 && pe==0)
80003a18:	cb89                	beqz	a5,80003a2a <link_training+0x990>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:928 (discriminator 1)
        else if (vs==0 && pe==1)
80003a1a:	4705                	li	a4,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:929 (discriminator 1)
            vsw_pe(0x0,0x1);
80003a1c:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:928 (discriminator 1)
        else if (vs==0 && pe==1)
80003a1e:	00e78663          	beq	a5,a4,80003a2a <link_training+0x990>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:930 (discriminator 1)
        else if (vs==0 && pe==2)
80003a22:	4709                	li	a4,2
80003a24:	0ee79363          	bne	a5,a4,80003b0a <link_training+0xa70>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:931
            vsw_pe(0x0,0x2);
80003a28:	4589                	li	a1,2
80003a2a:	4501                	li	a0,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:951
            vsw_pe(0x3,0x3);
80003a2c:	d63fe0ef          	jal	ra,8000278e <vsw_pe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:953
        SourceWrBytes[1]  =  ((reply_pe_0*8)+reply_sw_0);
80003a30:	87818793          	addi	a5,gp,-1928 # 80004408 <reply_pe_0>
80003a34:	439c                	lw	a5,0(a5)
80003a36:	88818713          	addi	a4,gp,-1912 # 80004418 <reply_sw_0>
80003a3a:	4318                	lw	a4,0(a4)
80003a3c:	078e                	slli	a5,a5,0x3
80003a3e:	97ba                	add	a5,a5,a4
80003a40:	90f1a223          	sw	a5,-1788(gp) # 80004494 <SourceWrBytes+0x4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:954
        SourceWrBytes[2]  =  ((reply_pe_1*8)+reply_sw_1);
80003a44:	87c18793          	addi	a5,gp,-1924 # 8000440c <reply_pe_1>
80003a48:	439c                	lw	a5,0(a5)
80003a4a:	88c18713          	addi	a4,gp,-1908 # 8000441c <reply_sw_1>
80003a4e:	4318                	lw	a4,0(a4)
80003a50:	078e                	slli	a5,a5,0x3
80003a52:	b73d                	j	80003980 <link_training+0x8e6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:904
            write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_TRAINING_PATTERN_MODE_OFFSET, 0x00000002);  //TPS2
80003a54:	4609                	li	a2,2
80003a56:	45e1                	li	a1,24
80003a58:	71001537          	lui	a0,0x71001
80003a5c:	d79fd0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:906
            UART_send(&g_uart,(const uint8_t *)"sending tps2\n\r",sizeof("sending tps2\n\r"));
80003a60:	463d                	li	a2,15
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:905
            SourceWrBytes[0] = 0x00000022;
80003a62:	9121a023          	sw	s2,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:906
            UART_send(&g_uart,(const uint8_t *)"sending tps2\n\r",sizeof("sending tps2\n\r"));
80003a66:	00001597          	auipc	a1,0x1
80003a6a:	91258593          	addi	a1,a1,-1774 # 80004378 <local_irq_handler_table+0x108>
80003a6e:	bfad                	j	800039e8 <link_training+0x94e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:910
       else if (reply_data_vs0==0x1)
80003a70:	4705                	li	a4,1
80003a72:	00e79563          	bne	a5,a4,80003a7c <link_training+0x9e2>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:915
           vs = 3;
80003a76:	8af1a023          	sw	a5,-1888(gp) # 80004430 <vs>
80003a7a:	b749                	j	800039fc <link_training+0x962>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:912
       else if (reply_data_vs0==0x2)
80003a7c:	4709                	li	a4,2
80003a7e:	fee78ce3          	beq	a5,a4,80003a76 <link_training+0x9dc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:914
       else if (reply_data_vs0==0x3)
80003a82:	470d                	li	a4,3
80003a84:	f6e79ce3          	bne	a5,a4,800039fc <link_training+0x962>
80003a88:	b7fd                	j	80003a76 <link_training+0x9dc>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:919
       else if (reply_data_pe0==0x4)
80003a8a:	4711                	li	a4,4
80003a8c:	00e79663          	bne	a5,a4,80003a98 <link_training+0x9fe>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:920
           pe = 1;
80003a90:	4785                	li	a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:924
           pe = 3;
80003a92:	84f1a223          	sw	a5,-1980(gp) # 800043d4 <pe>
80003a96:	bf8d                	j	80003a08 <link_training+0x96e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:921
       else if (reply_data_pe0==0x8)
80003a98:	4721                	li	a4,8
80003a9a:	00e79463          	bne	a5,a4,80003aa2 <link_training+0xa08>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:922
           pe = 2;
80003a9e:	4789                	li	a5,2
80003aa0:	bfcd                	j	80003a92 <link_training+0x9f8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:923
       else if (reply_data_pe0==0xc)
80003aa2:	4731                	li	a4,12
80003aa4:	f6e792e3          	bne	a5,a4,80003a08 <link_training+0x96e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:924
           pe = 3;
80003aa8:	478d                	li	a5,3
80003aaa:	b7e5                	j	80003a92 <link_training+0x9f8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:932
        else if (vs==1 && pe==0)
80003aac:	4705                	li	a4,1
80003aae:	02e79063          	bne	a5,a4,80003ace <link_training+0xa34>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:932 (discriminator 1)
80003ab2:	84418713          	addi	a4,gp,-1980 # 800043d4 <pe>
80003ab6:	4318                	lw	a4,0(a4)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:933 (discriminator 1)
            vsw_pe(0x1,0x0);
80003ab8:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:932 (discriminator 1)
        else if (vs==1 && pe==0)
80003aba:	cb01                	beqz	a4,80003aca <link_training+0xa30>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:935 (discriminator 1)
            vsw_pe(0x1,0x1);
80003abc:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:934 (discriminator 1)
        else if (vs==1 && pe==1)
80003abe:	00f70663          	beq	a4,a5,80003aca <link_training+0xa30>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:936 (discriminator 1)
        else if (vs==1 && pe==2)
80003ac2:	4789                	li	a5,2
80003ac4:	04f71363          	bne	a4,a5,80003b0a <link_training+0xa70>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:937
            vsw_pe(0x1,0x2);
80003ac8:	4589                	li	a1,2
80003aca:	4505                	li	a0,1
80003acc:	b785                	j	80003a2c <link_training+0x992>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:938
        else if (vs==2 && pe==0)
80003ace:	4689                	li	a3,2
80003ad0:	00d79f63          	bne	a5,a3,80003aee <link_training+0xa54>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:938 (discriminator 1)
80003ad4:	84418693          	addi	a3,gp,-1980 # 800043d4 <pe>
80003ad8:	4294                	lw	a3,0(a3)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:939 (discriminator 1)
            vsw_pe(0x2,0x0);
80003ada:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:938 (discriminator 1)
        else if (vs==2 && pe==0)
80003adc:	c699                	beqz	a3,80003aea <link_training+0xa50>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:941 (discriminator 1)
            vsw_pe(0x2,0x1);
80003ade:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:940 (discriminator 1)
        else if (vs==2 && pe==1)
80003ae0:	00e68563          	beq	a3,a4,80003aea <link_training+0xa50>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:942 (discriminator 1)
        else if (vs==2 && pe==2)
80003ae4:	02f69363          	bne	a3,a5,80003b0a <link_training+0xa70>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:943
            vsw_pe(0x2,0x2);
80003ae8:	4589                	li	a1,2
80003aea:	4509                	li	a0,2
80003aec:	b781                	j	80003a2c <link_training+0x992>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:944
        else if (vs==3 && pe==0)
80003aee:	460d                	li	a2,3
80003af0:	00c79d63          	bne	a5,a2,80003b0a <link_training+0xa70>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:944 (discriminator 1)
80003af4:	84418793          	addi	a5,gp,-1980 # 800043d4 <pe>
80003af8:	439c                	lw	a5,0(a5)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:945 (discriminator 1)
            vsw_pe(0x3,0x0);
80003afa:	4581                	li	a1,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:944 (discriminator 1)
        else if (vs==3 && pe==0)
80003afc:	cb81                	beqz	a5,80003b0c <link_training+0xa72>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:947 (discriminator 1)
            vsw_pe(0x3,0x1);
80003afe:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:946 (discriminator 1)
        else if (vs==3 && pe==1)
80003b00:	00e78663          	beq	a5,a4,80003b0c <link_training+0xa72>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:949 (discriminator 1)
            vsw_pe(0x3,0x2);
80003b04:	4589                	li	a1,2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:948 (discriminator 1)
        else if (vs==3 && pe==2)
80003b06:	00d78363          	beq	a5,a3,80003b0c <link_training+0xa72>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:951
            vsw_pe(0x3,0x3);
80003b0a:	458d                	li	a1,3
80003b0c:	450d                	li	a0,3
80003b0e:	bf39                	j	80003a2c <link_training+0x992>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:959
    else if(SourceCmdSta == 0x00000029)
80003b10:	02900713          	li	a4,41
80003b14:	00e79563          	bne	a5,a4,80003b1e <link_training+0xa84>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:962
        msdelay(100);
80003b18:	06400513          	li	a0,100
80003b1c:	b1f9                	j	800037ea <link_training+0x750>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:965
    else if(SourceCmdSta == 0x0000002B)
80003b1e:	02b00713          	li	a4,43
80003b22:	ace793e3          	bne	a5,a4,800035e8 <link_training+0x54e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:968
        msdelay(100);
80003b26:	06400513          	li	a0,100
80003b2a:	c8bfd0ef          	jal	ra,800017b4 <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:969
        DPSourceStartVideo(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80003b2e:	479a                	lw	a5,132(sp)
80003b30:	5722                	lw	a4,40(sp)
80003b32:	5692                	lw	a3,36(sp)
80003b34:	c23e                	sw	a5,4(sp)
80003b36:	478a                	lw	a5,128(sp)
80003b38:	5602                	lw	a2,32(sp)
80003b3a:	45f2                	lw	a1,28(sp)
80003b3c:	c03e                	sw	a5,0(sp)
80003b3e:	57b2                	lw	a5,44(sp)
80003b40:	c422                	sw	s0,8(sp)
80003b42:	88da                	mv	a7,s6
80003b44:	8856                	mv	a6,s5
80003b46:	8526                	mv	a0,s1
80003b48:	e43fd0ef          	jal	ra,8000198a <DPSourceStartVideo>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:971
}
80003b4c:	bc71                	j	800035e8 <link_training+0x54e>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:372
            if(i==5)
80003b4e:	4715                	li	a4,5
80003b50:	e0e99f63          	bne	s3,a4,8000316e <link_training+0xd4>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:374
                reply_data_pe1 = reply_data&0xc0;
80003b54:	5772                	lw	a4,60(sp)
80003b56:	0c077693          	andi	a3,a4,192
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:375
                reply_data_vs1 = reply_data&0x30;
80003b5a:	03077593          	andi	a1,a4,48
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:376
                reply_data_pe0 = reply_data&0x0c;
80003b5e:	00c77613          	andi	a2,a4,12
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:377
                reply_data_vs0 = reply_data&0x03;
80003b62:	8b0d                	andi	a4,a4,3
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:374
                reply_data_pe1 = reply_data&0xc0;
80003b64:	84d1ae23          	sw	a3,-1956(gp) # 800043ec <reply_data_pe1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:375
                reply_data_vs1 = reply_data&0x30;
80003b68:	86b1a623          	sw	a1,-1940(gp) # 800043fc <reply_data_vs1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:376
                reply_data_pe0 = reply_data&0x0c;
80003b6c:	84c1ac23          	sw	a2,-1960(gp) # 800043e8 <reply_data_pe0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:377
                reply_data_vs0 = reply_data&0x03;
80003b70:	86e1a423          	sw	a4,-1944(gp) # 800043f8 <reply_data_vs0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:378
                if(reply_data_vs0==0)
80003b74:	f2071363          	bnez	a4,8000329a <link_training+0x200>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:379
                    reply_sw_0 = 0;
80003b78:	8801a423          	sw	zero,-1912(gp) # 80004418 <reply_sw_0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:386
                if(reply_data_vs1==0)
80003b7c:	f2059963          	bnez	a1,800032ae <link_training+0x214>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:387
                    reply_sw_1 = 0;
80003b80:	8801a623          	sw	zero,-1908(gp) # 8000441c <reply_sw_1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:394
                if(reply_data_pe0==0)
80003b84:	f4061963          	bnez	a2,800032d6 <link_training+0x23c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:395
                    reply_pe_0 = 0;
80003b88:	8601ac23          	sw	zero,-1928(gp) # 80004408 <reply_pe_0>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:402
                if(reply_data_pe1==0)
80003b8c:	f6069763          	bnez	a3,800032fa <link_training+0x260>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:517
                    reply_pe_1 = 0;
80003b90:	8601ae23          	sw	zero,-1924(gp) # 8000440c <reply_pe_1>
80003b94:	82dff06f          	j	800033c0 <link_training+0x326>

80003b98 <DPSourceInit>:
DPSourceInit():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:68
{
80003b98:	711d                	addi	sp,sp,-96
80003b9a:	ce86                	sw	ra,92(sp)
80003b9c:	d23e                	sw	a5,36(sp)
80003b9e:	d636                	sw	a3,44(sp)
80003ba0:	d43a                	sw	a4,40(sp)
80003ba2:	d042                	sw	a6,32(sp)
80003ba4:	ce46                	sw	a7,28(sp)
80003ba6:	cca2                	sw	s0,88(sp)
80003ba8:	caa6                	sw	s1,84(sp)
80003baa:	c8ca                	sw	s2,80(sp)
80003bac:	842a                	mv	s0,a0
80003bae:	84ae                	mv	s1,a1
80003bb0:	8932                	mv	s2,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:70
    update_speed(SPEED_MODE);
80003bb2:	f8ffd0ef          	jal	ra,80001b40 <update_speed>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:73
    write_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_HPD_1US_CYCLES_OFFSET, 0x00000064);
80003bb6:	06400613          	li	a2,100
80003bba:	14000593          	li	a1,320
80003bbe:	71001537          	lui	a0,0x71001
80003bc2:	c13fd0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:75
    write_dp(DP_TX_IP_APB_BASE_ADDRESS,DP_TX_HPD_CONNECTED_HIGH_TIME_TH_OFFSET, 0x000186A0);
80003bc6:	6661                	lui	a2,0x18
80003bc8:	6a060613          	addi	a2,a2,1696 # 186a0 <STACK_SIZE+0x17ea0>
80003bcc:	14400593          	li	a1,324
80003bd0:	71001537          	lui	a0,0x71001
80003bd4:	c01fd0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:77
    write_dp(DP_TX_IP_APB_BASE_ADDRESS,DP_TX_HPD_DISCONNECTED_LOW_TIME_TH_OFFSET, 0x000007d0);
80003bd8:	7d000613          	li	a2,2000
80003bdc:	14800593          	li	a1,328
80003be0:	71001537          	lui	a0,0x71001
80003be4:	bf1fd0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:79
    write_dp(DP_TX_IP_APB_BASE_ADDRESS,DP_TX_HPD_IRQ_TIME_OFFSET, 0x03e801f4);
80003be8:	03e80637          	lui	a2,0x3e80
80003bec:	1f460613          	addi	a2,a2,500 # 3e801f4 <STACK_SIZE+0x3e7f9f4>
80003bf0:	14c00593          	li	a1,332
80003bf4:	71001537          	lui	a0,0x71001
80003bf8:	bddfd0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:81
     read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_HPD_CONNECT_STATUS_OFFSET,&rd_data_hpd);
80003bfc:	1870                	addi	a2,sp,60
80003bfe:	15000593          	li	a1,336
80003c02:	71001537          	lui	a0,0x71001
80003c06:	bc7fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:83
     write_dp(DP_TX_IP_APB_BASE_ADDRESS,DP_TX_AUX_REPLY_TIMEOUT_TH_OFFSET, 0x000493e0);
80003c0a:	00049637          	lui	a2,0x49
80003c0e:	3e060613          	addi	a2,a2,992 # 493e0 <STACK_SIZE+0x48be0>
80003c12:	11000593          	li	a1,272
80003c16:	71001537          	lui	a0,0x71001
80003c1a:	bbbfd0ef          	jal	ra,800017d4 <write_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:88
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_INTERRUPT_OFFSET, &rd_data[0]);
80003c1e:	0090                	addi	a2,sp,64
80003c20:	18800593          	li	a1,392
80003c24:	71001537          	lui	a0,0x71001
80003c28:	ba5fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:90
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_RX_ERROR_STATUS_OFFSET, &rd_data[0]);
80003c2c:	0090                	addi	a2,sp,64
80003c2e:	12800593          	li	a1,296
80003c32:	71001537          	lui	a0,0x71001
80003c36:	b97fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:92
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_TX_REQUEST_NUMBER_OFFSET, &rd_data[1]);
80003c3a:	00d0                	addi	a2,sp,68
80003c3c:	11c00593          	li	a1,284
80003c40:	71001537          	lui	a0,0x71001
80003c44:	b89fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:94
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_AUX_RX_REPLY_NUMBER_OFFSET, &rd_data[2]);
80003c48:	00b0                	addi	a2,sp,72
80003c4a:	12000593          	li	a1,288
80003c4e:	71001537          	lui	a0,0x71001
80003c52:	b7bfd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:97
    SourceWrBytes[0] = 0x00000001;
80003c56:	4605                	li	a2,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:98
    DPSourceTxWrCmd(0x00000600,0x00000001,0x00000001); //SET_POWER & SET_DP_PWR_VOLTAGE
80003c58:	4585                	li	a1,1
80003c5a:	60000513          	li	a0,1536
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:97
    SourceWrBytes[0] = 0x00000001;
80003c5e:	90c1a023          	sw	a2,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:98
    DPSourceTxWrCmd(0x00000600,0x00000001,0x00000001); //SET_POWER & SET_DP_PWR_VOLTAGE
80003c62:	b79fd0ef          	jal	ra,800017da <DPSourceTxWrCmd>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:101
    link_training(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80003c66:	5626                	lw	a2,104(sp)
80003c68:	48f2                	lw	a7,28(sp)
80003c6a:	5802                	lw	a6,32(sp)
80003c6c:	c432                	sw	a2,8(sp)
80003c6e:	5616                	lw	a2,100(sp)
80003c70:	5792                	lw	a5,36(sp)
80003c72:	5722                	lw	a4,40(sp)
80003c74:	c232                	sw	a2,4(sp)
80003c76:	5606                	lw	a2,96(sp)
80003c78:	56b2                	lw	a3,44(sp)
80003c7a:	85a6                	mv	a1,s1
80003c7c:	c032                	sw	a2,0(sp)
80003c7e:	8522                	mv	a0,s0
80003c80:	864a                	mv	a2,s2
80003c82:	c18ff0ef          	jal	ra,8000309a <link_training>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:105
}
80003c86:	40f6                	lw	ra,92(sp)
80003c88:	4466                	lw	s0,88(sp)
80003c8a:	44d6                	lw	s1,84(sp)
80003c8c:	4946                	lw	s2,80(sp)
80003c8e:	6125                	addi	sp,sp,96
80003c90:	8082                	ret

80003c92 <config_init>:
config_init():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:112
{
80003c92:	1101                	addi	sp,sp,-32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:113
    SourceCmdSta = 0x0000000;
80003c94:	8201aa23          	sw	zero,-1996(gp) # 800043c4 <SourceCmdSta>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:114
    timestamp = 0;
80003c98:	8801ac23          	sw	zero,-1896(gp) # 80004428 <timestamp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:116
    DPSourceInit(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80003c9c:	5322                	lw	t1,40(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:112
{
80003c9e:	ce06                	sw	ra,28(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:116
    DPSourceInit(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80003ca0:	c41a                	sw	t1,8(sp)
80003ca2:	5312                	lw	t1,36(sp)
80003ca4:	c21a                	sw	t1,4(sp)
80003ca6:	5302                	lw	t1,32(sp)
80003ca8:	c01a                	sw	t1,0(sp)
80003caa:	eefff0ef          	jal	ra,80003b98 <DPSourceInit>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:120
}
80003cae:	40f2                	lw	ra,28(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:118
    SourceWrBytes[0] = 0x00000001;
80003cb0:	4785                	li	a5,1
80003cb2:	90f1a023          	sw	a5,-1792(gp) # 80004490 <SourceWrBytes>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:119
    DPSourceTxWrCmd(0x00000600,0x00000001,0x00000001); //SET_POWER & SET_DP_PWR_VOLTAGE
80003cb6:	4605                	li	a2,1
80003cb8:	4585                	li	a1,1
80003cba:	60000513          	li	a0,1536
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:120
}
80003cbe:	6105                	addi	sp,sp,32
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:119
    DPSourceTxWrCmd(0x00000600,0x00000001,0x00000001); //SET_POWER & SET_DP_PWR_VOLTAGE
80003cc0:	b1bfd06f          	j	800017da <DPSourceTxWrCmd>

80003cc4 <DPSourceISR>:
DPSourceISR():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:126
{
80003cc4:	7115                	addi	sp,sp,-224
80003cc6:	cba6                	sw	s1,212(sp)
80003cc8:	c9ca                	sw	s2,208(sp)
80003cca:	c7ce                	sw	s3,204(sp)
80003ccc:	84aa                	mv	s1,a0
80003cce:	892e                	mv	s2,a1
80003cd0:	89b2                	mv	s3,a2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:151
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_INTERRUPT_OFFSET, &irq_value);
80003cd2:	18800593          	li	a1,392
80003cd6:	94018613          	addi	a2,gp,-1728 # 800044d0 <irq_value>
80003cda:	71001537          	lui	a0,0x71001
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:126
{
80003cde:	cda2                	sw	s0,216(sp)
80003ce0:	c5d2                	sw	s4,200(sp)
80003ce2:	c3d6                	sw	s5,196(sp)
80003ce4:	c1da                	sw	s6,192(sp)
80003ce6:	df5e                	sw	s7,188(sp)
80003ce8:	dd62                	sw	s8,184(sp)
80003cea:	db66                	sw	s9,180(sp)
80003cec:	d96a                	sw	s10,176(sp)
80003cee:	d76e                	sw	s11,172(sp)
80003cf0:	8b3e                	mv	s6,a5
80003cf2:	cf86                	sw	ra,220(sp)
80003cf4:	8a36                	mv	s4,a3
80003cf6:	8aba                	mv	s5,a4
80003cf8:	8bc2                	mv	s7,a6
80003cfa:	8c46                	mv	s8,a7
80003cfc:	5c8e                	lw	s9,224(sp)
80003cfe:	5d1e                	lw	s10,228(sp)
80003d00:	5dae                	lw	s11,232(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:153
    if(irq_value == 0x00000000)
80003d02:	94018413          	addi	s0,gp,-1728 # 800044d0 <irq_value>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:151
    read_dp(DP_TX_IP_APB_BASE_ADDRESS, DP_TX_INTERRUPT_OFFSET, &irq_value);
80003d06:	ac7fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:153
    if(irq_value == 0x00000000)
80003d0a:	401c                	lw	a5,0(s0)
80003d0c:	20078563          	beqz	a5,80003f16 <DPSourceISR+0x252>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:156
    if( (irq_value&0x00000002) > 0x00000000)
80003d10:	8b89                	andi	a5,a5,2
80003d12:	cf91                	beqz	a5,80003d2e <DPSourceISR+0x6a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:158
        link_training(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80003d14:	c46e                	sw	s11,8(sp)
80003d16:	c26a                	sw	s10,4(sp)
80003d18:	c066                	sw	s9,0(sp)
80003d1a:	88e2                	mv	a7,s8
80003d1c:	885e                	mv	a6,s7
80003d1e:	87da                	mv	a5,s6
80003d20:	8756                	mv	a4,s5
80003d22:	86d2                	mv	a3,s4
80003d24:	864e                	mv	a2,s3
80003d26:	85ca                	mv	a1,s2
80003d28:	8526                	mv	a0,s1
80003d2a:	b70ff0ef          	jal	ra,8000309a <link_training>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:163
    if( (irq_value&0x00000008) > 0x00000000)
80003d2e:	401c                	lw	a5,0(s0)
80003d30:	8ba1                	andi	a5,a5,8
80003d32:	cf9d                	beqz	a5,80003d70 <DPSourceISR+0xac>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:165
        uint8_t testmsg1[] = {"\n * DisplayPort Source Got HPD IRQ : \n"};
80003d34:	02700613          	li	a2,39
80003d38:	00000597          	auipc	a1,0x0
80003d3c:	57858593          	addi	a1,a1,1400 # 800042b0 <local_irq_handler_table+0x40>
80003d40:	10e8                	addi	a0,sp,108
80003d42:	2309                	jal	80004244 <memcpy>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:166
        UART_send(&g_uart,(const uint8_t *)&testmsg1,sizeof(testmsg1));
80003d44:	02700613          	li	a2,39
80003d48:	10ec                	addi	a1,sp,108
80003d4a:	95818513          	addi	a0,gp,-1704 # 800044e8 <g_uart>
80003d4e:	c1dfc0ef          	jal	ra,8000096a <UART_send>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:167
        SourceCmdSta = 0x0000000;
80003d52:	8201aa23          	sw	zero,-1996(gp) # 800043c4 <SourceCmdSta>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:168
        config_init(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80003d56:	c46e                	sw	s11,8(sp)
80003d58:	c26a                	sw	s10,4(sp)
80003d5a:	c066                	sw	s9,0(sp)
80003d5c:	88e2                	mv	a7,s8
80003d5e:	885e                	mv	a6,s7
80003d60:	87da                	mv	a5,s6
80003d62:	8756                	mv	a4,s5
80003d64:	86d2                	mv	a3,s4
80003d66:	864e                	mv	a2,s3
80003d68:	85ca                	mv	a1,s2
80003d6a:	8526                	mv	a0,s1
80003d6c:	f27ff0ef          	jal	ra,80003c92 <config_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:170
    if( (irq_value&0x00000010) > 0x00000000)
80003d70:	401c                	lw	a5,0(s0)
80003d72:	8bc1                	andi	a5,a5,16
80003d74:	c3b9                	beqz	a5,80003dba <DPSourceISR+0xf6>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:172
        uint8_t testmsg1[] = {"\n * DisplayPort Source Got HPD Connection : \n"};
80003d76:	02e00613          	li	a2,46
80003d7a:	00000597          	auipc	a1,0x0
80003d7e:	55e58593          	addi	a1,a1,1374 # 800042d8 <local_irq_handler_table+0x68>
80003d82:	10e8                	addi	a0,sp,108
80003d84:	21c1                	jal	80004244 <memcpy>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:173
        UART_send(&g_uart,(const uint8_t *)&testmsg1,sizeof(testmsg1));
80003d86:	02e00613          	li	a2,46
80003d8a:	10ec                	addi	a1,sp,108
80003d8c:	95818513          	addi	a0,gp,-1704 # 800044e8 <g_uart>
80003d90:	bdbfc0ef          	jal	ra,8000096a <UART_send>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:174
        SourceCmdSta = 0x0000000;
80003d94:	8201aa23          	sw	zero,-1996(gp) # 800043c4 <SourceCmdSta>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:175
        config_init(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80003d98:	87da                	mv	a5,s6
80003d9a:	c46e                	sw	s11,8(sp)
80003d9c:	c26a                	sw	s10,4(sp)
80003d9e:	c066                	sw	s9,0(sp)
80003da0:	88e2                	mv	a7,s8
80003da2:	885e                	mv	a6,s7
80003da4:	8756                	mv	a4,s5
80003da6:	86d2                	mv	a3,s4
80003da8:	864e                	mv	a2,s3
80003daa:	85ca                	mv	a1,s2
80003dac:	8526                	mv	a0,s1
80003dae:	ee5ff0ef          	jal	ra,80003c92 <config_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:176
        iter=0;
80003db2:	00000797          	auipc	a5,0x0
80003db6:	5c07af23          	sw	zero,1502(a5) # 80004390 <__sdata_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:178
    if( (irq_value&0x00000020) > 0x00000000)
80003dba:	401c                	lw	a5,0(s0)
80003dbc:	0207f793          	andi	a5,a5,32
80003dc0:	c785                	beqz	a5,80003de8 <DPSourceISR+0x124>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:180
        uint8_t testmsg1[] = {"\n * DisplayPort Source Got HPD Disconnection : \n"};
80003dc2:	03100613          	li	a2,49
80003dc6:	00000597          	auipc	a1,0x0
80003dca:	54258593          	addi	a1,a1,1346 # 80004308 <local_irq_handler_table+0x98>
80003dce:	10e8                	addi	a0,sp,108
80003dd0:	2995                	jal	80004244 <memcpy>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:181
        UART_send(&g_uart,(const uint8_t *)&testmsg1,sizeof(testmsg1));
80003dd2:	03100613          	li	a2,49
80003dd6:	10ec                	addi	a1,sp,108
80003dd8:	95818513          	addi	a0,gp,-1704 # 800044e8 <g_uart>
80003ddc:	b8ffc0ef          	jal	ra,8000096a <UART_send>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:182
        iter=0;
80003de0:	00000797          	auipc	a5,0x0
80003de4:	5a07a823          	sw	zero,1456(a5) # 80004390 <__sdata_load>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:186 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_RSTPD, &SER_1_PMA_L0_DES_RSTPD_R);
80003de8:	01081437          	lui	s0,0x1081
80003dec:	0870                	addi	a2,sp,28
80003dee:	04c40593          	addi	a1,s0,76 # 108104c <STACK_SIZE+0x108084c>
80003df2:	60000537          	lui	a0,0x60000
80003df6:	9d7fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:187 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_RSTPD, &SER_1_PMA_L0_SER_RSTPD_R);
80003dfa:	1010                	addi	a2,sp,32
80003dfc:	07840593          	addi	a1,s0,120
80003e00:	60000537          	lui	a0,0x60000
80003e04:	9c9fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:188 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_CDR_CTRL_2, &SER_1_PMA_L0_DES_CDR_CTRL_2_R);
80003e08:	1050                	addi	a2,sp,36
80003e0a:	00840593          	addi	a1,s0,8
80003e0e:	60000537          	lui	a0,0x60000
80003e12:	9bbfd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:189 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_CDR_CTRL_3, &SER_1_PMA_L0_DES_CDR_CTRL_3_R);
80003e16:	1030                	addi	a2,sp,40
80003e18:	00c40593          	addi	a1,s0,12
80003e1c:	60000537          	lui	a0,0x60000
80003e20:	9adfd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:190 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFEEM_CTRL_1, &SER_1_PMA_L0_DES_DFEEM_CTRL_1_R);
80003e24:	1070                	addi	a2,sp,44
80003e26:	01040593          	addi	a1,s0,16
80003e2a:	60000537          	lui	a0,0x60000
80003e2e:	99ffd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:191 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFEEM_CTRL_2, &SER_1_PMA_L0_DES_DFEEM_CTRL_2_R);
80003e32:	1810                	addi	a2,sp,48
80003e34:	01440593          	addi	a1,s0,20
80003e38:	60000537          	lui	a0,0x60000
80003e3c:	991fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:192 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFEEM_CTRL_3, &SER_1_PMA_L0_DES_DFEEM_CTRL_3_R);
80003e40:	1850                	addi	a2,sp,52
80003e42:	01840593          	addi	a1,s0,24
80003e46:	60000537          	lui	a0,0x60000
80003e4a:	983fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:193 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFE_CTRL_2, &SER_1_PMA_L0_DES_DFE_CTRL_2_R);
80003e4e:	1830                	addi	a2,sp,56
80003e50:	02440593          	addi	a1,s0,36
80003e54:	60000537          	lui	a0,0x60000
80003e58:	975fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:194 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_EM_CTRL_2, &SER_1_PMA_L0_DES_EM_CTRL_2_R);
80003e5c:	1870                	addi	a2,sp,60
80003e5e:	02c40593          	addi	a1,s0,44
80003e62:	60000537          	lui	a0,0x60000
80003e66:	967fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:195 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_RXPLL_DIV, &SER_1_PMA_L0_DES_RXPLL_DIV_R);
80003e6a:	0090                	addi	a2,sp,64
80003e6c:	04040593          	addi	a1,s0,64
80003e70:	60000537          	lui	a0,0x60000
80003e74:	959fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:196 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_CLK_CTRL, &SER_1_PMA_L0_SER_CLK_CTRL_R);
80003e78:	00d0                	addi	a2,sp,68
80003e7a:	07440593          	addi	a1,s0,116
80003e7e:	60000537          	lui	a0,0x60000
80003e82:	94bfd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:197 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SERDES_RTL_CTRL, &SER_1_PMA_L0_SERDES_RTL_CTRL_R);
80003e86:	00b0                	addi	a2,sp,72
80003e88:	0c040593          	addi	a1,s0,192
80003e8c:	60000537          	lui	a0,0x60000
80003e90:	93dfd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:198 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFE_CAL_CTRL_0, &SER_1_PMA_L0_DES_DFE_CAL_CTRL_0_R);
80003e94:	00f0                	addi	a2,sp,76
80003e96:	0d040593          	addi	a1,s0,208
80003e9a:	60000537          	lui	a0,0x60000
80003e9e:	92ffd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:199 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFE_CAL_CTRL_1, &SER_1_PMA_L0_DES_DFE_CAL_CTRL_1_R);
80003ea2:	0890                	addi	a2,sp,80
80003ea4:	0d440593          	addi	a1,s0,212
80003ea8:	60000537          	lui	a0,0x60000
80003eac:	921fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:200 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFE_CAL_CTRL_2, &SER_1_PMA_L0_DES_DFE_CAL_CTRL_2_R);
80003eb0:	08d0                	addi	a2,sp,84
80003eb2:	0d840593          	addi	a1,s0,216
80003eb6:	60000537          	lui	a0,0x60000
80003eba:	913fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:201 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_DES_DFE_CAL_CMD, &SER_1_PMA_L0_DES_DFE_CAL_CMD_R);
80003ebe:	08b0                	addi	a2,sp,88
80003ec0:	0dc40593          	addi	a1,s0,220
80003ec4:	60000537          	lui	a0,0x60000
80003ec8:	905fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:202 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_TXPLL_DIV_1, &TXPLL_DIV_1);
80003ecc:	010904b7          	lui	s1,0x1090
80003ed0:	08f0                	addi	a2,sp,92
80003ed2:	01048593          	addi	a1,s1,16 # 1090010 <STACK_SIZE+0x108f810>
80003ed6:	60000537          	lui	a0,0x60000
80003eda:	8f3fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:203 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_TXPLL_DIV_2, &TXPLL_DIV_2);
80003ede:	1090                	addi	a2,sp,96
80003ee0:	01448593          	addi	a1,s1,20
80003ee4:	60000537          	lui	a0,0x60000
80003ee8:	8e5fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:205 (discriminator 1)
    read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_DRV_DATA_CTRL, &SER_1_PMA_L0_SER_DRV_DATA_CTRL_R);
80003eec:	10d0                	addi	a2,sp,100
80003eee:	09840593          	addi	a1,s0,152
80003ef2:	60000537          	lui	a0,0x60000
80003ef6:	8d7fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:206 (discriminator 1)
   read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_DRV_CTRL, &SER_1_PMA_L0_SER_DRV_CTRL_R);
80003efa:	10b0                	addi	a2,sp,104
80003efc:	09c40593          	addi	a1,s0,156
80003f00:	60000537          	lui	a0,0x60000
80003f04:	8c9fd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:207 (discriminator 1)
   read_dp(DP_DRI_APB_BASE_ADDRESS, SER_1_PMA_L0_SER_DRV_CTRL_SEL, &SER_1_PMA_L0_SER_DRV_CTRL_SEL_R);
80003f08:	10f0                	addi	a2,sp,108
80003f0a:	0a040593          	addi	a1,s0,160
80003f0e:	60000537          	lui	a0,0x60000
80003f12:	8bbfd0ef          	jal	ra,800017cc <read_dp>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/dp_cmd_tx.c:208
}
80003f16:	40fe                	lw	ra,220(sp)
80003f18:	446e                	lw	s0,216(sp)
80003f1a:	44de                	lw	s1,212(sp)
80003f1c:	494e                	lw	s2,208(sp)
80003f1e:	49be                	lw	s3,204(sp)
80003f20:	4a2e                	lw	s4,200(sp)
80003f22:	4a9e                	lw	s5,196(sp)
80003f24:	4b0e                	lw	s6,192(sp)
80003f26:	5bfa                	lw	s7,188(sp)
80003f28:	5c6a                	lw	s8,184(sp)
80003f2a:	5cda                	lw	s9,180(sp)
80003f2c:	5d4a                	lw	s10,176(sp)
80003f2e:	5dba                	lw	s11,172(sp)
80003f30:	612d                	addi	sp,sp,224
80003f32:	8082                	ret

80003f34 <SysTick_Handler>:
SysTick_Handler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:111
/*-----------------------------------------------------------------------------
 * System Tick interrupt handler
 */
void SysTick_Handler(void) {

    g_state = (~g_state) & 0x01;
80003f34:	81418793          	addi	a5,gp,-2028 # 800043a4 <g_state>
80003f38:	439c                	lw	a5,0(a5)
80003f3a:	fff7c793          	not	a5,a5
80003f3e:	8b85                	andi	a5,a5,1
80003f40:	80f1aa23          	sw	a5,-2028(gp) # 800043a4 <g_state>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:113

    if(timerdone == 1)
80003f44:	8b018793          	addi	a5,gp,-1872 # 80004440 <timerdone>
80003f48:	4398                	lw	a4,0(a5)
80003f4a:	4785                	li	a5,1
80003f4c:	02f71063          	bne	a4,a5,80003f6c <SysTick_Handler+0x38>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:115
    {
        g_10ms_count1 += 1;
80003f50:	97018713          	addi	a4,gp,-1680 # 80004500 <g_10ms_count1>
80003f54:	431c                	lw	a5,0(a4)
80003f56:	0785                	addi	a5,a5,1
80003f58:	96f1a823          	sw	a5,-1680(gp) # 80004500 <g_10ms_count1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:116
        if(g_ms_count <= g_10ms_count1)
80003f5c:	96018793          	addi	a5,gp,-1696 # 800044f0 <g_ms_count>
80003f60:	4394                	lw	a3,0(a5)
80003f62:	431c                	lw	a5,0(a4)
80003f64:	00d7e463          	bltu	a5,a3,80003f6c <SysTick_Handler+0x38>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:117
            timerdone = 0;
80003f68:	8a01a823          	sw	zero,-1872(gp) # 80004440 <timerdone>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:120
    }

    if(rx_tmr_done == 1)
80003f6c:	8a818793          	addi	a5,gp,-1880 # 80004438 <rx_tmr_done>
80003f70:	4398                	lw	a4,0(a5)
80003f72:	4785                	li	a5,1
80003f74:	02f71263          	bne	a4,a5,80003f98 <SysTick_Handler+0x64>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:122
    {
        rx_ms_count1 += 1;
80003f78:	95418693          	addi	a3,gp,-1708 # 800044e4 <rx_ms_count1>
80003f7c:	429c                	lw	a5,0(a3)
80003f7e:	0785                	addi	a5,a5,1
80003f80:	94f1aa23          	sw	a5,-1708(gp) # 800044e4 <rx_ms_count1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:123
        if(rx_ms_count1 >= rx_ms_count){
80003f84:	96418793          	addi	a5,gp,-1692 # 800044f4 <rx_ms_count>
80003f88:	4294                	lw	a3,0(a3)
80003f8a:	439c                	lw	a5,0(a5)
80003f8c:	00f6e663          	bltu	a3,a5,80003f98 <SysTick_Handler+0x64>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:124
            rx_tmr_done = 0;
80003f90:	8a01a423          	sw	zero,-1880(gp) # 80004438 <rx_tmr_done>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:125
            process_data = 1;
80003f94:	8ae1a223          	sw	a4,-1884(gp) # 80004434 <process_data>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:128
        }
    }
}
80003f98:	8082                	ret

80003f9a <MSYS_EI0_IRQHandler>:
MSYS_EI0_IRQHandler():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:131

uint8_t  MSYS_EI0_IRQHandler(void)
{
80003f9a:	1141                	addi	sp,sp,-16
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:132
    I2C_isr(&g_i2c_instance_cam1);
80003f9c:	97418513          	addi	a0,gp,-1676 # 80004504 <g_i2c_instance_cam1>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:131
{
80003fa0:	c606                	sw	ra,12(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:132
    I2C_isr(&g_i2c_instance_cam1);
80003fa2:	b6ffc0ef          	jal	ra,80000b10 <I2C_isr>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:134
    return (EXT_IRQ_KEEP_ENABLED);
}
80003fa6:	40b2                	lw	ra,12(sp)
80003fa8:	4501                	li	a0,0
80003faa:	0141                	addi	sp,sp,16
80003fac:	8082                	ret

80003fae <main>:
main():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:141
/*-----------------------------------------------------------------------------
 * main
 */
uint32_t a;

int main(int argc, char **argv) {
80003fae:	7139                	addi	sp,sp,-64
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:187

        //bayer = 0x00;
        Enable = 0x01;
        Disable = 0x00;

        axi4litewrite(BAYER_ADDR,BAYER_OFFSET_VALUE);
80003fb0:	4581                	li	a1,0
80003fb2:	72020537          	lui	a0,0x72020
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:141
int main(int argc, char **argv) {
80003fb6:	de06                	sw	ra,60(sp)
80003fb8:	dc22                	sw	s0,56(sp)
80003fba:	da26                	sw	s1,52(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:189

        axi4litewrite(DC_IP_EN_DIS,Disable); // diabling the IP
80003fbc:	72040437          	lui	s0,0x72040
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:141
int main(int argc, char **argv) {
80003fc0:	d84a                	sw	s2,48(sp)
80003fc2:	d64e                	sw	s3,44(sp)
80003fc4:	d452                	sw	s4,40(sp)
80003fc6:	d256                	sw	s5,36(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:144
    counter = 0;
80003fc8:	ce02                	sw	zero,28(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:187
        axi4litewrite(BAYER_ADDR,BAYER_OFFSET_VALUE);
80003fca:	95afd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:189
        axi4litewrite(DC_IP_EN_DIS,Disable); // diabling the IP
80003fce:	00440513          	addi	a0,s0,4 # 72040004 <STACK_SIZE+0x7203f804>
80003fd2:	4581                	li	a1,0
80003fd4:	950fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:191

        axi4litewrite(DC_IP_HRES,HRES/PIXEL_MODE);
80003fd8:	00840513          	addi	a0,s0,8
80003fdc:	3c000593          	li	a1,960
80003fe0:	944fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:192
        axi4litewrite(DC_IP_VRES,VRES);
80003fe4:	6905                	lui	s2,0x1
80003fe6:	87090593          	addi	a1,s2,-1936 # 870 <STACK_SIZE+0x70>
80003fea:	00c40513          	addi	a0,s0,12
80003fee:	936fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:193
        axi4litewrite(DC_IP_HFP,HFP/PIXEL_MODE);
80003ff2:	01040513          	addi	a0,s0,16
80003ff6:	45cd                	li	a1,19
80003ff8:	92cfd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:194
        axi4litewrite(DC_IP_HBP,HBP/PIXEL_MODE);
80003ffc:	01440513          	addi	a0,s0,20
80004000:	45cd                	li	a1,19
80004002:	922fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:195
        axi4litewrite(DC_IP_VFP,VFP);
80004006:	01840513          	addi	a0,s0,24
8000400a:	03600593          	li	a1,54
8000400e:	916fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:196
        axi4litewrite(DC_IP_VBP,VBP);
80004012:	01c40513          	addi	a0,s0,28
80004016:	458d                	li	a1,3
80004018:	90cfd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:197
        axi4litewrite(DC_IP_HSW,HSW/PIXEL_MODE);
8000401c:	02040513          	addi	a0,s0,32
80004020:	4589                	li	a1,2
80004022:	902fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:198
        axi4litewrite(DC_IP_VSW,VSW);
80004026:	02440513          	addi	a0,s0,36
8000402a:	4595                	li	a1,5
8000402c:	8f8fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:200

        axi4litewrite(DC_IP_EN_DIS,Enable); // Enabling the IP
80004030:	00440513          	addi	a0,s0,4
80004034:	4585                	li	a1,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:203


        axi4litewrite(IE_IP_EN_DIS,Disable); // diabling the IP
80004036:	720304b7          	lui	s1,0x72030
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:200
        axi4litewrite(DC_IP_EN_DIS,Enable); // Enabling the IP
8000403a:	8eafd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:203
        axi4litewrite(IE_IP_EN_DIS,Disable); // diabling the IP
8000403e:	00448513          	addi	a0,s1,4 # 72030004 <STACK_SIZE+0x7202f804>
80004042:	4581                	li	a1,0
80004044:	8e0fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:205

        axi4litewrite(IE_R_CONST,R_constant);
80004048:	81018793          	addi	a5,gp,-2032 # 800043a0 <R_constant>
8000404c:	438c                	lw	a1,0(a5)
8000404e:	00848513          	addi	a0,s1,8
80004052:	8d2fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:206
        axi4litewrite(IE_G_CONST,G_constant);
80004056:	00000797          	auipc	a5,0x0
8000405a:	34678793          	addi	a5,a5,838 # 8000439c <G_constant>
8000405e:	438c                	lw	a1,0(a5)
80004060:	00c48513          	addi	a0,s1,12
80004064:	8c0fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:207
        axi4litewrite(IE_B_CONST,B_constant);
80004068:	00000797          	auipc	a5,0x0
8000406c:	33078793          	addi	a5,a5,816 # 80004398 <B_constant>
80004070:	438c                	lw	a1,0(a5)
80004072:	01048513          	addi	a0,s1,16
80004076:	8aefd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:208
        axi4litewrite(IE_COMMON_CONST,second_constant);
8000407a:	8ac18793          	addi	a5,gp,-1876 # 8000443c <second_constant>
8000407e:	438c                	lw	a1,0(a5)
80004080:	01448513          	addi	a0,s1,20
80004084:	8a0fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:211


        axi4litewrite(IE_IP_EN_DIS,Enable); // Enabling the IP
80004088:	00448513          	addi	a0,s1,4
8000408c:	4585                	li	a1,1
8000408e:	896fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:217



        //Displaycontroller(HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,PIXEL_MODE/*,BAYER_OFFSET_VALUE*/);

        axi4litewrite(DC_IP_HRES,HRES/PIXEL_MODE);
80004092:	00840513          	addi	a0,s0,8
80004096:	3c000593          	li	a1,960
8000409a:	88afd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:218
        axi4litewrite(DC_IP_HRES,HRES/PIXEL_MODE);
8000409e:	00840513          	addi	a0,s0,8
800040a2:	3c000593          	li	a1,960
800040a6:	87efd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:219
        axi4litewrite(DC_IP_HRES,HRES/PIXEL_MODE);
800040aa:	00840513          	addi	a0,s0,8
800040ae:	3c000593          	li	a1,960
800040b2:	872fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:220
        axi4litewrite(DC_IP_HRES,HRES/PIXEL_MODE);
800040b6:	00840513          	addi	a0,s0,8
800040ba:	3c000593          	li	a1,960
800040be:	866fd0ef          	jal	ra,80001124 <axi4litewrite>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:225


        uint32_t div = (HRES*VRES*2);

    GPIO_init(&g_gpio_out, COREGPIO_OUT_BASE_ADDR, GPIO_APB_32_BITS_BUS);
800040c2:	4609                	li	a2,2
800040c4:	710045b7          	lui	a1,0x71004
800040c8:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
800040cc:	e95fc0ef          	jal	ra,80000f60 <GPIO_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:226
    GPIO_set_output(&g_gpio_out, LED1, 1);
800040d0:	4605                	li	a2,1
800040d2:	4581                	li	a1,0
800040d4:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
800040d8:	f49fc0ef          	jal	ra,80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:228

    MRV_systick_config(SYS_CLK_FREQ / 1000);
800040dc:	6531                	lui	a0,0xc
800040de:	4581                	li	a1,0
800040e0:	35050513          	addi	a0,a0,848 # c350 <STACK_SIZE+0xbb50>
800040e4:	da2fc0ef          	jal	ra,80000686 <MRV_systick_config>
MRV_enable_local_irq():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\src\platform/miv_rv32_hal/miv_rv32_hal.h:620
    set_csr(mie, mask);
800040e8:	010007b7          	lui	a5,0x1000
800040ec:	3047a7f3          	csrrs	a5,mie,a5
main():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:232

    MRV_enable_local_irq(MRV32_MSYS_EIE0_IRQn);

    HAL_enable_interrupts();
800040f0:	f4afc0ef          	jal	ra,8000083a <HAL_enable_interrupts>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:234

    GPIO_set_output(&g_gpio_out, MIPI_TRNG_RST, 0u);
800040f4:	4601                	li	a2,0
800040f6:	4591                	li	a1,4
800040f8:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
800040fc:	f25fc0ef          	jal	ra,80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:235
    GPIO_set_output(&g_gpio_out, LED2, 1);
80004100:	4605                	li	a2,1
80004102:	4585                	li	a1,1
80004104:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
80004108:	f19fc0ef          	jal	ra,80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:238

    //Camera Initialization
    GPIO_set_output(&g_gpio_out, CAM1_RST, 1u);
8000410c:	4605                	li	a2,1
8000410e:	45a1                	li	a1,8
80004110:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
80004114:	f0dfc0ef          	jal	ra,80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:239
    GPIO_set_output(&g_gpio_out, CAM_CLK_EN, 0u);
80004118:	4601                	li	a2,0
8000411a:	45a5                	li	a1,9
8000411c:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
80004120:	f01fc0ef          	jal	ra,80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:240
    imx334_cam_init();
80004124:	886fd0ef          	jal	ra,800011aa <imx334_cam_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:241
    imx334_cam_reginit(1u);
80004128:	4505                	li	a0,1
8000412a:	8cefd0ef          	jal	ra,800011f8 <imx334_cam_reginit>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:244

    //Setting LED
    GPIO_set_output(&g_gpio_out, LED3, 1);
8000412e:	4605                	li	a2,1
80004130:	4589                	li	a1,2
80004132:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
80004136:	eebfc0ef          	jal	ra,80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:245
    msdelay(1000);
8000413a:	3e800513          	li	a0,1000
8000413e:	e76fd0ef          	jal	ra,800017b4 <msdelay>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:247
//    delay_msec(100);
    GPIO_set_output(&g_gpio_out, MIPI_TRNG_RST, 1u);
80004142:	4605                	li	a2,1
80004144:	4591                	li	a1,4
80004146:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
8000414a:	ed7fc0ef          	jal	ra,80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:248
    GPIO_set_output(&g_gpio_out, LED4, 1);
8000414e:	4605                	li	a2,1
80004150:	458d                	li	a1,3
80004152:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
80004156:	ecbfc0ef          	jal	ra,80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:251

    // =========================== DisplayPort ================================
    UART_init(&g_uart, COREUARTAPB0_BASE_ADDR, BAUD_VALUE_115200, (DATA_8_BITS | NO_PARITY));
8000415a:	4685                	li	a3,1
8000415c:	4669                	li	a2,26
8000415e:	710005b7          	lui	a1,0x71000
80004162:	95818513          	addi	a0,gp,-1704 # 800044e8 <g_uart>
80004166:	f9afc0ef          	jal	ra,80000900 <UART_init>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:252
    DPSourceInit(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
8000416a:	4791                	li	a5,4
8000416c:	c43e                	sw	a5,8(sp)
8000416e:	67a1                	lui	a5,0x8
80004170:	c23e                	sw	a5,4(sp)
80004172:	4795                	li	a5,5
80004174:	c03e                	sw	a5,0(sp)
80004176:	87090613          	addi	a2,s2,-1936
8000417a:	f0090593          	addi	a1,s2,-256
8000417e:	48a1                	li	a7,8
80004180:	480d                	li	a6,3
80004182:	03600793          	li	a5,54
80004186:	04c00713          	li	a4,76
8000418a:	04c00693          	li	a3,76
8000418e:	4509                	li	a0,2
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:262
    {
        // ====================================================================
        // ===================== DisplayPort ==================================
        // ====================================================================
        // Check if there is Sink Interrupt
        DPSourceISR(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80004190:	87090a13          	addi	s4,s2,-1936
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:252
    DPSourceInit(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80004194:	a05ff0ef          	jal	ra,80003b98 <DPSourceInit>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:262
        DPSourceISR(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
80004198:	4411                	li	s0,4
8000419a:	69a1                	lui	s3,0x8
8000419c:	f0090913          	addi	s2,s2,-256
gain_cal():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:309
            if(total_average > (good_average + hysteresis))
                step = -1;
            else
                step = 0;

        in_gain = in_gain + step;
800041a0:	81818a93          	addi	s5,gp,-2024 # 800043a8 <in_gain>
main():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:262
        DPSourceISR(SPEED_MODE,HRES,VRES,HFP,HBP,VFP,VBP,HSW,VSW,VSP,LANE_NO);
800041a4:	4495                	li	s1,5
800041a6:	03600793          	li	a5,54
800041aa:	04c00713          	li	a4,76
800041ae:	04c00693          	li	a3,76
800041b2:	48a1                	li	a7,8
800041b4:	480d                	li	a6,3
800041b6:	8652                	mv	a2,s4
800041b8:	85ca                	mv	a1,s2
800041ba:	4509                	li	a0,2
800041bc:	c422                	sw	s0,8(sp)
800041be:	c24e                	sw	s3,4(sp)
800041c0:	c026                	sw	s1,0(sp)
800041c2:	b03ff0ef          	jal	ra,80003cc4 <DPSourceISR>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:263
        msdelay(30);
800041c6:	4579                	li	a0,30
800041c8:	decfd0ef          	jal	ra,800017b4 <msdelay>
auto_brightness():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:289
    uint32_t total_sum =  (uint32_t)(*(volatile int*) IE_INTENSITY_AVARAGE);
800041cc:	720307b7          	lui	a5,0x72030
800041d0:	4f98                	lw	a4,24(a5)
gain_cal():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:301
        if(total_average < (good_average - hysteresis))
800041d2:	5eec06b7          	lui	a3,0x5eec0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:302
            step = 1;
800041d6:	4785                	li	a5,1
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:301
        if(total_average < (good_average - hysteresis))
800041d8:	00d76963          	bltu	a4,a3,800041ea <main+0x23c>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:304
            if(total_average > (good_average + hysteresis))
800041dc:	67d227b7          	lui	a5,0x67d22
800041e0:	00f737b3          	sltu	a5,a4,a5
800041e4:	17fd                	addi	a5,a5,-1
800041e6:	07c2                	slli	a5,a5,0x10
800041e8:	87c1                	srai	a5,a5,0x10
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:309
        in_gain = in_gain + step;
800041ea:	000ad703          	lhu	a4,0(s5)
800041ee:	97ba                	add	a5,a5,a4
800041f0:	07c2                	slli	a5,a5,0x10
800041f2:	83c1                	srli	a5,a5,0x10
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:311

        if(in_gain < 5)
800041f4:	02f46e63          	bltu	s0,a5,80004230 <main+0x282>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:312
            in_gain = 5;
800041f8:	80919c23          	sh	s1,-2024(gp) # 800043a8 <in_gain>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:317
        else
            if(in_gain >= 100)
                in_gain = 100;
    ///////////////////////////////////////////////////////////
    gain_setting(1u,in_gain);
800041fc:	8181d583          	lhu	a1,-2024(gp) # 800043a8 <in_gain>
80004200:	4505                	li	a0,1
80004202:	d8efd0ef          	jal	ra,80001790 <gain_setting>
main():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:267
        counter = counter +1;
80004206:	47f2                	lw	a5,28(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:269
            GPIO_set_output(&g_gpio_out, LED1, 0);
80004208:	4601                	li	a2,0
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:267
        counter = counter +1;
8000420a:	0785                	addi	a5,a5,1
8000420c:	ce3e                	sw	a5,28(sp)
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:268
        if (counter <16){
8000420e:	4772                	lw	a4,28(sp)
80004210:	47bd                	li	a5,15
80004212:	00e7f363          	bgeu	a5,a4,80004218 <main+0x26a>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:272
            GPIO_set_output(&g_gpio_out, LED1, 1);
80004216:	4605                	li	a2,1
80004218:	4581                	li	a1,0
8000421a:	94c18513          	addi	a0,gp,-1716 # 800044dc <g_gpio_out>
8000421e:	e03fc0ef          	jal	ra,80001020 <GPIO_set_output>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:274
        if (counter ==32){
80004222:	4772                	lw	a4,28(sp)
80004224:	02000793          	li	a5,32
80004228:	f6f71fe3          	bne	a4,a5,800041a6 <main+0x1f8>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:275
            counter =0;
8000422c:	ce02                	sw	zero,28(sp)
8000422e:	bf9d                	j	800041a4 <main+0x1f6>
gain_cal():
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:314
            if(in_gain >= 100)
80004230:	06300713          	li	a4,99
80004234:	00f76563          	bltu	a4,a5,8000423e <main+0x290>
C:\Work_Folder_Akhil\Q4_2024_2025\Display_Port_TX_web_release\Final\NEW_MIV\softconsole2022p2\miv-rv32-dp-tx\miv-rv32-imc-release/../src/application/main.c:315
                in_gain = 100;
80004238:	80f19c23          	sh	a5,-2024(gp) # 800043a8 <in_gain>
8000423c:	b7c1                	j	800041fc <main+0x24e>
8000423e:	06400793          	li	a5,100
80004242:	bfdd                	j	80004238 <main+0x28a>

80004244 <memcpy>:
memcpy():
80004244:	832a                	mv	t1,a0
80004246:	ca09                	beqz	a2,80004258 <memcpy+0x14>
80004248:	00058383          	lb	t2,0(a1) # 71000000 <STACK_SIZE+0x70fff800>
8000424c:	00730023          	sb	t2,0(t1)
80004250:	167d                	addi	a2,a2,-1
80004252:	0305                	addi	t1,t1,1
80004254:	0585                	addi	a1,a1,1
80004256:	fa6d                	bnez	a2,80004248 <memcpy+0x4>
80004258:	8082                	ret

8000425a <memset>:
memset():
8000425a:	832a                	mv	t1,a0
8000425c:	c611                	beqz	a2,80004268 <memset+0xe>
8000425e:	00b30023          	sb	a1,0(t1)
80004262:	167d                	addi	a2,a2,-1
80004264:	0305                	addi	t1,t1,1
80004266:	fe65                	bnez	a2,8000425e <memset+0x4>
80004268:	8082                	ret
8000426a:	0000                	unimp
8000426c:	0000                	unimp
	...

80004270 <local_irq_handler_table>:
80004270:	0822 8000 0820 8000 0830 8000 0830 8000     "... ...0...0...
80004280:	0830 8000 0830 8000 0836 8000 0824 8000     0...0...6...$...
80004290:	3f9a 8000 0826 8000 0828 8000 082a 8000     .?..&...(...*...
800042a0:	082c 8000 082e 8000 0832 8000 0834 8000     ,.......2...4...
800042b0:	200a 202a 6944 7073 616c 5079 726f 2074     . * DisplayPort 
800042c0:	6f53 7275 6563 4720 746f 4820 4450 4920     Source Got HPD I
800042d0:	5152 3a20 0a20 0000 200a 202a 6944 7073     RQ : .... * Disp
800042e0:	616c 5079 726f 2074 6f53 7275 6563 4720     layPort Source G
800042f0:	746f 4820 4450 4320 6e6f 656e 7463 6f69     ot HPD Connectio
80004300:	206e 203a 000a 0000 200a 202a 6944 7073     n : ..... * Disp
80004310:	616c 5079 726f 2074 6f53 7275 6563 4720     layPort Source G
80004320:	746f 4820 4450 4420 7369 6f63 6e6e 6365     ot HPD Disconnec
80004330:	6974 6e6f 3a20 0a20 0000 0000 0a0d 5054     tion : .......TP
80004340:	3353 5320 7075 6f70 7472 6465 0d0a 0000     S3 Supported....
80004350:	0a0d 5054 3353 6e20 746f 5320 7075 6f70     ..TPS3 not Suppo
80004360:	7472 6465 0d0a 0000 6553 646e 6e69 2067     rted....Sending 
80004370:	7074 3373 0d0a 0000 6573 646e 6e69 2067     tps3....sending 
80004380:	7074 3273 0d0a 0000 0000 0000 0000 0000     tps2............
