# Exporting Component Description of PF_DRI_C0 to TCL
# Family: PolarFire
# Part Number: MPF100T-1FCG484E
# Create and Configure the core component PF_DRI_C0
create_and_configure_core -core_vlnv Actel:SgCore:PF_DRI:$PF_DRIver -component_name {PF_DRI_C0} -params {\
"CRYPTO:false"  \
"DLL0_NE:false"  \
"DLL0_NW:false"  \
"DLL0_SE:false"  \
"DLL0_SW:false"  \
"DLL1_NE:false"  \
"DLL1_NW:false"  \
"DLL1_SE:false"  \
"DLL1_SW:false"  \
"ENABLE_APB_SLAVE_IF:false"  \
"ENABLE_LATENCY_SIMULATION:true"  \
"PLL0_NE:false"  \
"PLL0_NW:false"  \
"PLL0_SE:false"  \
"PLL0_SW:false"  \
"PLL1_NE:false"  \
"PLL1_NW:false"  \
"PLL1_SE:false"  \
"PLL1_SW:false"  \
"Q0_LANE0:true"  \
"Q0_LANE1:true"  \
"Q0_LANE2:true"  \
"Q0_LANE3:true"  \
"Q0_TXPLL0:false"  \
"Q0_TXPLL1:false"  \
"Q0_TXPLL_SSC:true"  \
"Q1_LANE0:false"  \
"Q1_LANE1:false"  \
"Q1_LANE2:false"  \
"Q1_LANE3:false"  \
"Q1_TXPLL0:false"  \
"Q1_TXPLL1:false"  \
"Q1_TXPLL_SSC:false"  \
"Q2_LANE0:false"  \
"Q2_LANE1:false"  \
"Q2_LANE2:false"  \
"Q2_LANE3:false"  \
"Q2_TXPLL0:false"  \
"Q2_TXPLL1:false"  \
"Q2_TXPLL_SSC:false"  \
"Q3_LANE0:false"  \
"Q3_LANE1:false"  \
"Q3_LANE2:false"  \
"Q3_LANE3:false"  \
"Q3_TXPLL:false"  \
"Q3_TXPLL_SSC:false"  \
"Q4_LANE0:false"  \
"Q4_LANE1:false"  \
"Q4_LANE2:false"  \
"Q4_LANE3:false"  \
"Q4_TXPLL:false"  \
"Q4_TXPLL_SSC:false"  \
"Q5_LANE0:false"  \
"Q5_LANE1:false"  \
"Q5_LANE2:false"  \
"Q5_LANE3:false"  \
"Q5_TXPLL:false"  \
"Q5_TXPLL_SSC:false"   }
# Exporting Component Description of PF_DRI_C0 to TCL done
