src/platform/miv_rv32_hal/miv_rv32_hal.o: \
 ../src/platform/miv_rv32_hal/miv_rv32_hal.c \
 ../src/platform/miv_rv32_hal/miv_rv32_hal.h \
 ../src/platform/miv_rv32_hal/miv_rv32_regs.h \
 ../src/platform/miv_rv32_hal/miv_rv32_plic.h \
 ../src/platform/miv_rv32_hal/miv_rv32_assert.h \
 C:\Work_Folder_Akhil\Q1_2026_2027\Koushik\Final\Release\mpf_an3694_v2025p1_df\src\softconsole2022p2\mpf_an3694_v2025p1_df\src\boards\polarfire-eval-kit\miv-rv32-design/fpga_design_config/fpga_design_config.h

../src/platform/miv_rv32_hal/miv_rv32_hal.h:

../src/platform/miv_rv32_hal/miv_rv32_regs.h:

../src/platform/miv_rv32_hal/miv_rv32_plic.h:

../src/platform/miv_rv32_hal/miv_rv32_assert.h:

C:\Work_Folder_Akhil\Q1_2026_2027\Koushik\Final\Release\mpf_an3694_v2025p1_df\src\softconsole2022p2\mpf_an3694_v2025p1_df\src\boards\polarfire-eval-kit\miv-rv32-design/fpga_design_config/fpga_design_config.h:
