@W: CG360 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\ramblocks.v":43:23:43:25|Removing wire RDW, as there is no assignment to it.
@W: CG360 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\ramblocks.v":45:15:45:17|Removing wire WDX, as there is no assignment to it.
@W: CG360 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\ramblocks.v":46:15:46:17|Removing wire RDX, as there is no assignment to it.
@W: CG360 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\ramblocks.v":47:15:47:17|Removing wire WDY, as there is no assignment to it.
@W: CG360 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\ramblocks.v":48:15:48:17|Removing wire RDY, as there is no assignment to it.
@W: CG360 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\ramblocks.v":49:15:49:18|Removing wire RDYY, as there is no assignment to it.
@W: CL318 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\ramblocks.v":40:11:40:20|*Output SB_CORRECT has undriven bits; assigning undriven bits to 'Z'.  Simulation mismatch possible. Assign all bits of the output.
@W: CL318 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\ramblocks.v":41:11:41:19|*Output DB_DETECT has undriven bits; assigning undriven bits to 'Z'.  Simulation mismatch possible. Assign all bits of the output.
@W: CG133 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":696:34:696:37|Object MULT is declared but not assigned. Either assign a value or remove the declaration.
@W: CG133 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":697:34:697:34|Object A is declared but not assigned. Either assign a value or remove the declaration.
@W: CG133 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":698:34:698:34|Object B is declared but not assigned. Either assign a value or remove the declaration.
@W: CG133 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":1358:16:1358:16|Object b is declared but not assigned. Either assign a value or remove the declaration.
@W: CG360 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":234:9:234:14|Removing wire DEBUG1, as there is no assignment to it.
@W: CG360 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":235:9:235:14|Removing wire DEBUG2, as there is no assignment to it.
@W: CG360 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":236:9:236:23|Removing wire DEBUGBLK_RESETN, as there is no assignment to it.
@W: CG133 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":262:12:262:14|Object iii is declared but not assigned. Either assign a value or remove the declaration.
@W: CG133 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":263:25:263:33|Object RAMDOUTXX is declared but not assigned. Either assign a value or remove the declaration.
@W: CG134 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":267:14:267:21|No assignment to bit 5 of ins_addr
@W: CG134 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":267:14:267:21|No assignment to bit 6 of ins_addr
@W: CG134 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":267:14:267:21|No assignment to bit 7 of ins_addr
@W: CG134 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":267:14:267:21|No assignment to bit 8 of ins_addr
@W: CG134 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":267:14:267:21|No assignment to bit 9 of ins_addr
@W: CG134 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":267:14:267:21|No assignment to bit 10 of ins_addr
@W: CG134 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":267:14:267:21|No assignment to bit 11 of ins_addr
@W: CG134 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":267:14:267:21|No assignment to bit 12 of ins_addr
@W: CG134 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":267:14:267:21|No assignment to bit 13 of ins_addr
@W: CG134 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":267:14:267:21|No assignment to bit 14 of ins_addr
@W: CG134 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":267:14:267:21|No assignment to bit 15 of ins_addr
@W: CL169 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":1041:4:1041:9|Pruning unused register ZREGISTER[0]. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":1041:4:1041:9|Pruning unused register GETINST. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":511:12:511:17|Pruning unused register UROM.upper_addr[7:0]. Make sure that there are no unused intermediate registers.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":1041:4:1041:9|All reachable assignments to bit 4 of STKPTR[7:0] assign 1, register removed by optimization.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":1041:4:1041:9|All reachable assignments to bit 5 of STKPTR[7:0] assign 1, register removed by optimization.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":1041:4:1041:9|All reachable assignments to bit 6 of STKPTR[7:0] assign 1, register removed by optimization.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":1041:4:1041:9|All reachable assignments to bit 7 of STKPTR[7:0] assign 1, register removed by optimization.
@W: CL207 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":1041:4:1041:9|All reachable assignments to ISR assign 0, register removed by optimization.
@W: CL207 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":1041:4:1041:9|All reachable assignments to DOISR assign 0, register removed by optimization.
@W: CL207 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":818:4:818:9|All reachable assignments to ISR_ACCUM_ZERO assign 0, register removed by optimization.
@W: CL207 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":818:4:818:9|All reachable assignments to ISR_ACCUM_NEG assign 0, register removed by optimization.
@W: CL260 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\CoreABC_Inst\CoreABC_Inst_0\rtl\vlog\core\coreabc.v":494:12:494:17|Pruning register bit 1 of UROM.INSTR_SLOT[1:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level.
@W: CG1283 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\INIT_MONITOR\INIT_MONITOR_0\INIT_MONITOR_INIT_MONITOR_0_PF_INIT_MONITOR.v":40:53:40:58|Type of parameter FABRIC_POR_N_SIMULATION_DELAY on the instance I_INIT is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type 
@W: CG1283 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\INIT_MONITOR\INIT_MONITOR_0\INIT_MONITOR_INIT_MONITOR_0_PF_INIT_MONITOR.v":40:53:40:58|Type of parameter PCIE_INIT_DONE_SIMULATION_DELAY on the instance I_INIT is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type 
@W: CG1283 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\INIT_MONITOR\INIT_MONITOR_0\INIT_MONITOR_INIT_MONITOR_0_PF_INIT_MONITOR.v":40:53:40:58|Type of parameter SRAM_INIT_DONE_SIMULATION_DELAY on the instance I_INIT is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type 
@W: CG1283 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\INIT_MONITOR\INIT_MONITOR_0\INIT_MONITOR_INIT_MONITOR_0_PF_INIT_MONITOR.v":40:53:40:58|Type of parameter UIC_INIT_DONE_SIMULATION_DELAY on the instance I_INIT is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type 
@W: CG1283 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\INIT_MONITOR\INIT_MONITOR_0\INIT_MONITOR_INIT_MONITOR_0_PF_INIT_MONITOR.v":40:53:40:58|Type of parameter USRAM_INIT_DONE_SIMULATION_DELAY on the instance I_INIT is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type 
@W: CG1283 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\INIT_MONITOR\INIT_MONITOR_0\INIT_MONITOR_INIT_MONITOR_0_PF_INIT_MONITOR.v":50:12:50:18|Type of parameter BANK_EN_SIMULATION_DELAY on the instance I_BEN_6 is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type 
@W: CL168 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\INIT_MONITOR\INIT_MONITOR_0\INIT_MONITOR_INIT_MONITOR_0_PF_INIT_MONITOR.v":52:8:52:15|Removing instance gnd_inst because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive.
@W: CL168 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\INIT_MONITOR\INIT_MONITOR_0\INIT_MONITOR_INIT_MONITOR_0_PF_INIT_MONITOR.v":51:8:51:15|Removing instance vcc_inst because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive.
@W: CG1283 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\PF_CCC_50\PF_CCC_50_0\PF_CCC_50_PF_CCC_50_0_PF_CCC.v":39:12:39:21|Type of parameter VCOFREQUENCY on the instance pll_inst_0 is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type 
@W: CL168 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\PF_OSC_160\PF_OSC_160_0\PF_OSC_160_PF_OSC_160_0_PF_OSC.v":15:8:15:15|Removing instance gnd_inst because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive.
@W: CG1283 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\PF_XCVR_0\I_XCVR\PF_XCVR_0_I_XCVR_PF_XCVR.v":317:12:317:16|Type of parameter INTERFACE_LEVEL on the instance LANE0 is not in accordance with the type of parameter on corresponding module. Please update RTL with correct parameter type 
@W: CL169 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\Actel\DirectCore\CORELANEMSTR\2.0.100\rtl\vlog\core\CORELANEMSTRmode1.v":190:0:190:5|Pruning unused register firstcal. Make sure that there are no unused intermediate registers.
@W: CL169 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\Actel\DirectCore\CORELCKMGT\2.0.100\rtl\vlog\core\CORELCKMGT.v":211:0:211:5|Pruning unused register neverlocked. Make sure that there are no unused intermediate registers.
@W: CG813 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\Actel\DirectCore\CORERFD\2.0.100\rtl\vlog\core\CORERFD.v":79:46:79:59|Rounding real from 4398.826979 to 4399 (simulation mismatch possible)
@W: CG813 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\Actel\DirectCore\CORERFD\2.0.100\rtl\vlog\core\CORERFD.v":80:47:80:60|Rounding real from 4154.447703 to 4154 (simulation mismatch possible)
@W: CG146 :"C:\Microsemi\Libero_SoC_v12.6\SynplifyPro\lib\generic\acg5.v":1647:7:1647:15|Creating black box for empty module SLE_DEBUG
@W: CL168 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\PF_XCVR_DRI\PF_XCVR_DRI_0\PF_XCVR_DRI_PF_XCVR_DRI_0_PF_DRI.v":393:8:393:15|Removing instance gnd_inst because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive.
@W: CL168 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\PF_XCVR_DRI\PF_XCVR_DRI_0\PF_XCVR_DRI_PF_XCVR_DRI_0_PF_DRI.v":392:8:392:15|Removing instance vcc_inst because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive.
@W: CL168 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\PF_XCVR_REF_CLK_0\PF_XCVR_REF_CLK_0_0\PF_XCVR_REF_CLK_0_PF_XCVR_REF_CLK_0_0_PF_XCVR_REF_CLK.v":25:8:25:15|Removing instance gnd_inst because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive.
@W: CL168 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\work\PF_XCVR_REF_CLK_0\PF_XCVR_REF_CLK_0_0\PF_XCVR_REF_CLK_0_PF_XCVR_REF_CLK_0_0_PF_XCVR_REF_CLK.v":24:8:24:15|Removing instance vcc_inst because it does not drive other instances. To preserve this instance, use the syn_noprune synthesis directive.
@W: CG133 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\hdl\prbs_asic_chk.v":160:14:160:15|Object O1 is declared but not assigned. Either assign a value or remove the declaration.
@W: CL169 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\hdl\prbs_asic_chk.v":251:2:251:7|Pruning unused register IIl. Make sure that there are no unused intermediate registers.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\hdl\PRBS_chk.v":116:0:116:5|All reachable assignments to bit 0 of prbs_rxn[4:0] assign 0, register removed by optimization.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\hdl\PRBS_chk.v":116:0:116:5|All reachable assignments to bit 2 of prbs_rxn[4:0] assign 0, register removed by optimization.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\hdl\PRBS_chk.v":116:0:116:5|All reachable assignments to bit 3 of prbs_rxn[4:0] assign 0, register removed by optimization.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\hdl\PRBS_chk.v":116:0:116:5|All reachable assignments to bit 4 of prbs_rxn[4:0] assign 0, register removed by optimization.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\hdl\PRBS_gen.v":71:0:71:5|All reachable assignments to bit 0 of prbs_txn[4:0] assign 0, register removed by optimization.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\hdl\PRBS_gen.v":71:0:71:5|All reachable assignments to bit 2 of prbs_txn[4:0] assign 0, register removed by optimization.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\hdl\PRBS_gen.v":71:0:71:5|All reachable assignments to bit 3 of prbs_txn[4:0] assign 0, register removed by optimization.
@W: CL208 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\hdl\PRBS_gen.v":71:0:71:5|All reachable assignments to bit 4 of prbs_txn[4:0] assign 0, register removed by optimization.
@W: CL246 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\Actel\DirectCore\CORELCKMGT\2.0.100\rtl\vlog\core\CORELCKMGT.v":83:24:83:30|Input port bits 20 to 1 of LTPULSE[20:0] are unused. Assign logic for all port bits or change the input port size.
@W: CL246 :"C:\WFH_Tasks\RTG4_v12.6_Updates\PF_v12.6\AC468_DFE\Libero_Project\component\Actel\DirectCore\CORELANEMSTR\2.0.100\rtl\vlog\core\CORELANEMSTRmode1.v":73:24:73:30|Input port bits 20 to 1 of LTPULSE[20:0] are unused. Assign logic for all port bits or change the input port size.

