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<?xml-stylesheet href="rptstyle.xsl" type="text/xsl" ?>
<doc>
<title>Timing Report Min Delay Analysis
</title>
<text>SmartTime Version 11.7.0.119</text>
<text>Microsemi Corporation - Microsemi Libero Software Release v11.7 (Version 11.7.0.119)</text>
<text>Date: Fri Mar 04 14:34:21 2016
</text>
<table>
<header>
</header>
<row>
 <cell>Design</cell>
 <cell>SPI_Flash</cell>
</row>
<row>
 <cell>Family</cell>
 <cell>SmartFusion2</cell>
</row>
<row>
 <cell>Die</cell>
 <cell>M2S090TS</cell>
</row>
<row>
 <cell>Package</cell>
 <cell>484 FBGA</cell>
</row>
<row>
 <cell>Temperature Range</cell>
 <cell>0 - 85 C</cell>
</row>
<row>
 <cell>Voltage Range</cell>
 <cell>1.14 - 1.26 V</cell>
</row>
<row>
 <cell>Speed Grade</cell>
 <cell>-1</cell>
</row>
<row>
 <cell>Design State</cell>
 <cell>Post-Layout</cell>
</row>
<row>
 <cell>Data source</cell>
 <cell>Production</cell>
</row>
<row>
 <cell>Min Operating Conditions</cell>
 <cell>BEST - 1.26 V - 0 C</cell>
</row>
<row>
 <cell>Max Operating Conditions</cell>
 <cell>WORST - 1.14 V - 85 C</cell>
</row>
<row>
 <cell>Scenario for Timing Analysis</cell>
 <cell>timing_analysis</cell>
</row>
</table>
<text></text>
<section>
<name>Summary</name>
<table>
<header>
 <cell>Clock Domain</cell>
 <cell>Period (ns)</cell>
 <cell>Frequency (MHz)</cell>
 <cell>Required Period (ns)</cell>
 <cell>Required Frequency (MHz)</cell>
 <cell>External Setup (ns)</cell>
 <cell>External Hold (ns)</cell>
 <cell>Min Clock-To-Out (ns)</cell>
 <cell>Max Clock-To-Out (ns)</cell>
</header>
<row>
 <cell>SPI_Flash_sb_0/CCC_0/GL0</cell>
 <cell>4.684</cell>
 <cell>213.493</cell>
 <cell>10.000</cell>
 <cell>100.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>5.884</cell>
 <cell>11.975</cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>20.000</cell>
 <cell>50.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
<text></text>
<table>
<header>
 <cell></cell>
 <cell>Min Delay (ns)</cell>
 <cell>Max Delay (ns)</cell>
</header>
<row>
 <cell>Input to Output</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
</section>
<section>
<name>Clock Domain SPI_Flash_sb_0/CCC_0/GL0</name>
<text>Info: The maximum frequency of this clock domain is limited by the period of pin SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE</text>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Hold</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Clock to Out (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE</cell>
 <cell>MMUART_1_TXD</cell>
 <cell>2.641</cell>
 <cell></cell>
 <cell>5.884</cell>
 <cell></cell>
 <cell>5.884</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE</cell>
 <cell>SPI_0_DO</cell>
 <cell>3.162</cell>
 <cell></cell>
 <cell>6.405</cell>
 <cell></cell>
 <cell>6.405</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: MMUART_1_TXD</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>5.884</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/CCC_0/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.042</cell>
 <cell>2.042</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/CCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>SPI_Flash_sb_0/CCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.120</cell>
 <cell>2.162</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/CCC_0/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.106</cell>
 <cell>2.268</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/CCC_0/GL0_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>SPI_Flash_sb_0/CCC_0/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.360</cell>
 <cell>2.628</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/CCC_0/GL0_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.190</cell>
 <cell>2.818</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B</cell>
 <cell>net</cell>
 <cell>SPI_Flash_sb_0/CCC_0/GL0_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.245</cell>
 <cell>3.063</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.126</cell>
 <cell>3.189</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE</cell>
 <cell>net</cell>
 <cell>SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MSS_ADLIB_INST/CLK_BASE_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.054</cell>
 <cell>3.243</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_TXD_USBC_DATA2_MGPIO24B_OUT</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:MSS_075_IP</cell>
 <cell>+</cell>
 <cell>1.207</cell>
 <cell>4.450</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MMUART_1_TXD_PAD/U_IOPAD:D</cell>
 <cell>net</cell>
 <cell>SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MSS_ADLIB_INST_MMUART1_TXD_USBC_DATA2_MGPIO24B_OUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>4.450</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/SPI_Flash_sb_MSS_0/MMUART_1_TXD_PAD/U_IOPAD:PAD</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_TRI</cell>
 <cell>+</cell>
 <cell>1.434</cell>
 <cell>5.884</cell>
 <cell>0</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MMUART_1_TXD</cell>
 <cell>net</cell>
 <cell>MMUART_1_TXD</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>5.884</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>5.884</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/CCC_0/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>SPI_Flash_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.042</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>MMUART_1_TXD</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Removal</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain SPI_Flash_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT</name>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Hold</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Removal</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set Pin to Pin</name>
<section>
<name>SET Input to Output</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set User Sets</name>
</section>
</doc>
