@W: BN231 |Constraints on tristate nets currently not supported
@W: MO111 :"d:\libero_11_7_publish\tu0548_spi_keil\component\work\spi_flash_sb\fabosc_0\spi_flash_sb_fabosc_0_osc.v":20:7:20:16|Tristate driver XTLOSC_O2F on net XTLOSC_O2F has its enable tied to GND (module SPI_Flash_sb_FABOSC_0_OSC) 
@W: MO111 :"d:\libero_11_7_publish\tu0548_spi_keil\component\work\spi_flash_sb\fabosc_0\spi_flash_sb_fabosc_0_osc.v":19:7:19:16|Tristate driver XTLOSC_CCC on net XTLOSC_CCC has its enable tied to GND (module SPI_Flash_sb_FABOSC_0_OSC) 
@W: MO111 :"d:\libero_11_7_publish\tu0548_spi_keil\component\work\spi_flash_sb\fabosc_0\spi_flash_sb_fabosc_0_osc.v":18:7:18:20|Tristate driver RCOSC_1MHZ_O2F on net RCOSC_1MHZ_O2F has its enable tied to GND (module SPI_Flash_sb_FABOSC_0_OSC) 
@W: MO111 :"d:\libero_11_7_publish\tu0548_spi_keil\component\work\spi_flash_sb\fabosc_0\spi_flash_sb_fabosc_0_osc.v":17:7:17:20|Tristate driver RCOSC_1MHZ_CCC on net RCOSC_1MHZ_CCC has its enable tied to GND (module SPI_Flash_sb_FABOSC_0_OSC) 
@W: MO171 :"d:\libero_11_7_publish\tu0548_spi_keil\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":769:4:769:9|Sequential instance SPI_Flash_sb_0.CORERESETP_0.sm1_areset_n_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\libero_11_7_publish\tu0548_spi_keil\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":769:4:769:9|Sequential instance SPI_Flash_sb_0.CORERESETP_0.sm1_areset_n_clk_base reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\libero_11_7_publish\tu0548_spi_keil\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1388:4:1388:9|Sequential instance SPI_Flash_sb_0.CORERESETP_0.RESET_N_F2M_int reduced to a combinational gate by constant propagation 
@W: MT246 :"d:\libero_11_7_publish\tu0548_spi_keil\component\work\spi_flash_sb\ccc_0\spi_flash_sb_ccc_0_fccc.v":20:36:20:43|Blackbox CCC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT447 :"d:/libero_11_7_publish/tu0548_spi_keil/designer/spi_flash/synthesis.fdc":9:0:9:0|Timing constraint (through [get_nets { SPI_Flash_sb_0.CORERESETP_0.ddr_settled SPI_Flash_sb_0.CORERESETP_0.count_ddr_enable SPI_Flash_sb_0.CORERESETP_0.release_sdif*_core SPI_Flash_sb_0.CORERESETP_0.count_sdif*_enable }]) (false path) was not applied to the design because none of the '-through' objects specified by the constraint exist in the design 
@W: MT447 :"d:/libero_11_7_publish/tu0548_spi_keil/designer/spi_flash/synthesis.fdc":10:0:10:0|Timing constraint (from [get_cells { SPI_Flash_sb_0.CORERESETP_0.MSS_HPMS_READY_int }] to [get_cells { SPI_Flash_sb_0.CORERESETP_0.sm0_areset_n_rcosc SPI_Flash_sb_0.CORERESETP_0.sm0_areset_n_rcosc_q1 }]) (false path) was not applied to the design because none of the '-from' objects specified by the constraint exist in the design 
@W: MT447 :"d:/libero_11_7_publish/tu0548_spi_keil/designer/spi_flash/synthesis.fdc":11:0:11:0|Timing constraint (from [get_cells { SPI_Flash_sb_0.CORERESETP_0.MSS_HPMS_READY_int SPI_Flash_sb_0.CORERESETP_0.SDIF*_PERST_N_re }] to [get_cells { SPI_Flash_sb_0.CORERESETP_0.sdif*_areset_n_rcosc* }]) (false path) was not applied to the design because none of the '-from' objects specified by the constraint exist in the design 
@W: MT447 :"d:/libero_11_7_publish/tu0548_spi_keil/designer/spi_flash/synthesis.fdc":12:0:12:0|Timing constraint (through [get_nets { SPI_Flash_sb_0.CORERESETP_0.CONFIG1_DONE SPI_Flash_sb_0.CORERESETP_0.CONFIG2_DONE SPI_Flash_sb_0.CORERESETP_0.SDIF*_PERST_N SPI_Flash_sb_0.CORERESETP_0.SDIF*_PSEL SPI_Flash_sb_0.CORERESETP_0.SDIF*_PWRITE SPI_Flash_sb_0.CORERESETP_0.SDIF*_PRDATA[*] SPI_Flash_sb_0.CORERESETP_0.SOFT_EXT_RESET_OUT SPI_Flash_sb_0.CORERESETP_0.SOFT_RESET_F2M SPI_Flash_sb_0.CORERESETP_0.SOFT_M3_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_MDDR_DDR_AXI_S_CORE_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_FDDR_CORE_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_SDIF*_PHY_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_SDIF*_CORE_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_SDIF0_0_CORE_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_SDIF0_1_CORE_RESET }]) (false path) was not applied to the design because none of the '-through' objects specified by the constraint exist in the design 
@W: MT447 :"d:/libero_11_7_publish/tu0548_spi_keil/designer/spi_flash/synthesis.fdc":9:0:9:0|Timing constraint (through [get_nets { SPI_Flash_sb_0.CORERESETP_0.ddr_settled SPI_Flash_sb_0.CORERESETP_0.count_ddr_enable SPI_Flash_sb_0.CORERESETP_0.release_sdif*_core SPI_Flash_sb_0.CORERESETP_0.count_sdif*_enable }]) (false path) was not applied to the design because none of the '-through' objects specified by the constraint exist in the design 
@W: MT447 :"d:/libero_11_7_publish/tu0548_spi_keil/designer/spi_flash/synthesis.fdc":10:0:10:0|Timing constraint (from [get_cells { SPI_Flash_sb_0.CORERESETP_0.MSS_HPMS_READY_int }] to [get_cells { SPI_Flash_sb_0.CORERESETP_0.sm0_areset_n_rcosc SPI_Flash_sb_0.CORERESETP_0.sm0_areset_n_rcosc_q1 }]) (false path) was not applied to the design because none of the '-from' objects specified by the constraint exist in the design 
@W: MT447 :"d:/libero_11_7_publish/tu0548_spi_keil/designer/spi_flash/synthesis.fdc":11:0:11:0|Timing constraint (from [get_cells { SPI_Flash_sb_0.CORERESETP_0.MSS_HPMS_READY_int SPI_Flash_sb_0.CORERESETP_0.SDIF*_PERST_N_re }] to [get_cells { SPI_Flash_sb_0.CORERESETP_0.sdif*_areset_n_rcosc* }]) (false path) was not applied to the design because none of the '-from' objects specified by the constraint exist in the design 
@W: MT447 :"d:/libero_11_7_publish/tu0548_spi_keil/designer/spi_flash/synthesis.fdc":12:0:12:0|Timing constraint (through [get_nets { SPI_Flash_sb_0.CORERESETP_0.CONFIG1_DONE SPI_Flash_sb_0.CORERESETP_0.CONFIG2_DONE SPI_Flash_sb_0.CORERESETP_0.SDIF*_PERST_N SPI_Flash_sb_0.CORERESETP_0.SDIF*_PSEL SPI_Flash_sb_0.CORERESETP_0.SDIF*_PWRITE SPI_Flash_sb_0.CORERESETP_0.SDIF*_PRDATA[*] SPI_Flash_sb_0.CORERESETP_0.SOFT_EXT_RESET_OUT SPI_Flash_sb_0.CORERESETP_0.SOFT_RESET_F2M SPI_Flash_sb_0.CORERESETP_0.SOFT_M3_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_MDDR_DDR_AXI_S_CORE_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_FDDR_CORE_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_SDIF*_PHY_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_SDIF*_CORE_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_SDIF0_0_CORE_RESET SPI_Flash_sb_0.CORERESETP_0.SOFT_SDIF0_1_CORE_RESET }]) (false path) was not applied to the design because none of the '-through' objects specified by the constraint exist in the design 
