#Build: Synplify Pro J-2015.03M-SP1-2, Build 266R, Dec 14 2015
#install: C:\Microsemi\Libero_SoC_v11.7\Synplify
#OS: Windows 7 6.1
#Hostname: W764-KUMARJ

#Implementation: synthesis

Synopsys HDL Compiler, version comp201503sp1p1, Build 240R, built Dec  1 2015
@N: :  | Running in 64-bit mode 
Copyright (C) 1994-2015 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use, reproduction, or distribution of this software is strictly prohibited.

Synopsys VHDL Compiler, version comp201503sp1p1, Build 240R, built Dec  1 2015
@N: :  | Running in 64-bit mode 
Copyright (C) 1994-2015 Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use, reproduction, or distribution of this software is strictly prohibited.

@N:CD720 : std.vhd(123) | Setting time resolution to ns
@N: : ddc.vhd(3911) | Top entity is set to ddc.

File Dependency file is up to date.  It will not be rewritten.

VHDL syntax check successful!

Compiler output is up to date.  No re-compile necessary

@N:CD630 : ddc.vhd(3911) | Synthesizing work.ddc.structural 
@N:CD630 : SynLib_asynch.vhd(2603) | Synthesizing work.syndelaywithenable_std_logic_vector.structural 
@N:CD630 : SynLib_asynch.vhd(2275) | Synthesizing work.singledelaywithenablegeneric.structural 
Post processing for work.singledelaywithenablegeneric.structural
Post processing for work.syndelaywithenable_std_logic_vector.structural
@N:CD630 : ddc.vhd(22) | Synthesizing work.cfir_i_polyphasefir_0.behav 
Post processing for work.cfir_i_polyphasefir_0.behav
@N:CD630 : SynLib_asynch.vhd(4929) | Synthesizing work.syndownsamplesimple.behav 
Post processing for work.syndownsamplesimple.behav
@N:CD630 : ddc.vhd(139) | Synthesizing work.cfir_i_polyphasefir_1.behav 
Post processing for work.cfir_i_polyphasefir_1.behav
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
Post processing for work.synbusadapter.behav
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
@N:CD630 : ddc.vhd(3698) | Synthesizing work.cic_i.structural 
@W:CD638 : ddc.vhd(3748) | Signal n_x_0_653 is undriven 
@W:CD638 : ddc.vhd(3749) | Signal n_y_1_654 is undriven 
@N:CD630 : ddc.vhd(3530) | Synthesizing work.cic_i_c1.structural 
@W:CD638 : ddc.vhd(3562) | Signal n_x_0_651 is undriven 
@W:CD638 : ddc.vhd(3563) | Signal n_y_1_652 is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
@N:CD630 : ddc.vhd(3498) | Synthesizing work.syncic_i_c1_delay.struct 
@N:CD630 : SynLib_asynch.vhd(2603) | Synthesizing work.syndelaywithenable_std_logic_vector.structural 
@N:CD630 : SynLib_asynch.vhd(2275) | Synthesizing work.singledelaywithenablegeneric.structural 
Post processing for work.singledelaywithenablegeneric.structural
Post processing for work.syndelaywithenable_std_logic_vector.structural
Post processing for work.syncic_i_c1_delay.struct
Post processing for work.cic_i_c1.structural
@N:CD630 : ddc.vhd(3422) | Synthesizing work.cic_i_i1.structural 
@W:CD638 : ddc.vhd(3454) | Signal n_x_0_641 is undriven 
@W:CD638 : ddc.vhd(3455) | Signal n_y_1_642 is undriven 
@N:CD630 : ddc.vhd(3390) | Synthesizing work.syncic_i_i1_delay.struct 
Post processing for work.syncic_i_i1_delay.struct
Post processing for work.cic_i_i1.structural
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
Post processing for work.synbusadapter.behav
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
Post processing for work.synbusadapter.behav
Post processing for work.cic_i.structural
@N:CD630 : ddc.vhd(3606) | Synthesizing work.dds.structural 
@W:CD638 : ddc.vhd(3646) | Signal n_globalenable1_0_607 is undriven 
@W:CD638 : ddc.vhd(3647) | Signal n_freq_0_608 is undriven 
@W:CD638 : ddc.vhd(3648) | Signal n_sin_1_609 is undriven 
@W:CD638 : ddc.vhd(3649) | Signal n_cos_1_610 is undriven 
@N:CD630 : ddc.vhd(3229) | Synthesizing work.dds_phasegenerator.structural 
@W:CD638 : ddc.vhd(3282) | Signal n_freq_0_605 is undriven 
@W:CD638 : ddc.vhd(3283) | Signal n_pout_1_606 is undriven 
@N:CD630 : ddc.vhd(3166) | Synthesizing work.syndds_phasegenerator_shrp2.struct 
@N:CD630 : SynLib_asynch.vhd(2603) | Synthesizing work.syndelaywithenable_std_logic_vector.structural 
@N:CD630 : SynLib_asynch.vhd(2275) | Synthesizing work.singledelaywithenablegeneric.structural 
Post processing for work.singledelaywithenablegeneric.structural
Post processing for work.syndelaywithenable_std_logic_vector.structural
Post processing for work.syndds_phasegenerator_shrp2.struct
@N:CD630 : ddc.vhd(3197) | Synthesizing work.syndds_phasegenerator_shrp1.struct 
@N:CD630 : SynLib_asynch.vhd(2603) | Synthesizing work.syndelaywithenable_std_logic_vector.structural 
@N:CD630 : SynLib_asynch.vhd(2275) | Synthesizing work.singledelaywithenablegeneric.structural 
Post processing for work.singledelaywithenablegeneric.structural
Post processing for work.syndelaywithenable_std_logic_vector.structural
Post processing for work.syndds_phasegenerator_shrp1.struct
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
Post processing for work.synbusadapter.behav
@N:CD630 : SynLib_asynch.vhd(3414) | Synthesizing work.synaccumulator.behav 
@W:CD638 : SynLib_asynch.vhd(3431) | Signal accu is undriven 
@W:CD638 : SynLib_asynch.vhd(3434) | Signal addoutu is undriven 
Post processing for work.synaccumulator.behav
Post processing for work.dds_phasegenerator.structural
@N:CD630 : ddc.vhd(3052) | Synthesizing work.dds_sincos.structural 
@W:CD638 : ddc.vhd(3087) | Signal n_globalenable1_0_601 is undriven 
@W:CD638 : ddc.vhd(3088) | Signal n_phasein_0_602 is undriven 
@W:CD638 : ddc.vhd(3089) | Signal n_sin_1_603 is undriven 
@W:CD638 : ddc.vhd(3090) | Signal n_cos_1_604 is undriven 
@N:CD630 : ddc.vhd(2969) | Synthesizing work.dds_sincos_cordic_sincos.structural 
@W:CD638 : ddc.vhd(3000) | Signal n_globalenable1_0_597 is undriven 
@W:CD638 : ddc.vhd(3001) | Signal n_theta_0_598 is undriven 
@W:CD638 : ddc.vhd(3002) | Signal n_sin_1_599 is undriven 
@W:CD638 : ddc.vhd(3003) | Signal n_cos_1_600 is undriven 
@N:CD630 : ddc.vhd(2778) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage.structural 
@W:CD638 : ddc.vhd(2823) | Signal n_globalenable1_0_593 is undriven 
@W:CD638 : ddc.vhd(2824) | Signal n_z_in_0_594 is undriven 
@W:CD638 : ddc.vhd(2825) | Signal n_x_out_1_595 is undriven 
@W:CD638 : ddc.vhd(2826) | Signal n_y_out_1_596 is undriven 
@N:CD630 : ddc.vhd(2361) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1.structural 
@W:CD638 : ddc.vhd(2581) | Signal n_z_in_0_590 is undriven 
@W:CD638 : ddc.vhd(2582) | Signal n_x_out_1_591 is undriven 
@W:CD638 : ddc.vhd(2583) | Signal n_y_out_1_592 is undriven 
@N:CD630 : ddc.vhd(2225) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg13.structural 
@W:CD638 : ddc.vhd(2256) | Signal n_x_in_0_585 is undriven 
@W:CD638 : ddc.vhd(2257) | Signal n_y_in_0_586 is undriven 
@W:CD638 : ddc.vhd(2258) | Signal n_z_in_0_587 is undriven 
@W:CD638 : ddc.vhd(2259) | Signal n_x_out_1_588 is undriven 
@W:CD638 : ddc.vhd(2260) | Signal n_y_out_1_589 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg13.structural
@N:CD630 : ddc.vhd(2133) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg1.structural 
@W:CD638 : ddc.vhd(2162) | Signal n_z_in_0_581 is undriven 
@W:CD638 : ddc.vhd(2163) | Signal n_x_out_1_582 is undriven 
@W:CD638 : ddc.vhd(2164) | Signal n_y_out_1_583 is undriven 
@W:CD638 : ddc.vhd(2165) | Signal n_z_out_1_584 is undriven 
@N:CD630 : SynLib_asynch.vhd(2603) | Synthesizing work.syndelaywithenable_std_logic_vector.structural 
@N:CD630 : SynLib_asynch.vhd(2275) | Synthesizing work.singledelaywithenablegeneric.structural 
Post processing for work.singledelaywithenablegeneric.structural
Post processing for work.syndelaywithenable_std_logic_vector.structural
@N:CD630 : SynLib_asynch.vhd(2603) | Synthesizing work.syndelaywithenable_std_logic_vector.structural 
@N:CD630 : SynLib_asynch.vhd(2275) | Synthesizing work.singledelaywithenablegeneric.structural 
Post processing for work.singledelaywithenablegeneric.structural
Post processing for work.syndelaywithenable_std_logic_vector.structural
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg1.structural
@N:CD630 : ddc.vhd(1960) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg10.structural 
@W:CD638 : ddc.vhd(1997) | Signal n_x_in_0_575 is undriven 
@W:CD638 : ddc.vhd(1998) | Signal n_y_in_0_576 is undriven 
@W:CD638 : ddc.vhd(1999) | Signal n_z_in_0_577 is undriven 
@W:CD638 : ddc.vhd(2000) | Signal n_x_out_1_578 is undriven 
@W:CD638 : ddc.vhd(2001) | Signal n_y_out_1_579 is undriven 
@W:CD638 : ddc.vhd(2002) | Signal n_z_out_1_580 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg10.structural
@N:CD630 : ddc.vhd(1790) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg11.structural 
@W:CD638 : ddc.vhd(1827) | Signal n_x_in_0_569 is undriven 
@W:CD638 : ddc.vhd(1828) | Signal n_y_in_0_570 is undriven 
@W:CD638 : ddc.vhd(1829) | Signal n_z_in_0_571 is undriven 
@W:CD638 : ddc.vhd(1830) | Signal n_x_out_1_572 is undriven 
@W:CD638 : ddc.vhd(1831) | Signal n_y_out_1_573 is undriven 
@W:CD638 : ddc.vhd(1832) | Signal n_z_out_1_574 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg11.structural
@N:CD630 : ddc.vhd(1620) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg12.structural 
@W:CD638 : ddc.vhd(1657) | Signal n_x_in_0_563 is undriven 
@W:CD638 : ddc.vhd(1658) | Signal n_y_in_0_564 is undriven 
@W:CD638 : ddc.vhd(1659) | Signal n_z_in_0_565 is undriven 
@W:CD638 : ddc.vhd(1660) | Signal n_x_out_1_566 is undriven 
@W:CD638 : ddc.vhd(1661) | Signal n_y_out_1_567 is undriven 
@W:CD638 : ddc.vhd(1662) | Signal n_z_out_1_568 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg12.structural
@N:CD630 : ddc.vhd(1447) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg2.structural 
@W:CD638 : ddc.vhd(1484) | Signal n_x_in_0_557 is undriven 
@W:CD638 : ddc.vhd(1485) | Signal n_y_in_0_558 is undriven 
@W:CD638 : ddc.vhd(1486) | Signal n_z_in_0_559 is undriven 
@W:CD638 : ddc.vhd(1487) | Signal n_x_out_1_560 is undriven 
@W:CD638 : ddc.vhd(1488) | Signal n_y_out_1_561 is undriven 
@W:CD638 : ddc.vhd(1489) | Signal n_z_out_1_562 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg2.structural
@N:CD630 : ddc.vhd(1274) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg3.structural 
@W:CD638 : ddc.vhd(1311) | Signal n_x_in_0_551 is undriven 
@W:CD638 : ddc.vhd(1312) | Signal n_y_in_0_552 is undriven 
@W:CD638 : ddc.vhd(1313) | Signal n_z_in_0_553 is undriven 
@W:CD638 : ddc.vhd(1314) | Signal n_x_out_1_554 is undriven 
@W:CD638 : ddc.vhd(1315) | Signal n_y_out_1_555 is undriven 
@W:CD638 : ddc.vhd(1316) | Signal n_z_out_1_556 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg3.structural
@N:CD630 : ddc.vhd(1101) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg4.structural 
@W:CD638 : ddc.vhd(1138) | Signal n_x_in_0_545 is undriven 
@W:CD638 : ddc.vhd(1139) | Signal n_y_in_0_546 is undriven 
@W:CD638 : ddc.vhd(1140) | Signal n_z_in_0_547 is undriven 
@W:CD638 : ddc.vhd(1141) | Signal n_x_out_1_548 is undriven 
@W:CD638 : ddc.vhd(1142) | Signal n_y_out_1_549 is undriven 
@W:CD638 : ddc.vhd(1143) | Signal n_z_out_1_550 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg4.structural
@N:CD630 : ddc.vhd(928) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg5.structural 
@W:CD638 : ddc.vhd(965) | Signal n_x_in_0_539 is undriven 
@W:CD638 : ddc.vhd(966) | Signal n_y_in_0_540 is undriven 
@W:CD638 : ddc.vhd(967) | Signal n_z_in_0_541 is undriven 
@W:CD638 : ddc.vhd(968) | Signal n_x_out_1_542 is undriven 
@W:CD638 : ddc.vhd(969) | Signal n_y_out_1_543 is undriven 
@W:CD638 : ddc.vhd(970) | Signal n_z_out_1_544 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg5.structural
@N:CD630 : ddc.vhd(755) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg6.structural 
@W:CD638 : ddc.vhd(792) | Signal n_x_in_0_533 is undriven 
@W:CD638 : ddc.vhd(793) | Signal n_y_in_0_534 is undriven 
@W:CD638 : ddc.vhd(794) | Signal n_z_in_0_535 is undriven 
@W:CD638 : ddc.vhd(795) | Signal n_x_out_1_536 is undriven 
@W:CD638 : ddc.vhd(796) | Signal n_y_out_1_537 is undriven 
@W:CD638 : ddc.vhd(797) | Signal n_z_out_1_538 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg6.structural
@N:CD630 : ddc.vhd(582) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg7.structural 
@W:CD638 : ddc.vhd(619) | Signal n_x_in_0_527 is undriven 
@W:CD638 : ddc.vhd(620) | Signal n_y_in_0_528 is undriven 
@W:CD638 : ddc.vhd(621) | Signal n_z_in_0_529 is undriven 
@W:CD638 : ddc.vhd(622) | Signal n_x_out_1_530 is undriven 
@W:CD638 : ddc.vhd(623) | Signal n_y_out_1_531 is undriven 
@W:CD638 : ddc.vhd(624) | Signal n_z_out_1_532 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg7.structural
@N:CD630 : ddc.vhd(409) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg8.structural 
@W:CD638 : ddc.vhd(446) | Signal n_x_in_0_521 is undriven 
@W:CD638 : ddc.vhd(447) | Signal n_y_in_0_522 is undriven 
@W:CD638 : ddc.vhd(448) | Signal n_z_in_0_523 is undriven 
@W:CD638 : ddc.vhd(449) | Signal n_x_out_1_524 is undriven 
@W:CD638 : ddc.vhd(450) | Signal n_y_out_1_525 is undriven 
@W:CD638 : ddc.vhd(451) | Signal n_z_out_1_526 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg8.structural
@N:CD630 : ddc.vhd(236) | Synthesizing work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg9.structural 
@W:CD638 : ddc.vhd(273) | Signal n_x_in_0_515 is undriven 
@W:CD638 : ddc.vhd(274) | Signal n_y_in_0_516 is undriven 
@W:CD638 : ddc.vhd(275) | Signal n_z_in_0_517 is undriven 
@W:CD638 : ddc.vhd(276) | Signal n_x_out_1_518 is undriven 
@W:CD638 : ddc.vhd(277) | Signal n_y_out_1_519 is undriven 
@W:CD638 : ddc.vhd(278) | Signal n_z_out_1_520 is undriven 
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1_cordic_stg9.structural
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage_cordic_onequadrant1.structural
@N:CD630 : SynLib_asynch.vhd(3717) | Synthesizing work.synnegate.behav 
Post processing for work.synnegate.behav
@N:CD630 : SynLib_asynch.vhd(2603) | Synthesizing work.syndelaywithenable_std_logic_vector.structural 
@N:CD630 : SynLib_asynch.vhd(2376) | Synthesizing work.syndelaywithenablegeneric.structural 
@W:CD638 : SynLib_asynch.vhd(2407) | Signal delaylineclip is undriven 
@W:CD638 : SynLib_asynch.vhd(2408) | Signal regsl is undriven 
@W:CD638 : SynLib_asynch.vhd(2408) | Signal regsr is undriven 
@W:CD638 : SynLib_asynch.vhd(2409) | Signal cnt is undriven 
@W:CD638 : SynLib_asynch.vhd(2410) | Signal resetexpired is undriven 
@W:CD638 : SynLib_asynch.vhd(2411) | Signal cntdone is undriven 
Post processing for work.syndelaywithenablegeneric.structural
Post processing for work.syndelaywithenable_std_logic_vector.structural
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
Post processing for work.synbusadapter.behav
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos_cordic2_stage.structural
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
Post processing for work.synbusadapter.behav
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1976) | Signal inps is undriven 
@W:CD638 : SynLib_asynch.vhd(1979) | Signal shiftedinps is undriven 
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos_cordic_sincos.structural
@N:CD630 : SynLib_asynch.vhd(2603) | Synthesizing work.syndelaywithenable_std_logic_vector.structural 
@N:CD630 : SynLib_asynch.vhd(2275) | Synthesizing work.singledelaywithenablegeneric.structural 
Post processing for work.singledelaywithenablegeneric.structural
Post processing for work.syndelaywithenable_std_logic_vector.structural
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1976) | Signal inps is undriven 
@W:CD638 : SynLib_asynch.vhd(1979) | Signal shiftedinps is undriven 
Post processing for work.synbusadapter.behav
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1977) | Signal inpu is undriven 
@W:CD638 : SynLib_asynch.vhd(1980) | Signal shiftedinpu is undriven 
@N:CD630 : SynLib_asynch.vhd(1555) | Synthesizing work.synbussatrnd.behav 
Post processing for work.synbussatrnd.behav
Post processing for work.synbusadapter.behav
Post processing for work.dds_sincos.structural
@N:CD630 : SynLib_asynch.vhd(1936) | Synthesizing work.synbusadapter.behav 
@W:CD638 : SynLib_asynch.vhd(1976) | Signal inps is undriven 
@W:CD638 : SynLib_asynch.vhd(1979) | Signal shiftedinps is undriven 
Post processing for work.synbusadapter.behav
Post processing for work.dds.structural
Post processing for work.ddc.structural
@W:CL247 : SynLib_asynch.vhd(1566) | Input port bit 15 of inp(16 downto 0) is unused 
@W:CL246 : SynLib_asynch.vhd(1952) | Input port bits 19 to 0 of inp(31 downto 0) are unused 
@W:CL247 : SynLib_asynch.vhd(1952) | Input port bit 13 of inp(13 downto 0) is unused 
@W:CL247 : SynLib_asynch.vhd(1952) | Input port bit 17 of inp(17 downto 0) is unused 
@N:CL135 : SynLib_asynch.vhd(2545) | Found seqShift delayline, depth=10, width=1
@W:CL159 : ddc.vhd(1622) | Input clk is unused
@W:CL159 : ddc.vhd(1623) | Input GlobalEnable1 is unused
@W:CL159 : ddc.vhd(1624) | Input GlobalReset is unused
@W:CL159 : ddc.vhd(1792) | Input clk is unused
@W:CL159 : ddc.vhd(1793) | Input GlobalEnable1 is unused
@W:CL159 : ddc.vhd(1794) | Input GlobalReset is unused
@W:CL247 : SynLib_asynch.vhd(1566) | Input port bit 17 of inp(17 downto 0) is unused 
@W:CL246 : ddc.vhd(2232) | Input port bits 13 to 0 of z_in(14 downto 0) are unused 
@W:CL159 : ddc.vhd(2227) | Input clk is unused
@W:CL159 : ddc.vhd(2228) | Input GlobalEnable1 is unused
@W:CL159 : ddc.vhd(2229) | Input GlobalReset is unused
@W:CL246 : SynLib_asynch.vhd(1952) | Input port bits 33 to 32 of inp(33 downto 0) are unused 
@W:CL246 : SynLib_asynch.vhd(1952) | Input port bits 43 to 42 of inp(43 downto 0) are unused 
@W:CL246 : SynLib_asynch.vhd(1952) | Input port bits 27 to 0 of inp(43 downto 0) are unused 
@W:CL247 : SynLib_asynch.vhd(1566) | Input port bit 44 of inp(44 downto 0) is unused 
@W:CL247 : SynLib_asynch.vhd(1566) | Input port bit 15 of inp(15 downto 0) is unused 
@W:CL247 : SynLib_asynch.vhd(1952) | Input port bit 14 of inp(14 downto 0) is unused 
@W:CL279 : ddc.vhd(205) | Pruning register bits 14 to 8 of mem_22(14 downto 0)  
@W:CL279 : ddc.vhd(205) | Pruning register bits 14 to 10 of mem_21(14 downto 0)  
@W:CL279 : ddc.vhd(205) | Pruning register bits 14 to 11 of mem_20(14 downto 0)  
@W:CL279 : ddc.vhd(205) | Pruning register bits 14 to 12 of mem_19(14 downto 0)  
@W:CL279 : ddc.vhd(205) | Pruning register bits 14 to 13 of mem_18(14 downto 0)  
@W:CL260 : ddc.vhd(205) | Pruning register bit 14 of mem_17(14 downto 0)  
@W:CL279 : ddc.vhd(88) | Pruning register bits 14 to 8 of mem_23(14 downto 0)  
@W:CL279 : ddc.vhd(88) | Pruning register bits 14 to 9 of mem_22(14 downto 0)  
@W:CL279 : ddc.vhd(88) | Pruning register bits 14 to 10 of mem_21(14 downto 0)  
@W:CL279 : ddc.vhd(88) | Pruning register bits 14 to 11 of mem_20(14 downto 0)  
@W:CL279 : ddc.vhd(88) | Pruning register bits 14 to 12 of mem_19(14 downto 0)  
@W:CL279 : ddc.vhd(88) | Pruning register bits 14 to 12 of mem_18(14 downto 0)  
@W:CL279 : ddc.vhd(88) | Pruning register bits 14 to 13 of mem_17(14 downto 0)  
@W:CL260 : ddc.vhd(88) | Pruning register bit 14 of mem_16(14 downto 0)  

At c_vhdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 74MB peak: 75MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Wed Mar 02 18:59:36 2016

###########################################################]
Synopsys Netlist Linker, version comp201503sp1p1, Build 240R, built Dec  1 2015
@N: :  | Running in 64-bit mode 

Linker output is up to date. No re-linking necessary


At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 73MB peak: 74MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Wed Mar 02 18:59:36 2016

###########################################################]
@END

At c_hdl Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 3MB peak: 4MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Wed Mar 02 18:59:36 2016

###########################################################]

@A: :  | multi_srs_gen output is up to date. No run necessary. 
To force a re-synthesis, select [Resynthesize All] in menu [Run].
Click link to view previous log file.
Multi-srs Generator Report
Linked File: ddc_multi_srs_gen.srr
Pre-mapping Report

Synopsys Generic Technology Pre-mapping, Version mapact, Build 1659R, Built Dec 10 2015 09:44:42
Copyright (C) 1994-2015, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use, reproduction, or distribution of this software is strictly prohibited.
Product Version J-2015.03M-SP1-2

Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 99MB)

Reading constraint file: C:\demo\DDC_top\designer\ddc\synthesis.fdc
Linked File: ddc_scck.rpt
Printing clock  summary report in "C:\demo\DDC_top\synthesis\ddc_scck.rpt" file 
@N:MF248 :  | Running in 64-bit mode. 
@N:MF667 :  | Clock conversion disabled  

Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 110MB peak: 113MB)


Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 110MB peak: 113MB)


Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 111MB peak: 113MB)


Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 111MB peak: 114MB)

syn_allowed_resources : blockrams=69,dsps=72  set on top level netlist ddc

Finished netlist restructuring (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 153MB peak: 155MB)



@S |Clock Summary
*****************

Start         Requested     Requested     Clock        Clock           
Clock         Frequency     Period        Type         Group           
-----------------------------------------------------------------------
clk           40.0 MHz      25.000        declared     default_clkgroup
clkDiv64      0.6 MHz       1600.000      declared     default_clkgroup
clkDiv128     0.3 MHz       3200.000      declared     default_clkgroup
=======================================================================

Finished Pre Mapping Phase.
@N:BN225 :  | Writing default property annotation file C:\demo\DDC_top\synthesis\ddc.sap. 
Pre-mapping successful!

At Mapper Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 86MB peak: 155MB)

Process took 0h:00m:01s realtime, 0h:00m:01s cputime
# Wed Mar 02 18:59:37 2016

###########################################################]
Map & Optimize Report

Synopsys Generic Technology Mapper, Version mapact, Build 1659R, Built Dec 10 2015 09:44:42
Copyright (C) 1994-2015, Synopsys, Inc. This software and the associated documentation are proprietary to Synopsys, Inc. This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc.  All other use, reproduction, or distribution of this software is strictly prohibited.
Product Version J-2015.03M-SP1-2

Mapper Startup Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 99MB)

@N:MF248 :  | Running in 64-bit mode. 
@N:MF667 :  | Clock conversion disabled  

Design Input Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)


Mapper Initialization Complete (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 99MB peak: 100MB)


Start loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 101MB peak: 101MB)


Finished loading timing files (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 101MB peak: 103MB)



Starting Optimization and Mapping (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 137MB peak: 139MB)


Available hyper_sources - for debug and ip models
	None Found

@W:BN132 : ddc.vhd(3755) | Removing sequential instance CIC_I_block.myCIC_I.DownsampleCounterclkDrate64[5:0],  because it is equivalent to instance CIC_Q_block.myCIC_Q.DownsampleCounterclkDrate64[5:0]
@W:BN132 : ddc.vhd(3751) | Removing user instance CIC_I_block.myCIC_I.un1_DownsampleCounterclkDrate64[1],  because it is equivalent to instance CIC_Q_block.myCIC_Q.un1_DownsampleCounterclkDrate64[1]
@W:BN132 : ddc.vhd(3751) | Removing user instance CIC_I_block.myCIC_I.un1_DownsampleCounterclkDrate64[2],  because it is equivalent to instance CIC_Q_block.myCIC_Q.un1_DownsampleCounterclkDrate64[2]
@W:BN132 : ddc.vhd(3751) | Removing user instance CIC_I_block.myCIC_I.un1_DownsampleCounterclkDrate64[3],  because it is equivalent to instance CIC_Q_block.myCIC_Q.un1_DownsampleCounterclkDrate64[3]
@W:BN132 : ddc.vhd(3758) | Removing user instance CIC_I_block.myCIC_I.dcntProc1_64_proc.DownsampleCounterclkDrate64_5[5:0],  because it is equivalent to instance CIC_Q_block.myCIC_Q.dcntProc1_64_proc.DownsampleCounterclkDrate64_5[5:0]
@W:BN132 : ddc.vhd(3751) | Removing user instance CIC_I_block.myCIC_I.un1_DownsampleCounterclkDrate64[6],  because it is equivalent to instance CIC_Q_block.myCIC_Q.un1_DownsampleCounterclkDrate64[6]
@W:BN132 : ddc.vhd(3751) | Removing user instance CIC_I_block.myCIC_I.un1_DownsampleCounterclkDrate64[4],  because it is equivalent to instance CIC_Q_block.myCIC_Q.un1_DownsampleCounterclkDrate64[4]
@W:BN132 : ddc.vhd(3751) | Removing user instance CIC_I_block.myCIC_I.un1_DownsampleCounterclkDrate64[5],  because it is equivalent to instance CIC_Q_block.myCIC_Q.un1_DownsampleCounterclkDrate64[5]

Finished RTL optimizations (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 143MB peak: 147MB)

@N: : ddc.vhd(3755) | Found counter in view:work.ddc(structural) inst CIC_Q_block\.myCIC_Q.DownsampleCounterclkDrate64[5:0]
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_0 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_1 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_2 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_3 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_4 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_5 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_6 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_7 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_8 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_9 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_10 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_11 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_12 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_13 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_14 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_15 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_16 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_17 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_18 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_19 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_20 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_21 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_22 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_23 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_24 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_25 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_26 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_27 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_28 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_29 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_30 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_31 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_32 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_33 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_34 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_35 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_36 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_37 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_38 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_39 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_40 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_41 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_42 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_43 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_44 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_45 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_46 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_47 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_48 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_49 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_50 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_51 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_52 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_53 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_54 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_55 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_56 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_57 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_58 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_59 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_60 of view:PrimLib.dffr(prim) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[0] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[1] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[2] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[3] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[4] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[5] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[6] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[7] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[8] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[9] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[10] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[11] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[12] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[13] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[14] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[15] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[16] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[17] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[18] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance PhaseGenerator_block\.myPhaseGenerator.shrp2_block\.myshrp2.Delay0_block.genonedelay\.OneDelay.outp[19] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS(structural) because there are no references to its outputs 
@W:MO129 : synlib_asynch.vhd(2296) | Sequential instance DDS_block.myDDS.PhaseGenerator_block.myPhaseGenerator.shrp1_block.myshrp1.Delay0_block.genonedelay.OneDelay.outp[32] reduced to a combinational gate by constant propagation
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance Delay2_block.genonedelay\.OneDelay.outp[15] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS_SinCos(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance Delay1_block.genonedelay\.OneDelay.outp[15] of view:PrimLib.dffr(prim) in hierarchy view:work.DDS_SinCos(structural) because there are no references to its outputs 
@N:FX404 : synlib_asynch.vhd(1624) | Found addmux in view:work.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1(structural) inst CORDIC_stg2_block\.myCORDIC_stg2.Convert2.sgn\.DOSAT\.Convert.rndOutput[16:0] from CORDIC_stg2_block\.myCORDIC_stg2.Convert2.sgn\.DOSAT\.Convert.un11_rndoutput[16:0] 
@N:FX404 : synlib_asynch.vhd(1624) | Found addmux in view:work.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1(structural) inst CORDIC_stg2_block\.myCORDIC_stg2.Convert1.sgn\.DOSAT\.Convert.rndOutput[16:0] from CORDIC_stg2_block\.myCORDIC_stg2.Convert1.sgn\.DOSAT\.Convert.un11_rndoutput[16:0] 
@W:MO129 : synlib_asynch.vhd(2296) | Sequential instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay3_block.genonedelay.OneDelay.outp[0] reduced to a combinational gate by constant propagation
@W:MO129 : synlib_asynch.vhd(2296) | Sequential instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay1_block.genonedelay.OneDelay.outp[4] reduced to a combinational gate by constant propagation
@W:MO129 : synlib_asynch.vhd(2296) | Sequential instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay1_block.genonedelay.OneDelay.outp[7] reduced to a combinational gate by constant propagation
@W:MO129 : synlib_asynch.vhd(2296) | Sequential instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay1_block.genonedelay.OneDelay.outp[10] reduced to a combinational gate by constant propagation
@W:MO129 : synlib_asynch.vhd(2296) | Sequential instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay1_block.genonedelay.OneDelay.outp[11] reduced to a combinational gate by constant propagation
@W:MO129 : synlib_asynch.vhd(2296) | Sequential instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay1_block.genonedelay.OneDelay.outp[13] reduced to a combinational gate by constant propagation
@W:MO129 : synlib_asynch.vhd(2296) | Sequential instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay1_block.genonedelay.OneDelay.outp[14] reduced to a combinational gate by constant propagation
@W:MO129 : synlib_asynch.vhd(2296) | Sequential instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay1_block.genonedelay.OneDelay.outp[15] reduced to a combinational gate by constant propagation
@W:MO129 : synlib_asynch.vhd(2296) | Sequential instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay1_block.genonedelay.OneDelay.outp[16] reduced to a combinational gate by constant propagation
@W:BN132 : synlib_asynch.vhd(2296) | Removing instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay2_block.genonedelay.OneDelay.outp[16],  because it is equivalent to instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay2_block.genonedelay.OneDelay.outp[4]
@W:BN132 : synlib_asynch.vhd(2296) | Removing instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay2_block.genonedelay.OneDelay.outp[15],  because it is equivalent to instance DDS_block.myDDS.SinCos_block.mySinCos.CORDIC_SinCos_block.myCORDIC_SinCos.CORDIC2_stage_block.myCORDIC2_stage.CORDIC_onequadrant1_block.myCORDIC_onequadrant1.CORDIC_stg1_block.myCORDIC_stg1.Delay2_block.genonedelay.OneDelay.outp[4]

Finished factoring (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 151MB peak: 152MB)

@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_92 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_93 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_94 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_95 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_96 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_97 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_98 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_99 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_100 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_101 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_102 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_103 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_104 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_105 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_106 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_107 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_108 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_109 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_110 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_111 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_112 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_113 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_114 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_115 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_116 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_117 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_118 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_119 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_120 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_121 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_122 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_61 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_62 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_63 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_64 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_65 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_66 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_67 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_68 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_69 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_70 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_71 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_72 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_73 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_74 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_75 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_76 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_77 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_78 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_79 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_80 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_81 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_82 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_83 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_84 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_85 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_86 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_87 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_88 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_89 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_90 in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance NoName_91 in hierarchy view:work.ddc(structural) because there are no references to its outputs 

Finished gated-clock and generated-clock conversion (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 160MB peak: 162MB)


Finished generic timing optimizations - Pass 1 (Real Time elapsed 0h:00m:01s; CPU Time elapsed 0h:00m:01s; Memory used current: 151MB peak: 162MB)

@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_0[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_0[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_0[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_0[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.C5_block\.myC5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.C5_block\.myC5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.C5_block\.myC5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.C5_block\.myC5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@W:FX665 : ddc.vhd(205) | Removing instance CFIR_I_PolyphaseFIR_1_block®myCFIR_I_PolyphaseFIR_1.mem_22[7] because it is equivalent to instance CFIR_I_PolyphaseFIR_1_block®myCFIR_I_PolyphaseFIR_1.mem_22[6]
@W:FX665 : ddc.vhd(88) | Removing instance CFIR_I_PolyphaseFIR_0_block®myCFIR_I_PolyphaseFIR_0.mem_23[7] because it is equivalent to instance CFIR_I_PolyphaseFIR_0_block®myCFIR_I_PolyphaseFIR_0.mem_23[6]
@W:FX665 : ddc.vhd(205) | Removing instance CFIR_Q_PolyphaseFIR_1_block®myCFIR_Q_PolyphaseFIR_1.mem_22[7] because it is equivalent to instance CFIR_Q_PolyphaseFIR_1_block®myCFIR_Q_PolyphaseFIR_1.mem_22[6]
@W:FX665 : ddc.vhd(88) | Removing instance CFIR_Q_PolyphaseFIR_0_block®myCFIR_Q_PolyphaseFIR_0.mem_23[7] because it is equivalent to instance CFIR_Q_PolyphaseFIR_0_block®myCFIR_Q_PolyphaseFIR_0.mem_23[6]
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_1[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_1[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.C4_block\.myC4.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.C4_block\.myC4.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.C4_block\.myC4.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.C4_block\.myC4.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_1[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_1[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_2[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_2[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.C3_block\.myC3.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.C3_block\.myC3.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.C3_block\.myC3.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.C3_block\.myC3.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_2[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_2[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_3[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_3[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.C2_block\.myC2.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.C2_block\.myC2.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.C2_block\.myC2.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.C2_block\.myC2.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_3[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_3[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_4[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_4[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_4[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_4[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_5[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_5[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_5[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_5[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_6[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_6[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_6[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_6[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_7[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_7[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_7[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_7[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_8[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_8[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_8[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_8[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_9[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_9[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_9[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_9[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_10[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_10[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_10[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_10[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_11[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_11[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_11[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_11[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_12[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_12[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_12[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_12[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_13[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_13[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_13[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_13[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_14[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_14[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_14[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_14[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_Q_PolyphaseFIR_0_block\.myCFIR_Q_PolyphaseFIR_0.FIR_proc\.mem_15[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(88) | Removing sequential instance CFIR_I_PolyphaseFIR_0_block\.myCFIR_I_PolyphaseFIR_0.FIR_proc\.mem_15[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_15[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_15[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_16[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@N:BN362 : ddc.vhd(205) | Removing sequential instance CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_16[14] in hierarchy view:work.ddc(structural) because there are no references to its outputs 

Starting Early Timing Optimization (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 162MB peak: 162MB)


Finished Early Timing Optimization (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 162MB peak: 162MB)


Finished generic timing optimizations - Pass 2 (Real Time elapsed 0h:00m:03s; CPU Time elapsed 0h:00m:03s; Memory used current: 159MB peak: 162MB)

@N:BN362 : synlib_asynch.vhd(3441) | Removing sequential instance DDS_block\.myDDS.PhaseGenerator_block\.myPhaseGenerator.Acc_p_block\.myAcc_p.accS[32] in hierarchy view:work.ddc(structural) because there are no references to its outputs 

Finished preparing to map (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 161MB peak: 162MB)


Finished technology mapping (Real Time elapsed 0h:00m:04s; CPU Time elapsed 0h:00m:04s; Memory used current: 159MB peak: 163MB)

Pass		 CPU time		Worst Slack		Luts / Registers
------------------------------------------------------------
   1		0h:00m:05s		    -0.41ns		3383 /      2918
   2		0h:00m:05s		    -0.41ns		3383 /      2918
@N:FX271 : synlib_asynch.vhd(2296) | Instance "DDS_block\.myDDS.SinCos_block\.mySinCos.CORDIC_SinCos_block\.myCORDIC_SinCos.CORDIC2_stage_block\.myCORDIC2_stage.CORDIC_onequadrant1_block\.myCORDIC_onequadrant1.CORDIC_stg10_block\.myCORDIC_stg10.Delay1_block.genonedelay\.OneDelay.outp[16]" with 7 loads replicated 1 times to improve timing 
@N:FX271 : synlib_asynch.vhd(2296) | Instance "DDS_block\.myDDS.SinCos_block\.mySinCos.CORDIC_SinCos_block\.myCORDIC_SinCos.CORDIC2_stage_block\.myCORDIC2_stage.CORDIC_onequadrant1_block\.myCORDIC_onequadrant1.CORDIC_stg10_block\.myCORDIC_stg10.Delay2_block.genonedelay\.OneDelay.outp[16]" with 7 loads replicated 1 times to improve timing 
Timing driven replication report
Added 2 Registers via timing driven replication
Added 0 LUTs via timing driven replication



   3		0h:00m:06s		    -0.13ns		3377 /      2920


   4		0h:00m:06s		    -0.13ns		3377 /      2920
@N:FP130 :  | Promoting Net GlobalReset_c on CLKINT  I_1430  
@N:FP130 :  | Promoting Net clkDiv128_c on CLKINT  I_1431  
@N:FP130 :  | Promoting Net clk_c on CLKINT  I_1432  
@N:FP130 :  | Promoting Net clkDiv64_c on CLKINT  I_1433  

Added 0 Buffers
Added 0 Cells via replication
	Added 0 Sequential Cells via replication
	Added 0 Combinational Cells via replication

Finished technology timing optimizations and critical path resynthesis (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:07s; Memory used current: 161MB peak: 172MB)

@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.Rate_block\.dsDelay_block.genonedelay\.OneDelay.outp[42] of view:ACG4.SLE(PRIM) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@A:BN291 : synlib_asynch.vhd(2296) | Boundary register CIC_I_block\.myCIC_I.Rate_block\.dsDelay_block.genonedelay\.OneDelay.outp[42] packed into a complex cell. To disable register packing, set syn_keep=1 on net between register and complex cell. 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_I_block\.myCIC_I.Rate_block\.dsDelay_block.genonedelay\.OneDelay.outp[43] of view:ACG4.SLE(PRIM) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@A:BN291 : synlib_asynch.vhd(2296) | Boundary register CIC_I_block\.myCIC_I.Rate_block\.dsDelay_block.genonedelay\.OneDelay.outp[43] packed into a complex cell. To disable register packing, set syn_keep=1 on net between register and complex cell. 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.Rate_block\.dsDelay_block.genonedelay\.OneDelay.outp[42] of view:ACG4.SLE(PRIM) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@A:BN291 : synlib_asynch.vhd(2296) | Boundary register CIC_Q_block\.myCIC_Q.Rate_block\.dsDelay_block.genonedelay\.OneDelay.outp[42] packed into a complex cell. To disable register packing, set syn_keep=1 on net between register and complex cell. 
@N:BN362 : synlib_asynch.vhd(2296) | Removing sequential instance CIC_Q_block\.myCIC_Q.Rate_block\.dsDelay_block.genonedelay\.OneDelay.outp[43] of view:ACG4.SLE(PRIM) in hierarchy view:work.ddc(structural) because there are no references to its outputs 
@A:BN291 : synlib_asynch.vhd(2296) | Boundary register CIC_Q_block\.myCIC_Q.Rate_block\.dsDelay_block.genonedelay\.OneDelay.outp[43] packed into a complex cell. To disable register packing, set syn_keep=1 on net between register and complex cell. 

Finished restoring hierarchy (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:07s; Memory used current: 164MB peak: 172MB)



#### START OF CLOCK OPTIMIZATION REPORT #####[

Clock optimization not enabled
3 non-gated/non-generated clock tree(s) driving 2916 clock pin(s) of sequential element(s)
0 gated/generated clock tree(s) driving 0 clock pin(s) of sequential element(s)
0 instances converted, 0 sequential instances remain driven by gated/generated clocks

======================================== Non-Gated/Non-Generated Clocks ========================================
Clock Tree ID     Driving Element     Drive Element Type           Fanout     Sample Instance                   
----------------------------------------------------------------------------------------------------------------
ClockId0001        clkDiv128           clock definition on port     1290       Q_out_block.medQ_out[0]           
ClockId0002        clk                 clock definition on port     1149       Freq_block.medFreq[0]             
ClockId0003        clkDiv64            clock definition on port     477        DownsampleCounterclkDiv64Drate2[0]
================================================================================================================


##### END OF CLOCK OPTIMIZATION REPORT ######]


Start Writing Netlists (Real Time elapsed 0h:00m:07s; CPU Time elapsed 0h:00m:07s; Memory used current: 122MB peak: 172MB)

Writing Analyst data base C:\demo\DDC_top\synthesis\synwork\ddc_m.srm

Finished Writing Netlist Databases (Real Time elapsed 0h:00m:11s; CPU Time elapsed 0h:00m:11s; Memory used current: 157MB peak: 172MB)

Writing EDIF Netlist and constraint files
@N:BW103 :  | Synopsys Constraint File time units using default value of 1ns  
@N:BW107 :  | Synopsys Constraint File capacitance units using default value of 1pF  
J-2015.03M-SP1-2

Finished Writing EDIF Netlist and constraint files (Real Time elapsed 0h:00m:13s; CPU Time elapsed 0h:00m:13s; Memory used current: 159MB peak: 172MB)


Start final timing analysis (Real Time elapsed 0h:00m:13s; CPU Time elapsed 0h:00m:13s; Memory used current: 159MB peak: 172MB)

Found clock clk with period 25.00ns 
Found clock clkDiv128 with period 3200.00ns 
Found clock clkDiv64 with period 1600.00ns 


@S |##### START OF TIMING REPORT #####[
# Timing Report written on Wed Mar 02 18:59:52 2016
#


Top view:               ddc
Requested Frequency:    0.3 MHz
Wire load mode:         top
Paths requested:        5
Constraint File(s):    C:\demo\DDC_top\designer\ddc\synthesis.fdc
                       
@N:MT320 :  | Timing report estimates place and route data. Please look at the place and route timing report for final timing. 

@N:MT322 :  | Clock constraints cover only FF-to-FF paths associated with the clock. 



Performance Summary 
*******************


Worst slack in design: 10.736

                   Requested     Estimated     Requested     Estimated                  Clock        Clock           
Starting Clock     Frequency     Frequency     Period        Period        Slack        Type         Group           
---------------------------------------------------------------------------------------------------------------------
clk                40.0 MHz      70.1 MHz      25.000        14.264        10.736       declared     default_clkgroup
clkDiv64           0.6 MHz       1.7 MHz       1600.000      591.635       1590.892     declared     default_clkgroup
clkDiv128          0.3 MHz       73.0 MHz      3200.000      13.705        3191.683     declared     default_clkgroup
=====================================================================================================================





Clock Relationships
*******************

Clocks                |    rise  to  rise      |    fall  to  fall   |    rise  to  fall   |    fall  to  rise 
---------------------------------------------------------------------------------------------------------------
Starting   Ending     |  constraint  slack     |  constraint  slack  |  constraint  slack  |  constraint  slack
---------------------------------------------------------------------------------------------------------------
clk        clk        |  25.000      10.736    |  No paths    -      |  No paths    -      |  No paths    -    
clk        clkDiv64   |  25.000      15.756    |  No paths    -      |  No paths    -      |  No paths    -    
clkDiv64   clkDiv64   |  1600.000    1590.892  |  No paths    -      |  No paths    -      |  No paths    -    
clkDiv64   clkDiv128  |  1600.000    1593.147  |  No paths    -      |  No paths    -      |  No paths    -    
clkDiv128  clkDiv128  |  3200.000    3191.683  |  No paths    -      |  No paths    -      |  No paths    -    
===============================================================================================================
 Note: 'No paths' indicates there are no paths in the design for that pair of clock edges.
       'Diff grp' indicates that paths exist but the starting clock and ending clock are in different clock groups.



Interface Information 
*********************

No IO constraint found



====================================
Detailed Report for Clock: clk
====================================



Starting Points with Worst Slack
********************************

                                                                                        Starting                                   Arrival           
Instance                                                                                Reference     Type     Pin     Net         Time        Slack 
                                                                                        Clock                                                        
-----------------------------------------------------------------------------------------------------------------------------------------------------
DDS_block\.myDDS.SinCos_block\.mySinCos.Delay1_block.genonedelay\.OneDelay.outp[16]     clk           SLE      Q       N_6[16]     0.108       10.736
DDS_block\.myDDS.SinCos_block\.mySinCos.Delay2_block.genonedelay\.OneDelay.outp[16]     clk           SLE      Q       N_7[16]     0.108       10.736
DDS_block\.myDDS.SinCos_block\.mySinCos.Delay1_block.genonedelay\.OneDelay.outp[3]      clk           SLE      Q       N_6[3]      0.108       10.933
DDS_block\.myDDS.SinCos_block\.mySinCos.Delay2_block.genonedelay\.OneDelay.outp[3]      clk           SLE      Q       N_7[3]      0.108       10.933
DDS_block\.myDDS.SinCos_block\.mySinCos.Delay1_block.genonedelay\.OneDelay.outp[4]      clk           SLE      Q       N_6[4]      0.108       10.949
DDS_block\.myDDS.SinCos_block\.mySinCos.Delay2_block.genonedelay\.OneDelay.outp[4]      clk           SLE      Q       N_7[4]      0.108       10.949
DDS_block\.myDDS.SinCos_block\.mySinCos.Delay1_block.genonedelay\.OneDelay.outp[0]      clk           SLE      Q       N_6[0]      0.108       10.964
DDS_block\.myDDS.SinCos_block\.mySinCos.Delay2_block.genonedelay\.OneDelay.outp[0]      clk           SLE      Q       N_7[0]      0.108       10.964
DDS_block\.myDDS.SinCos_block\.mySinCos.Delay1_block.genonedelay\.OneDelay.outp[5]      clk           SLE      Q       N_6[5]      0.108       10.966
DDS_block\.myDDS.SinCos_block\.mySinCos.Delay2_block.genonedelay\.OneDelay.outp[5]      clk           SLE      Q       N_7[5]      0.108       10.966
=====================================================================================================================================================


Ending Points with Worst Slack
******************************

                                                                                                                 Starting                                   Required           
Instance                                                                                                         Reference     Type     Pin     Net         Time         Slack 
                                                                                                                 Clock                                                         
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
CIC_I_block\.myCIC_I.I5_block\.myI5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43]     clk           SLE      D       N_7[43]     24.745       10.736
CIC_Q_block\.myCIC_Q.I5_block\.myI5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43]     clk           SLE      D       N_7[43]     24.745       10.736
CIC_I_block\.myCIC_I.I5_block\.myI5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42]     clk           SLE      D       N_7[42]     24.745       10.957
CIC_Q_block\.myCIC_Q.I5_block\.myI5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[42]     clk           SLE      D       N_7[42]     24.745       10.957
CIC_I_block\.myCIC_I.I5_block\.myI5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[41]     clk           SLE      D       N_7[41]     24.745       10.967
CIC_Q_block\.myCIC_Q.I5_block\.myI5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[41]     clk           SLE      D       N_7[41]     24.745       10.967
CIC_I_block\.myCIC_I.Rate_block\.dsDelay_block.genonedelay\.OneDelay.outp[41]                                    clk           SLE      D       N_7[41]     24.745       10.967
CIC_Q_block\.myCIC_Q.Rate_block\.dsDelay_block.genonedelay\.OneDelay.outp[41]                                    clk           SLE      D       N_7[41]     24.745       10.967
CIC_Q_block\.myCIC_Q.I5_block\.myI5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[40]     clk           SLE      D       N_7[40]     24.745       10.983
CIC_I_block\.myCIC_I.I5_block\.myI5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[40]     clk           SLE      D       N_7[40]     24.745       10.983
===============================================================================================================================================================================



Worst Path Information
View Worst Path in Analyst
***********************


Path information for path number 1: 
      Requested Period:                      25.000
    - Setup time:                            0.255
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         24.745

    - Propagation time:                      14.009
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (critical) :                     10.736

    Number of logic level(s):                59
    Starting point:                          DDS_block\.myDDS.SinCos_block\.mySinCos.Delay1_block.genonedelay\.OneDelay.outp[16] / Q
    Ending point:                            CIC_Q_block\.myCIC_Q.I5_block\.myI5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43] / D
    The start point is clocked by            clk [rising] on pin CLK
    The end   point is clocked by            clk [rising] on pin CLK

Instance / Net                                                                                                            Pin       Pin               Arrival     No. of    
Name                                                                                                             Type     Name      Dir     Delay     Time        Fan Out(s)
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------
DDS_block\.myDDS.SinCos_block\.mySinCos.Delay1_block.genonedelay\.OneDelay.outp[16]                              SLE      Q         Out     0.108     0.108       -         
N_6[16]                                                                                                          Net      -         -       0.733     -           3         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_0                               ARI1     B         In      -         0.841       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_0                               ARI1     FCO       Out     0.201     1.042       -         
un1_inp_cry_0                                                                                                    Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_1                               ARI1     FCI       In      -         1.042       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_1                               ARI1     FCO       Out     0.016     1.058       -         
un1_inp_cry_1                                                                                                    Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_2                               ARI1     FCI       In      -         1.058       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_2                               ARI1     FCO       Out     0.016     1.075       -         
un1_inp_cry_2                                                                                                    Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_3                               ARI1     FCI       In      -         1.075       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_3                               ARI1     FCO       Out     0.016     1.091       -         
un1_inp_cry_3                                                                                                    Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_4                               ARI1     FCI       In      -         1.091       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_4                               ARI1     FCO       Out     0.016     1.107       -         
un1_inp_cry_4                                                                                                    Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_5                               ARI1     FCI       In      -         1.107       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_5                               ARI1     FCO       Out     0.016     1.123       -         
un1_inp_cry_5                                                                                                    Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_6                               ARI1     FCI       In      -         1.123       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_6                               ARI1     FCO       Out     0.016     1.140       -         
un1_inp_cry_6                                                                                                    Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_7                               ARI1     FCI       In      -         1.140       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_7                               ARI1     FCO       Out     0.016     1.156       -         
un1_inp_cry_7                                                                                                    Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_8                               ARI1     FCI       In      -         1.156       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_8                               ARI1     FCO       Out     0.016     1.172       -         
un1_inp_cry_8                                                                                                    Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_9                               ARI1     FCI       In      -         1.172       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_9                               ARI1     FCO       Out     0.016     1.189       -         
un1_inp_cry_9                                                                                                    Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_10                              ARI1     FCI       In      -         1.189       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_10                              ARI1     FCO       Out     0.016     1.205       -         
un1_inp_cry_10                                                                                                   Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_11                              ARI1     FCI       In      -         1.205       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_11                              ARI1     FCO       Out     0.016     1.221       -         
un1_inp_cry_11                                                                                                   Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_12                              ARI1     FCI       In      -         1.221       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_12                              ARI1     FCO       Out     0.016     1.238       -         
un1_inp_cry_12                                                                                                   Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_13                              ARI1     FCI       In      -         1.238       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_cry_13                              ARI1     FCO       Out     0.016     1.254       -         
un1_inp_cry_13                                                                                                   Net      -         -       0.000     -           1         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_s_14                                ARI1     FCI       In      -         1.254       -         
DDS_block\.myDDS.SinCos_block\.mySinCos.Convert3.sgn\.DOSAT\.Convert.un1_inp_s_14                                ARI1     S         Out     0.073     1.327       -         
N_3[11]                                                                                                          Net      -         -       1.134     -           7         
tmpOut_4_mulonly_0[19:0]                                                                                         MACC     B[11]     In      -         2.461       -         
tmpOut_4_mulonly_0[19:0]                                                                                         MACC     P[11]     Out     2.470     4.931       -         
tmpOut_4[11]                                                                                                     Net      -         -       1.117     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_5                                                         ARI1     B         In      -         6.048       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_5                                                         ARI1     FCO       Out     0.201     6.248       -         
un18_tmpoutpre_cry_5                                                                                             Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_6                                                         ARI1     FCI       In      -         6.248       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_6                                                         ARI1     FCO       Out     0.016     6.265       -         
un18_tmpoutpre_cry_6                                                                                             Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_7                                                         ARI1     FCI       In      -         6.265       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_7                                                         ARI1     FCO       Out     0.016     6.281       -         
un18_tmpoutpre_cry_7                                                                                             Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_8                                                         ARI1     FCI       In      -         6.281       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_8                                                         ARI1     FCO       Out     0.016     6.297       -         
un18_tmpoutpre_cry_8                                                                                             Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_9                                                         ARI1     FCI       In      -         6.297       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_9                                                         ARI1     FCO       Out     0.016     6.314       -         
un18_tmpoutpre_cry_9                                                                                             Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_10                                                        ARI1     FCI       In      -         6.314       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_10                                                        ARI1     FCO       Out     0.016     6.330       -         
un18_tmpoutpre_cry_10                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_11                                                        ARI1     FCI       In      -         6.330       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_11                                                        ARI1     FCO       Out     0.016     6.346       -         
un18_tmpoutpre_cry_11                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_12                                                        ARI1     FCI       In      -         6.346       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_12                                                        ARI1     FCO       Out     0.016     6.362       -         
un18_tmpoutpre_cry_12                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_13                                                        ARI1     FCI       In      -         6.362       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_13                                                        ARI1     FCO       Out     0.016     6.379       -         
un18_tmpoutpre_cry_13                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_14                                                        ARI1     FCI       In      -         6.379       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_14                                                        ARI1     FCO       Out     0.016     6.395       -         
un18_tmpoutpre_cry_14                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_15                                                        ARI1     FCI       In      -         6.395       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_15                                                        ARI1     FCO       Out     0.016     6.411       -         
un18_tmpoutpre_cry_15                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_16                                                        ARI1     FCI       In      -         6.411       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_16                                                        ARI1     FCO       Out     0.016     6.428       -         
un18_tmpoutpre_cry_16                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_17                                                        ARI1     FCI       In      -         6.428       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_17                                                        ARI1     FCO       Out     0.016     6.444       -         
un18_tmpoutpre_cry_17                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_18                                                        ARI1     FCI       In      -         6.444       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_18                                                        ARI1     FCO       Out     0.016     6.460       -         
un18_tmpoutpre_cry_18                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_19                                                        ARI1     FCI       In      -         6.460       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_19                                                        ARI1     FCO       Out     0.016     6.476       -         
un18_tmpoutpre_cry_19                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_20                                                        ARI1     FCI       In      -         6.476       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_20                                                        ARI1     FCO       Out     0.016     6.493       -         
un18_tmpoutpre_cry_20                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_21                                                        ARI1     FCI       In      -         6.493       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_21                                                        ARI1     FCO       Out     0.016     6.509       -         
un18_tmpoutpre_cry_21                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_22                                                        ARI1     FCI       In      -         6.509       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_22                                                        ARI1     FCO       Out     0.016     6.525       -         
un18_tmpoutpre_cry_22                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_23                                                        ARI1     FCI       In      -         6.525       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_23                                                        ARI1     FCO       Out     0.016     6.542       -         
un18_tmpoutpre_cry_23                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_24                                                        ARI1     FCI       In      -         6.542       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_24                                                        ARI1     FCO       Out     0.016     6.558       -         
un18_tmpoutpre_cry_24                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_25                                                        ARI1     FCI       In      -         6.558       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_25                                                        ARI1     FCO       Out     0.016     6.574       -         
un18_tmpoutpre_cry_25                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_26                                                        ARI1     FCI       In      -         6.574       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_26                                                        ARI1     FCO       Out     0.016     6.591       -         
un18_tmpoutpre_cry_26                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_27                                                        ARI1     FCI       In      -         6.591       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_27                                                        ARI1     FCO       Out     0.016     6.607       -         
un18_tmpoutpre_cry_27                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_28                                                        ARI1     FCI       In      -         6.607       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_28                                                        ARI1     FCO       Out     0.016     6.623       -         
un18_tmpoutpre_cry_28                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_29                                                        ARI1     FCI       In      -         6.623       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_29                                                        ARI1     FCO       Out     0.016     6.640       -         
un18_tmpoutpre_cry_29                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_30                                                        ARI1     FCI       In      -         6.640       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_30                                                        ARI1     FCO       Out     0.016     6.656       -         
un18_tmpoutpre_cry_30                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_31                                                        ARI1     FCI       In      -         6.656       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_31                                                        ARI1     FCO       Out     0.016     6.672       -         
un18_tmpoutpre_cry_31                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_32                                                        ARI1     FCI       In      -         6.672       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_32                                                        ARI1     FCO       Out     0.016     6.688       -         
un18_tmpoutpre_cry_32                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_33                                                        ARI1     FCI       In      -         6.688       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_33                                                        ARI1     FCO       Out     0.016     6.705       -         
un18_tmpoutpre_cry_33                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_34                                                        ARI1     FCI       In      -         6.705       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_34                                                        ARI1     FCO       Out     0.016     6.721       -         
un18_tmpoutpre_cry_34                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_35                                                        ARI1     FCI       In      -         6.721       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_35                                                        ARI1     FCO       Out     0.016     6.737       -         
un18_tmpoutpre_cry_35                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_36                                                        ARI1     FCI       In      -         6.737       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_36                                                        ARI1     FCO       Out     0.016     6.754       -         
un18_tmpoutpre_cry_36                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_37                                                        ARI1     FCI       In      -         6.754       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_37                                                        ARI1     FCO       Out     0.016     6.770       -         
un18_tmpoutpre_cry_37                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_38                                                        ARI1     FCI       In      -         6.770       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_38                                                        ARI1     FCO       Out     0.016     6.786       -         
un18_tmpoutpre_cry_38                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_39                                                        ARI1     FCI       In      -         6.786       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_39                                                        ARI1     FCO       Out     0.016     6.803       -         
un18_tmpoutpre_cry_39                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_40                                                        ARI1     FCI       In      -         6.803       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_40                                                        ARI1     FCO       Out     0.016     6.819       -         
un18_tmpoutpre_cry_40                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_41                                                        ARI1     FCI       In      -         6.819       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_41                                                        ARI1     FCO       Out     0.016     6.835       -         
un18_tmpoutpre_cry_41                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_42                                                        ARI1     FCI       In      -         6.835       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_cry_42                                                        ARI1     FCO       Out     0.016     6.851       -         
un18_tmpoutpre_cry_42                                                                                            Net      -         -       0.000     -           1         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_s_43                                                          ARI1     FCI       In      -         6.851       -         
CIC_Q_block\.myCIC_Q.I1_block\.myI1.un18_tmpoutpre_s_43                                                          ARI1     S         Out     0.073     6.924       -         
N_3[43]                                                                                                          Net      -         -       1.123     -           2         
CIC_Q_block\.myCIC_Q.I2_block\.myI2.un18_tmpoutpre_s_43                                                          ARI1     C         In      -         8.047       -         
CIC_Q_block\.myCIC_Q.I2_block\.myI2.un18_tmpoutpre_s_43                                                          ARI1     S         Out     0.369     8.416       -         
N_4[43]                                                                                                          Net      -         -       1.123     -           2         
CIC_Q_block\.myCIC_Q.I3_block\.myI3.un18_tmpoutpre_s_43                                                          ARI1     C         In      -         9.539       -         
CIC_Q_block\.myCIC_Q.I3_block\.myI3.un18_tmpoutpre_s_43                                                          ARI1     S         Out     0.369     9.908       -         
N_5[43]                                                                                                          Net      -         -       1.123     -           2         
CIC_Q_block\.myCIC_Q.I4_block\.myI4.un18_tmpoutpre_s_43                                                          ARI1     C         In      -         11.031      -         
CIC_Q_block\.myCIC_Q.I4_block\.myI4.un18_tmpoutpre_s_43                                                          ARI1     S         Out     0.369     11.400      -         
N_6[43]                                                                                                          Net      -         -       1.123     -           2         
CIC_Q_block\.myCIC_Q.I5_block\.myI5.un18_tmpoutpre_s_43                                                          ARI1     C         In      -         12.523      -         
CIC_Q_block\.myCIC_Q.I5_block\.myI5.un18_tmpoutpre_s_43                                                          ARI1     S         Out     0.369     12.892      -         
N_7[43]                                                                                                          Net      -         -       1.117     -           1         
CIC_Q_block\.myCIC_Q.I5_block\.myI5.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[43]     SLE      D         In      -         14.009      -         
============================================================================================================================================================================
Total path delay (propagation time + setup) of 14.264 is 5.671(39.8%) logic and 8.593(60.2%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value




====================================
Detailed Report for Clock: clkDiv64
====================================



Starting Points with Worst Slack
********************************

                                                                                                                Starting                                      Arrival             
Instance                                                                                                        Reference     Type     Pin     Net            Time        Slack   
                                                                                                                Clock                                                             
----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
CIC_I_block\.myCIC_I.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[0]     clkDiv64      SLE      Q       outBuf0[0]     0.087       1590.892
CIC_Q_block\.myCIC_Q.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[0]     clkDiv64      SLE      Q       outBuf0[0]     0.087       1590.892
CIC_Q_block\.myCIC_Q.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[1]     clkDiv64      SLE      Q       outBuf0[1]     0.087       1591.101
CIC_I_block\.myCIC_I.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[1]     clkDiv64      SLE      Q       outBuf0[1]     0.087       1591.101
CIC_Q_block\.myCIC_Q.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[2]     clkDiv64      SLE      Q       outBuf0[2]     0.087       1591.118
CIC_I_block\.myCIC_I.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[2]     clkDiv64      SLE      Q       outBuf0[2]     0.087       1591.118
CIC_Q_block\.myCIC_Q.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[3]     clkDiv64      SLE      Q       outBuf0[3]     0.087       1591.134
CIC_I_block\.myCIC_I.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[3]     clkDiv64      SLE      Q       outBuf0[3]     0.087       1591.134
CIC_I_block\.myCIC_I.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[4]     clkDiv64      SLE      Q       outBuf0[4]     0.087       1591.150
CIC_Q_block\.myCIC_Q.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[4]     clkDiv64      SLE      Q       outBuf0[4]     0.087       1591.150
==================================================================================================================================================================================


Ending Points with Worst Slack
******************************

                                                                        Starting                                    Required             
Instance                                                                Reference     Type     Pin     Net          Time         Slack   
                                                                        Clock                                                            
-----------------------------------------------------------------------------------------------------------------------------------------
CIC_I_block\.myCIC_I.Delay_RG1_block.genonedelay\.OneDelay.outp[13]     clkDiv64      SLE      D       N_14[13]     1599.745     1590.892
CIC_Q_block\.myCIC_Q.Delay_RG1_block.genonedelay\.OneDelay.outp[13]     clkDiv64      SLE      D       N_14[13]     1599.745     1590.892
CIC_I_block\.myCIC_I.Delay_RG1_block.genonedelay\.OneDelay.outp[12]     clkDiv64      SLE      D       N_14[12]     1599.745     1591.405
CIC_Q_block\.myCIC_Q.Delay_RG1_block.genonedelay\.OneDelay.outp[12]     clkDiv64      SLE      D       N_14[12]     1599.745     1591.405
CIC_Q_block\.myCIC_Q.Delay_RG1_block.genonedelay\.OneDelay.outp[11]     clkDiv64      SLE      D       N_14[11]     1599.745     1591.421
CIC_I_block\.myCIC_I.Delay_RG1_block.genonedelay\.OneDelay.outp[11]     clkDiv64      SLE      D       N_14[11]     1599.745     1591.421
CIC_I_block\.myCIC_I.Delay_RG1_block.genonedelay\.OneDelay.outp[10]     clkDiv64      SLE      D       N_14[10]     1599.745     1591.438
CIC_Q_block\.myCIC_Q.Delay_RG1_block.genonedelay\.OneDelay.outp[10]     clkDiv64      SLE      D       N_14[10]     1599.745     1591.438
CIC_I_block\.myCIC_I.Delay_RG1_block.genonedelay\.OneDelay.outp[9]      clkDiv64      SLE      D       N_14[9]      1599.745     1591.454
CIC_Q_block\.myCIC_Q.Delay_RG1_block.genonedelay\.OneDelay.outp[9]      clkDiv64      SLE      D       N_14[9]      1599.745     1591.454
=========================================================================================================================================



Worst Path Information
View Worst Path in Analyst
***********************


Path information for path number 1: 
      Requested Period:                      1600.000
    - Setup time:                            0.255
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         1599.745

    - Propagation time:                      8.852
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (non-critical) :                 1590.892

    Number of logic level(s):                46
    Starting point:                          CIC_I_block\.myCIC_I.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[0] / Q
    Ending point:                            CIC_I_block\.myCIC_I.Delay_RG1_block.genonedelay\.OneDelay.outp[13] / D
    The start point is clocked by            clkDiv64 [rising] on pin CLK
    The end   point is clocked by            clkDiv64 [rising] on pin CLK

Instance / Net                                                                                                           Pin      Pin               Arrival     No. of    
Name                                                                                                            Type     Name     Dir     Delay     Time        Fan Out(s)
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
CIC_I_block\.myCIC_I.C1_block\.myC1.Delay_syn_block\.myDelay_syn.Delay0_block.genonedelay\.OneDelay.outp[0]     SLE      Q        Out     0.087     0.087       -         
outBuf0[0]                                                                                                      Net      -        -       0.778     -           4         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_0                                                             ARI1     B        In      -         0.865       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_0                                                             ARI1     FCO      Out     0.178     1.043       -         
tmpOutPre_cry_0                                                                                                 Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_1                                                             ARI1     FCI      In      -         1.043       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_1                                                             ARI1     FCO      Out     0.016     1.060       -         
tmpOutPre_cry_1                                                                                                 Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_2                                                             ARI1     FCI      In      -         1.060       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_2                                                             ARI1     FCO      Out     0.016     1.076       -         
tmpOutPre_cry_2                                                                                                 Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_3                                                             ARI1     FCI      In      -         1.076       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_3                                                             ARI1     FCO      Out     0.016     1.092       -         
tmpOutPre_cry_3                                                                                                 Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_4                                                             ARI1     FCI      In      -         1.092       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_4                                                             ARI1     FCO      Out     0.016     1.108       -         
tmpOutPre_cry_4                                                                                                 Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_5                                                             ARI1     FCI      In      -         1.108       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_5                                                             ARI1     FCO      Out     0.016     1.125       -         
tmpOutPre_cry_5                                                                                                 Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_6                                                             ARI1     FCI      In      -         1.125       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_6                                                             ARI1     FCO      Out     0.016     1.141       -         
tmpOutPre_cry_6                                                                                                 Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_7                                                             ARI1     FCI      In      -         1.141       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_7                                                             ARI1     FCO      Out     0.016     1.157       -         
tmpOutPre_cry_7                                                                                                 Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_8                                                             ARI1     FCI      In      -         1.157       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_8                                                             ARI1     FCO      Out     0.016     1.174       -         
tmpOutPre_cry_8                                                                                                 Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_9                                                             ARI1     FCI      In      -         1.174       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_9                                                             ARI1     FCO      Out     0.016     1.190       -         
tmpOutPre_cry_9                                                                                                 Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_10                                                            ARI1     FCI      In      -         1.190       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_10                                                            ARI1     FCO      Out     0.016     1.206       -         
tmpOutPre_cry_10                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_11                                                            ARI1     FCI      In      -         1.206       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_11                                                            ARI1     FCO      Out     0.016     1.222       -         
tmpOutPre_cry_11                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_12                                                            ARI1     FCI      In      -         1.222       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_12                                                            ARI1     FCO      Out     0.016     1.239       -         
tmpOutPre_cry_12                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_13                                                            ARI1     FCI      In      -         1.239       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_13                                                            ARI1     FCO      Out     0.016     1.255       -         
tmpOutPre_cry_13                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_14                                                            ARI1     FCI      In      -         1.255       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_14                                                            ARI1     FCO      Out     0.016     1.271       -         
tmpOutPre_cry_14                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_15                                                            ARI1     FCI      In      -         1.271       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_15                                                            ARI1     FCO      Out     0.016     1.288       -         
tmpOutPre_cry_15                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_16                                                            ARI1     FCI      In      -         1.288       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_16                                                            ARI1     FCO      Out     0.016     1.304       -         
tmpOutPre_cry_16                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_17                                                            ARI1     FCI      In      -         1.304       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_17                                                            ARI1     FCO      Out     0.016     1.320       -         
tmpOutPre_cry_17                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_18                                                            ARI1     FCI      In      -         1.320       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_18                                                            ARI1     FCO      Out     0.016     1.337       -         
tmpOutPre_cry_18                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_19                                                            ARI1     FCI      In      -         1.337       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_19                                                            ARI1     FCO      Out     0.016     1.353       -         
tmpOutPre_cry_19                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_20                                                            ARI1     FCI      In      -         1.353       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_20                                                            ARI1     FCO      Out     0.016     1.369       -         
tmpOutPre_cry_20                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_21                                                            ARI1     FCI      In      -         1.369       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_21                                                            ARI1     FCO      Out     0.016     1.386       -         
tmpOutPre_cry_21                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_22                                                            ARI1     FCI      In      -         1.386       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_22                                                            ARI1     FCO      Out     0.016     1.402       -         
tmpOutPre_cry_22                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_23                                                            ARI1     FCI      In      -         1.402       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_23                                                            ARI1     FCO      Out     0.016     1.418       -         
tmpOutPre_cry_23                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_24                                                            ARI1     FCI      In      -         1.418       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_24                                                            ARI1     FCO      Out     0.016     1.434       -         
tmpOutPre_cry_24                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_25                                                            ARI1     FCI      In      -         1.434       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_25                                                            ARI1     FCO      Out     0.016     1.451       -         
tmpOutPre_cry_25                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_26                                                            ARI1     FCI      In      -         1.451       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_26                                                            ARI1     FCO      Out     0.016     1.467       -         
tmpOutPre_cry_26                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_27                                                            ARI1     FCI      In      -         1.467       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_27                                                            ARI1     FCO      Out     0.016     1.483       -         
tmpOutPre_cry_27                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_28                                                            ARI1     FCI      In      -         1.483       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_28                                                            ARI1     FCO      Out     0.016     1.500       -         
tmpOutPre_cry_28                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_29                                                            ARI1     FCI      In      -         1.500       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_29                                                            ARI1     FCO      Out     0.016     1.516       -         
tmpOutPre_cry_29                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_30                                                            ARI1     FCI      In      -         1.516       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_30                                                            ARI1     FCO      Out     0.016     1.532       -         
tmpOutPre_cry_30                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_31                                                            ARI1     FCI      In      -         1.532       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_31                                                            ARI1     FCO      Out     0.016     1.549       -         
tmpOutPre_cry_31                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_32                                                            ARI1     FCI      In      -         1.549       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_32                                                            ARI1     FCO      Out     0.016     1.565       -         
tmpOutPre_cry_32                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_33                                                            ARI1     FCI      In      -         1.565       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_33                                                            ARI1     FCO      Out     0.016     1.581       -         
tmpOutPre_cry_33                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_34                                                            ARI1     FCI      In      -         1.581       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_34                                                            ARI1     FCO      Out     0.016     1.597       -         
tmpOutPre_cry_34                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_35                                                            ARI1     FCI      In      -         1.597       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_35                                                            ARI1     FCO      Out     0.016     1.614       -         
tmpOutPre_cry_35                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_36                                                            ARI1     FCI      In      -         1.614       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_36                                                            ARI1     FCO      Out     0.016     1.630       -         
tmpOutPre_cry_36                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_37                                                            ARI1     FCI      In      -         1.630       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_37                                                            ARI1     FCO      Out     0.016     1.646       -         
tmpOutPre_cry_37                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_38                                                            ARI1     FCI      In      -         1.646       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_38                                                            ARI1     FCO      Out     0.016     1.663       -         
tmpOutPre_cry_38                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_39                                                            ARI1     FCI      In      -         1.663       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_39                                                            ARI1     FCO      Out     0.016     1.679       -         
tmpOutPre_cry_39                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_40                                                            ARI1     FCI      In      -         1.679       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_cry_40                                                            ARI1     FCO      Out     0.016     1.695       -         
tmpOutPre_cry_40                                                                                                Net      -        -       0.000     -           1         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_s_41                                                              ARI1     FCI      In      -         1.695       -         
CIC_I_block\.myCIC_I.C1_block\.myC1.tmpOutPre_s_41                                                              ARI1     S        Out     0.073     1.768       -         
N_9[41]                                                                                                         Net      -        -       1.123     -           2         
CIC_I_block\.myCIC_I.C2_block\.myC2.tmpOutPre_s_41                                                              ARI1     C        In      -         2.891       -         
CIC_I_block\.myCIC_I.C2_block\.myC2.tmpOutPre_s_41                                                              ARI1     S        Out     0.369     3.260       -         
N_10[41]                                                                                                        Net      -        -       1.123     -           2         
CIC_I_block\.myCIC_I.C3_block\.myC3.tmpOutPre_s_41                                                              ARI1     C        In      -         4.383       -         
CIC_I_block\.myCIC_I.C3_block\.myC3.tmpOutPre_s_41                                                              ARI1     S        Out     0.369     4.752       -         
N_11[41]                                                                                                        Net      -        -       1.123     -           2         
CIC_I_block\.myCIC_I.C4_block\.myC4.tmpOutPre_s_41                                                              ARI1     C        In      -         5.875       -         
CIC_I_block\.myCIC_I.C4_block\.myC4.tmpOutPre_s_41                                                              ARI1     S        Out     0.369     6.244       -         
N_12[41]                                                                                                        Net      -        -       1.123     -           2         
CIC_I_block\.myCIC_I.C5_block\.myC5.tmpOutPre_s_41                                                              ARI1     C        In      -         7.367       -         
CIC_I_block\.myCIC_I.C5_block\.myC5.tmpOutPre_s_41                                                              ARI1     S        Out     0.369     7.735       -         
N_14[13]                                                                                                        Net      -        -       1.117     -           1         
CIC_I_block\.myCIC_I.Delay_RG1_block.genonedelay\.OneDelay.outp[13]                                             SLE      D        In      -         8.852       -         
==========================================================================================================================================================================
Total path delay (propagation time + setup) of 9.108 is 2.721(29.9%) logic and 6.387(70.1%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value




====================================
Detailed Report for Clock: clkDiv128
====================================



Starting Points with Worst Slack
********************************

                                     Starting                                                      Arrival             
Instance                             Reference     Type     Pin     Net                            Time        Slack   
                                     Clock                                                                             
-----------------------------------------------------------------------------------------------------------------------
Downsample_RG1_block.outp_ds[13]     clkDiv128     SLE      Q       N_Downsample_RG1_1_355[13]     0.087       3191.683
Downsample_RG3_block.outp_ds[13]     clkDiv128     SLE      Q       N_Downsample_RG3_1_360[13]     0.087       3191.683
Downsample_RG3_block.outp_ds[0]      clkDiv128     SLE      Q       N_Downsample_RG3_1_360[0]      0.087       3191.687
Downsample_RG1_block.outp_ds[0]      clkDiv128     SLE      Q       N_Downsample_RG1_1_355[0]      0.087       3191.687
Downsample_RG3_block.outp_ds[1]      clkDiv128     SLE      Q       N_Downsample_RG3_1_360[1]      0.087       3191.704
Downsample_RG1_block.outp_ds[1]      clkDiv128     SLE      Q       N_Downsample_RG1_1_355[1]      0.087       3191.704
Downsample_RG3_block.outp_ds[2]      clkDiv128     SLE      Q       N_Downsample_RG3_1_360[2]      0.087       3191.720
Downsample_RG1_block.outp_ds[2]      clkDiv128     SLE      Q       N_Downsample_RG1_1_355[2]      0.087       3191.720
Downsample_RG1_block.outp_ds[3]      clkDiv128     SLE      Q       N_Downsample_RG1_1_355[3]      0.087       3191.736
Downsample_RG3_block.outp_ds[3]      clkDiv128     SLE      Q       N_Downsample_RG3_1_360[3]      0.087       3191.736
=======================================================================================================================


Ending Points with Worst Slack
******************************

                                                                              Starting                                               Required             
Instance                                                                      Reference     Type     Pin     Net                     Time         Slack   
                                                                              Clock                                                                       
----------------------------------------------------------------------------------------------------------------------------------------------------------
CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_6[13]      clkDiv128     SLE      D       un45_mem_s_13_S         3199.745     3191.683
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_6[13]      clkDiv128     SLE      D       un45_mem_s_13_S_0       3199.745     3191.683
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_15[13]     clkDiv128     SLE      D       un72_mem_s_13_S_0       3199.745     3191.683
CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_15[13]     clkDiv128     SLE      D       un72_mem_s_13_S         3199.745     3191.683
CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_6[12]      clkDiv128     SLE      D       un45_mem_cry_12_S       3199.745     3191.704
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_6[12]      clkDiv128     SLE      D       un45_mem_cry_12_S_0     3199.745     3191.704
CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_15[12]     clkDiv128     SLE      D       un72_mem_cry_12_S       3199.745     3191.704
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_15[12]     clkDiv128     SLE      D       un72_mem_cry_12_S_0     3199.745     3191.704
CFIR_I_PolyphaseFIR_1_block\.myCFIR_I_PolyphaseFIR_1.FIR_proc\.mem_6[11]      clkDiv128     SLE      D       un45_mem_cry_11_S       3199.745     3191.720
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_6[11]      clkDiv128     SLE      D       un45_mem_cry_11_S_0     3199.745     3191.720
==========================================================================================================================================================



Worst Path Information
View Worst Path in Analyst
***********************


Path information for path number 1: 
      Requested Period:                      3200.000
    - Setup time:                            0.255
    + Clock delay at ending point:           0.000 (ideal)
    = Required time:                         3199.745

    - Propagation time:                      8.062
    - Clock delay at starting point:         0.000 (ideal)
    = Slack (non-critical) :                 3191.683

    Number of logic level(s):                3
    Starting point:                          Downsample_RG1_block.outp_ds[13] / Q
    Ending point:                            CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_6[13] / D
    The start point is clocked by            clkDiv128 [rising] on pin CLK
    The end   point is clocked by            clkDiv128 [rising] on pin CLK

Instance / Net                                                                                        Pin       Pin               Arrival     No. of    
Name                                                                                         Type     Name      Dir     Delay     Time        Fan Out(s)
--------------------------------------------------------------------------------------------------------------------------------------------------------
Downsample_RG1_block.outp_ds[13]                                                             SLE      Q         Out     0.087     0.087       -         
N_Downsample_RG1_1_355[13]                                                                   Net      -         -       1.321     -           64        
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.un1_inp_4_mulonly_0[22:6]               MACC     A[13]     In      -         1.408       -         
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.un1_inp_4_mulonly_0[22:6]               MACC     P[16]     Out     2.586     3.994       -         
P_9[16]                                                                                      Net      -         -       1.137     -           10        
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.un68_multbufs1\.un68_multbufs1_s_17     ARI1     B         In      -         5.131       -         
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.un68_multbufs1\.un68_multbufs1_s_17     ARI1     S         Out     0.308     5.439       -         
un68_multbufs1_s_17_S_0                                                                      Net      -         -       1.137     -           10        
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.un45_mem_s_13                           ARI1     C         In      -         6.576       -         
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.un45_mem_s_13                           ARI1     S         Out     0.369     6.945       -         
un45_mem_s_13_S_0                                                                            Net      -         -       1.117     -           1         
CFIR_Q_PolyphaseFIR_1_block\.myCFIR_Q_PolyphaseFIR_1.FIR_proc\.mem_6[13]                     SLE      D         In      -         8.062       -         
========================================================================================================================================================
Total path delay (propagation time + setup) of 8.317 is 3.606(43.4%) logic and 4.711(56.6%) route.
Path delay compensated for clock skew. Clock skew is added to clock-to-out value, and is subtracted from setup time value



##### END OF TIMING REPORT #####]


Finished final timing analysis (Real Time elapsed 0h:00m:25s; CPU Time elapsed 0h:00m:25s; Memory used current: 160MB peak: 172MB)


Finished timing report (Real Time elapsed 0h:00m:25s; CPU Time elapsed 0h:00m:25s; Memory used current: 160MB peak: 172MB)

---------------------------------------
Resource Usage Report for ddc 

Mapping to part: m2s050tfbga896std
Cell usage:
CLKINT          4 uses
CFG1           25 uses
CFG2           9 uses
CFG3           31 uses
CFG4           1 use

Carry primitives used for arithmetic functions:
ARI1           3334 uses


Sequential Cells: 
SLE            2916 uses

DSP Blocks:   22
 MACC:        22 Mults

I/O ports: 74
I/O primitives: 74
INBUF          46 uses
OUTBUF         28 uses


Global Clock Buffers: 4


Total LUTs:    3400

Extra resources required for RAM and MACC interface logic during P&R:

RAM64x18 Interface Logic : SLEs = 0; LUTs = 0;
RAM1K18  Interface Logic : SLEs = 0; LUTs = 0;
MACC     Interface Logic : SLEs = 792; LUTs = 792;

Total number of SLEs after P&R:  2916 + 0 + 0 + 792 = 3708;
Total number of LUTs after P&R:  3400 + 0 + 0 + 792 = 4192;

Mapper successful!

At Mapper Exit (Real Time elapsed 0h:00m:25s; CPU Time elapsed 0h:00m:25s; Memory used current: 61MB peak: 172MB)

Process took 0h:00m:25s realtime, 0h:00m:25s cputime
# Wed Mar 02 19:00:03 2016

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