<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<?xml-stylesheet href="rptstyle.xsl" type="text/xsl" ?>
<doc>
<title>Timing Report Max Delay Analysis
</title>
<text>SmartTime Version 11.7.0.119</text>
<text>Microsemi Corporation - Microsemi Libero Software Release v11.7 (Version 11.7.0.119)</text>
<text>Date: Thu Mar 03 13:59:02 2016
</text>
<table>
<header>
</header>
<row>
 <cell>Design</cell>
 <cell>ddc</cell>
</row>
<row>
 <cell>Family</cell>
 <cell>SmartFusion2</cell>
</row>
<row>
 <cell>Die</cell>
 <cell>M2S050T</cell>
</row>
<row>
 <cell>Package</cell>
 <cell>896 FBGA</cell>
</row>
<row>
 <cell>Temperature Range</cell>
 <cell>0 - 85 C</cell>
</row>
<row>
 <cell>Voltage Range</cell>
 <cell>1.14 - 1.26 V</cell>
</row>
<row>
 <cell>Speed Grade</cell>
 <cell>STD</cell>
</row>
<row>
 <cell>Design State</cell>
 <cell>Post-Layout</cell>
</row>
<row>
 <cell>Data source</cell>
 <cell>Production</cell>
</row>
<row>
 <cell>Min Operating Conditions</cell>
 <cell>BEST - 1.26 V - 0 C</cell>
</row>
<row>
 <cell>Max Operating Conditions</cell>
 <cell>WORST - 1.14 V - 85 C</cell>
</row>
<row>
 <cell>Scenario for Timing Analysis</cell>
 <cell>timing_analysis</cell>
</row>
</table>
<text></text>
<section>
<name>Summary</name>
<table>
<header>
 <cell>Clock Domain</cell>
 <cell>Period (ns)</cell>
 <cell>Frequency (MHz)</cell>
 <cell>Required Period (ns)</cell>
 <cell>Required Frequency (MHz)</cell>
 <cell>External Setup (ns)</cell>
 <cell>External Hold (ns)</cell>
 <cell>Min Clock-To-Out (ns)</cell>
 <cell>Max Clock-To-Out (ns)</cell>
</header>
<row>
 <cell>clk</cell>
 <cell>17.130</cell>
 <cell>58.377</cell>
 <cell>25.000</cell>
 <cell>40.000</cell>
 <cell>15.252</cell>
 <cell>0.414</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell>9.147</cell>
 <cell>109.325</cell>
 <cell>3200.000</cell>
 <cell>0.313</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>4.014</cell>
 <cell>9.387</cell>
</row>
<row>
 <cell>clkDiv64</cell>
 <cell>10.964</cell>
 <cell>91.208</cell>
 <cell>1600.000</cell>
 <cell>0.625</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
<text></text>
<table>
<header>
 <cell></cell>
 <cell>Min Delay (ns)</cell>
 <cell>Max Delay (ns)</cell>
</header>
<row>
 <cell>Input to Output</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
</section>
<section>
<name>Clock Domain clk</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg10/Delay2_block/GenBlock.genblk1.theDelay/outreg[16]:CLK</cell>
 <cell>myDDS/mySinCos/Delay2_block/GenBlock.genblk1.theDelay/outreg[16]:D</cell>
 <cell>16.752</cell>
 <cell>7.870</cell>
 <cell>20.804</cell>
 <cell>28.674</cell>
 <cell>0.298</cell>
 <cell>17.130</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg10/Delay1_block/GenBlock.genblk1.theDelay/outreg[16]:CLK</cell>
 <cell>myDDS/mySinCos/Delay1_block/GenBlock.genblk1.theDelay/outreg[16]:D</cell>
 <cell>16.739</cell>
 <cell>7.874</cell>
 <cell>20.810</cell>
 <cell>28.684</cell>
 <cell>0.298</cell>
 <cell>17.126</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg10/Delay1_block/GenBlock.genblk1.theDelay/outreg[1]:CLK</cell>
 <cell>myDDS/mySinCos/Delay1_block/GenBlock.genblk1.theDelay/outreg[16]:D</cell>
 <cell>16.616</cell>
 <cell>8.043</cell>
 <cell>20.641</cell>
 <cell>28.684</cell>
 <cell>0.298</cell>
 <cell>16.957</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg10/Delay1_block/GenBlock.genblk1.theDelay/outreg[0]:CLK</cell>
 <cell>myDDS/mySinCos/Delay1_block/GenBlock.genblk1.theDelay/outreg[16]:D</cell>
 <cell>16.559</cell>
 <cell>8.100</cell>
 <cell>20.584</cell>
 <cell>28.684</cell>
 <cell>0.298</cell>
 <cell>16.900</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>myDDS/mySinCos/Delay2_block/GenBlock.genblk1.theDelay/outreg[16]:CLK</cell>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[38]:D</cell>
 <cell>16.540</cell>
 <cell>8.103</cell>
 <cell>20.570</cell>
 <cell>28.673</cell>
 <cell>0.298</cell>
 <cell>16.897</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg10/Delay2_block/GenBlock.genblk1.theDelay/outreg[16]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: myDDS/mySinCos/Delay2_block/GenBlock.genblk1.theDelay/outreg[16]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>28.674</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>20.804</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>7.870</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clk</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clk</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clk</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.120</cell>
 <cell>2.120</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2:An</cell>
 <cell>net</cell>
 <cell>clk_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.313</cell>
 <cell>2.433</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>2.538</cell>
 <cell>15</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB17:An</cell>
 <cell>net</cell>
 <cell>clk_ibuf_RNIVTI2/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.539</cell>
 <cell>3.077</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB17:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.372</cell>
 <cell>3.449</cell>
 <cell>50</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg10/Delay2_block/GenBlock.genblk1.theDelay/outreg[16]:CLK</cell>
 <cell>net</cell>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB17_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.603</cell>
 <cell>4.052</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg10/Delay2_block/GenBlock.genblk1.theDelay/outreg[16]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.102</cell>
 <cell>4.154</cell>
 <cell>11</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/Convert1/genblk4.Convert/un1_inp_1_cry_6:B</cell>
 <cell>net</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/N_54[16]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.549</cell>
 <cell>4.703</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/Convert1/genblk4.Convert/un1_inp_1_cry_6:UB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.276</cell>
 <cell>4.979</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/Convert1/genblk4_Convert/un1_inp_1_cry_0_CC_1:UB[0]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG7487</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>4.979</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/Convert1/genblk4_Convert/un1_inp_1_cry_0_CC_1:CC[9]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.901</cell>
 <cell>5.880</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/Convert1/genblk4.Convert/un1_inp_1_cry_15:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG7515</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>5.880</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/Convert1/genblk4.Convert/un1_inp_1_cry_15:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>5.958</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/x_out_cry_5:C</cell>
 <cell>net</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/N_28[5]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.387</cell>
 <cell>7.345</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/x_out_cry_5:UB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.276</cell>
 <cell>7.621</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/x_out_cry_0_cy_CC_0:UB[9]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG9675</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>7.621</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/x_out_cry_0_cy_CC_0:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.507</cell>
 <cell>8.128</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/x_out_cry_0_cy_CC_1:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO9655</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.128</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/x_out_cry_0_cy_CC_1:CC[8]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.415</cell>
 <cell>8.543</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/x_out_s_16:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG9709</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.543</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg11/x_out_s_16:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>8.621</cell>
 <cell>14</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4.Convert/un1_inp_1_cry_0:B</cell>
 <cell>net</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/N_58[16]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.818</cell>
 <cell>9.439</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4.Convert/un1_inp_1_cry_0:UB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.276</cell>
 <cell>9.715</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4_Convert/un1_inp_1_cry_0_CC_0:UB[3]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG8455</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>9.715</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4_Convert/un1_inp_1_cry_0_CC_0:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.658</cell>
 <cell>10.373</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4_Convert/un1_inp_1_cry_0_CC_1:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO8453</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.373</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4_Convert/un1_inp_1_cry_0_CC_1:CC[8]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.415</cell>
 <cell>10.788</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4.Convert/un1_inp_1_s_17:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG8507</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.788</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4.Convert/un1_inp_1_s_17:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>10.866</cell>
 <cell>11</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4.Convert/un1_inp_1_s_17_RNIKR2Q5:C</cell>
 <cell>net</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4_Convert/N_25[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.818</cell>
 <cell>11.684</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4.Convert/un1_inp_1_s_17_RNIKR2Q5:UB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.276</cell>
 <cell>11.960</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/y_out_cry_0_cy_CC_1:UB[0]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG29</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>11.960</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/y_out_cry_0_cy_CC_1:CC[8]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>1.016</cell>
 <cell>12.976</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4.Convert/un1_inp_1_s_17_RNIUOCGA:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG54</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>12.976</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg12/Convert2/genblk4.Convert/un1_inp_1_s_17_RNIUOCGA:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>13.054</cell>
 <cell>15</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/Convert1/genblk4.Convert/un1_inp_1_cry_0:B</cell>
 <cell>net</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/N_64[16]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.850</cell>
 <cell>13.904</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/Convert1/genblk4.Convert/un1_inp_1_cry_0:UB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.276</cell>
 <cell>14.180</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/Convert1/genblk4_Convert/un1_inp_1_cry_0_CC_0:UB[3]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG5493</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>14.180</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/Convert1/genblk4_Convert/un1_inp_1_cry_0_CC_0:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.658</cell>
 <cell>14.838</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/Convert1/genblk4_Convert/un1_inp_1_cry_0_CC_1:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO5491</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>14.838</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/Convert1/genblk4_Convert/un1_inp_1_cry_0_CC_1:CC[6]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.200</cell>
 <cell>15.038</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/Convert1/genblk4.Convert/un1_inp_1_cry_15:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG5539</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>15.038</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/Convert1/genblk4.Convert/un1_inp_1_cry_15:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>15.116</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/x_out_cry_3:C</cell>
 <cell>net</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/N_28[3]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.057</cell>
 <cell>16.173</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/x_out_cry_3:UB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.276</cell>
 <cell>16.449</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/x_out_cry_0_cy_CC_0:UB[7]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1566</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>16.449</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/x_out_cry_0_cy_CC_0:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.565</cell>
 <cell>17.014</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/x_out_cry_0_cy_CC_1:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO1552</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>17.014</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/x_out_cry_0_cy_CC_1:CC[2]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.259</cell>
 <cell>17.273</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/x_out_cry_10:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1588</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>17.273</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg13/x_out_cry_10:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>17.351</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/Negate1_block.Negate1/outp_cry_10:B</cell>
 <cell>net</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/N_7[10]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.753</cell>
 <cell>18.104</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/Negate1_block.Negate1/outp_cry_10:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.209</cell>
 <cell>18.313</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/Negate1_block_Negate1/outp_cry_0_CC_1:P[1]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG5577</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>18.313</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/Negate1_block_Negate1/outp_cry_0_CC_1:CC[7]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.857</cell>
 <cell>19.170</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/Negate1_block.Negate1/outp_s_16:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG5597</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>19.170</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/Negate1_block.Negate1/outp_s_16:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>19.248</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/Mux2_block.tmpOut[16]:B</cell>
 <cell>net</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/tmpOut[16]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.724</cell>
 <cell>19.972</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/Mux2_block.tmpOut[16]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.237</cell>
 <cell>20.209</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/Delay2_block/GenBlock.genblk1.theDelay/outreg[16]:D</cell>
 <cell>net</cell>
 <cell>myDDS/mySinCos/N_5[16]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.595</cell>
 <cell>20.804</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>20.804</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clk</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>25.000</cell>
 <cell>25.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clk</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>25.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clk</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>25.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.120</cell>
 <cell>27.120</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2:An</cell>
 <cell>net</cell>
 <cell>clk_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.313</cell>
 <cell>27.433</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>27.538</cell>
 <cell>12</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB5:An</cell>
 <cell>net</cell>
 <cell>clk_ibuf_RNIVTI2/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.542</cell>
 <cell>28.080</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB5:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.372</cell>
 <cell>28.452</cell>
 <cell>52</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/Delay2_block/GenBlock.genblk1.theDelay/outreg[16]:CLK</cell>
 <cell>net</cell>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB5_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.520</cell>
 <cell>28.972</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myDDS/mySinCos/Delay2_block/GenBlock.genblk1.theDelay/outreg[16]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.298</cell>
 <cell>28.674</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>28.674</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>External Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>ADC[7]</cell>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[38]:D</cell>
 <cell>18.581</cell>
 <cell></cell>
 <cell>18.581</cell>
 <cell></cell>
 <cell>0.298</cell>
 <cell>15.252</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>ADC[7]</cell>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[36]:D</cell>
 <cell>18.479</cell>
 <cell></cell>
 <cell>18.479</cell>
 <cell></cell>
 <cell>0.298</cell>
 <cell>15.137</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>ADC[7]</cell>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[41]:D</cell>
 <cell>18.497</cell>
 <cell></cell>
 <cell>18.497</cell>
 <cell></cell>
 <cell>0.298</cell>
 <cell>15.128</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>ADC[7]</cell>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[40]:D</cell>
 <cell>18.435</cell>
 <cell></cell>
 <cell>18.435</cell>
 <cell></cell>
 <cell>0.298</cell>
 <cell>15.106</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>ADC[9]</cell>
 <cell>myCIC_Q/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[40]:D</cell>
 <cell>18.333</cell>
 <cell></cell>
 <cell>18.333</cell>
 <cell></cell>
 <cell>0.298</cell>
 <cell>15.039</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: ADC[7]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[38]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>18.581</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>ADC[7]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>ADC_ibuf[7]/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>ADC[7]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>ADC_ibuf[7]/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.166</cell>
 <cell>2.166</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>ADC_ibuf[7]/U0/U_IOINFF:A</cell>
 <cell>net</cell>
 <cell>ADC_ibuf[7]/U0/YIN1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>2.166</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>ADC_ibuf[7]/U0/U_IOINFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOINFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.106</cell>
 <cell>2.272</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>tmpOut_5_mulonly_0[19:0]/U0/CFG_14:C</cell>
 <cell>net</cell>
 <cell>ADC_c[7]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.868</cell>
 <cell>5.140</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>tmpOut_5_mulonly_0[19:0]/U0/CFG_14:IPC</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2_IP_BC</cell>
 <cell>+</cell>
 <cell>0.245</cell>
 <cell>5.385</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>tmpOut_5_mulonly_0[19:0]/U0/INST_MACC_IP:A[7]</cell>
 <cell>net</cell>
 <cell>tmpOut_5_mulonly_0[19_0]/U0/A_net[7]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.045</cell>
 <cell>5.430</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>tmpOut_5_mulonly_0[19:0]/U0/INST_MACC_IP:P[12]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:MACC_IP</cell>
 <cell>+</cell>
 <cell>2.747</cell>
 <cell>8.177</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI1/tmpOutPre_cry_6:B</cell>
 <cell>net</cell>
 <cell>tmpOut_5[12]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.742</cell>
 <cell>8.919</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI1/tmpOutPre_cry_6:UB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.276</cell>
 <cell>9.195</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI1/tmpOutPre_cry_0_CC_0:UB[9]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2429</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>9.195</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI1/tmpOutPre_cry_0_CC_0:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.507</cell>
 <cell>9.702</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI1/tmpOutPre_cry_0_CC_1:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO2407</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>9.702</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI1/tmpOutPre_cry_0_CC_1:CC[2]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.259</cell>
 <cell>9.961</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI1/tmpOutPre_cry_11:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2445</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>9.961</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI1/tmpOutPre_cry_11:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>10.039</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI2/tmpOutPre_cry_11:A</cell>
 <cell>net</cell>
 <cell>myCIC_I/N_3[11]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.436</cell>
 <cell>11.475</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI2/tmpOutPre_cry_11:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.128</cell>
 <cell>11.603</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI2/tmpOutPre_cry_0_CC_1:P[2]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1162</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>11.603</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI2/tmpOutPre_cry_0_CC_1:CC[8]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.744</cell>
 <cell>12.347</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI2/tmpOutPre_cry_17:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1182</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>12.347</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI2/tmpOutPre_cry_17:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>12.425</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI3/tmpOutPre_cry_17:A</cell>
 <cell>net</cell>
 <cell>myCIC_I/N_4[17]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.767</cell>
 <cell>13.192</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI3/tmpOutPre_cry_17:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.128</cell>
 <cell>13.320</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI3/tmpOutPre_cry_0_CC_1:P[8]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG4245</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>13.320</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI3/tmpOutPre_cry_0_CC_1:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.430</cell>
 <cell>13.750</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI3/tmpOutPre_cry_0_CC_2:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO4192</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>13.750</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI3/tmpOutPre_cry_0_CC_2:CC[1]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.228</cell>
 <cell>13.978</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI3/tmpOutPre_cry_22:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG4262</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>13.978</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI3/tmpOutPre_cry_22:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.065</cell>
 <cell>14.043</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI4/tmpOutPre_cry_22:A</cell>
 <cell>net</cell>
 <cell>myCIC_I/N_5[22]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.766</cell>
 <cell>14.809</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI4/tmpOutPre_cry_22:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>14.967</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI4/tmpOutPre_cry_0_CC_2:P[1]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2648</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>14.967</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI4/tmpOutPre_cry_0_CC_2:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.741</cell>
 <cell>15.708</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI4/tmpOutPre_cry_0_CC_3:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO2581</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>15.708</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI4/tmpOutPre_cry_0_CC_3:CC[0]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.136</cell>
 <cell>15.844</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI4/tmpOutPre_cry_33:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2683</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>15.844</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI4/tmpOutPre_cry_33:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.065</cell>
 <cell>15.909</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI5/tmpOutPre_cry_33:A</cell>
 <cell>net</cell>
 <cell>myCIC_I/N_6[33]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.759</cell>
 <cell>16.668</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI5/tmpOutPre_cry_33:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>16.826</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI5/tmpOutPre_cry_0_CC_3:P[0]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG7624</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>16.826</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myI5/tmpOutPre_cry_0_CC_3:CC[5]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.840</cell>
 <cell>17.666</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI5/tmpOutPre_cry_38:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG7641</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>17.666</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myI5/tmpOutPre_cry_38:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>17.744</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[38]:D</cell>
 <cell>net</cell>
 <cell>myCIC_I/N_7[38]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.837</cell>
 <cell>18.581</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>18.581</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clk</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clk</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clk</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>1.908</cell>
 <cell>N/C</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2:An</cell>
 <cell>net</cell>
 <cell>clk_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.282</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.095</cell>
 <cell>N/C</cell>
 <cell>12</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB20:An</cell>
 <cell>net</cell>
 <cell>clk_ibuf_RNIVTI2/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.484</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB20:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.335</cell>
 <cell>N/C</cell>
 <cell>66</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[38]:CLK</cell>
 <cell>net</cell>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB20_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.523</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[38]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.298</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Recovery (ns)</cell>
 <cell>External Recovery (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>GlobalReset</cell>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[17]:ALn</cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>1.076</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>GlobalReset</cell>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[19]:ALn</cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>1.066</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>GlobalReset</cell>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[15]:ALn</cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>1.066</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>GlobalReset</cell>
 <cell>myCIC_I/myI5/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[19]:ALn</cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>1.039</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>GlobalReset</cell>
 <cell>myDDS/mySinCos/myCORDIC_SinCos/myCORDIC2_stage/myCORDIC_onequadrant1/myCORDIC_stg10/Delay3_block/GenBlock.genblk1.theDelay/outreg[6]:ALn</cell>
 <cell>4.283</cell>
 <cell></cell>
 <cell>4.283</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>1.039</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: GlobalReset</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[17]:ALn</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>GlobalReset</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>GlobalReset</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.166</cell>
 <cell>2.166</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB:An</cell>
 <cell>net</cell>
 <cell>GlobalReset_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.352</cell>
 <cell>2.518</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.240</cell>
 <cell>2.758</cell>
 <cell>29</cell>
 <cell>r</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_RGB1_RGB29:An</cell>
 <cell>net</cell>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.529</cell>
 <cell>3.287</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_RGB1_RGB29:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.292</cell>
 <cell>3.579</cell>
 <cell>68</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[17]:ALn</cell>
 <cell>net</cell>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_RGB1_RGB29_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.698</cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clk</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clk</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clk</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>1.908</cell>
 <cell>N/C</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2:An</cell>
 <cell>net</cell>
 <cell>clk_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.282</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.095</cell>
 <cell>N/C</cell>
 <cell>12</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB18:An</cell>
 <cell>net</cell>
 <cell>clk_ibuf_RNIVTI2/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.484</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB18:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.335</cell>
 <cell>N/C</cell>
 <cell>27</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[17]:CLK</cell>
 <cell>net</cell>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB18_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.512</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[17]:ALn</cell>
 <cell>Library recovery time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.415</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain clkDiv128</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>Downsample_RG1/outp_ds[5]:CLK</cell>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/inner_floop.mem_12_[13]:D</cell>
 <cell>8.774</cell>
 <cell>3190.853</cell>
 <cell>12.863</cell>
 <cell>3203.716</cell>
 <cell>0.298</cell>
 <cell>9.147</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>Downsample_RG1/outp_ds[8]:CLK</cell>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/inner_floop.mem_6_[11]:D</cell>
 <cell>8.819</cell>
 <cell>3190.859</cell>
 <cell>12.903</cell>
 <cell>3203.762</cell>
 <cell>0.298</cell>
 <cell>9.141</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>Downsample_RG1/outp_ds[9]:CLK</cell>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/inner_floop.mem_6_[11]:D</cell>
 <cell>8.793</cell>
 <cell>3190.871</cell>
 <cell>12.891</cell>
 <cell>3203.762</cell>
 <cell>0.298</cell>
 <cell>9.129</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>Downsample_RG1/outp_ds[6]:CLK</cell>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/inner_floop.mem_6_[11]:D</cell>
 <cell>8.762</cell>
 <cell>3190.902</cell>
 <cell>12.860</cell>
 <cell>3203.762</cell>
 <cell>0.298</cell>
 <cell>9.098</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>Downsample_RG1/outp_ds[5]:CLK</cell>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/inner_floop.mem_9_[11]:D</cell>
 <cell>8.770</cell>
 <cell>3190.905</cell>
 <cell>12.859</cell>
 <cell>3203.764</cell>
 <cell>0.298</cell>
 <cell>9.095</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: Downsample_RG1/outp_ds[5]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/inner_floop.mem_12_[13]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>3203.716</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>12.863</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>3190.853</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clkDiv128</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.128</cell>
 <cell>2.128</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9:An</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.334</cell>
 <cell>2.462</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>2.567</cell>
 <cell>27</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB13:An</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf_RNITBS9/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.561</cell>
 <cell>3.128</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB13:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.372</cell>
 <cell>3.500</cell>
 <cell>22</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Downsample_RG1/outp_ds[5]:CLK</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB13_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.589</cell>
 <cell>4.089</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Downsample_RG1/outp_ds[5]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.102</cell>
 <cell>4.191</cell>
 <cell>6</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/un1_inp_1_mulonly_0[19:0]/U0/CFG_10:C</cell>
 <cell>net</cell>
 <cell>N_Downsample_RG1_1_355[5]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.225</cell>
 <cell>6.416</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/un1_inp_1_mulonly_0[19:0]/U0/CFG_10:IPC</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2_IP_BC</cell>
 <cell>+</cell>
 <cell>0.241</cell>
 <cell>6.657</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/un1_inp_1_mulonly_0[19:0]/U0/INST_MACC_IP:A[5]</cell>
 <cell>net</cell>
 <cell>CFIR_Q_PolyphaseFIR_1_block_myCFIR_Q_PolyphaseFIR_1/un1_inp_1_mulonly_0[19_0]/U0/A_net[5]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.044</cell>
 <cell>6.701</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/un1_inp_1_mulonly_0[19:0]/U0/INST_MACC_IP:P[17]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:MACC_IP</cell>
 <cell>+</cell>
 <cell>2.745</cell>
 <cell>9.446</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/un227_mem_cry_9:B</cell>
 <cell>net</cell>
 <cell>CFIR_Q_PolyphaseFIR_1_block_myCFIR_Q_PolyphaseFIR_1/P_8[17]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.210</cell>
 <cell>11.656</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/un227_mem_cry_9:UB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.327</cell>
 <cell>11.983</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block_myCFIR_Q_PolyphaseFIR_1/un227_mem_cry_0_CC_0:UB[9]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG4492</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>11.983</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block_myCFIR_Q_PolyphaseFIR_1/un227_mem_cry_0_CC_0:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.507</cell>
 <cell>12.490</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block_myCFIR_Q_PolyphaseFIR_1/un227_mem_cry_0_CC_1:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO4463</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>12.490</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block_myCFIR_Q_PolyphaseFIR_1/un227_mem_cry_0_CC_1:CC[1]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.207</cell>
 <cell>12.697</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/un227_mem_s_13:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG4505</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>12.697</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/un227_mem_s_13:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>12.775</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/inner_floop.mem_12_[13]:D</cell>
 <cell>net</cell>
 <cell>CFIR_Q_PolyphaseFIR_1_block_myCFIR_Q_PolyphaseFIR_1/un227_mem_s_13_S_0</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.088</cell>
 <cell>12.863</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>12.863</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>3200.000</cell>
 <cell>3200.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>3200.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clkDiv128</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>3200.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.128</cell>
 <cell>3202.128</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9:An</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.334</cell>
 <cell>3202.462</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>3202.567</cell>
 <cell>27</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB10:An</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf_RNITBS9/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.561</cell>
 <cell>3203.128</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB10:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.372</cell>
 <cell>3203.500</cell>
 <cell>35</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/inner_floop.mem_12_[13]:CLK</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB10_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.514</cell>
 <cell>3204.014</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_1_block.myCFIR_Q_PolyphaseFIR_1/inner_floop.mem_12_[13]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.298</cell>
 <cell>3203.716</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>3203.716</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Clock to Out (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>Q_out_block.med[3]:CLK</cell>
 <cell>Q_out[3]</cell>
 <cell>5.258</cell>
 <cell></cell>
 <cell>9.387</cell>
 <cell></cell>
 <cell>9.387</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>Q_out_block.med[5]:CLK</cell>
 <cell>Q_out[5]</cell>
 <cell>5.155</cell>
 <cell></cell>
 <cell>9.284</cell>
 <cell></cell>
 <cell>9.284</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>Q_out_block.med[8]:CLK</cell>
 <cell>Q_out[8]</cell>
 <cell>5.016</cell>
 <cell></cell>
 <cell>9.130</cell>
 <cell></cell>
 <cell>9.130</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>Q_out_block.med[7]:CLK</cell>
 <cell>Q_out[7]</cell>
 <cell>4.063</cell>
 <cell></cell>
 <cell>8.192</cell>
 <cell></cell>
 <cell>8.192</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>Q_out_block.med[10]:CLK</cell>
 <cell>Q_out[10]</cell>
 <cell>4.057</cell>
 <cell></cell>
 <cell>8.171</cell>
 <cell></cell>
 <cell>8.171</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: Q_out_block.med[3]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: Q_out[3]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>9.387</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clkDiv128</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.128</cell>
 <cell>2.128</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9:An</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.334</cell>
 <cell>2.462</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>2.567</cell>
 <cell>27</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB13:An</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf_RNITBS9/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.561</cell>
 <cell>3.128</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB13:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.372</cell>
 <cell>3.500</cell>
 <cell>31</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Q_out_block.med[3]:CLK</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB13_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.629</cell>
 <cell>4.129</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Q_out_block.med[3]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.127</cell>
 <cell>4.256</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Q_out_obuf[3]/U0/U_IOOUTFF:A</cell>
 <cell>net</cell>
 <cell>Q_out_c[3]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.550</cell>
 <cell>5.806</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Q_out_obuf[3]/U0/U_IOOUTFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOOUTFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.403</cell>
 <cell>6.209</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Q_out_obuf[3]/U0/U_IOPAD:D</cell>
 <cell>net</cell>
 <cell>Q_out_obuf[3]/U0/DOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>6.209</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>Q_out_obuf[3]/U0/U_IOPAD:PAD</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_TRI</cell>
 <cell>+</cell>
 <cell>3.178</cell>
 <cell>9.387</cell>
 <cell>0</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Q_out[3]</cell>
 <cell>net</cell>
 <cell>Q_out[3]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>9.387</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>9.387</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Q_out[3]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Recovery (ns)</cell>
 <cell>External Recovery (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>GlobalReset</cell>
 <cell>Downsample_RG3/outp_ds[12]:ALn</cell>
 <cell>4.265</cell>
 <cell></cell>
 <cell>4.265</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>1.035</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>GlobalReset</cell>
 <cell>CFIR_I_PolyphaseFIR_1_block.myCFIR_I_PolyphaseFIR_1/inner_floop.mem_22_[3]:ALn</cell>
 <cell>4.257</cell>
 <cell></cell>
 <cell>4.257</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>1.019</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>GlobalReset</cell>
 <cell>CFIR_I_PolyphaseFIR_1_block.myCFIR_I_PolyphaseFIR_1/inner_floop.mem_22_[0]:ALn</cell>
 <cell>4.257</cell>
 <cell></cell>
 <cell>4.257</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>1.019</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>GlobalReset</cell>
 <cell>CFIR_I_PolyphaseFIR_1_block.myCFIR_I_PolyphaseFIR_1/inner_floop.mem_22_[4]:ALn</cell>
 <cell>4.257</cell>
 <cell></cell>
 <cell>4.257</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>1.009</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>GlobalReset</cell>
 <cell>CFIR_I_PolyphaseFIR_1_block.myCFIR_I_PolyphaseFIR_1/inner_floop.mem_8_[4]:ALn</cell>
 <cell>4.295</cell>
 <cell></cell>
 <cell>4.295</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>1.001</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: GlobalReset</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: Downsample_RG3/outp_ds[12]:ALn</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>4.265</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>GlobalReset</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>GlobalReset</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.166</cell>
 <cell>2.166</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB:An</cell>
 <cell>net</cell>
 <cell>GlobalReset_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.352</cell>
 <cell>2.518</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.240</cell>
 <cell>2.758</cell>
 <cell>29</cell>
 <cell>r</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_RGB1_RGB39:An</cell>
 <cell>net</cell>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.529</cell>
 <cell>3.287</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_RGB1_RGB39:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.292</cell>
 <cell>3.579</cell>
 <cell>70</cell>
 <cell>f</cell>
</row>
<row>
 <cell>Downsample_RG3/outp_ds[12]:ALn</cell>
 <cell>net</cell>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_RGB1_RGB39_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.686</cell>
 <cell>4.265</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>4.265</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clkDiv128</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>1.915</cell>
 <cell>N/C</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9:An</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.301</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.095</cell>
 <cell>N/C</cell>
 <cell>27</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB22:An</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf_RNITBS9/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.498</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB22:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.335</cell>
 <cell>N/C</cell>
 <cell>20</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Downsample_RG3/outp_ds[12]:CLK</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB22_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.501</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Downsample_RG3/outp_ds[12]:ALn</cell>
 <cell>Library recovery time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.415</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET clkDiv64 to clkDiv128</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>Downsample_RG0_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:CLK</cell>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/inner_floop.mem_10_[13]:D</cell>
 <cell>9.787</cell>
 <cell>1589.090</cell>
 <cell>14.566</cell>
 <cell>1603.656</cell>
 <cell>0.298</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>Downsample_RG0_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:CLK</cell>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/inner_floop.mem_10_[11]:D</cell>
 <cell>9.817</cell>
 <cell>1589.108</cell>
 <cell>14.596</cell>
 <cell>1603.704</cell>
 <cell>0.298</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>Downsample_RG0_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:CLK</cell>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/inner_floop.mem_10_[8]:D</cell>
 <cell>9.764</cell>
 <cell>1589.148</cell>
 <cell>14.543</cell>
 <cell>1603.691</cell>
 <cell>0.298</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>Downsample_RG0_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:CLK</cell>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/inner_floop.mem_10_[10]:D</cell>
 <cell>9.748</cell>
 <cell>1589.164</cell>
 <cell>14.527</cell>
 <cell>1603.691</cell>
 <cell>0.298</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>Downsample_RG0_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:CLK</cell>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/inner_floop.mem_10_[12]:D</cell>
 <cell>9.699</cell>
 <cell>1589.169</cell>
 <cell>14.478</cell>
 <cell>1603.647</cell>
 <cell>0.298</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: Downsample_RG0_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/inner_floop.mem_10_[13]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>1603.656</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>14.566</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>1589.090</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv64</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv64</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clkDiv64</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.858</cell>
 <cell>2.858</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8:An</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.344</cell>
 <cell>3.202</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>3.307</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB4:An</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf_RNICQH8/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.498</cell>
 <cell>3.805</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB4:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.372</cell>
 <cell>4.177</cell>
 <cell>10</cell>
 <cell>r</cell>
</row>
<row>
 <cell>Downsample_RG0_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:CLK</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB4_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.602</cell>
 <cell>4.779</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>Downsample_RG0_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.102</cell>
 <cell>4.881</cell>
 <cell>8</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/un1_inp_6_mulonly_0[19:0]/U0/CFG_8:C</cell>
 <cell>net</cell>
 <cell>N_Downsample_RG0_1_354[4]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.585</cell>
 <cell>8.466</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/un1_inp_6_mulonly_0[19:0]/U0/CFG_8:IPC</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2_IP_BC</cell>
 <cell>+</cell>
 <cell>0.241</cell>
 <cell>8.707</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/un1_inp_6_mulonly_0[19:0]/U0/INST_MACC_IP:A[4]</cell>
 <cell>net</cell>
 <cell>CFIR_Q_PolyphaseFIR_0_block_myCFIR_Q_PolyphaseFIR_0/un1_inp_6_mulonly_0[19_0]/U0/A_net[4]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.041</cell>
 <cell>8.748</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/un1_inp_6_mulonly_0[19:0]/U0/INST_MACC_IP:P[8]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:MACC_IP</cell>
 <cell>+</cell>
 <cell>2.420</cell>
 <cell>11.168</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/un197_mem_cry_0:A</cell>
 <cell>net</cell>
 <cell>CFIR_Q_PolyphaseFIR_0_block_myCFIR_Q_PolyphaseFIR_0/P_11[8]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>2.177</cell>
 <cell>13.345</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/un197_mem_cry_0:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>13.503</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block_myCFIR_Q_PolyphaseFIR_0/un197_mem_cry_0_CC_0:P[0]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1354</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>13.503</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block_myCFIR_Q_PolyphaseFIR_0/un197_mem_cry_0_CC_0:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.682</cell>
 <cell>14.185</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block_myCFIR_Q_PolyphaseFIR_0/un197_mem_cry_0_CC_1:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO1353</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>14.185</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block_myCFIR_Q_PolyphaseFIR_0/un197_mem_cry_0_CC_1:CC[1]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.228</cell>
 <cell>14.413</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/un197_mem_s_13:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1395</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>14.413</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/un197_mem_s_13:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.065</cell>
 <cell>14.478</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/inner_floop.mem_10_[13]:D</cell>
 <cell>net</cell>
 <cell>CFIR_Q_PolyphaseFIR_0_block_myCFIR_Q_PolyphaseFIR_0/un197_mem_s_13_S_0</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.088</cell>
 <cell>14.566</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.566</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>1600.000</cell>
 <cell>1600.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv128</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>1600.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clkDiv128</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>1600.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.128</cell>
 <cell>1602.128</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9:An</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.334</cell>
 <cell>1602.462</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>1602.567</cell>
 <cell>27</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB0:An</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf_RNITBS9/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.497</cell>
 <cell>1603.064</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB0:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.372</cell>
 <cell>1603.436</cell>
 <cell>28</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/inner_floop.mem_10_[13]:CLK</cell>
 <cell>net</cell>
 <cell>clkDiv128_ibuf_RNITBS9/U0_RGB1_RGB0_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.518</cell>
 <cell>1603.954</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CFIR_Q_PolyphaseFIR_0_block.myCFIR_Q_PolyphaseFIR_0/inner_floop.mem_10_[13]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.298</cell>
 <cell>1603.656</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>1603.656</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
</section>
<section>
<name>Clock Domain clkDiv64</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>myCIC_Q/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[0]:CLK</cell>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell>10.622</cell>
 <cell>1589.036</cell>
 <cell>15.409</cell>
 <cell>1604.445</cell>
 <cell>0.298</cell>
 <cell>10.964</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>myCIC_Q/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[0]:CLK</cell>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[11]:D</cell>
 <cell>10.445</cell>
 <cell>1589.200</cell>
 <cell>15.232</cell>
 <cell>1604.432</cell>
 <cell>0.298</cell>
 <cell>10.800</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>myCIC_Q/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[0]:CLK</cell>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[9]:D</cell>
 <cell>10.391</cell>
 <cell>1589.254</cell>
 <cell>15.178</cell>
 <cell>1604.432</cell>
 <cell>0.298</cell>
 <cell>10.746</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>myCIC_Q/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[1]:CLK</cell>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell>10.255</cell>
 <cell>1589.420</cell>
 <cell>15.025</cell>
 <cell>1604.445</cell>
 <cell>0.298</cell>
 <cell>10.580</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>myCIC_Q/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[3]:CLK</cell>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell>10.178</cell>
 <cell>1589.497</cell>
 <cell>14.948</cell>
 <cell>1604.445</cell>
 <cell>0.298</cell>
 <cell>10.503</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: myCIC_Q/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[0]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>1604.445</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>15.409</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>1589.036</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv64</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv64</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clkDiv64</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.858</cell>
 <cell>2.858</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8:An</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.344</cell>
 <cell>3.202</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>3.307</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB2:An</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf_RNICQH8/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.498</cell>
 <cell>3.805</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB2:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.372</cell>
 <cell>4.177</cell>
 <cell>45</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[0]:CLK</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB2_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.610</cell>
 <cell>4.787</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[0]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.127</cell>
 <cell>4.914</cell>
 <cell>4</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_0:B</cell>
 <cell>net</cell>
 <cell>myCIC_Q/outBuf0_2[0]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.699</cell>
 <cell>5.613</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_0:UB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.262</cell>
 <cell>5.875</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_0_CC_0:UB[3]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2865</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>5.875</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_0_CC_0:CC[7]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.783</cell>
 <cell>6.658</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_4:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2878</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>6.658</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_4:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>6.736</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_4:A</cell>
 <cell>net</cell>
 <cell>myCIC_Q/N_9[4]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.786</cell>
 <cell>7.522</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_4:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.128</cell>
 <cell>7.650</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_0_CC_0:P[7]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1932</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>7.650</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_0_CC_0:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.525</cell>
 <cell>8.175</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_0_CC_1:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO1917</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.175</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_0_CC_1:CC[1]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.207</cell>
 <cell>8.382</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_10:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1952</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.382</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_10:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>8.460</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_10:A</cell>
 <cell>net</cell>
 <cell>myCIC_Q/N_10[10]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.036</cell>
 <cell>9.496</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_10:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>9.654</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_0_CC_1:P[1]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG4950</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>9.654</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_0_CC_1:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.741</cell>
 <cell>10.395</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_0_CC_2:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO4918</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.395</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_0_CC_2:CC[1]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.228</cell>
 <cell>10.623</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_22:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG4988</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.623</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_22:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.065</cell>
 <cell>10.688</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_22:A</cell>
 <cell>net</cell>
 <cell>myCIC_Q/N_11[22]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.762</cell>
 <cell>11.450</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_22:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>11.608</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_0_CC_2:P[1]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG3231</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>11.608</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_0_CC_2:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.741</cell>
 <cell>12.349</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_0_CC_3:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO3164</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>12.349</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_0_CC_3:CC[1]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.228</cell>
 <cell>12.577</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_34:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG3269</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>12.577</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_34:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.065</cell>
 <cell>12.642</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_cry_34:A</cell>
 <cell>net</cell>
 <cell>myCIC_Q/N_12[34]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.780</cell>
 <cell>13.422</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_cry_34:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>13.580</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_cry_0_CC_3:P[1]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG8136</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>13.580</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_cry_0_CC_3:CC[8]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.928</cell>
 <cell>14.508</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_s_41:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG8159</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>14.508</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_s_41:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>14.586</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell>net</cell>
 <cell>myCIC_Q/N_14[13]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.823</cell>
 <cell>15.409</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>15.409</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv64</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>1600.000</cell>
 <cell>1600.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv64</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>1600.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clkDiv64</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>1600.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.858</cell>
 <cell>1602.858</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8:An</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.344</cell>
 <cell>1603.202</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>1603.307</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB2:An</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf_RNICQH8/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.498</cell>
 <cell>1603.805</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB2:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.372</cell>
 <cell>1604.177</cell>
 <cell>45</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:CLK</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB2_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.566</cell>
 <cell>1604.743</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.298</cell>
 <cell>1604.445</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>1604.445</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Recovery (ns)</cell>
 <cell>External Recovery (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>GlobalReset</cell>
 <cell>myCIC_I/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[37]:ALn</cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>0.356</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>GlobalReset</cell>
 <cell>myCIC_I/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[33]:ALn</cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>0.356</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>GlobalReset</cell>
 <cell>myCIC_I/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[39]:ALn</cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>0.356</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>GlobalReset</cell>
 <cell>myCIC_I/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[35]:ALn</cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>0.356</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>GlobalReset</cell>
 <cell>myCIC_I/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[41]:ALn</cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>0.415</cell>
 <cell>0.356</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: GlobalReset</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: myCIC_I/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[37]:ALn</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>GlobalReset</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>GlobalReset</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.166</cell>
 <cell>2.166</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB:An</cell>
 <cell>net</cell>
 <cell>GlobalReset_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.352</cell>
 <cell>2.518</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.240</cell>
 <cell>2.758</cell>
 <cell>29</cell>
 <cell>r</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_RGB1_RGB29:An</cell>
 <cell>net</cell>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.529</cell>
 <cell>3.287</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_RGB1_RGB29:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.292</cell>
 <cell>3.579</cell>
 <cell>68</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_I/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[37]:ALn</cell>
 <cell>net</cell>
 <cell>GlobalReset_ibuf_RNIP2EB/U0_RGB1_RGB29_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.698</cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>4.277</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv64</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv64</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clkDiv64</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.572</cell>
 <cell>N/C</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8:An</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.310</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.095</cell>
 <cell>N/C</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB6:An</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf_RNICQH8/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.482</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB6:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.335</cell>
 <cell>N/C</cell>
 <cell>41</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[37]:CLK</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB6_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.542</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_I/myC1/Delay_syn_block.myDelay_syn/Delay0_block/GenBlock.genblk1.theDelay/outreg[37]:ALn</cell>
 <cell>Library recovery time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.415</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET clk to clkDiv64</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>myCIC_Q/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:CLK</cell>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell>10.815</cell>
 <cell>14.567</cell>
 <cell>14.878</cell>
 <cell>29.445</cell>
 <cell>0.298</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>myCIC_Q/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[15]:CLK</cell>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell>10.777</cell>
 <cell>14.650</cell>
 <cell>14.795</cell>
 <cell>29.445</cell>
 <cell>0.298</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>myCIC_Q/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[6]:CLK</cell>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell>10.754</cell>
 <cell>14.673</cell>
 <cell>14.772</cell>
 <cell>29.445</cell>
 <cell>0.298</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>myCIC_Q/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:CLK</cell>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[11]:D</cell>
 <cell>10.638</cell>
 <cell>14.731</cell>
 <cell>14.701</cell>
 <cell>29.432</cell>
 <cell>0.298</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>myCIC_Q/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[15]:CLK</cell>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[11]:D</cell>
 <cell>10.600</cell>
 <cell>14.814</cell>
 <cell>14.618</cell>
 <cell>29.432</cell>
 <cell>0.298</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: myCIC_Q/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>29.445</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>14.878</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.567</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clk</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clk</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clk</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.120</cell>
 <cell>2.120</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2:An</cell>
 <cell>net</cell>
 <cell>clk_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.313</cell>
 <cell>2.433</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>2.538</cell>
 <cell>12</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB3:An</cell>
 <cell>net</cell>
 <cell>clk_ibuf_RNIVTI2/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.543</cell>
 <cell>3.081</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB3:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.372</cell>
 <cell>3.453</cell>
 <cell>56</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:CLK</cell>
 <cell>net</cell>
 <cell>clk_ibuf_RNIVTI2/U0_RGB1_RGB3_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.610</cell>
 <cell>4.063</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/Rate_block.dsDelay_block/GenBlock.genblk1.theDelay/outreg[4]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.127</cell>
 <cell>4.190</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_4:A</cell>
 <cell>net</cell>
 <cell>myCIC_Q/N_8[4]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.170</cell>
 <cell>5.360</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_4:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.157</cell>
 <cell>5.517</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_0_CC_0:P[7]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2876</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>5.517</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_0_CC_0:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.525</cell>
 <cell>6.042</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_0_CC_1:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO2861</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>6.042</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_0_CC_1:CC[1]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.207</cell>
 <cell>6.249</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_10:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG2896</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>6.249</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC1/tmpOutPre_cry_10:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>6.327</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_10:A</cell>
 <cell>net</cell>
 <cell>myCIC_Q/N_9[10]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.033</cell>
 <cell>7.360</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_10:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>7.518</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_0_CC_1:P[1]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1950</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>7.518</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_0_CC_1:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.741</cell>
 <cell>8.259</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_0_CC_2:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO1918</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.259</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_0_CC_2:CC[1]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.228</cell>
 <cell>8.487</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_22:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG1988</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.487</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC2/tmpOutPre_cry_22:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.065</cell>
 <cell>8.552</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_22:A</cell>
 <cell>net</cell>
 <cell>myCIC_Q/N_10[22]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.750</cell>
 <cell>9.302</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_22:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>9.460</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_0_CC_2:P[1]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG4986</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>9.460</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_0_CC_2:CC[7]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.842</cell>
 <cell>10.302</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_28:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG5006</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>10.302</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC3/tmpOutPre_cry_28:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.086</cell>
 <cell>10.388</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_28:A</cell>
 <cell>net</cell>
 <cell>myCIC_Q/N_11[28]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.756</cell>
 <cell>11.144</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_28:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.157</cell>
 <cell>11.301</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_0_CC_2:P[7]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG3249</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>11.301</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_0_CC_2:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.525</cell>
 <cell>11.826</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_0_CC_3:CI</cell>
 <cell>net</cell>
 <cell>CI_TO_CO3164</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>11.826</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_0_CC_3:CC[1]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.207</cell>
 <cell>12.033</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_34:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG3269</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>12.033</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC4/tmpOutPre_cry_34:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>12.111</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_cry_34:A</cell>
 <cell>net</cell>
 <cell>myCIC_Q/N_12[34]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.780</cell>
 <cell>12.891</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_cry_34:P</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>13.049</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_cry_0_CC_3:P[1]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG8136</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>13.049</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_cry_0_CC_3:CC[8]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.928</cell>
 <cell>13.977</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_s_41:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG8159</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>13.977</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/myC5/tmpOutPre_s_41:S</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.078</cell>
 <cell>14.055</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell>net</cell>
 <cell>myCIC_Q/N_14[13]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.823</cell>
 <cell>14.878</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.878</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv64</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>25.000</cell>
 <cell>25.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>clkDiv64</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>25.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>clkDiv64</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>25.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_IN</cell>
 <cell>+</cell>
 <cell>2.858</cell>
 <cell>27.858</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8:An</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.344</cell>
 <cell>28.202</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.105</cell>
 <cell>28.307</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB2:An</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf_RNICQH8/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.498</cell>
 <cell>28.805</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB2:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.372</cell>
 <cell>29.177</cell>
 <cell>45</cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:CLK</cell>
 <cell>net</cell>
 <cell>clkDiv64_ibuf_RNICQH8/U0_RGB1_RGB2_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.566</cell>
 <cell>29.743</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>myCIC_Q/Delay_RG1_block/GenBlock.genblk1.theDelay/outreg[13]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.298</cell>
 <cell>29.445</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>29.445</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
</section>
<section>
<name>Path Set Pin to Pin</name>
<section>
<name>SET Input to Output</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set User Sets</name>
</section>
</doc>
