//--------------------------------------------------------------------
// Created by Microsemi SmartDesign Fri Apr 23 16:58:35 2021
// Parameters for COREAHBLSRAM
//--------------------------------------------------------------------


parameter AHB_AWIDTH = 32;
parameter AHB_DWIDTH = 32;
parameter FAMILY = 19;
parameter HDL_License = "O";
parameter LSRAM_NUM_LOCATIONS_DWIDTH32 = 2048;
parameter SEL_SRAM_TYPE = 0;
parameter Testbench = "User";
parameter USRAM_NUM_LOCATIONS_DWIDTH32 = 512;
