file copy -force "./src/softconsole/EPCS_Top_MSS_CM3_app.hex" "./$Prjname/EPCS_Top_MSS_CM3_app.hex"

# Import source files

import_files -library work -hdl_source {./src/hdl/epcs_rx_intf.v}
import_files -library work -hdl_source {./src/hdl/epcs_tx_intf.v}
import_files -library work -hdl_source {./src/hdl/FabUART.v}
import_files -library work -hdl_source {./src/hdl/Output_select.v}
import_files -library work -hdl_source {./src/hdl/count_check.v}
import_files -library work -hdl_source {./src/hdl/count_gen.v}
import_files -library work -hdl_source {./src/hdl/prbs_asic_chk.v}
import_files -library work -hdl_source {./src/hdl/PRBS_Check.v}
import_files -library work -hdl_source {./src/hdl/prbs_asic_gen.v}
import_files -library work -hdl_source {./src/hdl/PRBS_Gen.v}
import_files -library work -hdl_source {./src/hdl/delay_line.v}



build_design_hierarchy 

# Create, configure and generate core components
source ./src/components/EPCS_Demo_top_sb.tcl 
source ./src/components/CorePCS_C0.tcl 
source ./src/components/COREUART_C0.tcl
source ./src/components/SERDES_IF2_C0.tcl 
source ./src/components/EPCS_SERDES.tcl
source ./src/components/top.tcl 

build_design_hierarchy

# Set top level module
 
set_root -module {top::work} 

save_project
puts "Design generated successfully\n"
