# Creating SmartDesign "top"
set sd_name {top}
create_smartdesign -sd_name ${sd_name}

# Disable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 0

# Create top level Scalar Ports
sd_create_scalar_port -sd_name ${sd_name} -port_name {DEVRST_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {REFCLK1_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {REFCLK1_P} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RXD0_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RXD0_P} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RXD1_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RXD1_P} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RXD2_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RXD2_P} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RXD3_N} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RXD3_P} -port_direction {IN} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {RX} -port_direction {IN}

sd_create_scalar_port -sd_name ${sd_name} -port_name {TXD0_N} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TXD0_P} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TXD1_N} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TXD1_P} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TXD2_N} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TXD2_P} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TXD3_N} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TXD3_P} -port_direction {OUT} -port_is_pad {1}
sd_create_scalar_port -sd_name ${sd_name} -port_name {TX} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {connect_o} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {start} -port_direction {OUT}
sd_create_scalar_port -sd_name ${sd_name} -port_name {switch} -port_direction {OUT}



# Add AND2_0 instance
sd_instantiate_macro -sd_name ${sd_name} -macro_name {AND2} -instance_name {AND2_0}



# Add AND2_1 instance
sd_instantiate_macro -sd_name ${sd_name} -macro_name {AND2} -instance_name {AND2_1}



# Add CorePCS_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {CorePCS_C0} -instance_name {CorePCS_C0_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CorePCS_C0_0:EPCS_PWRDN}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CorePCS_C0_0:EPCS_TXOOB}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CorePCS_C0_0:EPCS_TxVAL}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CorePCS_C0_0:EPCS_RxERR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CorePCS_C0_0:INVALID_K}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CorePCS_C0_0:CODE_ERR_N}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CorePCS_C0_0:B_CERR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {CorePCS_C0_0:RD_ERR}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CorePCS_C0_0:WA_RSTn} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CorePCS_C0_0:FORCE_DISP} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {CorePCS_C0_0:DISP_SEL} -value {GND}



# Add COREUART_C0_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {COREUART_C0} -instance_name {COREUART_C0_0}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {COREUART_C0_0:BAUD_VAL} -value {0000101000100}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {COREUART_C0_0:BIT8} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {COREUART_C0_0:CSN} -value {GND}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {COREUART_C0_0:ODD_N_EVEN} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {COREUART_C0_0:OVERFLOW}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {COREUART_C0_0:PARITY_EN} -value {GND}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {COREUART_C0_0:PARITY_ERR}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {COREUART_C0_0:FRAMING_ERR}



# Add count_check_lane1 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {count_check} -hdl_file {hdl\count_check.v} -instance_name {count_check_lane1}



# Add count_gen_lane1 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {count_gen} -hdl_file {hdl\count_gen.v} -instance_name {count_gen_lane1}



# Add EPCS_Demo_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {EPCS_Demo} -instance_name {EPCS_Demo_0}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {EPCS_Demo_0:POWER_ON_RESET_N}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {EPCS_Demo_0:FAB_RESET_N} -value {VCC}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {EPCS_Demo_0:SDIF_READY}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {EPCS_Demo_0:SDIF0_PHY_RESET_N}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {EPCS_Demo_0:SDIF0_SPLL_LOCK} -value {VCC}
sd_connect_pins_to_constant -sd_name ${sd_name} -pin_names {EPCS_Demo_0:SDIF0_PERST_N} -value {VCC}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {EPCS_Demo_0:SDIF0_CORE_RESET_N}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {EPCS_Demo_0:FAB_CCC_GL3}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {EPCS_Demo_0:FAB_CCC_LOCK}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {EPCS_Demo_0:HPMS_READY}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {EPCS_Demo_0:COMM_BLK_INT}
sd_mark_pins_unused -sd_name ${sd_name} -pin_names {EPCS_Demo_0:HPMS_INT_M2F}



# Add EPCS_SERDES_0 instance
sd_instantiate_component -sd_name ${sd_name} -component_name {EPCS_SERDES} -instance_name {EPCS_SERDES_0}



# Add FabUART_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {FabUART} -hdl_file {hdl\FabUART.v} -instance_name {FabUART_0}



# Add Output_select_0 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {Output_select} -hdl_file {hdl\Output_select.v} -instance_name {Output_select_0}



# Add prbs7_16_check_lane2 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {prbs7_16_check} -hdl_file {hdl\PRBS_Check.v} -instance_name {prbs7_16_check_lane2}



# Add prbs7_16_gen_lane2 instance
sd_instantiate_hdl_module -sd_name ${sd_name} -hdl_module_name {prbs7_16_gen} -hdl_file {hdl\PRBS_Gen.v} -instance_name {prbs7_16_gen_lane2}



# Add scalar net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:A" "EPCS_SERDES_0:Lane2_RX_RESET_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:B" "AND2_1:B" "FabUART_0:start" "Output_select_0:reset_n" "start" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_0:Y" "prbs7_16_check_lane2:reset_n" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_1:A" "CorePCS_C0_0:EPCS_RxRSTn" "EPCS_SERDES_0:Lane1_RX_RESET_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"AND2_1:Y" "count_check_lane1:reset_n" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:CLK" "EPCS_Demo_0:FAB_CCC_GL0" "FabUART_0:clk" "Output_select_0:clk" "count_check_lane1:sys_clk" "prbs7_16_check_lane2:sys_clk" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:OEN" "FabUART_0:uart_oen" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:RESET_N" "EPCS_Demo_0:INIT_DONE" "EPCS_SERDES_0:EPCS_RESET_N" "FabUART_0:reset" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:RX" "RX" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:RXRDY" "FabUART_0:uart_rxrdy" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:TX" "TX" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:TXRDY" "FabUART_0:uart_txrdy" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:WEN" "FabUART_0:uart_wen" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:ALIGNED" "count_check_lane1:rx_val" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:EPCS_READY" "EPCS_SERDES_0:Lane1_READY" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:EPCS_RxCLK" "EPCS_SERDES_0:Lane1_RX_CLK" "count_check_lane1:clk" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:EPCS_RxIDLE" "EPCS_SERDES_0:Lane1_RX_IDLE" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:EPCS_RxVAL" "EPCS_SERDES_0:Lane1_RX_VAL" "Output_select_0:Rx_val_L1" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:EPCS_TxCLK" "EPCS_SERDES_0:Lane1_TX_CLK" "count_gen_lane1:clk" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:EPCS_TxRSTn" "CorePCS_C0_0:RESET_N" "EPCS_SERDES_0:Lane1_TX_RESET_N" "count_gen_lane1:reset_n" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"DEVRST_N" "EPCS_Demo_0:DEVRST_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_Demo_0:CLK0" "EPCS_SERDES_0:REFCLK_OUT" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_Demo_0:INIT_APB_S_PCLK" "EPCS_SERDES_0:APB_S_PCLK" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_Demo_0:INIT_APB_S_PRESET_N" "EPCS_SERDES_0:APB_S_PRESET_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:Lane2_RX_CLK" "prbs7_16_check_lane2:clk" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:Lane2_RX_VAL" "Output_select_0:Rx_val_L2" "prbs7_16_check_lane2:rx_val" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:Lane2_TX_CLK" "prbs7_16_gen_lane2:clk" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:Lane2_TX_RESET_N" "prbs7_16_gen_lane2:reset_n" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:REFCLK1_N" "REFCLK1_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:REFCLK1_P" "REFCLK1_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:RXD0_N" "RXD0_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:RXD0_P" "RXD0_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:RXD1_N" "RXD1_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:RXD1_P" "RXD1_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:RXD2_N" "RXD2_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:RXD2_P" "RXD2_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:RXD3_N" "RXD3_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:RXD3_P" "RXD3_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:TXD0_N" "TXD0_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:TXD0_P" "TXD0_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:TXD1_N" "TXD1_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:TXD1_P" "TXD1_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:TXD2_N" "TXD2_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:TXD2_P" "TXD2_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:TXD3_N" "TXD3_N" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:TXD3_P" "TXD3_P" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FabUART_0:clear" "count_check_lane1:clr_err_counter" "prbs7_16_check_lane2:clr_err_counter" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FabUART_0:connect_o" "connect_o" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FabUART_0:genrate_err" "count_gen_lane1:error_inject" "prbs7_16_gen_lane2:error_inject" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FabUART_0:rx_error" "Output_select_0:Rx_error" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FabUART_0:rx_lock" "Output_select_0:Lock" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FabUART_0:rx_val" "Output_select_0:Rx_val_out" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FabUART_0:switch" "Output_select_0:Switch" "switch" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Output_select_0:Lock_L1" "count_check_lane1:lock" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Output_select_0:Lock_L2" "prbs7_16_check_lane2:lock" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Output_select_0:Rx_Error_L1" "count_check_lane1:error_out" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Output_select_0:Rx_Error_L2" "prbs7_16_check_lane2:error_out" }

# Add bus net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:DATA_IN" "FabUART_0:uart_data_out" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"COREUART_C0_0:DATA_OUT" "FabUART_0:uart_data_in" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:EPCS_RxDATA" "EPCS_SERDES_0:Lane1_RX_data" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:EPCS_TxDATA" "EPCS_SERDES_0:Lane1_TX_data" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:RX_DATA" "count_check_lane1:data_in" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:RX_K_CHAR" "count_check_lane1:k_in" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:TX_DATA" "count_gen_lane1:data_out" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"CorePCS_C0_0:TX_K_CHAR" "count_gen_lane1:k_out" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:Lane2_RX_data" "prbs7_16_check_lane2:data_in" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_SERDES_0:Lane2_TX_data" "prbs7_16_gen_lane2:data_out" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"FabUART_0:error_count" "Output_select_0:Error_out" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Output_select_0:Error_in_L1" "count_check_lane1:error_count" }
sd_connect_pins -sd_name ${sd_name} -pin_names {"Output_select_0:Error_in_L2" "prbs7_16_check_lane2:error_count" }

# Add bus interface net connections
sd_connect_pins -sd_name ${sd_name} -pin_names {"EPCS_Demo_0:SDIF0_INIT_APB" "EPCS_SERDES_0:APB_SLAVE" }

# Re-enable auto promotion of pins of type 'pad'
auto_promote_pad_pins -promote_all 1
# Save the SmartDesign 
save_smartdesign -sd_name ${sd_name}
# Generate SmartDesign "top"
generate_component -component_name ${sd_name}
