///////////////////////////////////////////////////////////////////////////////
//-------------------------------------------------------------------------
//
// © 2021 Microchip Technology Inc. and its subsidiaries
// All rights reserved.
//
// ANY USE OR REDISTRIBUTION IN PART OR IN WHOLE MUST BE HANDLED IN 
// ACCORDANCE WITH THE MICROCHIP LICENSE AGREEMENT AND MUST BE APPROVED 
// IN ADVANCE IN WRITING.

//  File Name       : epcs_tx_intf.v 
//
//  Description     : This module implements the epcs tx interface logic.

//  Targeted device : Family           Die          Package
//                    SmartFusion2     M2S090TS     484 FBGA
//  Author          : Solutions Team
//                              

//-------------------------------------------------------------------------

module epcs_tx_intf( clk, rstn, txvali, txdin, txvalo, txdout );
input clk, rstn;
input [19:0] txdin;
input txvali;
output reg txvalo;
output reg [19:0] txdout;

reg [19:0] txdin_p;
reg txval_p;

always @(posedge clk or negedge rstn)
  if (!rstn)
  begin
    txdin_p <= 20'd0;    
    txval_p <= 1'b0;
  end
  else
  begin
   txdin_p <= txdin;
   txval_p <= txvali;
  end

always @(posedge clk or negedge rstn)
  if (!rstn)
  begin
    txdout <= 20'd0;    
    txvalo <= 1'b0;
  end
  else
  begin
   txdout <= txdin_p;
   txvalo <= txval_p;
  end

   
endmodule

