@W: MO111 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\work\my_mss\fabosc_0\my_mss_fabosc_0_osc.v":20:7:20:16|Tristate driver XTLOSC_O2F on net XTLOSC_O2F has its enable tied to GND (module my_mss_FABOSC_0_OSC) 
@W: MO111 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\work\my_mss\fabosc_0\my_mss_fabosc_0_osc.v":19:7:19:16|Tristate driver XTLOSC_CCC on net XTLOSC_CCC has its enable tied to GND (module my_mss_FABOSC_0_OSC) 
@W: MO111 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\work\my_mss\fabosc_0\my_mss_fabosc_0_osc.v":18:7:18:20|Tristate driver RCOSC_1MHZ_O2F on net RCOSC_1MHZ_O2F has its enable tied to GND (module my_mss_FABOSC_0_OSC) 
@W: MO111 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\work\my_mss\fabosc_0\my_mss_fabosc_0_osc.v":17:7:17:20|Tristate driver RCOSC_1MHZ_CCC on net RCOSC_1MHZ_CCC has its enable tied to GND (module my_mss_FABOSC_0_OSC) 
@W: MO111 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\work\my_mss_mss\my_mss_mss.v":56:14:56:31|Tristate driver FIC_0_AHB_M_HTRANS_1 on net FIC_0_AHB_M_HTRANS_1 has its enable tied to GND (module my_mss_MSS) 
@W: MO111 :|Tristate driver my_mss_MSS_0_FIC_0_AHB_MASTER_HTRANS_t[0] on net my_mss_MSS_0_FIC_0_AHB_MASTER_HTRANS[0] has its enable tied to GND (module my_mss) 
@W: MO171 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":769:4:769:9|Sequential instance my_mss_top_0.my_mss_0.CORERESETP_0.sm1_areset_n_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":769:4:769:9|Sequential instance my_mss_top_0.my_mss_0.CORERESETP_0.sm1_areset_n_clk_base reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1388:4:1388:9|Sequential instance my_mss_top_0.my_mss_0.CORERESETP_0.RESET_N_F2M_int reduced to a combinational gate by constant propagation 
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[31],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[30]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[30],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[29]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[29],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[28]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[28],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[27]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[27],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[26]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[26],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[25]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[25],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[24]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[24],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[23]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[23],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[22]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[22],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[21]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[21],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[20]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[20],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[19]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[19],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[18]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[18],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[17]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[17],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[16]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[16],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[15]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[15],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[14]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[14],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[13]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[13],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[12]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[12],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[11]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[11],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[10]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[9],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[10]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_apbaddrdata.v":285:0:285:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[8],  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3lll.HRDATA[10]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_ahbtoapbsm.v":646:0:646:5|Removing sequential instance COREAHBTOAPB3_0.CAHBtoAPB3Oll.PWRITE,  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3Oll.CAHBtoAPB3IOI[2]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahbtoapb3\3.0.100\rtl\vlog\core_obfuscated\coreahbtoapb3_penablescheduler.v":152:0:152:5|Removing instance COREAHBTOAPB3_0.CAHBtoAPB3Ill.PENABLE,  because it is equivalent to instance COREAHBTOAPB3_0.CAHBtoAPB3Ill.CAHBtoAPB3OIl[1]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahblite\5.0.100\rtl\vlog\core\coreahblite_masterstage.v":167:0:167:5|Removing instance my_mss_top_0.my_mss_0.CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[25],  because it is equivalent to instance my_mss_top_0.my_mss_0.CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[24]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahblite\5.0.100\rtl\vlog\core\coreahblite_masterstage.v":167:0:167:5|Removing instance my_mss_top_0.my_mss_0.CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[26],  because it is equivalent to instance my_mss_top_0.my_mss_0.CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[24]
@W: BN132 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahblite\5.0.100\rtl\vlog\core\coreahblite_masterstage.v":167:0:167:5|Removing instance my_mss_top_0.my_mss_0.CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[27],  because it is equivalent to instance my_mss_top_0.my_mss_0.CoreAHBLite_0.matrix4x16.masterstage_0.regHADDR[24]
@W: MO160 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahblite\5.0.100\rtl\vlog\core\coreahblite_slavearbiter.v":452:4:452:9|Register bit arbRegSMCurrentState[12] is always 0, optimizing ...
@W: MO160 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahblite\5.0.100\rtl\vlog\core\coreahblite_slavearbiter.v":452:4:452:9|Register bit arbRegSMCurrentState[8] is always 0, optimizing ...
@W: MO160 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\actel\directcore\coreahblite\5.0.100\rtl\vlog\core\coreahblite_slavearbiter.v":452:4:452:9|Register bit arbRegSMCurrentState[4] is always 0, optimizing ...
@W: MT246 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\work\my_mss\my_mss.v":812:9:812:20|Blackbox SYSRESET is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT246 :"d:\appsnotes\2014\tamper\zerioze\mss_mstr_ram_init\component\work\my_mss\ccc_0\my_mss_ccc_0_fccc.v":20:36:20:43|Blackbox CCC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT420 |Found inferred clock my_mss_CCC_0_FCCC|GL0_net_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:my_mss_top_0.my_mss_0.CCC_0.GL0_net"
