
*******************************************
       Libero SoC, MSS and IP Core VERSIONS
*******************************************


This design was tested with the following: 
	Libero SoC Version: 11.8
	MSS Version: 1.1.500
        SOftConsole Version 4.0


******************************************
     DESIGN FILE DIRECTORY STRUCTURE
******************************************


m2s_m2gl_an5928_cbc_mac_df
    |
    |    
    |   
    |      
    |      
    |----libero
    |      |
    |      |
    |      |     
    |      |-----CBC_MAC_SF2  
    |      |     
    |      |-----CBC_MAC_IGL2 
    |      
    |
    |
    |	   
    |
    |---stapl_programming_file
    |      |
    |      |
    |      |     
    |      |-----M2S090S_Top.stp  
    |      |     
    |      |-----M2GL090S_Top.stp      
    |      
    |      
    |           
    |
    |
    |
    |
    |---readme.txt
    

libero
==================================
LiberoProject files

For reference, the final Libero SoC Verilog project of this demo is given under this folder. 
The designs are created for M2GL-M2S_EVAK_KIT Board using M2S090S device.




stapl_programming_file
============================
This folder consists the programming file.







