<?xml version="1.0" encoding="UTF-8" ?>
<!-- *************************************************************************************
FILE DESCRIPTION
The file contains the optimization information from mapper to be displayed as part of the summary report.
*******************************************************************************************-->
<report_table display_priority="3" name="Optimizations Summary">
<parameter tooltip="Non-gated/non-generated clock trees / Gated/generated clock trees" name="Combined Clock Conversion">
<data>1 / 0</data>
<report_link name="more">
<data>E:\Libero_11p7_updates\downloaded\eSRAM_eNVM_RW_Fabric\Libero_project\SF2\synthesis\synlog\report\eSRAM_eNVM_access_top_fpga_mapper_combined_clk.rpt</data>
<title>START OF CLOCK OPTIMIZATION REPORT</title>
</report_link>
</parameter>
</report_table>
