@W: MO111 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\work\codeshadowing_lpddr\fabosc_0\codeshadowing_lpddr_fabosc_0_osc.v":20:7:20:16|Tristate driver XTLOSC_O2F on net XTLOSC_O2F has its enable tied to GND (module CodeShadowing_LPDDR_FABOSC_0_OSC) 
@W: MO111 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\work\codeshadowing_lpddr\fabosc_0\codeshadowing_lpddr_fabosc_0_osc.v":19:7:19:16|Tristate driver XTLOSC_CCC on net XTLOSC_CCC has its enable tied to GND (module CodeShadowing_LPDDR_FABOSC_0_OSC) 
@W: MO111 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\work\codeshadowing_lpddr\fabosc_0\codeshadowing_lpddr_fabosc_0_osc.v":18:7:18:20|Tristate driver RCOSC_1MHZ_O2F on net RCOSC_1MHZ_O2F has its enable tied to GND (module CodeShadowing_LPDDR_FABOSC_0_OSC) 
@W: MO111 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\work\codeshadowing_lpddr\fabosc_0\codeshadowing_lpddr_fabosc_0_osc.v":17:7:17:20|Tristate driver RCOSC_1MHZ_CCC on net RCOSC_1MHZ_CCC has its enable tied to GND (module CodeShadowing_LPDDR_FABOSC_0_OSC) 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":676:4:676:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF0_PERST_N_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":695:4:695:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF1_PERST_N_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":714:4:714:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF2_PERST_N_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":733:4:733:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF3_PERST_N_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":676:4:676:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF0_PERST_N_q2 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":695:4:695:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF1_PERST_N_q2 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":714:4:714:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF2_PERST_N_q2 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":733:4:733:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF3_PERST_N_q2 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":676:4:676:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF0_PERST_N_q3 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":695:4:695:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF1_PERST_N_q3 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":714:4:714:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF2_PERST_N_q3 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":733:4:733:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.SDIF3_PERST_N_q3 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":583:4:583:9|Sequential instance CodeShadowing_LPDDR_0.CORECONFIGP_0.SDIF_RELEASED_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":769:4:769:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.sm1_areset_n_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":769:4:769:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.sm1_areset_n_clk_base reduced to a combinational gate by constant propagation 
@W: MO171 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1388:4:1388:9|Sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.RESET_N_F2M_int reduced to a combinational gate by constant propagation 
@W: BN132 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":898:4:898:9|Removing sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.sdif2_areset_n_rcosc_q1,  because it is equivalent to instance CodeShadowing_LPDDR_0.CORERESETP_0.sm0_areset_n_rcosc_q1
@W: BN132 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":912:4:912:9|Removing sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.sdif3_areset_n_rcosc_q1,  because it is equivalent to instance CodeShadowing_LPDDR_0.CORERESETP_0.sm0_areset_n_rcosc_q1
@W: BN132 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":884:4:884:9|Removing sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.sdif1_areset_n_rcosc_q1,  because it is equivalent to instance CodeShadowing_LPDDR_0.CORERESETP_0.sm0_areset_n_rcosc_q1
@W: BN132 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":870:4:870:9|Removing sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.sdif0_areset_n_rcosc_q1,  because it is equivalent to instance CodeShadowing_LPDDR_0.CORERESETP_0.sm0_areset_n_rcosc_q1
@W: BN132 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":884:4:884:9|Removing sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.sdif1_areset_n_rcosc,  because it is equivalent to instance CodeShadowing_LPDDR_0.CORERESETP_0.sdif0_areset_n_rcosc
@W: BN132 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":912:4:912:9|Removing sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.sdif3_areset_n_rcosc,  because it is equivalent to instance CodeShadowing_LPDDR_0.CORERESETP_0.sdif0_areset_n_rcosc
@W: BN132 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":898:4:898:9|Removing sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.sdif2_areset_n_rcosc,  because it is equivalent to instance CodeShadowing_LPDDR_0.CORERESETP_0.sdif0_areset_n_rcosc
@W: BN132 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":856:4:856:9|Removing sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.sm0_areset_n_rcosc,  because it is equivalent to instance CodeShadowing_LPDDR_0.CORERESETP_0.sdif0_areset_n_rcosc
@W: BN132 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1581:4:1581:9|Removing sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.release_sdif3_core,  because it is equivalent to instance CodeShadowing_LPDDR_0.CORERESETP_0.release_sdif1_core
@W: BN132 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1549:4:1549:9|Removing sequential instance CodeShadowing_LPDDR_0.CORERESETP_0.release_sdif2_core,  because it is equivalent to instance CodeShadowing_LPDDR_0.CORERESETP_0.release_sdif1_core
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":255:4:255:9|Register bit paddr[16] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[31] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[30] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[29] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[28] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[27] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[26] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[25] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[24] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[23] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[22] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[21] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[20] is always 0, optimizing ...
@W: MO160 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\actel\directcore\coreconfigp\7.0.105\rtl\vlog\core\coreconfigp.v":546:4:546:9|Register bit FIC_2_APB_M_PRDATA[19] is always 0, optimizing ...
@W: MT246 :"d:\dg0669\sf2_codeshadowing_lpddr_df\libero\multistageboot_method\codeshadowing_lpddr\component\work\codeshadowing_lpddr\ccc_0\codeshadowing_lpddr_ccc_0_fccc.v":20:36:20:43|Blackbox CCC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT420 |Found inferred clock CodeShadowing_LPDDR_FABOSC_0_OSC|RCOSC_25_50MHZ_CCC_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:CodeShadowing_LPDDR_0.FABOSC_0.RCOSC_25_50MHZ_CCC"
@W: MT420 |Found inferred clock CodeShadowing_LPDDR_MSS|FIC_2_APB_M_PCLK_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:CodeShadowing_LPDDR_0.CodeShadowing_LPDDR_MSS_0.FIC_2_APB_M_PCLK"
@W: MT420 |Found inferred clock CodeShadowing_LPDDR_CCC_0_FCCC|GL0_net_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:CodeShadowing_LPDDR_0.CCC_0.GL0_net"
