pin,slack
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[5]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[5]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[5]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[5]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[5]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[5]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[5]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[5]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[5]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_56:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_56:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_56:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_56:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_56:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_214:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_214:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_214:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_214:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_214:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_139:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_139:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_139:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_139:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_139:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[9]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[9]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[9]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[9]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[9]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_143:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_143:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_143:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_143:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_52:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_52:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_52:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_52:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_52:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_47:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_47:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_47:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_47:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[12]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[12]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[12]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[12]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[12]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[12]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[12]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[12]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[12]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_176:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_176:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_176:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_176:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_176:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_3_sqmuxa:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_3_sqmuxa:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_3_sqmuxa:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_3_sqmuxa:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_3_sqmuxa:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_263:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_263:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_263:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_263:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_263:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_187:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_187:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_187:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_187:IPA,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_TMATCH_0_IN_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_TMATCH_0_IN_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_223:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_223:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_223:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_223:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_223:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[8]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[8]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[8]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[8]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[8]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[8]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[8]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[8]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[8]:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[2]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[2]:B,17093
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[2]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[2]:CC,17418
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[2]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[2]:P,17093
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[2]:S,17418
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[2]:UB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[8]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[8]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[8]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[8]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[8]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[8]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[8]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[8]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[8]:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_clk_base:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_clk_base:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_clk_base:CLK,7689
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_clk_base:D,8817
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_clk_base:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_clk_base:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_clk_base:Q,7689
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_clk_base:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_clk_base:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_45:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_45:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_45:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_45:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_45:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_9_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_9_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_9_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_9_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_87:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_87:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_87:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_87:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_87:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_156:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_156:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_156:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_156:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_147:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_147:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_147:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_147:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_147:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[4]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[4]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[4]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[4]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[4]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_201:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_201:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_201:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_201:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_201:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CAS_N_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CAS_N_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CAS_N_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_85:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_85:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_85:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_85:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_85:IPB,
CodeShadowing_LPDDR_0/CCC_0/GL0_INST/U0:An,
CodeShadowing_LPDDR_0/CCC_0/GL0_INST/U0:ENn,
CodeShadowing_LPDDR_0/CCC_0/GL0_INST/U0:YWn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[11]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[11]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[11]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[11]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[11]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[11]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[11]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[11]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[11]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_168:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_168:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_168:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_168:IPA,
GPIO_1_M2F_obuf/U0/U_IOPAD:D,
GPIO_1_M2F_obuf/U0/U_IOPAD:E,
GPIO_1_M2F_obuf/U0/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_160:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_160:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_160:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_160:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_160:IPB,
GPIO_1_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_1_M2F_obuf/U0/U_IOOUTFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_128:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_128:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_128:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_128:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_128:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_278:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_278:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_278:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_278:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_278:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_120:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_120:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_120:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_120:IPA,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[3]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[3]:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[3]:CLK,6772
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[3]:D,7683
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[3]:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[3]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[3]:Q,6772
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[3]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[3]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_69:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_69:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_69:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_69:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_69:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_76:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_76:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_76:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_76:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_76:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_2_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_2_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_2_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_2_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_281:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_281:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_281:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_281:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_281:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_72:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_72:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_72:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_72:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_171:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_171:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_171:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_171:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_171:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_1_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_1_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[8]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[8]:B,17224
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[8]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[8]:CC,16959
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[8]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[8]:P,17224
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[8]:S,16959
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[8]:UB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_258:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_258:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_258:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_258:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_258:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_109:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_109:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_109:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_109:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_14:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_14:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_14:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_14:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_14:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_14:IPC,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_1:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_1:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_1:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_1:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_1:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_8:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_8:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_8:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_8:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_8:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_8:IPC,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[4]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[4]:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[4]:CLK,7615
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[4]:D,6772
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[4]:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[4]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[4]:Q,7615
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[4]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[4]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_264:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_264:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_264:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_264:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_264:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_264:IPC,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[0]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[0]:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[0]:CLK,8817
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[0]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[0]:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[0]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[0]:Q,8817
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[0]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[0]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_151:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_151:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_151:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_151:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_151:IPB,
CodeShadowing_LPDDR_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0:An,
CodeShadowing_LPDDR_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0:ENn,
CodeShadowing_LPDDR_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0:YWn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_7_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_7_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_7_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_7_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_224:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_224:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_224:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_224:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_224:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_241:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_241:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_241:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_241:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_241:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_241:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_14_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_14_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_14_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_14_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_217:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_217:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_217:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_217:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_217:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_217:IPC,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[15]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[15]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[15]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[15]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[15]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[15]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[15]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[15]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[15]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_189:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_189:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_189:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_189:IPA,
GPIO_12_F2M_ibuf/U0/U_IOINFF:A,
GPIO_12_F2M_ibuf/U0/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q2:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q2:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q2:CLK,6856
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q2:D,8817
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q2:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q2:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q2:Q,6856
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q2:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q2:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[11]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[11]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[11]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[11]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[11]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_19:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_19:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_19:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_19:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_19:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_15_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_15_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_15_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_23:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_23:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_23:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_23:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[15]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[15]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[15]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[15]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[15]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[15]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[15]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[15]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[15]:SLn,
GPIO_3_M2F_obuf/U0/U_IOPAD:D,
GPIO_3_M2F_obuf/U0/U_IOPAD:E,
GPIO_3_M2F_obuf/U0/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata19:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata19:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata19:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata19:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_149:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_149:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_149:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_149:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_149:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_97:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_97:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_97:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_97:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MMUART_1_TXD_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MMUART_1_TXD_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MMUART_1_TXD_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[5]:A,7954
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[5]:B,6942
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[5]:C,7832
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[5]:D,7689
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[5]:Y,6942
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_132:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_132:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_132:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_132:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/FIC_2_APB_M_PCLK_inferred_clock_RNINBN9/U0_RGB1:An,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/FIC_2_APB_M_PCLK_inferred_clock_RNINBN9/U0_RGB1:ENn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/FIC_2_APB_M_PCLK_inferred_clock_RNINBN9/U0_RGB1:YL,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_DI_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_DI_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_61:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_61:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_61:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_61:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_BA_1_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_BA_1_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_BA_1_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[6]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[6]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[6]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[6]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[6]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[6]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[6]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[6]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[6]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_6:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_6:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_6:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_6:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_6:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_53:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_53:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_53:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_53:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_53:IPB,
GPIO_8_M2F_obuf/U0/U_IOENFF:A,
GPIO_8_M2F_obuf/U0/U_IOENFF:Y,
GPIO_12_F2M_ibuf/U0/U_IOPAD:PAD,
GPIO_12_F2M_ibuf/U0/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:SLn,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_3:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_3:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_3:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_3:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_3:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_3:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_1_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_1_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[3]:A,7960
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[3]:B,7876
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[3]:C,7826
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[3]:D,7683
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[3]:Y,7683
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_37:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_37:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_37:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_37:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_233:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_233:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_233:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_233:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_233:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[12]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[12]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[12]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[12]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[12]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[12]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[12]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[12]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[12]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_35:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_35:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_35:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_35:IPB,
GPIO_0_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_0_M2F_obuf/U0/U_IOOUTFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_BA_2_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_BA_2_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_BA_2_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_267:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_267:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_267:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_267:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_267:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_215:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_215:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_215:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_215:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_215:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_227:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_227:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_227:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_227:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_227:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[5]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[5]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[5]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[5]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[5]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[5]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[5]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[5]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[5]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_138:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_138:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_138:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_138:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_138:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST_RNIV89D/U0:An,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST_RNIV89D/U0:ENn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST_RNIV89D/U0:YWn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[3]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[3]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[3]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[3]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[3]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[3]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[3]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[3]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[3]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_130:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_130:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_130:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_130:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_11:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_11:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_11:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_11:IPB,
CodeShadowing_LPDDR_0/CCC_0/GL0_INST/U0_RGB1:An,
CodeShadowing_LPDDR_0/CCC_0/GL0_INST/U0_RGB1:ENn,
CodeShadowing_LPDDR_0/CCC_0/GL0_INST/U0_RGB1:YL,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_20:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_20:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_20:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_20:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_20:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_1:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_1:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_1:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_1:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_73:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_73:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_73:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_73:IPA,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[16]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[16]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[16]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[16]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_279:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_279:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_279:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_279:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_279:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_102:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_102:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_102:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_102:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_102:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[0]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[0]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[0]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[0]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[0]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[0]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[0]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[0]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[0]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_1_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_1_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_1_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_66:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_66:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_66:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_66:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_66:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state_ns_0[1]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state_ns_0[1]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state_ns_0[1]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state_ns_0[1]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state_ns_0[1]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_14_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_14_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_14_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_50:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_50:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_50:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_50:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_62:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_62:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_62:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_62:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_28:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_28:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_28:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_28:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_28:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core:CLK,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core:D,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core:Q,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_259:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_259:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_259:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_259:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_259:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_234:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_234:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_234:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_234:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_234:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_216:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_216:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_216:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_216:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_216:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_216:IPC,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[5]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[5]:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[5]:CLK,7768
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[5]:D,6942
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[5]:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[5]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[5]:Q,7768
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[5]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[5]:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[12]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[12]:B,17488
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[12]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[12]:CC,17012
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[12]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[12]:P,17488
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[12]:S,17012
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[12]:UB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_203:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_203:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_203:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_203:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_203:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q1:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q1:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q1:CLK,8817
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q1:D,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q1:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q1:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q1:Q,8817
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q1:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif3_spll_lock_q1:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[3]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[3]:B,17069
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[3]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[3]:CC,17146
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[3]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[3]:P,17069
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[3]:S,17146
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[3]:UB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_6_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_6_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_6_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_182:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_182:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_182:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_182:IPA,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc_RNI97K7/U0_RGB1:An,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc_RNI97K7/U0_RGB1:ENn,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc_RNI97K7/U0_RGB1:YL,16750
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[7]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[7]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[7]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[7]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[7]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_58:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_58:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_58:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_58:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_49:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_49:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_49:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_49:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_24:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_24:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_24:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_24:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_196:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_196:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_196:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_196:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_196:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_q1:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_q1:ALn,7764
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_q1:CLK,8817
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_q1:D,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_q1:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_q1:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_q1:Q,8817
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_q1:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_q1:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[8]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[8]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[8]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[8]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[8]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_283:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_283:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_283:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_283:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_283:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_265:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_265:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_265:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_265:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_265:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_265:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_142:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_142:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_142:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_142:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/next_count_ddr_enable_0_sqmuxa_0_a3:A,6856
CodeShadowing_LPDDR_0/CORERESETP_0/next_count_ddr_enable_0_sqmuxa_0_a3:B,6772
CodeShadowing_LPDDR_0/CORERESETP_0/next_count_ddr_enable_0_sqmuxa_0_a3:Y,6772
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR_RNO:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR_RNO:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR_RNO:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_225:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_225:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_225:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_225:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_225:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_210:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_210:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_210:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_210:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_210:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_4_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_4_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_4_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_4_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[0]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[0]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[0]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[0]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[0]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[0]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[0]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[0]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[0]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_89:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_89:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_89:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_89:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_89:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_108:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_108:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_108:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_108:IPA,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[16]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[16]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[16]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[16]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[16]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[16]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[16]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[16]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[16]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_54:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_54:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_54:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_54:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_54:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_100:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_100:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_100:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_100:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_100:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_7_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_7_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_0_RNO[0]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_0_RNO[0]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_0_RNO[0]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_0_RNO[0]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_0_RNO[0]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_16:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_16:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_16:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_16:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_16:IPB,
GPIO_9_M2F_obuf/U0/U_IOPAD:D,
GPIO_9_M2F_obuf/U0/U_IOPAD:E,
GPIO_9_M2F_obuf/U0/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_4_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_4_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_243:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_243:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_243:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_243:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_243:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_12:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_12:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_12:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_12:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_70:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_70:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_70:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_70:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select:ALn,8705
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select:CLK,7883
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select:D,
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select:EN,7775
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select:Q,7883
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc_RNI97K7/U0:An,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc_RNI97K7/U0:ENn,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc_RNI97K7/U0:YWn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_212:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_212:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_212:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_212:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_212:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_188:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_188:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_188:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_188:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_0_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_0_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_180:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_180:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_180:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_180:IPA,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[4]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[4]:B,17743
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[4]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[4]:CC,17078
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[4]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[4]:P,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[4]:S,17078
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[4]:UB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_204:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_204:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_204:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_204:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_204:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_204:IPC,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PSEL:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PSEL:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PSEL:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PSEL:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PSEL:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_0_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_0_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_0_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_0_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_78:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_78:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_78:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_78:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_78:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_266:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_266:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_266:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_266:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_266:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_226:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_226:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_226:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_226:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_226:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_148:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_148:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_148:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_148:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_148:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_237:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_237:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_237:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_237:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_237:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CLK_PAD/U_IOPADN:EIN_P,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CLK_PAD/U_IOPADN:OIN_P,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CLK_PAD/U_IOPADN:PAD_P,
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int:ALn,8705
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int:CLK,7764
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int:D,7832
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int:Q,7764
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_140:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_140:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_140:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_140:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_140:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[14]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[14]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[14]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[14]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[14]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[14]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[14]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[14]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[14]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_41:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_41:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_41:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_41:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_41:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[13]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[13]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[13]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[13]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[13]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[13]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[13]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[13]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[13]:SLn,
GPIO_3_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_3_M2F_obuf/U0/U_IOOUTFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_175:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_175:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_175:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_175:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_175:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:CLK0,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:CLK0_PAD,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:CLK1,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:CLK1_PAD,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:CLK2,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:CLK2_PAD,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:CLK3,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:CLK3_PAD,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:GL0,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:GPD0_ARST_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:GPD1_ARST_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:GPD2_ARST_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:GPD3_ARST_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:LOCK,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX0_ARST_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX0_HOLD_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX0_SEL,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX1_ARST_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX1_HOLD_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX1_SEL,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX2_ARST_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX2_HOLD_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX2_SEL,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX3_ARST_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX3_HOLD_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX3_SEL,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[2],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[3],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[4],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[5],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[6],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[7],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PCLK,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PENABLE,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PLL_ARST_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PLL_BYPASS_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PLL_POWERDOWN_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PRESET_N,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PSEL,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[0],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[1],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[2],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[3],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[4],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[5],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[6],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[7],
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:PWRITE,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:RCOSC_1MHZ,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:RCOSC_25_50MHZ,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/INST_CCC_IP:XTLOSC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_284:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_284:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_284:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_284:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_284:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CLK_PAD/U_IOPADP:EIN_P,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CLK_PAD/U_IOPADP:OIN_P,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CLK_PAD/U_IOPADP:PAD_P,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_116:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_116:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_116:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_116:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_116:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_74:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_74:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_74:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_74:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_DI_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_DI_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MMUART_1_RXD_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MMUART_1_RXD_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_9_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_9_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_9_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_rcosc_q1:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_rcosc_q1:ALn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_rcosc_q1:CLK,18818
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_rcosc_q1:D,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_rcosc_q1:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_rcosc_q1:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_rcosc_q1:Q,18818
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_rcosc_q1:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_rcosc_q1:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_155:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_155:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_155:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_155:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_9:A,16791
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_9:B,16748
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_9:C,16666
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_9:D,16559
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_9:Y,16559
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_81:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_81:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_81:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_81:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_81:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_260:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_260:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_260:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_260:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_260:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_220:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_220:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_220:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_220:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_220:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_0_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_0_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_244:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_244:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_244:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_244:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_244:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_8:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_8:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_8:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_8:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_8:IPB,
CFG0_GND_INST:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_63:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_63:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_63:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_63:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_63:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_11_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_11_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_0:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_0:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_0:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_0:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_0:IPB,
GPIO_4_M2F_obuf/U0/U_IOPAD:D,
GPIO_4_M2F_obuf/U0/U_IOPAD:E,
GPIO_4_M2F_obuf/U0/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_99:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_99:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_99:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_99:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_99:IPB,
GPIO_11_F2M_ibuf/U0/U_IOPAD:PAD,
GPIO_11_F2M_ibuf/U0/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[7]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[7]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[7]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[7]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[7]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[7]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[7]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[7]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[7]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_262:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_262:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_262:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_262:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_262:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_218:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_218:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_218:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_218:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_218:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_222:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_222:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_222:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_222:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_222:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_clk_base:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_clk_base:ALn,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_clk_base:CLK,8705
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_clk_base:D,8817
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_clk_base:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_clk_base:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_clk_base:Q,8705
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_clk_base:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_clk_base:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_0_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_0_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[9]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[9]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[9]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[9]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[9]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[9]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[9]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[9]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[9]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_111:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_111:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_111:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_111:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_111:IPB,
GPIO_0_M2F_obuf/U0/U_IOPAD:D,
GPIO_0_M2F_obuf/U0/U_IOPAD:E,
GPIO_0_M2F_obuf/U0/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[7]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[7]:B,17151
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[7]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[7]:CC,17020
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[7]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[7]:P,17151
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[7]:S,17020
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[7]:UB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg_RNI1D[1]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg_RNI1D[1]:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[2]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[2]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[2]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[2]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[2]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[2]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[2]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[2]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[2]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_39:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_39:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_39:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_39:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_39:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_207:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_207:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_207:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_207:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_207:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_8_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_8_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_5:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_5:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_5:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_5:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_5:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_235:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_235:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_235:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_235:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_235:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_46:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_46:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_46:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_46:IPB,
CodeShadowing_LPDDR_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An,
CodeShadowing_LPDDR_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:ENn,
CodeShadowing_LPDDR_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YL,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_174:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_174:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_174:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_174:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_174:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_42:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_42:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_42:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_42:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_42:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_166:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_166:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_166:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_166:IPB,
GPIO_4_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_4_M2F_obuf/U0/U_IOOUTFF:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[6]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[6]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[6]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[6]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[6]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[6]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[6]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[6]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[6]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_126:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_126:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_126:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_126:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_126:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_1_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_1_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_1_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_1_PAD/U_IOPAD:Y,
GPIO_9_M2F_obuf/U0/U_IOENFF:A,
GPIO_9_M2F_obuf/U0/U_IOENFF:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[4]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[4]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[4]:CLK,16706
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[4]:D,17078
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[4]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[4]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[4]:Q,16706
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[4]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[4]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_13:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_13:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_13:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_13:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/FIC_2_APB_M_PCLK_inferred_clock_RNINBN9/U0:An,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/FIC_2_APB_M_PCLK_inferred_clock_RNINBN9/U0:ENn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/FIC_2_APB_M_PCLK_inferred_clock_RNINBN9/U0:YWn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_287:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_287:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_287:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_287:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_287:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_7:A,16906
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_7:B,16829
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_7:C,16784
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_7:D,16706
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_7:Y,16706
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[8]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[8]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[8]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[8]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[8]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[8]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[8]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[8]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[8]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_154:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_154:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_154:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_154:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_86:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_86:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_86:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_86:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_86:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[13]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[13]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[13]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[13]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[13]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[13]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[13]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[13]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[13]:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_5_sqmuxa:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_5_sqmuxa:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_5_sqmuxa:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_5_sqmuxa:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_5_sqmuxa:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_82:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_82:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_82:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_82:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[6]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[6]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[6]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[6]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[6]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[6]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[6]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[6]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[6]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_60:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_60:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_60:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_60:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_173:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_173:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_173:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_173:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_173:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_247:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_247:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_247:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_247:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_247:IPB,
CodeShadowing_LPDDR_0/FABOSC_0/I_RCOSC_25_50MHZ/U0:CLKOUT,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_91:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_91:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_91:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_91:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_91:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled:CLK,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled:D,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled:EN,16559
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled:Q,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_236:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_236:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_236:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_236:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_236:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MMUART_1_RXD_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MMUART_1_RXD_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_9:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_9:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_9:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_9:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_9:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_clk_base:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_clk_base:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_clk_base:CLK,7866
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_clk_base:D,8817
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_clk_base:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_clk_base:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_clk_base:Q,7866
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_clk_base:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_clk_base:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_153:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_153:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_153:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_153:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_153:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg_RNI2E[2]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg_RNI2E[2]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_228:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_228:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_228:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_228:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_228:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_228:IPC,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns_a3[6]:A,7845
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns_a3[6]:B,7768
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns_a3[6]:Y,7768
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0_a3:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0_a3:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0_a3:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0_a3:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_68:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_68:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_68:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_68:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_68:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_161:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_161:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_161:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_161:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_161:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_177:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_177:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_177:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_177:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_177:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_121:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_121:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_121:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_121:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_31:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_31:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_31:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_31:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_31:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_13_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_13_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_13_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_WE_N_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_WE_N_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_WE_N_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_1[5]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_1[5]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_1[5]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_CLK_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_CLK_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ODT_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ODT_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ODT_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_205:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_205:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_205:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_205:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_205:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_205:IPC,
CodeShadowing_LPDDR_0/CORERESETP_0/un1_next_ddr_ready_0_sqmuxa:A,7839
CodeShadowing_LPDDR_0/CORERESETP_0/un1_next_ddr_ready_0_sqmuxa:B,7762
CodeShadowing_LPDDR_0/CORERESETP_0/un1_next_ddr_ready_0_sqmuxa:C,7717
CodeShadowing_LPDDR_0/CORERESETP_0/un1_next_ddr_ready_0_sqmuxa:D,7615
CodeShadowing_LPDDR_0/CORERESETP_0/un1_next_ddr_ready_0_sqmuxa:Y,7615
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_3_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_3_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_3_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_3_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[1]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[1]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[1]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[1]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[1]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[1]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[1]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[1]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state[1]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_64:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_64:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_64:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_64:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_64:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_157:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_157:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_157:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_157:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_230:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_230:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_230:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_230:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_230:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_3_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_3_PAD/U_IOINFF:Y,
GPIO_2_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_2_M2F_obuf/U0/U_IOOUTFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_10:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_10:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_10:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_10:IPB,
GPIO_2_M2F_obuf/U0/U_IOENFF:A,
GPIO_2_M2F_obuf/U0/U_IOENFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_285:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_285:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_285:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_285:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_285:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int_4:A,7960
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int_4:B,7883
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int_4:C,7832
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int_4:Y,7832
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_RNO[1]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_RNO[1]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_RNO[1]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_RNO[1]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_232:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_232:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_232:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_232:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_232:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_state:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_state:ALn,8705
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_state:CLK,7775
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_state:D,
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_state:EN,8708
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_state:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_state:Q,7775
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_state:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_state:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[2]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[2]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[2]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[2]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[2]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[2]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[2]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[2]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[2]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_18:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_18:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_18:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_18:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_18:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[0],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[10],16972
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[11],16911
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[1],17482
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[2],17418
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[3],17146
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[4],17078
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[5],17028
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[6],17112
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[7],17020
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[8],16959
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CC[9],17056
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CI,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:CO,16934
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[0],16955
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[10],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[11],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[1],16911
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[2],17093
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[3],17069
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[4],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[5],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[6],17050
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[7],17151
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[8],17224
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:P[9],17211
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[0],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[10],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[11],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[1],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[2],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[3],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[4],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[5],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[6],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[7],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[8],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_0:UB[9],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_271:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_271:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_271:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_271:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_271:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_SS0_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_SS0_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_SS0_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_SS0_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_6_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_6_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_245:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_245:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_245:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_245:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_245:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_219:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_219:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_219:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_219:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_219:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_96:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_96:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_96:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_96:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_206:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_206:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_206:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_206:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_206:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_92:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_92:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_92:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_92:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_92:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[5]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[5]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[5]:CLK,16826
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[5]:D,17028
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[5]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[5]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[5]:Q,16826
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[5]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[5]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_251:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_251:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_251:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_251:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_251:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_14:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_14:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_14:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_14:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_12_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_12_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_12_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_12_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base:ALn,7764
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base:CLK,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base:D,8817
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base:Q,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base_RNIT277/U0_RGB1:An,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base_RNIT277/U0_RGB1:ENn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base_RNIT277/U0_RGB1:YL,6748
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_43:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_43:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_43:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_43:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_43:IPB,
GPIO_4_M2F_obuf/U0/U_IOENFF:A,
GPIO_4_M2F_obuf/U0/U_IOENFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_136:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_136:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_136:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_136:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_136:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_0_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_0_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_0_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_0_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_36:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_36:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_36:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_36:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_286:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_286:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_286:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_286:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_286:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_13_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_13_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_13_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_13_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s[13]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s[13]:B,17743
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s[13]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s[13]:CC,16934
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s[13]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s[13]:P,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s[13]:S,16934
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s[13]:UB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_32:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_32:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_32:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_32:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_32:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/next_sm0_state25:A,7020
CodeShadowing_LPDDR_0/CORERESETP_0/next_sm0_state25:B,6942
CodeShadowing_LPDDR_0/CORERESETP_0/next_sm0_state25:Y,6942
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_q1:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_q1:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_q1:CLK,8817
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_q1:D,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_q1:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_q1:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_q1:Q,8817
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_q1:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG1_DONE_q1:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_179:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_179:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_179:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_179:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_9_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_9_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/INIT_DONE_int:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/INIT_DONE_int:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/INIT_DONE_int:CLK,
CodeShadowing_LPDDR_0/CORERESETP_0/INIT_DONE_int:D,
CodeShadowing_LPDDR_0/CORERESETP_0/INIT_DONE_int:EN,8715
CodeShadowing_LPDDR_0/CORERESETP_0/INIT_DONE_int:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/INIT_DONE_int:Q,
CodeShadowing_LPDDR_0/CORERESETP_0/INIT_DONE_int:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/INIT_DONE_int:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_200:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_200:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_200:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_200:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_200:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[9]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[9]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[9]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[9]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[9]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[9]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[9]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[9]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[9]:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[2]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[2]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[2]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[2]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[2]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_195:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_195:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_195:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_195:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_195:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[10]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[10]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[10]:CLK,16906
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[10]:D,16972
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[10]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[10]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[10]:Q,16906
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[10]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[10]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_83:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_83:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_83:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_83:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[1]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[1]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[1]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[1]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[1]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[1]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[1]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[1]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[1]:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select4:A,7845
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select4:B,7775
CodeShadowing_LPDDR_0/CORERESETP_0/mss_ready_select4:Y,7775
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_RNO[0]:A,17909
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_RNO[0]:Y,17909
CodeShadowing_LPDDR_0/CORECONFIGP_0/state_s0_0_a2_i:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state_s0_0_a2_i:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state_s0_0_a2_i:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_15_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_15_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_246:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_246:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_246:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_246:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_246:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_159:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_159:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_159:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_159:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_159:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_4:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_4:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_4:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_4:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_4:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_RXBUS_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_RXBUS_MGPIO3A_H2F_B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_RXBUS_USBA_DATA1_MGPIO3A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_TXBUS_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_TXBUS_MGPIO2A_H2F_B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_TXBUS_USBA_DATA0_MGPIO2A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_TX_EBL_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_TX_EBL_MGPIO4A_H2F_B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_TX_EBL_USBA_DATA2_MGPIO4A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_MDDR_APB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:COLF,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CONFIG_PRESET_N,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CRSF,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DM_IN[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DM_IN[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DM_IN[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DM_OE[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DM_OE[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[10],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[11],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[12],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[13],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[14],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[15],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[8],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_ADDR[9],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_BA[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_BA[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_BA[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_CASN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_CKE,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_CLK,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_CSN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DM_RDQS_OUT[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DM_RDQS_OUT[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQS_IN[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQS_IN[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQS_IN[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQS_OE[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQS_OE[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQS_OUT[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQS_OUT[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[10],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[11],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[12],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[13],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[14],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[15],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[16],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[17],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[8],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_IN[9],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_OE[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_OE[10],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_OE[11],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_OE[12],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_OE[13],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_OE[14],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_OE[15],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_OE[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_OE[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:DRAM_DQ_OE[3],
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CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[31],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[32],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[33],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[34],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[35],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[36],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[37],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[38],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[39],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[40],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[41],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[42],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[43],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[44],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[45],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[46],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[47],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[48],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[49],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[50],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[51],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[52],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[53],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[54],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[55],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[56],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[57],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[58],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[59],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[60],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[61],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[62],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[63],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[8],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WDATA_HWDATA01[9],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WID_HREADY01[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WID_HREADY01[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WID_HREADY01[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WID_HREADY01[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WLAST,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WSTRB[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WSTRB[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WSTRB[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WSTRB[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WSTRB[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WSTRB[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WSTRB[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WSTRB[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_WVALID,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:GTX_CLKPF,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C0_BCLK,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C0_SCL_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C0_SCL_USBC_DATA1_MGPIO31B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C0_SDA_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C0_SDA_USBC_DATA0_MGPIO30B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C1_BCLK,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C1_SCL_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C1_SCL_MGPIO1A_H2F_B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C1_SCL_USBA_DATA4_MGPIO1A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C1_SDA_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C1_SDA_MGPIO0A_H2F_B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:I2C1_SDA_USBA_DATA3_MGPIO0A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PADDR[10],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PADDR[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PADDR[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PADDR[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PADDR[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PADDR[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PADDR[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PADDR[8],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PADDR[9],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PENABLE,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[10],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[11],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[12],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[13],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[14],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[15],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[8],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PRDATA[9],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PREADY,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PSEL,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PSLVERR,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[10],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[11],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[12],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[13],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[14],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[15],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[8],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[9],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWRITE,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDIF,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO0A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO0B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO10A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO10B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO11A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO11B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO12A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO13A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO14A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO15A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO16A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO17B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO18B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO19B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO1A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO1B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO20B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO21B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO22B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO24B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO25A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO25B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO26A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO26B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO27A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO27B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO28A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO28B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO29A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO29B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO2A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO2B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO30A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO30B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO31A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO31B_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO3A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO3B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO4A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO4B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO5A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO5B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO6A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO6B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO7A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO7B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO8A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO8B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO9A_F2H_GPIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO9B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_CTS_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_CTS_USBC_DATA7_MGPIO19B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_DCD_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_DCD_MGPIO22B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_DSR_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_DSR_MGPIO20B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_DTR_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_DTR_USBC_DATA6_MGPIO18B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_RI_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_RI_MGPIO21B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_RTS_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_RTS_USBC_DATA5_MGPIO17B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_RXD_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_RXD_USBC_STP_MGPIO28B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_SCK_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_SCK_USBC_NXT_MGPIO29B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_TXD_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_TXD_USBC_DIR_MGPIO27B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_CTS_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_CTS_MGPIO13B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_DCD_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_DCD_MGPIO16B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_DSR_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_DSR_MGPIO14B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_DTR_MGPIO12B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_RI_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_RI_MGPIO15B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_RTS_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_RTS_MGPIO11B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_RXD_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_RXD_USBC_DATA3_MGPIO26B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_SCK_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_SCK_USBC_DATA4_MGPIO25B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_TXD_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_TXD_USBC_DATA2_MGPIO24B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_TXD_USBC_DATA2_MGPIO24B_OE,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_TXD_USBC_DATA2_MGPIO24B_OUT,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[10],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[12],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[13],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[15],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[8],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[9],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PENABLE,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[10],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[11],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[12],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[13],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[14],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[15],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[16],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[17],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[18],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[19],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[20],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[21],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[22],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[23],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[24],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[25],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[26],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[27],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[28],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[29],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[30],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[31],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[8],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[9],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PREADY,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PSEL,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PSLVERR,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[10],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[11],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[12],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[13],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[14],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[15],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[16],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[8],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[9],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWRITE,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PRESET_N,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[8],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[9],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_GTX_CLK_RMII_CLK_USBB_XCLK_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_MDC_RMII_MDC_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_MDIO_RMII_MDIO_USBB_DATA7_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_RXD0_RMII_RXD0_USBB_DATA0_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_RXD1_RMII_RXD1_USBB_DATA1_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_RXD2_RMII_RX_ER_USBB_DATA3_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_RXD3_USBB_DATA4_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_RX_CLK_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_RX_CTL_RMII_CRS_DV_USBB_DATA2_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_TXD0_RMII_TXD0_USBB_DIR_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_TXD1_RMII_TXD1_USBB_STP_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_TXD2_USBB_DATA5_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_TXD3_USBB_DATA6_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_TX_CLK_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RGMII_TX_CTL_RMII_TX_EN_USBB_NXT_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[0],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[1],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[2],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[3],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[4],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[5],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[6],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[7],
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RX_CLKPF,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RX_DVF,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RX_ERRF,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RX_EV,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SLEEPHOLDREQ,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SMBALERT_NI0,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SMBALERT_NI1,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SMBSUS_NI0,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SMBSUS_NI1,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_CLK_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SCK_USBA_XCLK_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SCK_USBA_XCLK_OE,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SCK_USBA_XCLK_OUT,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SDI_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SDI_USBA_DIR_MGPIO5A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SDO_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SDO_USBA_STP_MGPIO6A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SDO_USBA_STP_MGPIO6A_OE,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SDO_USBA_STP_MGPIO6A_OUT,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS0_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS0_USBA_NXT_MGPIO7A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS0_USBA_NXT_MGPIO7A_OE,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS0_USBA_NXT_MGPIO7A_OUT,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS1_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS1_MGPIO8A_H2F_B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS1_USBA_DATA5_MGPIO8A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS2_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS2_MGPIO9A_H2F_B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS2_USBA_DATA6_MGPIO9A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS3_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS3_MGPIO10A_H2F_B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS3_USBA_DATA7_MGPIO10A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS4_MGPIO19A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS5_MGPIO20A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS6_MGPIO21A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS7_MGPIO22A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_CLK_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SCK_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SDI_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SDI_MGPIO11A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SDO_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SDO_MGPIO12A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS0_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS0_MGPIO13A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS1_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS1_MGPIO14A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS2_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS2_MGPIO15A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS3_F2H_SCP,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS3_MGPIO16A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS4_MGPIO17A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS5_MGPIO18A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS6_MGPIO23A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS7_MGPIO24A_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TX_CLKPF,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBC_XCLK_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_DATA0_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_DATA1_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_DATA2_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_DATA3_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_DATA4_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_DATA5_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_DATA6_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_DATA7_MGPIO23B_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_DIR_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_NXT_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_STP_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USBD_XCLK_IN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USER_MSS_GPIO_RESET_N,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USER_MSS_RESET_N,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:XCLK_FAB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_RESET_N_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_RESET_N_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_RESET_N_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/SYSRESET_POR/INST_SYSRESET_IP:DEVRST_N,
CodeShadowing_LPDDR_0/SYSRESET_POR/INST_SYSRESET_IP:POWER_ON_RESET_N,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_280:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_280:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_280:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_280:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_280:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_202:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_202:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_202:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_202:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_202:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_R_SDIF3_PSEL_1_1:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_R_SDIF3_PSEL_1_1:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_R_SDIF3_PSEL_1_1:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/un1_R_SDIF3_PSEL_1_1:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_15_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_15_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_15_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_15_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_238:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_238:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_238:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_238:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_238:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_RAS_N_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_RAS_N_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_RAS_N_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CS_N_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CS_N_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CS_N_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_269:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_269:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_269:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_269:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_269:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_131:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_131:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_131:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_131:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[7]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[7]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[7]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[7]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[7]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[7]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[7]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[7]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[7]:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE:SLn,
GPIO_10_M2F_obuf/U0/U_IOPAD:D,
GPIO_10_M2F_obuf/U0/U_IOPAD:E,
GPIO_10_M2F_obuf/U0/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_229:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_229:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_229:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_229:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_229:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_229:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_240:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_240:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_240:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_240:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_240:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_240:IPC,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[8]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[8]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[8]:CLK,16784
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[8]:D,16959
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[8]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[8]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[8]:Q,16784
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[8]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[8]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_12_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_12_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_11:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_11:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_11:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_11:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_11:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_282:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_282:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_282:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_282:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_282:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE_2:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE_2:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE_2:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE_2:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/MDDR_PENABLE_2:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_psel:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_psel:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_psel:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_psel:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata15:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata15:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata15:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata15:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_40:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_40:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_40:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_40:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_40:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:CC[0],17012
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:CC[1],16934
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:CI,16934
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[0],17488
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[10],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[11],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[1],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[2],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[3],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[4],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[5],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[6],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[7],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[8],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:P[9],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[0],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[10],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[11],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[1],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[2],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[3],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[4],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[5],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[6],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[7],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[8],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27_CC_1:UB[9],
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[2]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[2]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[2]:CLK,16991
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[2]:D,17418
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[2]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[2]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[2]:Q,16991
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[2]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[2]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_SS0_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_SS0_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_106:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_106:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_106:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_106:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[2]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[2]:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[2]:CLK,7960
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[2]:D,7839
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[2]:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[2]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[2]:Q,7960
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[2]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[2]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST_RNIV89D/U0_RGB1:An,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST_RNIV89D/U0_RGB1:ENn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST_RNIV89D/U0_RGB1:YL,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_242:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_242:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_242:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_242:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_242:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_10_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_10_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_15:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_15:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_15:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_15:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_15:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_15:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_115:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_115:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_115:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_115:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_115:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_80:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_80:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_80:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_80:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_80:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_194:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_194:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_194:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_194:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_194:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_48:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_48:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_48:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_48:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_186:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_186:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_186:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_186:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_0_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_0_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_0_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[4]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[4]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[4]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[4]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[4]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[4]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[4]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[4]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[4]:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_rcosc:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_rcosc:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_rcosc:CLK,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_rcosc:D,18818
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_rcosc:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_rcosc:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_rcosc:Q,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_rcosc:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_rcosc:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[3]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[3]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[3]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[3]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[3]:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_RNO_0[1]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_RNO_0[1]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_RNO_0[1]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_93:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_93:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_93:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_93:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_88:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_88:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_88:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_88:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_88:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_44:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_44:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_44:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_44:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_44:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_208:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_208:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_208:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_208:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_208:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_6:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_6:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_6:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_6:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_6:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_7_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_7_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_7_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_193:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_193:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_193:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_193:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_193:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_193:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_146:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_146:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_146:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_146:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_27:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_27:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_27:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_27:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_27:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_q1:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_q1:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_q1:CLK,8817
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_q1:D,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_q1:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_q1:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_q1:Q,8817
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_q1:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_q1:SLn,
CodeShadowing_LPDDR_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:A,
CodeShadowing_LPDDR_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_10_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_10_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_10_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_0[0]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_0[0]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_0[0]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_0[0]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_0[0]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_101:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_101:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_101:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_101:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_101:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_8_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_8_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_8_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_172:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_172:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_172:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_172:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_172:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_84:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_84:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_84:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_84:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_84:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_33:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_33:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_33:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_33:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_33:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CLK_PAD/U_IOP:YIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_25:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_25:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_25:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_25:IPA,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[12]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[12]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[12]:CLK,16791
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[12]:D,17012
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[12]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[12]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[12]:Q,16791
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[12]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[12]:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_4_sqmuxa:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_4_sqmuxa:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_4_sqmuxa:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_4_sqmuxa:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/int_prdata_4_sqmuxa:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_57:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_57:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_57:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_57:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_57:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_clk_base:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_clk_base:ALn,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_clk_base:CLK,7960
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_clk_base:D,8817
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_clk_base:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_clk_base:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_clk_base:Q,7960
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_clk_base:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_clk_base:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_q1:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_q1:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_q1:CLK,18818
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_q1:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_q1:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_q1:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_q1:Q,18818
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_q1:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable_q1:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CLK_PAD/U_ION:YIN,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_TMATCH_0_OUT_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_TMATCH_0_OUT_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_TMATCH_0_OUT_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_197:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_197:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_197:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_197:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_197:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_152:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_152:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_152:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_152:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_152:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_17:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_17:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_17:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_17:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_17:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_181:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_181:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_181:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_181:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_273:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_273:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_273:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_273:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_273:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_55:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_55:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_55:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_55:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_55:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_248:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_248:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_248:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_248:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_248:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_14_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_14_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_165:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_165:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_165:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_165:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_165:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_114:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_114:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_114:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_114:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_114:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_253:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_253:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_253:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_253:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_253:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_253:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_125:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_125:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_125:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_125:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_125:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_141:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_141:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_141:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_141:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_141:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_0_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_0_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_0_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_0_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg6:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg6:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg6:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg6:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg6:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_6:A,16991
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_6:B,16948
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_6:Y,16948
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_90:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_90:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_90:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_90:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_90:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[14]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[14]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[14]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[14]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[14]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[14]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[14]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[14]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[14]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_DO_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_DO_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_DO_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[6]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[6]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[6]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[6]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[6]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_239:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_239:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_239:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_239:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_239:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_178:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_178:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_178:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_178:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[15]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[15]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[15]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[15]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[15]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_170:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_170:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_170:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_170:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_113:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_113:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_113:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_113:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_113:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_8:A,16861
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_8:B,16826
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_8:C,16744
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_8:D,16643
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4_8:Y,16643
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_q1:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_q1:ALn,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_q1:CLK,8817
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_q1:D,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_q1:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_q1:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_q1:Q,8817
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_q1:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/POWER_ON_RESET_N_q1:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[5]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[5]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[5]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[5]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[5]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[5]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[5]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[5]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[5]:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q1:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q1:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q1:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q1:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q1:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q1:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q1:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q1:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q1:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_77:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_77:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_77:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_77:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_77:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_158:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_158:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_158:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_158:IPA,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[7]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[7]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[7]:CLK,16948
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[7]:D,17020
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[7]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[7]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[7]:Q,16948
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[7]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[7]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_150:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_150:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_150:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_150:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_150:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_98:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_98:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_98:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_98:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_30:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_30:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_30:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_30:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_30:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_clk_base:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_clk_base:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_clk_base:CLK,7020
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_clk_base:D,8817
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_clk_base:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_clk_base:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_clk_base:Q,7020
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_clk_base:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled_clk_base:SLn,
GPIO_2_M2F_obuf/U0/U_IOPAD:D,
GPIO_2_M2F_obuf/U0/U_IOPAD:E,
GPIO_2_M2F_obuf/U0/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[2]:A,7960
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[2]:B,7866
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[2]:C,7839
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[2]:Y,7839
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_75:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_75:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_75:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_75:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_75:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_274:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_274:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_274:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_274:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_274:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_5_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_5_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_5_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_5_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4:A,16948
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4:B,16706
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4:C,16643
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4:D,16559
CodeShadowing_LPDDR_0/CORERESETP_0/ddr_settled4:Y,16559
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[9]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[9]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[9]:CLK,16829
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[9]:D,17056
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[9]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[9]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[9]:Q,16829
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[9]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[9]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_117:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_117:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_117:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_117:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_117:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_clk_base:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_clk_base:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_clk_base:CLK,6942
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_clk_base:D,8817
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_clk_base:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_clk_base:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_clk_base:Q,6942
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_clk_base:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_clk_base:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[3]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[3]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[3]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[3]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[3]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[3]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[3]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[3]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[3]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_38:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_38:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_38:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_38:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_5_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_5_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_5_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_11_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_11_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_11_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_11_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[11]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[11]:B,17743
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[11]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[11]:CC,16911
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[11]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[11]:P,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[11]:S,16911
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[11]:UB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_199:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_199:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_199:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_199:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_199:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_254:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_254:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_254:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_254:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_254:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[15]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[15]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[15]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[15]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[15]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[15]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[15]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[15]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[15]:SLn,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_13:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_13:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_13:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_13:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_13:IPC,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_164:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_164:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_164:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_164:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_164:IPB,
GPIO_11_F2M_ibuf/U0/U_IOINFF:A,
GPIO_11_F2M_ibuf/U0/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_1_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_1_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_1_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_1_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[1]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[1]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[1]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[1]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[1]:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[9]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[9]:B,17211
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[9]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[9]:CC,17056
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[9]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[9]:P,17211
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[9]:S,17056
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[9]:UB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_124:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_124:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_124:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_124:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_124:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_TMATCH_0_IN_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQS_TMATCH_0_IN_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_34:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_34:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_34:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_34:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[10]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[10]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[10]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[10]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[10]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[10]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[10]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[10]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[10]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_209:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_209:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_209:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_209:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_209:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_163:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_163:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_163:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_163:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_163:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base_RNIT277/U0:An,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base_RNIT277/U0:ENn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_areset_n_clk_base_RNIT277/U0:YWn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_211:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_211:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_211:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_211:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_211:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[6]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[6]:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[6]:CLK,8715
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[6]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[6]:EN,7768
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[6]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[6]:Q,8715
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[6]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[6]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_123:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_123:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_123:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_123:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_123:IPB,
GPIO_10_M2F_obuf/U0/U_IOENFF:A,
GPIO_10_M2F_obuf/U0/U_IOENFF:Y,
GPIO_0_M2F_obuf/U0/U_IOENFF:A,
GPIO_0_M2F_obuf/U0/U_IOENFF:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[10]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[10]:B,17743
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[10]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[10]:CC,16972
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[10]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[10]:P,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[10]:S,16972
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[10]:UB,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27:B,16955
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27:CC,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27:P,16955
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_s_27:UB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_1_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_1_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[0]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[0]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[0]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[0]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[0]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_5_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_5_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:ALn,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:CLK,8817
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:D,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:Q,8817
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_12_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_12_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_12_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwrite:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwrite:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwrite:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwrite:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwrite:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwrite:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwrite:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwrite:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwrite:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_q1:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_q1:ALn,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_q1:CLK,8817
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_q1:D,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_q1:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_q1:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_q1:Q,8817
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_q1:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/RESET_N_M2F_q1:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[0]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[0]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[0]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[0]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[0]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[0]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[0]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[0]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[0]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_135:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_135:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_135:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_135:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_135:IPB,
GPIO_10_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_10_M2F_obuf/U0/U_IOOUTFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_167:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_167:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_167:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_167:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[4]:A,7914
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[4]:B,7860
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[4]:C,7826
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[4]:D,6772
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state_ns[4]:Y,6772
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[5]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[5]:B,17743
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[5]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[5]:CC,17028
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[5]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[5]:P,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[5]:S,17028
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[5]:UB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[13]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[13]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[13]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[13]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[13]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[13]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[13]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[13]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[13]:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[13]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[13]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[13]:CLK,16861
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[13]:D,16934
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[13]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[13]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[13]:Q,16861
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[13]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[13]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_127:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_127:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_127:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_127:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_127:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_249:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_249:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_249:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_249:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_249:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_277:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_277:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_277:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_277:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_277:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[1]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[1]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[1]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[1]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[1]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[1]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[1]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[1]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[1]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_13_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_13_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_8_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_8_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_8_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_8_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[0]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[0]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[0]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[0]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[0]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[0]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[0]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[0]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[0]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_119:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_119:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_119:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_119:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[4]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[4]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[4]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[4]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[4]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[4]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[4]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[4]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[4]:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[10]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[10]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[10]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[10]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[10]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[10]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[10]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[10]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[10]:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_257:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_257:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_257:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_257:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_257:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[6]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[6]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[6]:CLK,16666
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[6]:D,17112
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[6]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[6]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[6]:Q,16666
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[6]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[6]:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc:ALn,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc:CLK,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc:D,18818
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc:Q,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sdif0_areset_n_rcosc:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[0]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[0]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[0]:CLK,16559
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[0]:D,17909
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[0]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[0]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[0]:Q,16559
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[0]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[0]:SLn,
GPIO_3_M2F_obuf/U0/U_IOENFF:A,
GPIO_3_M2F_obuf/U0/U_IOENFF:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q2:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q2:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q2:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q2:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q2:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q2:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q2:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q2:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/INIT_DONE_q2:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_RNO[0]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_RNO[0]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_RNO[0]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv_RNO[0]:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_67:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_67:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_67:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_67:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_67:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_29:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_29:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_29:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_29:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_29:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_261:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_261:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_261:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_261:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_261:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_221:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_221:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_221:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_221:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_221:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_192:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_192:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_192:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_192:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_192:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_192:IPC,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[12]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[12]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[12]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[12]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[12]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[12]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[12]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[12]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[12]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_65:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_65:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_65:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_65:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_65:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_59:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_59:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_59:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_59:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/psel:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/psel:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/psel:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/psel:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/psel:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/psel:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/psel:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/psel:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/psel:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_105:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_105:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_105:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_105:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_105:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_134:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_134:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_134:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_134:IPA,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_q1:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_q1:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_q1:CLK,8817
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_q1:D,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_q1:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_q1:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_q1:Q,8817
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_q1:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/CONFIG2_DONE_q1:SLn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[5]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[5]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[5]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[5]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[5]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_CLK_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_CLK_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_CLK_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/SPI_0_CLK_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_275:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_275:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_275:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_275:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_275:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[1]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[1]:B,16911
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[1]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[1]:CC,17482
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[1]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[1]:P,16911
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[1]:S,17482
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[1]:UB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[4]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[4]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[4]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[4]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[4]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[4]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[4]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[4]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[4]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_169:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_169:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_169:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_169:IPA,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[2]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[2]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[2]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[2]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[2]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[2]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[2]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[2]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[2]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_129:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_129:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_129:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_129:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_129:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_185:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_185:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_185:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_185:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_185:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[7]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[7]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[7]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[7]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[7]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[7]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[7]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[7]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/paddr[7]:SLn,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_7:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_7:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_7:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_7:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_7:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CKE_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CKE_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_CKE_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_2_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_2_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_2_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_2:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_2:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_2:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_2:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_2:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_2:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_255:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_255:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_255:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_255:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_255:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_17:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_17:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_17:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_17:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_17:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_q1:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_q1:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_q1:CLK,8817
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_q1:D,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_q1:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_q1:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_q1:Q,8817
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_q1:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/release_sdif0_core_q1:SLn,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_9:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_9:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_9:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_9:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_9:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_9:IPC,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[1]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[1]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[1]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[1]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[1]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[1]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[1]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[1]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_1[1]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_133:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_133:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_133:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_133:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_3_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_3_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_3_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_15:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_15:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_15:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_15:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/control_reg_15:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable:CLK,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable:D,7863
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable:EN,7615
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable:Q,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_enable:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_198:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_198:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_198:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_198:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_198:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_15:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_15:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_15:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_15:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_15:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_145:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_145:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_145:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_145:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_21:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_21:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_21:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_21:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_21:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[14]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[14]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[14]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[14]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[14]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_79:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_79:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_79:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_79:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_79:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_2:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_2:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_2:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_2:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_112:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_112:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_112:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_112:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_112:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_276:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_276:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_276:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_276:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_276:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_276:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_137:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_137:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_137:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_137:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_137:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[3]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[3]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[3]:CLK,16744
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[3]:D,17146
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[3]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[3]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[3]:Q,16744
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[3]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[3]:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[11]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[11]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[11]:CLK,16748
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[11]:D,16911
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[11]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[11]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[11]:Q,16748
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[11]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[11]:SLn,
GPIO_9_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_9_M2F_obuf/U0/U_IOOUTFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_51:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_51:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_51:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_51:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_51:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_1_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_1_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_1_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DM_RDQS_1_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_104:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_104:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_104:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_104:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_104:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_5:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_5:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_5:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_5:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_5:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[9]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[9]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[9]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[9]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[9]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[9]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[9]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[9]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[9]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_256:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_256:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_256:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_256:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_256:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[1]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[1]:ALn,6748
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[1]:CLK,7839
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[1]:D,8817
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[1]:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[1]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[1]:Q,7839
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[1]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/sm0_state[1]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_213:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_213:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_213:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_213:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_213:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_4_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_4_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_4_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[13]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[13]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[13]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[13]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[13]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_270:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_270:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_270:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_270:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_270:IPB,
GPIO_1_M2F_obuf/U0/U_IOENFF:A,
GPIO_1_M2F_obuf/U0/U_IOENFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_184:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_184:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_184:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_184:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_184:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[1]:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[1]:ALn,16750
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[1]:CLK,16643
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[1]:D,17482
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[1]:EN,18630
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[1]:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[1]:Q,16643
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[1]:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr[1]:SLn,
GPIO_8_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_8_M2F_obuf/U0/U_IOOUTFF:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_6_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_6_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_6_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_6_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[10]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[10]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[10]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[10]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[10]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[10]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[10]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[10]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[10]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_103:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_103:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_103:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_103:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_103:IPB,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:ADn,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:ALn,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:CLK,7832
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:D,8817
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:EN,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:LAT,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:Q,7832
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:SD,
CodeShadowing_LPDDR_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:SLn,
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int_RNIL8SG:A,
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int_RNIL8SG:B,7764
CodeShadowing_LPDDR_0/CORERESETP_0/MSS_HPMS_READY_int_RNIL8SG:Y,7764
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[10]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[10]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[10]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[10]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[10]:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_250:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_250:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_250:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_250:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_250:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_231:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_231:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_231:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_231:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_231:IPB,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[3]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[3]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[3]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[3]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[3]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[3]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[3]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[3]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/pwdata[3]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_118:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_118:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_118:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_118:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_11_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_11_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_ADDR_11_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_12:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_12:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_12:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_12:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_12:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_110:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_110:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_110:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_110:IPA,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:SLn,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_272:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_272:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_272:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_272:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_272:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_2_PAD/U_IOINFF:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_2_PAD/U_IOINFF:Y,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_16:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_16:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_16:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_16:IPB,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_16:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_144:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_144:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_144:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_144:IPA,
GPIO_8_M2F_obuf/U0/U_IOPAD:D,
GPIO_8_M2F_obuf/U0/U_IOPAD:E,
GPIO_8_M2F_obuf/U0/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state_s0_0_a2:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state_s0_0_a2:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/state_s0_0_a2:Y,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[6]:A,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[6]:B,17050
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[6]:C,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[6]:CC,17112
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[6]:D,
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[6]:P,17050
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[6]:S,17112
CodeShadowing_LPDDR_0/CORERESETP_0/count_ddr_cry[6]:UB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_26:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_26:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_26:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_26:IPA,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[12]:A,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[12]:B,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[12]:C,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[12]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/prdata_0_iv[12]:Y,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[11]:ADn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[11]:ALn,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[11]:CLK,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[11]:D,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[11]:EN,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[11]:LAT,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[11]:Q,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[11]:SD,
CodeShadowing_LPDDR_0/CORECONFIGP_0/soft_reset_reg[11]:SLn,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_10:A,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_10:B,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_10:C,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_10:IPA,
CodeShadowing_LPDDR_0/CCC_0/CCC_INST/IP_INTERFACE_10:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_71:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_71:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_71:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_71:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_183:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_183:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_183:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_183:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_183:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_22:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_22:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_22:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_22:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_107:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_107:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_107:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_107:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_7:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_7:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_7:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_7:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_7:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_162:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_162:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_162:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_162:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_162:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_252:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_252:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_252:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_252:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_252:IPB,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_252:IPC,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_122:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_122:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_122:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_122:IPA,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_10_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_10_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_10_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_DQ_10_PAD/U_IOPAD:Y,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_BA_0_PAD/U_IOPAD:D,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_BA_0_PAD/U_IOPAD:E,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MDDR_BA_0_PAD/U_IOPAD:PAD,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_0:A,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_0:B,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_0:C,
CodeShadowing_LPDDR_0/CodeShadowing_LPDDR_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_0:IPA,
DEVRST_N,
MDDR_DQS_TMATCH_0_IN,
MMUART_1_RXD,
SPI_0_DI,
MDDR_ADDR<0>,
MDDR_ADDR<1>,
MDDR_ADDR<2>,
MDDR_ADDR<3>,
MDDR_ADDR<4>,
MDDR_ADDR<5>,
MDDR_ADDR<6>,
MDDR_ADDR<7>,
MDDR_ADDR<8>,
MDDR_ADDR<9>,
MDDR_ADDR<10>,
MDDR_ADDR<11>,
MDDR_ADDR<12>,
MDDR_ADDR<13>,
MDDR_ADDR<14>,
MDDR_ADDR<15>,
MDDR_BA<0>,
MDDR_BA<1>,
MDDR_BA<2>,
MDDR_CAS_N,
MDDR_CKE,
MDDR_CLK,
MDDR_CLK_N,
MDDR_CS_N,
MDDR_DQS_TMATCH_0_OUT,
MDDR_ODT,
MDDR_RAS_N,
MDDR_RESET_N,
MDDR_WE_N,
MMUART_1_TXD,
SPI_0_DO,
MDDR_DM_RDQS<0>,
MDDR_DM_RDQS<1>,
MDDR_DQ<0>,
MDDR_DQ<1>,
MDDR_DQ<2>,
MDDR_DQ<3>,
MDDR_DQ<4>,
MDDR_DQ<5>,
MDDR_DQ<6>,
MDDR_DQ<7>,
MDDR_DQ<8>,
MDDR_DQ<9>,
MDDR_DQ<10>,
MDDR_DQ<11>,
MDDR_DQ<12>,
MDDR_DQ<13>,
MDDR_DQ<14>,
MDDR_DQ<15>,
MDDR_DQS<0>,
MDDR_DQS<1>,
SPI_0_CLK,
SPI_0_SS0,
GPIO_11_F2M,
GPIO_12_F2M,
GPIO_0_M2F,
GPIO_10_M2F,
GPIO_1_M2F,
GPIO_2_M2F,
GPIO_3_M2F,
GPIO_4_M2F,
GPIO_8_M2F,
GPIO_9_M2F,
