#--  Synopsys, Inc.
#--  Version L-2016.09M-2
#--  Project file D:\11.8\m2s_dg0637_liberov11p7sp2__df\Libero\CoreTSE_M2S090\synthesis\run_options.txt
#--  Written on Tue Mar 14 15:02:29 2017


#project files
add_file -include "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/include.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreConfigP/7.1.100/rtl/vlog/core/coreconfigp.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreResetP/7.1.100/rtl/vlog/core/coreresetp_pcie_hotreset.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreResetP/7.1.100/rtl/vlog/core/coreresetp.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_clkrst.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_cnvrxi.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_cnvrxo.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_cnvtxi.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_cnvtxo.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/peanx_sync.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_peanx_top.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/r10b8b.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/perex_pcs.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/perex_pma.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/petbm.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/petcr.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/t8b10b.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/petex_top.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_tbi.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_core.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/rx4096x36.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxfif_clkrst.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxfif_hst.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxrfif_fab.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxrfif_sys.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxtfif_fab.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxtfif_sys.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxtfif_wtm.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxfif.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/arfque.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/decoder.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/dmarx.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/dmatx.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/dma_dual.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/slave.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/tsm_sysreg.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/mahbe_dual.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/mmcxwol.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_cntrl.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_eim.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_ladd.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_linc.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_sadd.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_sinc.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_sinchd.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_sincnf.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_store.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pecar.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pehst.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemgt.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pecrc.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/perfn_top.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/permc_top.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/petfn_top.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/petmc_top.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pe_mcxmac_core.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pe_mcxmac.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/sib_sync_2flp.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/sib_sync_pulse.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/si_sal.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/tsmac_ahb_top.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/tx2048x40.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/CoreTSE_AHB_top.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/CoreTSE_AHB.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/FCCC_0/CoreTSE_M2S090_FCCC_0_FCCC.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/FCCC_1/CoreTSE_M2S090_FCCC_1_FCCC.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/FCCC_2/CoreTSE_M2S090_FCCC_2_FCCC.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/FCCC_3/CoreTSE_M2S090_FCCC_3_FCCC.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090_MSS/CoreTSE_M2S090_MSS_syn.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090_MSS/CoreTSE_M2S090_MSS.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/SgCore/OSC/2.0.101/osc_comps.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/OSC_0/CoreTSE_M2S090_OSC_0_OSC.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/CoreTSE_M2S090_SERDES_IF2_0_SERDES_IF2_syn.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/CoreTSE_M2S090_SERDES_IF2_0_SERDES_IF2.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/hdl/MON_ANX.v"
add_file -verilog -lib COREAHBLITE_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_addrdec.v"
add_file -verilog -lib COREAHBLITE_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_defaultslavesm.v"
add_file -verilog -lib COREAHBLITE_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_masterstage.v"
add_file -verilog -lib COREAHBLITE_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_slavearbiter.v"
add_file -verilog -lib COREAHBLITE_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_slavestage.v"
add_file -verilog -lib COREAHBLITE_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_matrix4x16.v"
add_file -verilog -lib COREAHBLITE_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite.v"
add_file -verilog -lib COREAHBLSRAM_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/rtl/vlog/core/AHBLSramIf.v"
add_file -verilog -lib COREAHBLSRAM_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/rtl/vlog/core/lsram_2048to139264x8.v"
add_file -verilog -lib COREAHBLSRAM_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/rtl/vlog/core/usram_128to9216x8.v"
add_file -verilog -lib COREAHBLSRAM_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/rtl/vlog/core/SramCtrlIf.v"
add_file -verilog -lib COREAHBLSRAM_LIB "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/rtl/vlog/core/CoreAHBLSRAM.v"
add_file -verilog "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CoreTSE_M2S090.v"
add_file -fpga_constraint "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/designer/CoreTSE_M2S090/synthesis.fdc"
add_file -include "D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CORETSE_AHB/2.1.105/rtl/vlog/core_obfuscated/include.v"



#implementation: "synthesis"
impl -add synthesis -type fpga

#
#implementation attributes

set_option -vlog_std v2001

#device options
set_option -technology SmartFusion2
set_option -part M2S090TS
set_option -package FBGA484
set_option -speed_grade -1
set_option -part_companion ""

#compilation/mapping options
set_option -use_fsm_explorer 0
set_option -top_module "CoreTSE_M2S090"

# hdl_compiler_options
set_option -distributed_compile 0

# mapper_without_write_options
set_option -frequency 100.000
set_option -srs_instrumentation 1

# mapper_options
set_option -write_verilog 0
set_option -write_vhdl 0

# actel_options
set_option -rw_check_on_ram 0

# Microsemi G4
set_option -run_prop_extract 1
set_option -maxfan 10000
set_option -clock_globalthreshold 2
set_option -async_globalthreshold 12
set_option -globalthreshold 5000
set_option -low_power_ram_decomp 0
set_option -seqshift_to_uram 0
set_option -disable_io_insertion 0
set_option -opcond COMTC
set_option -retiming 0
set_option -report_path 4000
set_option -update_models_cp 0
set_option -preserve_registers 0

# NFilter
set_option -no_sequential_opt 0

# sequential_optimization_options
set_option -symbolic_fsm_compiler 1

# Compiler Options
set_option -compiler_compatible 0
set_option -resource_sharing 1

# Compiler Options
set_option -auto_infer_blackbox 0

#automatic place and route (vendor) options
set_option -write_apr_constraint 1

#set result format/file last
project -result_file "./CoreTSE_M2S090.edn"
impl -active "synthesis"
