Microsemi Corporation - Microsemi Libero Software Release v11.8 (Version 11.8.0.26)

Date      :  Tue Mar 14 12:47:04 2017
Project   :  D:\11.8\m2s_dg0637_liberov11p7sp2__df\Libero\CoreTSE_M2S090
Component :  CoreTSE_M2S090
Family    :  SmartFusion2


HDL source files for all Synthesis and Simulation tools:
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_addrdec.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_defaultslavesm.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_masterstage.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_matrix4x16.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_slavearbiter.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreAHBLite/5.2.100/rtl/vlog/core/coreahblite_slavestage.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreConfigP/7.1.100/rtl/vlog/core/coreconfigp.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreResetP/7.1.100/rtl/vlog/core/coreresetp.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/CoreResetP/7.1.100/rtl/vlog/core/coreresetp_pcie_hotreset.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/rtl/vlog/core/AHBLSramIf.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/rtl/vlog/core/CoreAHBLSRAM.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/rtl/vlog/core/SramCtrlIf.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/rtl/vlog/core/lsram_2048to139264x8.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/rtl/vlog/core/usram_128to9216x8.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/CoreTSE_AHB.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/CoreTSE_AHB_top.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxfif.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxfif_clkrst.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxfif_hst.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxrfif_fab.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxrfif_sys.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxtfif_fab.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxtfif_sys.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/amcxtfif_wtm.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/arfque.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/decoder.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/dma_dual.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/dmarx.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/dmatx.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/include.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/mahbe_dual.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/mmcxwol.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_clkrst.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_cnvrxi.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_cnvrxo.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_cnvtxi.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_cnvtxo.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_core.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_peanx_top.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/msgmii_tbi.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pe_mcxmac.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pe_mcxmac_core.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/peanx_sync.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pecar.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pecrc.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pehst.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemgt.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_cntrl.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_eim.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_ladd.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_linc.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_sadd.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_sinc.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_sinchd.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_sincnf.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/pemstat_store.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/perex_pcs.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/perex_pma.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/perfn_top.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/permc_top.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/petbm.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/petcr.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/petex_top.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/petfn_top.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/petmc_top.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/r10b8b.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/rx4096x36.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/si_sal.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/sib_sync_2flp.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/sib_sync_pulse.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/slave.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/t8b10b.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/tsm_sysreg.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/tsmac_ahb_top.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/obfuscated/tx2048x40.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CoreTSE_M2S090.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/FCCC_0/CoreTSE_M2S090_FCCC_0_FCCC.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/FCCC_1/CoreTSE_M2S090_FCCC_1_FCCC.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/FCCC_2/CoreTSE_M2S090_FCCC_2_FCCC.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/FCCC_3/CoreTSE_M2S090_FCCC_3_FCCC.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/OSC_0/CoreTSE_M2S090_OSC_0_OSC.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/CoreTSE_M2S090_SERDES_IF2_0_SERDES_IF2.v

HDL source files for Synopsys SynplifyPro Synthesis tool:
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/SgCore/OSC/2.0.101/osc_comps.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/CoreTSE_M2S090_SERDES_IF2_0_SERDES_IF2_syn.v

HDL source files for Mentor Precision Synthesis tool:
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/SgCore/OSC/2.0.101/osc_comps_pre.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/CoreTSE_M2S090_SERDES_IF2_0_SERDES_IF2_pre.v

Stimulus files for all Simulation tools:
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/coreparameters.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/SERDESIF_0_PCIE_0_user.bfm
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/SERDESIF_0_PCIE_1_user.bfm
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/SERDESIF_0_compile_bfm.tcl
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/subsystem.bfm

    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/COREAHBLSRAM/2.2.104/mti/scripts/compileList.do
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/COREAHBLSRAM/2.2.104/mti/scripts/run.do
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/Actel/DirectCore/COREAHBLSRAM/2.2.104/mti/scripts/wave.do
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/coreparameters.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/COREAHBLSRAM_0/rtl/vlog/test/user/tb.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/test/user/tbi/CoreTSE_ahb_tb.v
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/CORETSE_AHB_0/rtl/vlog/test/user/tbi/testbench.v

Firmware files for all Software IDE tools:
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/sys_config_SERDESIF_0.c
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/sys_config_SERDESIF_0.h

Configuration files to be used for all Simulation tools:
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/SERDESIF_0_init.bfm

Configuration files to be used for Power Analysis:
    D:/11.8/m2s_dg0637_liberov11p7sp2__df/Libero/CoreTSE_M2S090/component/work/CoreTSE_M2S090/SERDES_IF2_0/SERDESIF_0_init.reg

