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<doc>
<title>Resource Report</title>
<text>Microsemi Corporation - Microsemi Libero Software Release v11.8 (Version 11.8.0.26)</text>
<text>Date: Tue Mar 14 15:04:02 2017
</text>
<section><name>Device Selection</name></section>
<table>
<header>
</header>
<row>
 <cell>Family</cell>
 <cell>SmartFusion2</cell>
</row>
<row>
 <cell>Device</cell>
 <cell>M2S090TS</cell>
</row>
<row>
 <cell>Package</cell>
 <cell>484 FBGA</cell>
</row>
<row>
 <cell>Speed Grade</cell>
 <cell>-1</cell>
</row>
<row>
 <cell>Temp</cell>
 <cell>0:25:85</cell>
</row>
<row>
 <cell>Voltage</cell>
 <cell>1.26:1.20:1.14</cell>
</row>
<row>
 <cell>Core Voltage</cell>
 <cell>1.2V</cell>
</row>
<row>
 <cell>Ramp Rate</cell>
 <cell>100ms Minimum</cell>
</row>
<row>
 <cell>System Controller Suspend Mode</cell>
 <cell>No</cell>
</row>
<row>
 <cell>PLL Supply Voltage</cell>
 <cell>3.3V</cell>
</row>
<row>
 <cell>Default I/O technology</cell>
 <cell>LVCMOS 2.5V</cell>
</row>
<row>
 <cell>Restrict Probe Pins</cell>
 <cell>Yes</cell>
</row>
<row>
 <cell>Restrict SPI Pins</cell>
 <cell>No</cell>
</row>
</table>
<section><name>Source Files</name></section>
<table>
<header>
</header>
<row>
 <cell>Topcell</cell>
 <cell>CoreTSE_M2S090</cell>
</row>
<row>
 <cell>Format</cell>
 <cell>EDIF</cell>
</row>
<row>
 <cell>Source</cell>
 <cell>D:\11.8\m2s_dg0637_liberov11p7sp2__df\Libero\CoreTSE_M2S090\synthesis\CoreTSE_M2S090.edn</cell>
</row>
</table>
<section><name>Options</name></section>
<table>
<header>
</header>
<row>
 <cell>Enable Single Event Transient mitigation</cell>
 <cell>false</cell>
</row>
<row>
 <cell>Enable Design Separation Methodology</cell>
 <cell>false</cell>
</row>
<row>
 <cell>Limit the number of high fanout nets to display to</cell>
 <cell>10</cell>
</row>
</table>
<section><name>Resource Usage</name></section>
<table>
<header>
 <cell>Type</cell>
 <cell>Used</cell>
 <cell>Total</cell>
 <cell>Percentage</cell>
</header>
<row>
 <cell>4LUT</cell>
 <cell>10747</cell>
 <cell>86184</cell>
 <cell>12.47</cell>
</row>
<row>
 <cell>DFF</cell>
 <cell>5869</cell>
 <cell>86184</cell>
 <cell>6.81</cell>
</row>
<row>
 <cell>I/O Register</cell>
 <cell>0</cell>
 <cell>801</cell>
 <cell>0.00</cell>
</row>
<row>
 <cell>User I/O</cell>
 <cell>27</cell>
 <cell>267</cell>
 <cell>10.11</cell>
</row>
<row>
 <cell>-- Single-ended I/O</cell>
 <cell>25</cell>
 <cell>267</cell>
 <cell>9.36</cell>
</row>
<row>
 <cell>-- Differential I/O Pairs</cell>
 <cell>1</cell>
 <cell>133</cell>
 <cell>0.75</cell>
</row>
<row>
 <cell>RAM64x18</cell>
 <cell>0</cell>
 <cell>112</cell>
 <cell>0.00</cell>
</row>
<row>
 <cell>RAM1K18</cell>
 <cell>16</cell>
 <cell>109</cell>
 <cell>14.68</cell>
</row>
<row>
 <cell>MACC</cell>
 <cell>0</cell>
 <cell>84</cell>
 <cell>0.00</cell>
</row>
<row>
 <cell>Chip Globals</cell>
 <cell>16</cell>
 <cell>16</cell>
 <cell>100.00</cell>
</row>
<row>
 <cell>CCC</cell>
 <cell>4</cell>
 <cell>6</cell>
 <cell>66.67</cell>
</row>
<row>
 <cell>RCOSC_25_50MHZ</cell>
 <cell>1</cell>
 <cell>1</cell>
 <cell>100.00</cell>
</row>
<row>
 <cell>RCOSC_1MHZ</cell>
 <cell>0</cell>
 <cell>1</cell>
 <cell>0.00</cell>
</row>
<row>
 <cell>XTLOSC</cell>
 <cell>0</cell>
 <cell>1</cell>
 <cell>0.00</cell>
</row>
<row>
 <cell>SERDESIF Blocks</cell>
 <cell>1</cell>
 <cell>1</cell>
 <cell>100.00</cell>
</row>
<row>
 <cell>-- SERDESIF Lanes</cell>
 <cell>1</cell>
 <cell>4</cell>
 <cell>25.00</cell>
</row>
<row>
 <cell>MSS</cell>
 <cell>1</cell>
 <cell>1</cell>
 <cell>100.00</cell>
</row>
</table>
<section><name>Detailed Logic Resource Usage</name></section>
<table>
<header>
 <cell>Type</cell>
 <cell>4LUT</cell>
 <cell>DFF</cell>
</header>
<row>
 <cell>Fabric Logic</cell>
 <cell>10171</cell>
 <cell>5293</cell>
</row>
<row>
 <cell>RAM64x18 Interface Logic</cell>
 <cell>0</cell>
 <cell>0</cell>
</row>
<row>
 <cell>RAM1K18 Interface Logic</cell>
 <cell>576</cell>
 <cell>576</cell>
</row>
<row>
 <cell>MACC Interface Logic</cell>
 <cell>0</cell>
 <cell>0</cell>
</row>
<row>
 <cell>Total Used</cell>
 <cell>10747</cell>
 <cell>5869</cell>
</row>
</table>
<section><name>MSS Resource Usage</name></section>
<table>
<header>
 <cell>Type</cell>
 <cell>Used</cell>
 <cell>Total</cell>
</header>
<row>
 <cell>Cortex-M3*</cell>
 <cell>1</cell>
 <cell>1</cell>
</row>
<row>
 <cell>eNVM (512KB)*</cell>
 <cell>1</cell>
 <cell>1</cell>
</row>
<row>
 <cell>eSRAM*</cell>
 <cell>2</cell>
 <cell>2</cell>
</row>
<row>
 <cell>TIMER*</cell>
 <cell>2</cell>
 <cell>2</cell>
</row>
<row>
 <cell>CAN</cell>
 <cell>0</cell>
 <cell>1</cell>
</row>
<row>
 <cell>SPI</cell>
 <cell>2</cell>
 <cell>2</cell>
</row>
<row>
 <cell>I2C</cell>
 <cell>0</cell>
 <cell>2</cell>
</row>
<row>
 <cell>UART</cell>
 <cell>1</cell>
 <cell>2</cell>
</row>
<row>
 <cell>USB</cell>
 <cell>0</cell>
 <cell>1</cell>
</row>
<row>
 <cell>MAC</cell>
 <cell>0</cell>
 <cell>1</cell>
</row>
<row>
 <cell>MDDR</cell>
 <cell>0</cell>
 <cell>1</cell>
</row>
<row>
 <cell>HPDMA</cell>
 <cell>1</cell>
 <cell>1</cell>
</row>
<row>
 <cell>PDMA</cell>
 <cell>1</cell>
 <cell>1</cell>
</row>
</table>
<text>* These resources are always marked as used when you are using the MSS</text>
<text></text>
<section><name>SERDESIF Lanes Usage</name></section>
<table>
<header>
 <cell>SERDESIF</cell>
 <cell>Lane0</cell>
 <cell>Lane1</cell>
 <cell>Lane2</cell>
 <cell>Lane3</cell>
</header>
<row>
 <cell>SERDESIF_0</cell>
 <cell>----</cell>
 <cell>----</cell>
 <cell>----</cell>
 <cell>EPCS</cell>
</row>
</table>
<section><name>Detailed Carry Chains Resource Usage</name></section>
<table>
<header>
</header>
<row>
 <cell>Length</cell>
 <cell>Used</cell>
</row>
<row>
 <cell>2</cell>
 <cell>18</cell>
</row>
<row>
 <cell>5</cell>
 <cell>1</cell>
</row>
<row>
 <cell>6</cell>
 <cell>1</cell>
</row>
<row>
 <cell>7</cell>
 <cell>4</cell>
</row>
<row>
 <cell>8</cell>
 <cell>3</cell>
</row>
<row>
 <cell>9</cell>
 <cell>10</cell>
</row>
<row>
 <cell>10</cell>
 <cell>2</cell>
</row>
<row>
 <cell>11</cell>
 <cell>2</cell>
</row>
<row>
 <cell>12</cell>
 <cell>7</cell>
</row>
<row>
 <cell>13</cell>
 <cell>33</cell>
</row>
<row>
 <cell>14</cell>
 <cell>5</cell>
</row>
<row>
 <cell>15</cell>
 <cell>3</cell>
</row>
<row>
 <cell>16</cell>
 <cell>12</cell>
</row>
<row>
 <cell>17</cell>
 <cell>4</cell>
</row>
<row>
 <cell>19</cell>
 <cell>13</cell>
</row>
<row>
 <cell>21</cell>
 <cell>1</cell>
</row>
<row>
 <cell>22</cell>
 <cell>1</cell>
</row>
<row>
 <cell>25</cell>
 <cell>2</cell>
</row>
<row>
 <cell>30</cell>
 <cell>2</cell>
</row>
<row>
 <cell>31</cell>
 <cell>2</cell>
</row>
<row>
 <cell>Total</cell>
 <cell>126</cell>
</row>
</table>
<section><name>I/O Function</name></section>
<table>
<header>
 <cell>Type</cell>
 <cell>w/o register</cell>
 <cell>w/ register</cell>
 <cell>w/ DDR register</cell>
</header>
<row>
 <cell>Input I/O</cell>
 <cell>4</cell>
 <cell>0</cell>
 <cell>0</cell>
</row>
<row>
 <cell>Output I/O</cell>
 <cell>16</cell>
 <cell>0</cell>
 <cell>0</cell>
</row>
<row>
 <cell>Bidirectional I/O</cell>
 <cell>5</cell>
 <cell>0</cell>
 <cell>0</cell>
</row>
<row>
 <cell>Differential Input I/O Pairs</cell>
 <cell>1</cell>
 <cell>0</cell>
 <cell>0</cell>
</row>
<row>
 <cell>Differential Output I/O Pairs</cell>
 <cell>0</cell>
 <cell>0</cell>
 <cell>0</cell>
</row>
</table>
<section><name>I/O Technology</name></section>
<table>
<header>
 <cell>I/O Standard</cell>
 <cell>Vddi</cell>
 <cell>Vref</cell>
 <cell>Input</cell>
 <cell>Output</cell>
 <cell>Bidirectional</cell>
</header>
<row>
 <cell>LVCMOS25</cell>
 <cell> 2.50v</cell>
 <cell> N/A</cell>
 <cell> 4</cell>
 <cell> 16</cell>
 <cell> 5</cell>
</row>
<row>
 <cell>LVDS</cell>
 <cell> 2.50v</cell>
 <cell> N/A</cell>
 <cell> 2</cell>
 <cell> 0</cell>
 <cell> 0</cell>
</row>
</table>
<section><name>I/O Placement</name></section>
<table>
<header>
 <cell>Type</cell>
 <cell>Count</cell>
 <cell>Percentage</cell>
</header>
<row>
 <cell>Locked</cell>
 <cell> 12</cell>
 <cell>44.44%</cell>
</row>
<row>
 <cell>Placed</cell>
 <cell> 0</cell>
 <cell>0.00%</cell>
</row>
<row>
 <cell>UnPlaced</cell>
 <cell> 15</cell>
 <cell>55.56%</cell>
</row>
</table>
<section><name>Nets assigned to chip global resources</name></section>
<table>
<header>
 <cell>Fanout</cell>
 <cell>Type</cell>
 <cell>Name</cell>
</header>
<row>
 <cell>2869</cell>
 <cell>INT_NET</cell>
 <cell>Net   : FCCC_0_GL0</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: FCCC_0/GL0_INST/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>2293</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CoreResetP_0_MSS_HPMS_READY</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CoreResetP_0/MSS_HPMS_READY_int_RNI13UF/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>1426</cell>
 <cell>INT_NET</cell>
 <cell>Net   : FCCC_3_GL1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: FCCC_3/GL1_INST/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>441</cell>
 <cell>INT_NET</cell>
 <cell>Net   : FCCC_1_GL0</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: FCCC_1/GL0_INST/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>437</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEI0OI</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIOII_RNI9N2A/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>353</cell>
 <cell>INT_NET</cell>
 <cell>Net   : FCCC_2_GL0</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: FCCC_2/GL0_INST/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>321</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOo1I_i</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEilI1/CORETSEIO01_RNIES11/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>296</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEilOI_i</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIoOI_RNIFU4B/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>279</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0_i</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEilI1/CORETSEOI01_RNIE2E7/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>238</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEolii_i</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEolii_RNIUS53/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>223</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEilii_i</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEilii_RNIOAJC/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>198</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEllii_i</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEllii_RNIRJSF/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>124</cell>
 <cell>INT_NET</cell>
 <cell>Net   : PHY_MDC_c</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>92</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CoreConfigP_0_APB_S_PCLK</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST_RNIPDL7/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>22</cell>
 <cell>INT_NET</cell>
 <cell>Net   : OSC_0_RCOSC_25_50MHZ_O2F</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
<row>
 <cell>1</cell>
 <cell>INT_NET</cell>
 <cell>Net   : FCCC_3/CLKINT_0_Y</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: FCCC_3/GL0_INST/U0_RGB1</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Source: NETLIST</cell>
</row>
</table>
<section><name>Nets assigned to row global resources</name></section>
<table>
<header>
 <cell>Fanout</cell>
 <cell>Type</cell>
 <cell>Name</cell>
</header>
</table>
<section><name>High fanout nets</name></section>
<table>
<header>
 <cell>Fanout</cell>
 <cell>Type</cell>
 <cell>Name</cell>
</header>
<row>
 <cell>259</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOOo0</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOOo0</cell>
</row>
<row>
 <cell>177</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEIlii</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEIlii</cell>
</row>
<row>
 <cell>142</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CoreAHBLite_1.matrix4x16.slavestage_3.masterDataInProg[0]</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CoreAHBLite_1/matrix4x16/slavestage_3/masterDataInProg[0]</cell>
</row>
<row>
 <cell>131</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOIiII/CORETSEOi0II_0</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOIiII/CORETSEOi0II</cell>
</row>
<row>
 <cell>126</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOIiII/un1_CORETSEIl0II</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOIiII/un1_CORETSEIl0II</cell>
</row>
<row>
 <cell>117</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEilI1/CORETSEol01</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEilI1/CORETSEol01</cell>
</row>
<row>
 <cell>102</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEilI1/CORETSEl001</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEilI1/CORETSEl001</cell>
</row>
<row>
 <cell>94</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CoreTSE_M2S090_MSS_0/CONFIG_PRESET_N</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST</cell>
</row>
<row>
 <cell>90</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEO0ii</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEO0ii</cell>
</row>
<row>
 <cell>82</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CoreAHBLite_1_AHBmslave3_HWDATA[0]</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CoreAHBLite_1/matrix4x16/slavestage_3/HWDATA[0]</cell>
</row>
</table>
<section><name>High fanout nets (through buffer trees)</name></section>
<table>
<header>
 <cell>Fanout</cell>
 <cell>Type</cell>
 <cell>Name</cell>
</header>
<row>
 <cell>259</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOOo0</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOOo0</cell>
</row>
<row>
 <cell>177</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEIlii</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEIlii</cell>
</row>
<row>
 <cell>142</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CoreAHBLite_1.matrix4x16.slavestage_3.masterDataInProg[0]</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CoreAHBLite_1/matrix4x16/slavestage_3/masterDataInProg[0]</cell>
</row>
<row>
 <cell>131</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOIiII/CORETSEOi0II_0</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOIiII/CORETSEOi0II</cell>
</row>
<row>
 <cell>126</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOIiII/un1_CORETSEIl0II</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEOIiII/un1_CORETSEIl0II</cell>
</row>
<row>
 <cell>117</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEilI1/CORETSEol01</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEilI1/CORETSEol01</cell>
</row>
<row>
 <cell>102</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEilI1/CORETSEl001</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEilI1/CORETSEl001</cell>
</row>
<row>
 <cell>94</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CoreTSE_M2S090_MSS_0/CONFIG_PRESET_N</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST</cell>
</row>
<row>
 <cell>90</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEO0ii</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEO0ii</cell>
</row>
<row>
 <cell>82</cell>
 <cell>INT_NET</cell>
 <cell>Net   : CoreAHBLite_1_AHBmslave3_HWDATA[0]</cell>
</row>
<row>
 <cell></cell>
 <cell></cell>
 <cell>Driver: CoreAHBLite_1/matrix4x16/slavestage_3/HWDATA[0]</cell>
</row>
</table>
</doc>
