<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<?xml-stylesheet href="rptstyle.xsl" type="text/xsl" ?>
<doc>
<title>Timing Report Max Delay Analysis
</title>
<text>SmartTime Version 11.8.0.26</text>
<text>Microsemi Corporation - Microsemi Libero Software Release v11.8 (Version 11.8.0.26)</text>
<text>Date: Tue Mar 14 15:47:07 2017
</text>
<table>
<header>
</header>
<row>
 <cell>Design</cell>
 <cell>CoreTSE_M2S090</cell>
</row>
<row>
 <cell>Family</cell>
 <cell>SmartFusion2</cell>
</row>
<row>
 <cell>Die</cell>
 <cell>M2S090TS</cell>
</row>
<row>
 <cell>Package</cell>
 <cell>484 FBGA</cell>
</row>
<row>
 <cell>Temperature Range</cell>
 <cell>0 - 85 C</cell>
</row>
<row>
 <cell>Voltage Range</cell>
 <cell>1.14 - 1.26 V</cell>
</row>
<row>
 <cell>Speed Grade</cell>
 <cell>-1</cell>
</row>
<row>
 <cell>Design State</cell>
 <cell>Post-Layout</cell>
</row>
<row>
 <cell>Data source</cell>
 <cell>Production</cell>
</row>
<row>
 <cell>Min Operating Conditions</cell>
 <cell>BEST - 1.26 V - 0 C</cell>
</row>
<row>
 <cell>Max Operating Conditions</cell>
 <cell>WORST - 1.14 V - 85 C</cell>
</row>
<row>
 <cell>Scenario for Timing Analysis</cell>
 <cell>timing_analysis</cell>
</row>
</table>
<text></text>
<section>
<name>Summary</name>
<table>
<header>
 <cell>Clock Domain</cell>
 <cell>Period (ns)</cell>
 <cell>Frequency (MHz)</cell>
 <cell>Required Period (ns)</cell>
 <cell>Required Frequency (MHz)</cell>
 <cell>External Setup (ns)</cell>
 <cell>External Hold (ns)</cell>
 <cell>Min Clock-To-Out (ns)</cell>
 <cell>Max Clock-To-Out (ns)</cell>
</header>
<row>
 <cell>CLK1_PAD</cell>
 <cell>1.600</cell>
 <cell>625.000</cell>
 <cell>20.000</cell>
 <cell>50.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110:Q</cell>
 <cell>6.901</cell>
 <cell>144.907</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>FCCC_0/GL0</cell>
 <cell>13.814</cell>
 <cell>72.390</cell>
 <cell>20.000</cell>
 <cell>50.000</cell>
 <cell>3.946</cell>
 <cell>-1.871</cell>
 <cell>6.477</cell>
 <cell>14.949</cell>
</row>
<row>
 <cell>FCCC_1/GL0</cell>
 <cell>7.312</cell>
 <cell>136.761</cell>
 <cell>8.000</cell>
 <cell>125.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell>4.820</cell>
 <cell>207.469</cell>
 <cell>8.000</cell>
 <cell>125.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>8.401</cell>
 <cell>13.654</cell>
</row>
<row>
 <cell>FCCC_3/GL0</cell>
 <cell>2.538</cell>
 <cell>394.011</cell>
 <cell>8.000</cell>
 <cell>125.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ/CLKOUT</cell>
 <cell>3.249</cell>
 <cell>307.787</cell>
 <cell>20.000</cell>
 <cell>50.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/CLK_CONFIG_APB</cell>
 <cell>19.636</cell>
 <cell>50.927</cell>
 <cell>80.000</cell>
 <cell>12.500</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1]</cell>
 <cell>1.818</cell>
 <cell>550.055</cell>
 <cell>8.000</cell>
 <cell>125.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]</cell>
 <cell>1.142</cell>
 <cell>875.657</cell>
 <cell>8.000</cell>
 <cell>125.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
<row>
 <cell>FCCC_3/GL1</cell>
 <cell>2.538</cell>
 <cell>394.011</cell>
 <cell>8.000</cell>
 <cell>125.000</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
<text></text>
<table>
<header>
 <cell></cell>
 <cell>Min Delay (ns)</cell>
 <cell>Max Delay (ns)</cell>
</header>
<row>
 <cell>Input to Output</cell>
 <cell>N/A</cell>
 <cell>N/A</cell>
</row>
</table>
</section>
<section>
<name>Clock Domain CLK1_PAD</name>
<text>Info: The maximum frequency of this clock domain is limited by the minimum pulse widths of pin FCCC_0/CLK1_PAD_INST/U_IOPAD:PAD</text>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110:Q</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEIi1o[3]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEi0oo[8]:D</cell>
 <cell>6.636</cell>
 <cell></cell>
 <cell>10.314</cell>
 <cell></cell>
 <cell>0.254</cell>
 <cell>6.901</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEIi1o[3]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEi0oo[1]:D</cell>
 <cell>6.553</cell>
 <cell></cell>
 <cell>10.231</cell>
 <cell></cell>
 <cell>0.254</cell>
 <cell>6.818</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEIi1o[3]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEi0oo[6]:D</cell>
 <cell>6.527</cell>
 <cell></cell>
 <cell>10.205</cell>
 <cell></cell>
 <cell>0.254</cell>
 <cell>6.780</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEIi1o[1]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEi0oo[8]:D</cell>
 <cell>6.480</cell>
 <cell></cell>
 <cell>10.158</cell>
 <cell></cell>
 <cell>0.254</cell>
 <cell>6.745</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEIi1o[1]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEi0oo[1]:D</cell>
 <cell>6.397</cell>
 <cell></cell>
 <cell>10.075</cell>
 <cell></cell>
 <cell>0.254</cell>
 <cell>6.662</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEIi1o[3]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEi0oo[8]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>10.314</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110:Q</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110:Q</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA:An</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.872</cell>
 <cell>1.872</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.374</cell>
 <cell>2.246</cell>
 <cell>7</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA/U0_RGB1_RGB7:An</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.610</cell>
 <cell>2.856</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA/U0_RGB1_RGB7:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>3.173</cell>
 <cell>10</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEIi1o[3]:CLK</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA/U0_RGB1_RGB7_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.505</cell>
 <cell>3.678</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEIi1o[3]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>3.765</cell>
 <cell>13</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEiOio_0_a3_2_0:C</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiOi0/CORETSEIi1o[3]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.082</cell>
 <cell>4.847</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEiOio_0_a3_2_0:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.191</cell>
 <cell>5.038</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEiOio_0_a3_2:C</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiOi0/CORETSEiOio_0_a3_2_0</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.834</cell>
 <cell>5.872</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEiOio_0_a3_2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>6.030</cell>
 <cell>6</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEIioo_m1_e:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiOi0/CORETSEiOio_0_a3_2</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.905</cell>
 <cell>6.935</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEIioo_m1_e:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.202</cell>
 <cell>7.137</cell>
 <cell>13</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEOOio_0_a2:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiOi0/N_433</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.803</cell>
 <cell>7.940</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEOOio_0_a2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>8.098</cell>
 <cell>6</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEo0oo_m1_e_3:B</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiOi0/N_437</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.637</cell>
 <cell>8.735</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEo0oo_m1_e_3:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.074</cell>
 <cell>8.809</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEo0oo_0_1[8]:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiOi0/CORETSEo0oo_m1_e_3</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.227</cell>
 <cell>9.036</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEo0oo_0_1[8]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.143</cell>
 <cell>9.179</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEo0oo_0[8]:C</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiOi0/CORETSEo0oo_0_1[8]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.741</cell>
 <cell>9.920</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEo0oo_0[8]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.319</cell>
 <cell>10.239</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEi0oo[8]:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiOi0/CORETSEo0oo[8]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.075</cell>
 <cell>10.314</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.314</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110:Q</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110:Q</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA:An</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.872</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.374</cell>
 <cell>N/C</cell>
 <cell>7</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA/U0_RGB1_RGB3:An</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.602</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA/U0_RGB1_RGB3:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>N/C</cell>
 <cell>26</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEi0oo[8]:CLK</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEI110_inferred_clock_RNICOHA/U0_RGB1_RGB3_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.502</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEi0oo[8]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.254</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain FCCC_0/GL0</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEO0o0I/CORETSEOooOI[4]:CLK</cell>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[9]</cell>
 <cell>13.093</cell>
 <cell>6.186</cell>
 <cell>18.126</cell>
 <cell>24.312</cell>
 <cell>0.906</cell>
 <cell>13.814</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEO0o0I/CORETSEOooOI[0]:CLK</cell>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[9]</cell>
 <cell>13.019</cell>
 <cell>6.250</cell>
 <cell>18.062</cell>
 <cell>24.312</cell>
 <cell>0.906</cell>
 <cell>13.750</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEO0o0I/CORETSEOooOI[1]:CLK</cell>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[3]</cell>
 <cell>13.086</cell>
 <cell>6.253</cell>
 <cell>18.123</cell>
 <cell>24.376</cell>
 <cell>0.842</cell>
 <cell>13.747</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEO0o0I/CORETSEOooOI[1]:CLK</cell>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[4]</cell>
 <cell>12.971</cell>
 <cell>6.333</cell>
 <cell>18.008</cell>
 <cell>24.341</cell>
 <cell>0.877</cell>
 <cell>13.667</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEO0o0I/CORETSEOooOI[3]:CLK</cell>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[9]</cell>
 <cell>12.826</cell>
 <cell>6.443</cell>
 <cell>17.869</cell>
 <cell>24.312</cell>
 <cell>0.906</cell>
 <cell>13.557</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEO0o0I/CORETSEOooOI[4]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[9]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>24.312</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>18.126</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>6.186</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.201</cell>
 <cell>3.201</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>3.400</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>3.578</cell>
 <cell>33</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB8:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.613</cell>
 <cell>4.191</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB8:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>4.507</cell>
 <cell>108</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEO0o0I/CORETSEOooOI[4]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB8_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.526</cell>
 <cell>5.033</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEO0o0I/CORETSEOooOI[4]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>5.120</cell>
 <cell>28</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiII1/un4_CORETSEolo1_1:B</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooi0[4]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.265</cell>
 <cell>6.385</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiII1/un4_CORETSEolo1_1:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>6.543</cell>
 <cell>6</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEl1ii/un3_CORETSEO1OOI_0:B</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/un4_CORETSEolo1_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.019</cell>
 <cell>7.562</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEl1ii/un3_CORETSEO1OOI_0:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.074</cell>
 <cell>7.636</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEl1ii/CORETSEiiOOI:B</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEl1ii/un3_CORETSEO1OOI_0</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.805</cell>
 <cell>8.441</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEl1ii/CORETSEiiOOI:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.202</cell>
 <cell>8.643</cell>
 <cell>23</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_7[9]:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEiiOOI</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.403</cell>
 <cell>10.046</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_7[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>10.204</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_16[9]:B</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_7[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.141</cell>
 <cell>11.345</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_16[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>11.503</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_24[9]:C</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_16[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.854</cell>
 <cell>12.357</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_24[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.270</cell>
 <cell>12.627</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_25[9]:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_24[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.815</cell>
 <cell>13.442</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_25[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>13.600</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEIIolI/CORETSEIooOI_N_6L10_0:C</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEOOO1_25[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.253</cell>
 <cell>14.853</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEIIolI/CORETSEIooOI_N_6L10_0:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.134</cell>
 <cell>14.987</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEIIolI/CORETSEIooOI[9]:B</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEIIolI/CORETSEIooOI_N_6L10_0</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.914</cell>
 <cell>15.901</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEIIolI/CORETSEIooOI[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.099</cell>
 <cell>16.000</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreAHBLite_1/matrix4x16/masterstage_0/HRDATA_0[9]:B</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0_CORETSEi0ilI_CORETSEIoilI_CORETSEi0o0I_CORETSEio1lI[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.229</cell>
 <cell>16.229</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreAHBLite_1/matrix4x16/masterstage_0/HRDATA_0[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>16.387</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreAHBLite_1/matrix4x16/masterstage_0/HRDATA[9]:A</cell>
 <cell>net</cell>
 <cell>CoreAHBLite_1/matrix4x16/masterstage_0/N_1035</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.091</cell>
 <cell>16.478</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreAHBLite_1/matrix4x16/masterstage_0/HRDATA[9]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.074</cell>
 <cell>16.552</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:B</cell>
 <cell>net</cell>
 <cell>CoreTSE_M2S090_MSS_0_FIC_0_AHB_MASTER_HRDATA[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.291</cell>
 <cell>17.843</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.209</cell>
 <cell>18.052</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[9]</cell>
 <cell>net</cell>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/F_HM0_RDATA_net[9]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.074</cell>
 <cell>18.126</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>18.126</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>20.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.201</cell>
 <cell>23.201</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>23.400</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>23.578</cell>
 <cell>33</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.620</cell>
 <cell>24.198</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>24.514</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.407</cell>
 <cell>24.921</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.209</cell>
 <cell>25.130</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE</cell>
 <cell>net</cell>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/CLK_BASE_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.088</cell>
 <cell>25.218</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[9]</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:MSS_075_IP</cell>
 <cell>-</cell>
 <cell>0.906</cell>
 <cell>24.312</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>24.312</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>External Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>PHY_MDIO</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEOii1[0]:D</cell>
 <cell>8.645</cell>
 <cell></cell>
 <cell>8.645</cell>
 <cell></cell>
 <cell>0.174</cell>
 <cell>3.946</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: PHY_MDIO</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEOii1[0]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.645</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>PHY_MDIO</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BIBUF_0/U0/U_IOPAD:PAD</cell>
 <cell>net</cell>
 <cell>PHY_MDIO</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BIBUF_0/U0/U_IOPAD:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_BI</cell>
 <cell>+</cell>
 <cell>2.498</cell>
 <cell>2.498</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BIBUF_0/U0/U_IOINFF:A</cell>
 <cell>net</cell>
 <cell>BIBUF_0/U0/YIN1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.014</cell>
 <cell>2.512</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BIBUF_0/U0/U_IOINFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOINFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.090</cell>
 <cell>2.602</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEoo10_0_a3:D</cell>
 <cell>net</cell>
 <cell>BIBUF_0_Y</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.072</cell>
 <cell>5.674</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEoo10_0_a3:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.352</cell>
 <cell>6.026</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEoo10_0_1:C</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiOi0/N_398</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.225</cell>
 <cell>6.251</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiOi0/CORETSEoo10_0_1:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.198</cell>
 <cell>6.449</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEioi1[0]:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEoo10_0_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.956</cell>
 <cell>8.405</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEioi1[0]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.164</cell>
 <cell>8.569</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEOii1[0]:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEioi1[0]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.076</cell>
 <cell>8.645</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.645</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.105</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.193</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.173</cell>
 <cell>N/C</cell>
 <cell>33</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB19:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.589</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB19:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.307</cell>
 <cell>N/C</cell>
 <cell>88</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEOii1[0]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB19_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.506</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEOii1[0]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.174</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Clock to Output</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Clock to Out (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEo110:CLK</cell>
 <cell>PHY_MDIO</cell>
 <cell>9.924</cell>
 <cell></cell>
 <cell>14.949</cell>
 <cell></cell>
 <cell>14.949</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEl110:CLK</cell>
 <cell>PHY_MDIO</cell>
 <cell>8.724</cell>
 <cell></cell>
 <cell>13.762</cell>
 <cell></cell>
 <cell>13.762</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEilo0I/CORETSElO00I/CORETSEoll0I[4]:CLK</cell>
 <cell>TSM_INTR</cell>
 <cell>8.361</cell>
 <cell></cell>
 <cell>13.401</cell>
 <cell></cell>
 <cell>13.401</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEilo0I/CORETSElO00I/CORETSEoll0I[6]:CLK</cell>
 <cell>TSM_INTR</cell>
 <cell>8.306</cell>
 <cell></cell>
 <cell>13.344</cell>
 <cell></cell>
 <cell>13.344</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEi0o0I/CORETSEilo0I/CORETSElO00I/CORETSEoll0I[7]:CLK</cell>
 <cell>TSM_INTR</cell>
 <cell>8.280</cell>
 <cell></cell>
 <cell>13.308</cell>
 <cell></cell>
 <cell>13.308</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEo110:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: PHY_MDIO</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>14.949</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.201</cell>
 <cell>3.201</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>3.400</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>3.578</cell>
 <cell>33</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB21:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.606</cell>
 <cell>4.184</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB21:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>4.501</cell>
 <cell>20</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEo110:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB21_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.524</cell>
 <cell>5.025</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEOII1/CORETSEo110:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.108</cell>
 <cell>5.133</cell>
 <cell>6</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BIBUF_0/U0/U_IOENFF:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0_MDOEN</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>4.308</cell>
 <cell>9.441</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BIBUF_0/U0/U_IOENFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOENFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.343</cell>
 <cell>9.784</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>BIBUF_0/U0/U_IOPAD:E</cell>
 <cell>net</cell>
 <cell>BIBUF_0/U0/EOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.033</cell>
 <cell>9.817</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>BIBUF_0/U0/U_IOPAD:PAD</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_BI</cell>
 <cell>+</cell>
 <cell>5.132</cell>
 <cell>14.949</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>PHY_MDIO</cell>
 <cell>net</cell>
 <cell>PHY_MDIO</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>14.949</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.949</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.201</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>PHY_MDIO</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Register to Asynchronous</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Recovery (ns)</cell>
 <cell>Minimum Period (ns)</cell>
 <cell>Skew (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CoreResetP_0/MSS_HPMS_READY_int:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEI0ii/CORETSEIl1i[21]:ALn</cell>
 <cell>5.907</cell>
 <cell>13.701</cell>
 <cell>10.928</cell>
 <cell>24.629</cell>
 <cell>0.353</cell>
 <cell>6.299</cell>
 <cell>0.039</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CoreResetP_0/MSS_HPMS_READY_int:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEI0ii/CORETSEIl1i[22]:ALn</cell>
 <cell>5.907</cell>
 <cell>13.702</cell>
 <cell>10.928</cell>
 <cell>24.630</cell>
 <cell>0.353</cell>
 <cell>6.298</cell>
 <cell>0.038</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CoreResetP_0/MSS_HPMS_READY_int:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEI0ii/CORETSEO00OI[3]:ALn</cell>
 <cell>5.772</cell>
 <cell>13.854</cell>
 <cell>10.793</cell>
 <cell>24.647</cell>
 <cell>0.353</cell>
 <cell>6.146</cell>
 <cell>0.021</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CoreResetP_0/MSS_HPMS_READY_int:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEI0ii/CORETSEO00OI[5]:ALn</cell>
 <cell>5.772</cell>
 <cell>13.854</cell>
 <cell>10.793</cell>
 <cell>24.647</cell>
 <cell>0.353</cell>
 <cell>6.146</cell>
 <cell>0.021</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CoreResetP_0/MSS_HPMS_READY_int:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEI0ii/CORETSEIl1i[10]:ALn</cell>
 <cell>5.772</cell>
 <cell>13.854</cell>
 <cell>10.793</cell>
 <cell>24.647</cell>
 <cell>0.353</cell>
 <cell>6.146</cell>
 <cell>0.021</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CoreResetP_0/MSS_HPMS_READY_int:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEI0ii/CORETSEIl1i[21]:ALn</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>24.629</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>10.928</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.701</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.201</cell>
 <cell>3.201</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>3.400</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>3.578</cell>
 <cell>33</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB29:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.621</cell>
 <cell>4.199</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB29:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>4.516</cell>
 <cell>5</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/MSS_HPMS_READY_int:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB29_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.505</cell>
 <cell>5.021</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/MSS_HPMS_READY_int:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>5.108</cell>
 <cell>25</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/CORETSEi1ii_2:A</cell>
 <cell>net</cell>
 <cell>CoreResetP_0/MSS_HPMS_READY_int</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.676</cell>
 <cell>5.784</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/CORETSEi1ii_2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.143</cell>
 <cell>5.927</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEIlii:B</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/CORETSEi1ii_2</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.229</cell>
 <cell>6.156</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEIlii:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.099</cell>
 <cell>6.255</cell>
 <cell>177</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEI0ii/CORETSEIl1i[21]:ALn</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEo1ii/un1_CORETSEIlii</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>4.673</cell>
 <cell>10.928</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.928</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>20.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.201</cell>
 <cell>23.201</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>23.400</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>23.578</cell>
 <cell>33</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB12:An</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.615</cell>
 <cell>24.193</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB12:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>24.509</cell>
 <cell>88</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEI0ii/CORETSEIl1i[21]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_0/GL0_INST/U0_RGB1_RGB12_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.473</cell>
 <cell>24.982</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEooolI/CORETSEI0ii/CORETSEIl1i[21]:ALn</cell>
 <cell>Library recovery time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.353</cell>
 <cell>24.629</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>24.629</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET OSC_0/I_RCOSC_25_50MHZ/CLKOUT to FCCC_0/GL0</name>
<text>No Path</text>
</section>
<section>
<name>SET CoreTSE_M2S090_MSS_0/CLK_CONFIG_APB to FCCC_0/GL0</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_3/GL0 to FCCC_0/GL0</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_3/GL1 to FCCC_0/GL0</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain FCCC_1/GL0</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEi0io[5]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEllI[1]:D</cell>
 <cell>7.041</cell>
 <cell>0.688</cell>
 <cell>14.127</cell>
 <cell>14.815</cell>
 <cell>0.254</cell>
 <cell>7.312</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEi0io[3]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEllI[1]:D</cell>
 <cell>7.026</cell>
 <cell>0.694</cell>
 <cell>14.121</cell>
 <cell>14.815</cell>
 <cell>0.254</cell>
 <cell>7.306</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEi0io[6]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEllI[1]:D</cell>
 <cell>6.974</cell>
 <cell>0.756</cell>
 <cell>14.059</cell>
 <cell>14.815</cell>
 <cell>0.254</cell>
 <cell>7.244</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEIoli[14]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEi0io[26]:D</cell>
 <cell>6.922</cell>
 <cell>0.812</cell>
 <cell>13.990</cell>
 <cell>14.802</cell>
 <cell>0.254</cell>
 <cell>7.188</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEIIol[7]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEllI[1]:D</cell>
 <cell>6.929</cell>
 <cell>0.817</cell>
 <cell>13.998</cell>
 <cell>14.815</cell>
 <cell>0.254</cell>
 <cell>7.183</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEi0io[5]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEllI[1]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.815</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>14.127</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.688</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.250</cell>
 <cell>5.250</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.198</cell>
 <cell>5.448</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>5.625</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB6:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.619</cell>
 <cell>6.244</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB6:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>6.560</cell>
 <cell>38</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEi0io[5]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB6_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.526</cell>
 <cell>7.086</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEi0io[5]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>7.173</cell>
 <cell>4</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEliio_1:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiio0/CORETSEi0io[5]_net_4</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.458</cell>
 <cell>7.631</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEliio_1:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>7.789</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEliio_6:C</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiio0/CORETSEliio_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.223</cell>
 <cell>8.012</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEliio_6:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>8.170</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEliio:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiio0/CORETSEliio_6</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.890</cell>
 <cell>9.060</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEliio:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.270</cell>
 <cell>9.330</cell>
 <cell>10</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/un1_CORETSEoIli:C</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiio0/CORETSEliio</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.545</cell>
 <cell>9.875</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/un1_CORETSEoIli:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.072</cell>
 <cell>9.947</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEoIli:B</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiio0/un1_CORETSEoIli</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.086</cell>
 <cell>10.033</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEoIli:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.072</cell>
 <cell>10.105</cell>
 <cell>4</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/un2_CORETSEIIli:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiio0/CORETSEoIli</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>10.282</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/un2_CORETSEIIli:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.321</cell>
 <cell>10.603</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEIIli:C</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiio0/un2_CORETSEIIli</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.965</cell>
 <cell>11.568</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEIIli:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.164</cell>
 <cell>11.732</cell>
 <cell>8</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/un9_CORETSEl0li:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiio0/CORETSEIIli_net_22</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.364</cell>
 <cell>12.096</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/un9_CORETSEl0li:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>12.183</cell>
 <cell>3</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/un22_CORETSEIlI:C</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiio0/un9_CORETSEl0li</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.534</cell>
 <cell>12.717</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/un22_CORETSEIlI:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.315</cell>
 <cell>13.032</cell>
 <cell>7</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEIlI[1]:C</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiio0/un22_CORETSEIlI</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.750</cell>
 <cell>13.782</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEIlI[1]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.270</cell>
 <cell>14.052</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEllI[1]:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEiio0/CORETSEIlI[1]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.075</cell>
 <cell>14.127</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.127</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.250</cell>
 <cell>13.250</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.198</cell>
 <cell>13.448</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>13.625</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB6:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.619</cell>
 <cell>14.244</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB6:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>14.560</cell>
 <cell>38</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEllI[1]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB6_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.509</cell>
 <cell>15.069</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEiio0/CORETSEllI[1]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.254</cell>
 <cell>14.815</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.815</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Recovery (ns)</cell>
 <cell>Minimum Period (ns)</cell>
 <cell>Skew (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEo0OI[0]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[11]:ALn</cell>
 <cell>3.774</cell>
 <cell>3.881</cell>
 <cell>10.838</cell>
 <cell>14.719</cell>
 <cell>0.353</cell>
 <cell>4.119</cell>
 <cell>-0.008</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEo0OI[0]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEil0i[11]:ALn</cell>
 <cell>3.774</cell>
 <cell>3.881</cell>
 <cell>10.838</cell>
 <cell>14.719</cell>
 <cell>0.353</cell>
 <cell>4.119</cell>
 <cell>-0.008</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEo0OI[0]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEil0i[10]:ALn</cell>
 <cell>3.774</cell>
 <cell>3.881</cell>
 <cell>10.838</cell>
 <cell>14.719</cell>
 <cell>0.353</cell>
 <cell>4.119</cell>
 <cell>-0.008</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEo0OI[0]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEil0i[12]:ALn</cell>
 <cell>3.774</cell>
 <cell>3.881</cell>
 <cell>10.838</cell>
 <cell>14.719</cell>
 <cell>0.353</cell>
 <cell>4.119</cell>
 <cell>-0.008</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEo0OI[0]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[13]:ALn</cell>
 <cell>3.774</cell>
 <cell>3.881</cell>
 <cell>10.838</cell>
 <cell>14.719</cell>
 <cell>0.353</cell>
 <cell>4.119</cell>
 <cell>-0.008</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEo0OI[0]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[11]:ALn</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.719</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>10.838</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>3.881</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.250</cell>
 <cell>5.250</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.198</cell>
 <cell>5.448</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>5.625</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB12:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.625</cell>
 <cell>6.250</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB12:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>6.566</cell>
 <cell>32</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEo0OI[0]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB12_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.498</cell>
 <cell>7.064</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEo0OI[0]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.108</cell>
 <cell>7.172</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEIOII:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEo0OI</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.596</cell>
 <cell>7.768</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEIOII:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>7.855</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEIOII_RNI9N2A:An</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIOII</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.126</cell>
 <cell>8.981</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEIOII_RNI9N2A:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.384</cell>
 <cell>9.365</cell>
 <cell>14</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIOII_RNI9N2A/U0_RGB1_RGB10:An</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIOII_RNI9N2A/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.626</cell>
 <cell>9.991</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIOII_RNI9N2A/U0_RGB1_RGB10:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.248</cell>
 <cell>10.239</cell>
 <cell>22</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[11]:ALn</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIOII_RNI9N2A/U0_RGB1_RGB10_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.599</cell>
 <cell>10.838</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.838</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.250</cell>
 <cell>13.250</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.198</cell>
 <cell>13.448</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>13.625</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB10:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.620</cell>
 <cell>14.245</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB10:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>14.561</cell>
 <cell>22</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[11]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB10_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.511</cell>
 <cell>15.072</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[11]:ALn</cell>
 <cell>Library recovery time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.353</cell>
 <cell>14.719</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.719</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_0/GL0 to FCCC_1/GL0</name>
<text>No Path</text>
</section>
<section>
<name>SET SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1] to FCCC_1/GL0</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[12]:D</cell>
 <cell>8.755</cell>
 <cell>6.076</cell>
 <cell>8.755</cell>
 <cell>14.831</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[11]:D</cell>
 <cell>8.478</cell>
 <cell>6.340</cell>
 <cell>8.478</cell>
 <cell>14.818</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEi1li[6]:D</cell>
 <cell>8.422</cell>
 <cell>6.409</cell>
 <cell>8.422</cell>
 <cell>14.831</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEi1li[5]:D</cell>
 <cell>8.354</cell>
 <cell>6.465</cell>
 <cell>8.354</cell>
 <cell>14.819</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[19]:D</cell>
 <cell>8.334</cell>
 <cell>6.494</cell>
 <cell>8.334</cell>
 <cell>14.828</cell>
 <cell>0.254</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[12]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.831</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.755</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>6.076</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[32]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SERDESIF_075_IP</cell>
 <cell>+</cell>
 <cell>0.375</cell>
 <cell>0.375</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST4:A</cell>
 <cell>net</cell>
 <cell>SERDES_IF2_0_EPCS_3_RX_DATA[2]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.606</cell>
 <cell>3.981</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST4:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>4.326</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST3:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST_net4</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.194</cell>
 <cell>4.520</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST3:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>4.865</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST2:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST_net3</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.305</cell>
 <cell>5.170</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>5.515</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST1:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST_net2</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.193</cell>
 <cell>5.708</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST1:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>6.053</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST0:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST_net1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.309</cell>
 <cell>6.362</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST0:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>6.707</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST_net0</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.194</cell>
 <cell>6.901</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>7.246</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli_5[12]:B</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]_CFG1D_TEST_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.620</cell>
 <cell>7.866</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli_5[12]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.158</cell>
 <cell>8.024</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[12]:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.731</cell>
 <cell>8.755</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.755</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.250</cell>
 <cell>13.250</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.198</cell>
 <cell>13.448</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>13.625</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB10:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.620</cell>
 <cell>14.245</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB10:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>14.561</cell>
 <cell>22</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[12]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB10_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.524</cell>
 <cell>15.085</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[12]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.254</cell>
 <cell>14.831</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.831</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET FCCC_2/GL0 to FCCC_1/GL0</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[2]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[12]:D</cell>
 <cell>3.816</cell>
 <cell>3.734</cell>
 <cell>11.097</cell>
 <cell>14.831</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[0]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEi1li[0]:D</cell>
 <cell>3.589</cell>
 <cell>3.958</cell>
 <cell>10.873</cell>
 <cell>14.831</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[0]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[10]:D</cell>
 <cell>3.358</cell>
 <cell>4.188</cell>
 <cell>10.642</cell>
 <cell>14.830</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[4]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[14]:D</cell>
 <cell>3.269</cell>
 <cell>4.269</cell>
 <cell>10.550</cell>
 <cell>14.819</cell>
 <cell>0.254</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSEoioII:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[19]:D</cell>
 <cell>3.219</cell>
 <cell>4.328</cell>
 <cell>10.500</cell>
 <cell>14.828</cell>
 <cell>0.254</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[2]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[12]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.831</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>11.097</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>3.734</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.463</cell>
 <cell>5.463</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>5.662</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>5.840</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB3:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.620</cell>
 <cell>6.460</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB3:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>6.777</cell>
 <cell>10</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[2]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB3_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.504</cell>
 <cell>7.281</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[2]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>7.368</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElio0/CORETSEI0II[2]:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSElioII[2]_net_3</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.978</cell>
 <cell>8.346</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElio0/CORETSEI0II[2]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.282</cell>
 <cell>8.628</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli_5[12]:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0_TCG[2]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.536</cell>
 <cell>10.164</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli_5[12]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG3</cell>
 <cell>+</cell>
 <cell>0.202</cell>
 <cell>10.366</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[12]:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEoio0/CORETSEOoli_5[12]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.731</cell>
 <cell>11.097</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>11.097</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.250</cell>
 <cell>13.250</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.198</cell>
 <cell>13.448</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>13.625</cell>
 <cell>14</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB10:An</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.620</cell>
 <cell>14.245</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB10:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>14.561</cell>
 <cell>22</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[12]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_1/GL0_INST/U0_RGB1_RGB10_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.524</cell>
 <cell>15.085</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEoio0/CORETSEOoli[12]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.254</cell>
 <cell>14.831</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.831</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
</section>
<section>
<name>Clock Domain FCCC_2/GL0</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSElIIlI[0]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEO1OlI:EN</cell>
 <cell>4.441</cell>
 <cell>3.180</cell>
 <cell>11.756</cell>
 <cell>14.936</cell>
 <cell>0.335</cell>
 <cell>4.820</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElio0/CORETSEO00I[0]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElio0/CORETSEol0I[1]:D</cell>
 <cell>4.477</cell>
 <cell>3.228</cell>
 <cell>11.797</cell>
 <cell>15.025</cell>
 <cell>0.254</cell>
 <cell>4.772</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElio0/CORETSEO00I[3]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElio0/CORETSEol0I[1]:D</cell>
 <cell>4.443</cell>
 <cell>3.273</cell>
 <cell>11.752</cell>
 <cell>15.025</cell>
 <cell>0.254</cell>
 <cell>4.727</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElio0/CORETSEO00I[3]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElio0/CORETSEol0I[7]:D</cell>
 <cell>4.433</cell>
 <cell>3.314</cell>
 <cell>11.742</cell>
 <cell>15.056</cell>
 <cell>0.254</cell>
 <cell>4.686</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEl1OlI[8]:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEO1OlI:EN</cell>
 <cell>4.311</cell>
 <cell>3.322</cell>
 <cell>11.614</cell>
 <cell>14.936</cell>
 <cell>0.335</cell>
 <cell>4.678</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSElIIlI[0]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEO1OlI:EN</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.936</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>11.756</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>3.180</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.463</cell>
 <cell>5.463</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>5.662</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>5.839</cell>
 <cell>6</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.607</cell>
 <cell>6.446</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>6.762</cell>
 <cell>31</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSElIIlI[0]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.553</cell>
 <cell>7.315</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSElIIlI[0]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.108</cell>
 <cell>7.423</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/un7_CORETSEoIIlI_0_I_1:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEOOi0/CORETSElIIlI[0]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.670</cell>
 <cell>8.093</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/un7_CORETSEoIIlI_0_I_1:UB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:ARI1_CC</cell>
 <cell>+</cell>
 <cell>0.441</cell>
 <cell>8.534</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEOOi0/un7_CORETSEoIIlI_0_I_1_CC_0:UB[0]</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG4068</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.534</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEOOi0/un7_CORETSEoIIlI_0_I_1_CC_0:CC[8]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CC_CONFIG</cell>
 <cell>+</cell>
 <cell>0.863</cell>
 <cell>9.397</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEOOi0/un7_CORETSEoIIlI_0_I_45_FCINST1:CC</cell>
 <cell>net</cell>
 <cell>NET_CC_CONFIG4093</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>9.397</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEOOi0/un7_CORETSEoIIlI_0_I_45_FCINST1:CO</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:FCEND_BUFF_CC</cell>
 <cell>+</cell>
 <cell>0.066</cell>
 <cell>9.463</cell>
 <cell>3</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEI1IlI:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEOOi0/un7_CORETSEoIIlI_0_N_2</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.668</cell>
 <cell>10.131</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEI1IlI:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.225</cell>
 <cell>10.356</cell>
 <cell>4</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEO1OlI:EN</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSEOOi0/CORETSEI1IlI</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.400</cell>
 <cell>11.756</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>11.756</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.463</cell>
 <cell>13.463</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>13.662</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>13.839</cell>
 <cell>6</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.607</cell>
 <cell>14.446</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>14.762</cell>
 <cell>31</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEO1OlI:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.509</cell>
 <cell>15.271</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEO1OlI:EN</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.335</cell>
 <cell>14.936</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.936</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Clock to Out (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>MON_ANX_0/DOUT[2]:CLK</cell>
 <cell>DOUT[2]</cell>
 <cell>6.343</cell>
 <cell></cell>
 <cell>13.654</cell>
 <cell></cell>
 <cell>13.654</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>MON_ANX_0/DOUT[4]:CLK</cell>
 <cell>DOUT[4]</cell>
 <cell>6.205</cell>
 <cell></cell>
 <cell>13.479</cell>
 <cell></cell>
 <cell>13.479</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>MON_ANX_0/DOUT[1]:CLK</cell>
 <cell>DOUT[1]</cell>
 <cell>5.869</cell>
 <cell></cell>
 <cell>13.150</cell>
 <cell></cell>
 <cell>13.150</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>MON_ANX_0/DOUT[3]:CLK</cell>
 <cell>DOUT[3]</cell>
 <cell>5.870</cell>
 <cell></cell>
 <cell>13.135</cell>
 <cell></cell>
 <cell>13.135</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>MON_ANX_0/DOUT[8]:CLK</cell>
 <cell>DOUT[8]</cell>
 <cell>5.802</cell>
 <cell></cell>
 <cell>13.095</cell>
 <cell></cell>
 <cell>13.095</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: MON_ANX_0/DOUT[2]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: DOUT[2]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>13.654</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.463</cell>
 <cell>5.463</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>5.662</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>5.839</cell>
 <cell>6</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.607</cell>
 <cell>6.446</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>6.762</cell>
 <cell>31</cell>
 <cell>r</cell>
</row>
<row>
 <cell>MON_ANX_0/DOUT[2]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.549</cell>
 <cell>7.311</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>MON_ANX_0/DOUT[2]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.108</cell>
 <cell>7.419</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>DOUT_obuf[2]/U0/U_IOOUTFF:A</cell>
 <cell>net</cell>
 <cell>DOUT_c[2]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.928</cell>
 <cell>11.347</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>DOUT_obuf[2]/U0/U_IOOUTFF:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOOUTFF_BYPASS</cell>
 <cell>+</cell>
 <cell>0.343</cell>
 <cell>11.690</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>DOUT_obuf[2]/U0/U_IOPAD:D</cell>
 <cell>net</cell>
 <cell>DOUT_obuf[2]/U0/DOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.091</cell>
 <cell>11.781</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>DOUT_obuf[2]/U0/U_IOPAD:PAD</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IOPAD_TRI</cell>
 <cell>+</cell>
 <cell>1.873</cell>
 <cell>13.654</cell>
 <cell>0</cell>
 <cell>f</cell>
</row>
<row>
 <cell>DOUT[2]</cell>
 <cell>net</cell>
 <cell>DOUT[2]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>13.654</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.654</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.463</cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>DOUT[2]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>N/C</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET Register to Asynchronous</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Recovery (ns)</cell>
 <cell>Minimum Period (ns)</cell>
 <cell>Skew (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEOoOI:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEo1IlI/CORETSElll1:ALn</cell>
 <cell>3.676</cell>
 <cell>3.933</cell>
 <cell>10.987</cell>
 <cell>14.920</cell>
 <cell>0.353</cell>
 <cell>4.067</cell>
 <cell>0.038</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEOoOI:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEOlII[0]:ALn</cell>
 <cell>3.676</cell>
 <cell>3.933</cell>
 <cell>10.987</cell>
 <cell>14.920</cell>
 <cell>0.353</cell>
 <cell>4.067</cell>
 <cell>0.038</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEOoOI:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEilIlI[17]:ALn</cell>
 <cell>3.676</cell>
 <cell>3.933</cell>
 <cell>10.987</cell>
 <cell>14.920</cell>
 <cell>0.353</cell>
 <cell>4.067</cell>
 <cell>0.038</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEOoOI:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEllOlI:ALn</cell>
 <cell>3.676</cell>
 <cell>3.933</cell>
 <cell>10.987</cell>
 <cell>14.920</cell>
 <cell>0.353</cell>
 <cell>4.067</cell>
 <cell>0.038</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEOoOI:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEilIlI[13]:ALn</cell>
 <cell>3.676</cell>
 <cell>3.933</cell>
 <cell>10.987</cell>
 <cell>14.920</cell>
 <cell>0.353</cell>
 <cell>4.067</cell>
 <cell>0.038</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEOoOI:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEo1IlI/CORETSElll1:ALn</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.920</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>10.987</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>3.933</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.463</cell>
 <cell>5.463</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>5.662</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>5.839</cell>
 <cell>6</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.607</cell>
 <cell>6.446</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>6.762</cell>
 <cell>31</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEOoOI:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB11_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.549</cell>
 <cell>7.311</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEOoOI:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.108</cell>
 <cell>7.419</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEIoOI:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEOoOI</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.427</cell>
 <cell>7.846</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEIoOI:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.147</cell>
 <cell>7.993</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEIoOI_RNIFU4B:An</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIoOI</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.128</cell>
 <cell>9.121</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElIi0/CORETSEIoOI_RNIFU4B:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.374</cell>
 <cell>9.495</cell>
 <cell>6</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIoOI_RNIFU4B/U0_RGB1_RGB2:An</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIoOI_RNIFU4B/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.606</cell>
 <cell>10.101</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIoOI_RNIFU4B/U0_RGB1_RGB2:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>10.417</cell>
 <cell>24</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEo1IlI/CORETSElll1:ALn</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEoIiII_inst_1/CORETSElIi0/CORETSEIoOI_RNIFU4B/U0_RGB1_RGB2_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.570</cell>
 <cell>10.987</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.987</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.463</cell>
 <cell>13.463</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>13.662</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>13.839</cell>
 <cell>6</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB5:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.607</cell>
 <cell>14.446</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB5:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>14.762</cell>
 <cell>24</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEo1IlI/CORETSElll1:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB5_rgbr_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.511</cell>
 <cell>15.273</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSEOOi0/CORETSEo1IlI/CORETSElll1:ALn</cell>
 <cell>Library recovery time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.353</cell>
 <cell>14.920</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.920</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_0/GL0 to FCCC_2/GL0</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_1/GL0 to FCCC_2/GL0</name>
<text>No Path</text>
</section>
<section>
<name>SET SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1] to FCCC_2/GL0</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1]</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEl1O0I[0]:D</cell>
 <cell>8.336</cell>
 <cell>6.631</cell>
 <cell>8.336</cell>
 <cell>14.967</cell>
 <cell>0.254</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEl1O0I[0]:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.967</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.336</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>6.631</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1]</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_READY[1]</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SERDESIF_075_IP</cell>
 <cell>+</cell>
 <cell>1.015</cell>
 <cell>1.015</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST5:A</cell>
 <cell>net</cell>
 <cell>SERDES_IF2_0_EPCS_3_READY</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.217</cell>
 <cell>4.232</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST5:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>4.577</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST4:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST_net5</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.193</cell>
 <cell>4.770</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST4:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>5.115</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST3:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST_net4</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.306</cell>
 <cell>5.421</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST3:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>5.766</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST2:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST_net3</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.194</cell>
 <cell>5.960</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST2:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>6.305</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST1:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST_net2</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.305</cell>
 <cell>6.610</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST1:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>6.955</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST0:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST_net1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.193</cell>
 <cell>7.148</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST0:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>7.493</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST_net0</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.309</cell>
 <cell>7.802</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>8.147</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEl1O0I[0]:D</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEl1O0I[0]_CFG1D_TEST_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.189</cell>
 <cell>8.336</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.336</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.463</cell>
 <cell>13.463</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>13.662</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>13.840</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB17:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.583</cell>
 <cell>14.423</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB17:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>14.740</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEl1O0I[0]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB17_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.481</cell>
 <cell>15.221</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEl1O0I[0]:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.254</cell>
 <cell>14.967</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>14.967</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET FCCC_3/GL0 to FCCC_2/GL0</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_3/GL1 to FCCC_2/GL0</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain FCCC_3/GL0</name>
<text>Info: The maximum frequency of this clock domain is limited by the minimum pulse widths of pin CORETSE_AHB_0/CORETSEi0ilI/CORETSEI1O0I/CORETSEIIil_CORETSEIIil_0_0/INST_RAM1K18_IP:B_CLK</text>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_0/GL0 to FCCC_3/GL0</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_1/GL0 to FCCC_3/GL0</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_2/GL0 to FCCC_3/GL0</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSEIO1II:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiOI1/CORETSEloI1/CORETSEOooI:D</cell>
 <cell>2.358</cell>
 <cell>7.028</cell>
 <cell>9.676</cell>
 <cell>16.704</cell>
 <cell>0.254</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSEIO1II:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiOI1/CORETSEloI1/CORETSEOooI:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>16.704</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>9.676</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>7.028</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.463</cell>
 <cell>5.463</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>5.662</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>5.840</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB2:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.622</cell>
 <cell>6.462</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB2:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>6.779</cell>
 <cell>13</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSEIO1II:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB2_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.539</cell>
 <cell>7.318</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSEIO1II:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>7.405</cell>
 <cell>3</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1A_TEST:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEIO1II</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.869</cell>
 <cell>8.274</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1A_TEST:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1A_TEST</cell>
 <cell>+</cell>
 <cell>0.074</cell>
 <cell>8.348</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1D_TEST:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1A_TEST_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.307</cell>
 <cell>8.655</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1D_TEST:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>9.000</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1C_TEST:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1D_TEST_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.234</cell>
 <cell>9.234</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1C_TEST:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1C_TEST</cell>
 <cell>+</cell>
 <cell>0.202</cell>
 <cell>9.436</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEiIiII/CORETSEII1II:B</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1C_TEST_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.093</cell>
 <cell>9.529</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEiIiII/CORETSEII1II:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.074</cell>
 <cell>9.603</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiOI1/CORETSEloI1/CORETSEOooI:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEii0I</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.073</cell>
 <cell>9.676</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>9.676</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_3/GL0</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_3/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.991</cell>
 <cell>11.991</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_3/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_3/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>12.190</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_3/GL0_INST:YWn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.177</cell>
 <cell>12.367</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_3/GL0_INST/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>FCCC_3/GL0_INST/U0_YWn</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.582</cell>
 <cell>12.949</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_3/GL0_INST/U0_RGB1:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>13.266</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_3/CCC_INST/IP_INTERFACE_1:A</cell>
 <cell>net</cell>
 <cell>FCCC_3/CLKINT_0_Y</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.407</cell>
 <cell>13.673</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_3/CCC_INST/IP_INTERFACE_1:IPA</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.194</cell>
 <cell>13.867</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_3/CCC_INST/INST_CCC_IP:CLK1</cell>
 <cell>net</cell>
 <cell>FCCC_3/CCC_INST/CLK1_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.043</cell>
 <cell>13.910</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_3/CCC_INST/INST_CCC_IP:GL1</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CCC_IP</cell>
 <cell>+</cell>
 <cell>1.228</cell>
 <cell>15.138</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_3/GL1_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_3/GL1_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.198</cell>
 <cell>15.336</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_3/GL1_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>15.514</cell>
 <cell>29</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_3/GL1_INST/U0_RGB1_RGB22:An</cell>
 <cell>net</cell>
 <cell>FCCC_3/GL1_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.617</cell>
 <cell>16.131</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_3/GL1_INST/U0_RGB1_RGB22:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>16.448</cell>
 <cell>61</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiOI1/CORETSEloI1/CORETSEOooI:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_3/GL1_INST/U0_RGB1_RGB22_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.510</cell>
 <cell>16.958</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiOI1/CORETSEloI1/CORETSEOooI:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.254</cell>
 <cell>16.704</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>16.704</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET FCCC_3/GL1 to FCCC_3/GL0</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain OSC_0/I_RCOSC_25_50MHZ/CLKOUT</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CoreResetP_0/count_sdif0[2]:CLK</cell>
 <cell>CoreResetP_0/release_sdif0_core:EN</cell>
 <cell>2.879</cell>
 <cell>16.751</cell>
 <cell>10.458</cell>
 <cell>27.209</cell>
 <cell>0.335</cell>
 <cell>3.249</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CoreResetP_0/count_sdif0[7]:CLK</cell>
 <cell>CoreResetP_0/release_sdif0_core:EN</cell>
 <cell>2.730</cell>
 <cell>16.888</cell>
 <cell>10.321</cell>
 <cell>27.209</cell>
 <cell>0.335</cell>
 <cell>3.112</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CoreResetP_0/count_sdif0[9]:CLK</cell>
 <cell>CoreResetP_0/release_sdif0_core:EN</cell>
 <cell>2.689</cell>
 <cell>16.929</cell>
 <cell>10.280</cell>
 <cell>27.209</cell>
 <cell>0.335</cell>
 <cell>3.071</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CoreResetP_0/count_sdif0[3]:CLK</cell>
 <cell>CoreResetP_0/release_sdif0_core:EN</cell>
 <cell>2.655</cell>
 <cell>16.963</cell>
 <cell>10.246</cell>
 <cell>27.209</cell>
 <cell>0.335</cell>
 <cell>3.037</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CoreResetP_0/count_sdif0[5]:CLK</cell>
 <cell>CoreResetP_0/release_sdif0_core:EN</cell>
 <cell>2.617</cell>
 <cell>17.001</cell>
 <cell>10.208</cell>
 <cell>27.209</cell>
 <cell>0.335</cell>
 <cell>2.999</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CoreResetP_0/count_sdif0[2]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CoreResetP_0/release_sdif0_core:EN</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>27.209</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>10.458</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>16.751</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ/CLKOUT</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB:A</cell>
 <cell>net</cell>
 <cell>OSC_0/N_RCOSC_25_50MHZ_CLKOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.956</cell>
 <cell>1.956</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RCOSC_25_50MHZ_FAB</cell>
 <cell>+</cell>
 <cell>0.152</cell>
 <cell>2.108</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An</cell>
 <cell>net</cell>
 <cell>OSC_0/N_RCOSC_25_50MHZ_CLKINT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.629</cell>
 <cell>5.737</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.374</cell>
 <cell>6.111</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.610</cell>
 <cell>6.721</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>7.037</cell>
 <cell>22</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/count_sdif0[2]:CLK</cell>
 <cell>net</cell>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.542</cell>
 <cell>7.579</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/count_sdif0[2]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.108</cell>
 <cell>7.687</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CoreResetP_0/release_sdif0_core4_1:D</cell>
 <cell>net</cell>
 <cell>CoreResetP_0/count_sdif0[2]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.699</cell>
 <cell>8.386</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CoreResetP_0/release_sdif0_core4_1:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.315</cell>
 <cell>8.701</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/release_sdif0_core4:A</cell>
 <cell>net</cell>
 <cell>CoreResetP_0/release_sdif0_core4_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.223</cell>
 <cell>8.924</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/release_sdif0_core4:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.143</cell>
 <cell>9.067</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CoreResetP_0/release_sdif0_core:EN</cell>
 <cell>net</cell>
 <cell>CoreResetP_0/release_sdif0_core4</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.391</cell>
 <cell>10.458</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>10.458</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ/CLKOUT</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>20.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB:A</cell>
 <cell>net</cell>
 <cell>OSC_0/N_RCOSC_25_50MHZ_CLKOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.956</cell>
 <cell>21.956</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RCOSC_25_50MHZ_FAB</cell>
 <cell>+</cell>
 <cell>0.152</cell>
 <cell>22.108</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An</cell>
 <cell>net</cell>
 <cell>OSC_0/N_RCOSC_25_50MHZ_CLKINT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.629</cell>
 <cell>25.737</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.374</cell>
 <cell>26.111</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.610</cell>
 <cell>26.721</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>27.037</cell>
 <cell>22</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/release_sdif0_core:CLK</cell>
 <cell>net</cell>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.507</cell>
 <cell>27.544</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/release_sdif0_core:EN</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.335</cell>
 <cell>27.209</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>27.209</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Recovery (ns)</cell>
 <cell>Minimum Period (ns)</cell>
 <cell>Skew (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CoreResetP_0/sdif0_areset_n_rcosc:CLK</cell>
 <cell>CoreResetP_0/release_sdif1_core:ALn</cell>
 <cell>1.130</cell>
 <cell>18.481</cell>
 <cell>8.709</cell>
 <cell>27.190</cell>
 <cell>0.353</cell>
 <cell>1.519</cell>
 <cell>0.036</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CoreResetP_0/sdif0_areset_n_rcosc:CLK</cell>
 <cell>CoreResetP_0/count_sdif0[12]:ALn</cell>
 <cell>1.130</cell>
 <cell>18.481</cell>
 <cell>8.709</cell>
 <cell>27.190</cell>
 <cell>0.353</cell>
 <cell>1.519</cell>
 <cell>0.036</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CoreResetP_0/sdif0_areset_n_rcosc:CLK</cell>
 <cell>CoreResetP_0/release_sdif0_core:ALn</cell>
 <cell>1.130</cell>
 <cell>18.482</cell>
 <cell>8.709</cell>
 <cell>27.191</cell>
 <cell>0.353</cell>
 <cell>1.518</cell>
 <cell>0.035</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CoreResetP_0/sdif0_areset_n_rcosc:CLK</cell>
 <cell>CoreResetP_0/count_sdif0[0]:ALn</cell>
 <cell>1.130</cell>
 <cell>18.490</cell>
 <cell>8.709</cell>
 <cell>27.199</cell>
 <cell>0.353</cell>
 <cell>1.510</cell>
 <cell>0.027</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CoreResetP_0/sm0_areset_n_rcosc:CLK</cell>
 <cell>CoreResetP_0/count_sdif0_enable_q1:ALn</cell>
 <cell>0.968</cell>
 <cell>18.666</cell>
 <cell>8.524</cell>
 <cell>27.190</cell>
 <cell>0.353</cell>
 <cell>1.334</cell>
 <cell>0.013</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CoreResetP_0/sdif0_areset_n_rcosc:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CoreResetP_0/release_sdif1_core:ALn</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>27.190</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>8.709</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>18.481</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ/CLKOUT</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB:A</cell>
 <cell>net</cell>
 <cell>OSC_0/N_RCOSC_25_50MHZ_CLKOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.956</cell>
 <cell>1.956</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RCOSC_25_50MHZ_FAB</cell>
 <cell>+</cell>
 <cell>0.152</cell>
 <cell>2.108</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An</cell>
 <cell>net</cell>
 <cell>OSC_0/N_RCOSC_25_50MHZ_CLKINT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.629</cell>
 <cell>5.737</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.374</cell>
 <cell>6.111</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.610</cell>
 <cell>6.721</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>7.037</cell>
 <cell>22</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/sdif0_areset_n_rcosc:CLK</cell>
 <cell>net</cell>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.542</cell>
 <cell>7.579</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/sdif0_areset_n_rcosc:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>7.666</cell>
 <cell>15</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/release_sdif1_core:ALn</cell>
 <cell>net</cell>
 <cell>CoreResetP_0/sdif0_areset_n_rcosc_0</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.043</cell>
 <cell>8.709</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.709</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ/CLKOUT</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>20.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ:CLKOUT</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>20.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB:A</cell>
 <cell>net</cell>
 <cell>OSC_0/N_RCOSC_25_50MHZ_CLKOUT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.956</cell>
 <cell>21.956</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RCOSC_25_50MHZ_FAB</cell>
 <cell>+</cell>
 <cell>0.152</cell>
 <cell>22.108</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An</cell>
 <cell>net</cell>
 <cell>OSC_0/N_RCOSC_25_50MHZ_CLKINT</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.629</cell>
 <cell>25.737</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.374</cell>
 <cell>26.111</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.610</cell>
 <cell>26.721</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>27.037</cell>
 <cell>22</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/release_sdif1_core:CLK</cell>
 <cell>net</cell>
 <cell>OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.506</cell>
 <cell>27.543</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreResetP_0/release_sdif1_core:ALn</cell>
 <cell>Library recovery time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.353</cell>
 <cell>27.190</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>27.190</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_0/GL0 to OSC_0/I_RCOSC_25_50MHZ/CLKOUT</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain CoreTSE_M2S090_MSS_0/CLK_CONFIG_APB</name>
<text></text>
<section>
<name>SET Register to Register</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
 <cell>Minimum Period (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB</cell>
 <cell>CoreConfigP_0/FIC_2_APB_M_PREADY:EN</cell>
 <cell>2.890</cell>
 <cell>2.006</cell>
 <cell>2.890</cell>
 <cell>4.896</cell>
 <cell>0.335</cell>
 <cell>-2.006</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB</cell>
 <cell>CoreConfigP_0/state[0]:D</cell>
 <cell>2.648</cell>
 <cell>2.340</cell>
 <cell>2.648</cell>
 <cell>4.988</cell>
 <cell>0.254</cell>
 <cell>-2.340</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CoreConfigP_0/psel:CLK</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PSEL</cell>
 <cell>7.084</cell>
 <cell>30.182</cell>
 <cell>12.525</cell>
 <cell>42.707</cell>
 <cell>2.663</cell>
 <cell>19.636</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CoreConfigP_0/SDIF0_PENABLE:CLK</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PENABLE</cell>
 <cell>6.329</cell>
 <cell>32.885</cell>
 <cell>11.770</cell>
 <cell>44.655</cell>
 <cell>0.715</cell>
 <cell>14.230</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CoreConfigP_0/psel:CLK</cell>
 <cell>CoreConfigP_0/FIC_2_APB_M_PRDATA[17]:D</cell>
 <cell>2.722</cell>
 <cell>36.823</cell>
 <cell>8.163</cell>
 <cell>44.986</cell>
 <cell>0.254</cell>
 <cell>6.354</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CoreConfigP_0/FIC_2_APB_M_PREADY:EN</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>4.896</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>2.890</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>2.006</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/CLK_CONFIG_APB</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PENABLE</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:MSS_075_IP</cell>
 <cell>+</cell>
 <cell>0.849</cell>
 <cell>0.849</cell>
 <cell>2</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreConfigP_0/next_state4:A</cell>
 <cell>net</cell>
 <cell>CoreTSE_M2S090_MSS_0_FIC_2_APB_MASTER_PENABLE</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.174</cell>
 <cell>2.023</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreConfigP_0/next_state4:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.143</cell>
 <cell>2.166</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CoreConfigP_0/FIC_2_APB_M_PREADY_RNO:B</cell>
 <cell>net</cell>
 <cell>CoreConfigP_0/next_state4</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.097</cell>
 <cell>2.263</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CoreConfigP_0/FIC_2_APB_M_PREADY_RNO:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>2.350</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CoreConfigP_0/FIC_2_APB_M_PREADY:EN</cell>
 <cell>net</cell>
 <cell>CoreConfigP_0/N_43_i</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.540</cell>
 <cell>2.890</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>2.890</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/CLK_CONFIG_APB</cell>
 <cell>Max Delay Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST_RNIPDL7:An</cell>
 <cell>net</cell>
 <cell>CoreTSE_M2S090_MSS_0/CLK_CONFIG_APB</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>3.409</cell>
 <cell>3.409</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST_RNIPDL7:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.374</cell>
 <cell>3.783</cell>
 <cell>7</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST_RNIPDL7/U0_RGB1:An</cell>
 <cell>net</cell>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST_RNIPDL7/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.608</cell>
 <cell>4.391</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST_RNIPDL7/U0_RGB1:YR</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.316</cell>
 <cell>4.707</cell>
 <cell>12</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreConfigP_0/FIC_2_APB_M_PREADY:CLK</cell>
 <cell>net</cell>
 <cell>CoreTSE_M2S090_MSS_0/MSS_ADLIB_INST_RNIPDL7/U0_RGB1_YR</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.524</cell>
 <cell>5.231</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CoreConfigP_0/FIC_2_APB_M_PREADY:EN</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.335</cell>
 <cell>4.896</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>4.896</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_0/GL0 to CoreTSE_M2S090_MSS_0/CLK_CONFIG_APB</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1]</name>
<text>Info: The maximum frequency of this clock domain is limited by the period of pin SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]</text>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Clock Domain SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]</name>
<text>Info: The maximum frequency of this clock domain is limited by the period of pin SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1]</text>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_2/GL0 to SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[0]:CLK</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[20]</cell>
 <cell>6.146</cell>
 <cell>0.406</cell>
 <cell>13.430</cell>
 <cell>13.836</cell>
 <cell>2.164</cell>
</row>
<row>
 <cell>Path 2</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEl1O0I[8]:CLK</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXVAL[1]</cell>
 <cell>6.016</cell>
 <cell>0.494</cell>
 <cell>13.336</cell>
 <cell>13.830</cell>
 <cell>2.170</cell>
</row>
<row>
 <cell>Path 3</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSEoioII:CLK</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[29]</cell>
 <cell>5.804</cell>
 <cell>0.873</cell>
 <cell>13.085</cell>
 <cell>13.958</cell>
 <cell>2.042</cell>
</row>
<row>
 <cell>Path 4</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSEIO1II:CLK</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[28]</cell>
 <cell>5.593</cell>
 <cell>0.969</cell>
 <cell>12.911</cell>
 <cell>13.880</cell>
 <cell>2.120</cell>
</row>
<row>
 <cell>Path 5</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[5]:CLK</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[25]</cell>
 <cell>5.642</cell>
 <cell>1.035</cell>
 <cell>12.923</cell>
 <cell>13.958</cell>
 <cell>2.042</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[0]:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[20]</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.836</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>13.430</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.406</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.463</cell>
 <cell>5.463</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>5.662</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>5.840</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB0:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.618</cell>
 <cell>6.458</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB0:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>6.775</cell>
 <cell>9</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[0]:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB0_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.509</cell>
 <cell>7.284</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSElioII[0]:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.110</cell>
 <cell>7.394</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElio0/CORETSEI0II[0]:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSElioII[0]_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>1.182</cell>
 <cell>8.576</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEoIiII/CORETSElio0/CORETSEI0II[0]:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG4</cell>
 <cell>+</cell>
 <cell>0.296</cell>
 <cell>8.872</cell>
 <cell>2</cell>
 <cell>f</cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_200:B</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0_TCG[0]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>4.273</cell>
 <cell>13.145</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_200:IPB</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:IP_INTERFACE</cell>
 <cell>+</cell>
 <cell>0.224</cell>
 <cell>13.369</cell>
 <cell>1</cell>
 <cell>f</cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[20]</cell>
 <cell>net</cell>
 <cell>SERDES_IF2_0/SERDESIF_INST/EPCS_TXDATA_net[20]</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.061</cell>
 <cell>13.430</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.430</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]</cell>
 <cell>Multicyle Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>16.000</cell>
 <cell>16.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1]</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>16.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[20]</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SERDESIF_075_IP</cell>
 <cell>-</cell>
 <cell>2.164</cell>
 <cell>13.836</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>13.836</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
</section>
<section>
<name>Clock Domain FCCC_3/GL1</name>
<text>Info: The maximum frequency of this clock domain is limited by the minimum pulse widths of pin CORETSE_AHB_0/CORETSEi0ilI/CORETSEI1O0I/CORETSEIIil_CORETSEIIil_0_0/INST_RAM1K18_IP:B_CLK</text>
<text></text>
<section>
<name>SET Register to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET External Setup</name>
<text>No Path</text>
</section>
<section>
<name>SET Clock to Output</name>
<text>No Path</text>
</section>
<section>
<name>SET Register to Asynchronous</name>
<text>No Path</text>
</section>
<section>
<name>SET External Recovery</name>
<text>No Path</text>
</section>
<section>
<name>SET Asynchronous to Register</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_0/GL0 to FCCC_3/GL1</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_1/GL0 to FCCC_3/GL1</name>
<text>No Path</text>
</section>
<section>
<name>SET FCCC_2/GL0 to FCCC_3/GL1</name>
<table>
<header>
 <cell/>
 <cell>From</cell>
 <cell>To</cell>
 <cell>Delay (ns)</cell>
 <cell>Slack (ns)</cell>
 <cell>Arrival (ns)</cell>
 <cell>Required (ns)</cell>
 <cell>Setup (ns)</cell>
</header>
<row>
 <cell>Path 1</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSEIO1II:CLK</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiOI1/CORETSEloI1/CORETSEOooI:D</cell>
 <cell>2.358</cell>
 <cell>7.028</cell>
 <cell>9.676</cell>
 <cell>16.704</cell>
 <cell>0.254</cell>
</row>
</table>
<text></text>
<section><name>Expanded Path 1</name></section>
<table>
<header>
 <cell>Pin Name</cell>
 <cell>Type</cell>
 <cell>Net Name</cell>
 <cell>Cell Name</cell>
 <cell>Op</cell>
 <cell>Delay (ns)</cell>
 <cell>Total (ns)</cell>
 <cell>Fanout</cell>
 <cell>Edge</cell>
</header>
<row>
 <cell>From: CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSEIO1II:CLK</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>To: CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiOI1/CORETSEloI1/CORETSEOooI:D</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>16.704</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>-</cell>
 <cell></cell>
 <cell>9.676</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>slack</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>7.028</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data arrival time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/CCC_INST/INST_CCC_IP:GL0</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>0.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>5.463</cell>
 <cell>5.463</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.199</cell>
 <cell>5.662</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>5.840</cell>
 <cell>13</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB2:An</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.622</cell>
 <cell>6.462</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB2:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>6.779</cell>
 <cell>13</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSEIO1II:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_2/GL0_INST/U0_RGB1_RGB2_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.539</cell>
 <cell>7.318</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSElIiII/CORETSEIO1II:Q</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>+</cell>
 <cell>0.087</cell>
 <cell>7.405</cell>
 <cell>3</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1A_TEST:A</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEIO1II</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.869</cell>
 <cell>8.274</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1A_TEST:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1A_TEST</cell>
 <cell>+</cell>
 <cell>0.074</cell>
 <cell>8.348</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1D_TEST:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1A_TEST_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.307</cell>
 <cell>8.655</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1D_TEST:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1D_TEST</cell>
 <cell>+</cell>
 <cell>0.345</cell>
 <cell>9.000</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1C_TEST:A</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1D_TEST_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.234</cell>
 <cell>9.234</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1C_TEST:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG1C_TEST</cell>
 <cell>+</cell>
 <cell>0.202</cell>
 <cell>9.436</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEiIiII/CORETSEII1II:B</cell>
 <cell>net</cell>
 <cell>mdr_CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI_CORETSEo1O0I/CORETSEiIiII_inst_2/CORETSEII1II_CFG1C_TEST_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.093</cell>
 <cell>9.529</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEi01lI.CORETSEo1O0I/CORETSEiIiII/CORETSEII1II:Y</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:CFG2</cell>
 <cell>+</cell>
 <cell>0.074</cell>
 <cell>9.603</cell>
 <cell>1</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiOI1/CORETSEloI1/CORETSEOooI:D</cell>
 <cell>net</cell>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEii0I</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.073</cell>
 <cell>9.676</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>data arrival time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>9.676</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
<row>
 <cell>Data required time calculation</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_3/GL1</cell>
 <cell>Clock Constraint</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>8.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_3/CCC_INST/INST_CCC_IP:GL1</cell>
 <cell>Clock source</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.000</cell>
 <cell>8.000</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell></cell>
 <cell>Clock generation</cell>
 <cell></cell>
 <cell></cell>
 <cell>+</cell>
 <cell>7.138</cell>
 <cell>15.138</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>FCCC_3/GL1_INST:An</cell>
 <cell>net</cell>
 <cell>FCCC_3/GL1_net</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.198</cell>
 <cell>15.336</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>FCCC_3/GL1_INST:YEn</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:GBM</cell>
 <cell>+</cell>
 <cell>0.178</cell>
 <cell>15.514</cell>
 <cell>29</cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_3/GL1_INST/U0_RGB1_RGB22:An</cell>
 <cell>net</cell>
 <cell>FCCC_3/GL1_INST/U0_YWn_GEast</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.617</cell>
 <cell>16.131</cell>
 <cell></cell>
 <cell>f</cell>
</row>
<row>
 <cell>FCCC_3/GL1_INST/U0_RGB1_RGB22:YL</cell>
 <cell>cell</cell>
 <cell></cell>
 <cell>ADLIB:RGB</cell>
 <cell>+</cell>
 <cell>0.317</cell>
 <cell>16.448</cell>
 <cell>61</cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiOI1/CORETSEloI1/CORETSEOooI:CLK</cell>
 <cell>net</cell>
 <cell>FCCC_3/GL1_INST/U0_RGB1_RGB22_rgbl_net_1</cell>
 <cell></cell>
 <cell>+</cell>
 <cell>0.510</cell>
 <cell>16.958</cell>
 <cell></cell>
 <cell>r</cell>
</row>
<row>
 <cell>CORETSE_AHB_0/CORETSEi0ilI/CORETSEIoilI/CORETSEioolI/CORETSEiOI1/CORETSEloI1/CORETSEOooI:D</cell>
 <cell>Library setup time</cell>
 <cell></cell>
 <cell>ADLIB:SLE</cell>
 <cell>-</cell>
 <cell>0.254</cell>
 <cell>16.704</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
 <cell>data required time</cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell></cell>
 <cell>16.704</cell>
 <cell></cell>
 <cell></cell>
</row>
<row>
</row>
</table>
</section>
<section>
<name>SET FCCC_3/GL0 to FCCC_3/GL1</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set Pin to Pin</name>
<section>
<name>SET Input to Output</name>
<text>No Path</text>
</section>
</section>
<section>
<name>Path Set User Sets</name>
</section>
</doc>
