Microsemi Corporation - Microsemi Libero Software Release v2021.1 (Version 2021.1.0.17)
|
From |
GB Location |
Net Name |
Fanout |
| 1 |
GB[1] |
(507, 132) |
Demo_sb_0/CCC_0/GL0_INST/U0_YWn_GEast |
257 |
| 2 |
GB[3] |
(509, 132) |
Demo_sb_0/POWER_ON_RESET_N_keep_RNIIUV3/U0_YWn_GEast |
185 |
| 3 |
GB[0] |
(506, 132) |
Demo_sb_0/Demo_sb_MSS_0/FIC_2_APB_M_PRESET_N_keep_RNI21LA/U0_YWn_GEast |
110 |
| 4 |
GB[11] |
(521, 132) |
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNI9FDA/U0_YWn |
109 |
| 5 |
GB[14] |
(524, 132) |
Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast |
30 |
| 6 |
GB[2] |
(508, 132) |
CORESPI_0/USPI/UCC/un1_resetn_tx_RNIPA23/U0_YWn_GEast |
26 |
| 7 |
GB[10] |
(520, 132) |
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base_RNI2J49/U0_YWn_GEast |
25 |
| 8 |
GB[5] |
(511, 132) |
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_RNIEI67/U0_YWn_GEast |
14 |
| 9 |
GB[15] |
(525, 132) |
Demo_sb_0/CORERESETP_0/sdif0_areset_n_RNIL3AD/U0_YWn_GEast |
14 |
| 10 |
GB[4] |
(510, 132) |
FCCC_1/GL0_INST/U0_YWn_GEast |
1 |
| 11 |
GB[6] |
(512, 132) |
FCCC_0/GL0_INST/U0_YWn_GEast |
1 |
| 12 |
GB[7] |
(513, 132) |
FCCC_0/GL1_INST/U0_YWn_GEast |
1 |
|
From |
From Location |
To |
Net Name |
Net Type |
Fanout |
| 1 |
Demo_sb_0/SYSRESET_POR:POWER_ON_RESET_N |
(1020, 8) |
GB[3] |
Demo_sb_0.POWER_ON_RESET_N |
ROUTED |
4 |
| 2 |
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CONFIG_PRESET_N |
(924, 266) |
GB[0] |
Demo_sb_0.Demo_sb_MSS_0.FIC_2_APB_M_PRESET_N |
ROUTED |
2 |
| 3 |
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB |
(924, 266) |
GB[11] |
Demo_sb_0/Demo_sb_MSS_0/CLK_CONFIG_APB |
ROUTED |
1 |
| 4 |
Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT |
(25, 254) |
GB[14] |
Demo_sb_0/FABOSC_0/N_RCOSC_25_50MHZ_CLKINT |
ROUTED |
1 |
| 5 |
CORESPI_0/USPI/UCC/un1_resetn_tx:Y |
(761, 171) |
GB[2] |
CORESPI_0/USPI/UCC/un1_resetn_tx_Z |
ROUTED |
1 |
| 6 |
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base:Q |
(746, 193) |
GB[10] |
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base_0 |
ROUTED |
1 |
| 7 |
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc:Q |
(711, 139) |
GB[5] |
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_0 |
ROUTED |
1 |
| 8 |
Demo_sb_0/CORERESETP_0/sdif0_areset_n:Y |
(745, 192) |
GB[15] |
Demo_sb_0/CORERESETP_0/sm0_areset_n |
ROUTED |
1 |
|
Port Name |
Pin Number |
I/O Function |
From |
From Location |
To (Pin Swapped for Back Annotation Only) |
CCC Location |
Net Name |
Net Type |
Fanout |
| 1 |
CLK0_PAD |
K1 |
MSIOD178PB7/CCC_SW0_CLKI0 |
Demo_sb_0/CCC_0/CLK0_PAD_INST/U_IOPAD:Y |
(3, 64) |
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:CLK0_PAD |
CCC-SW0 (0, 11) |
Demo_sb_0/CCC_0/CLK0_PAD_net |
HARDWIRED |
2 |
| 2 |
- |
- |
- |
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1] |
(12, 2) |
FCCC_1/CCC_INST/INST_CCC_IP:CLK0 |
CCC-SW1 (18, 11) |
SERDES_IF2_0_EPCS_3_TX_CLK |
ROUTED |
1 |
| 3 |
- |
- |
- |
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1] |
(12, 2) |
FCCC_0/CCC_INST/INST_CCC_IP:CLK0 |
CCC-NW1 (18, 254) |
SERDES_IF2_0_EPCS_3_RX_CLK |
ROUTED |
1 |
|
From |
From Location |
Net Name |
Fanout |
|
RGB Location |
RGB Fanout |
| 1 |
GB[1] |
(507, 132) |
Demo_sb_0/CCC_0/GL0_INST/U0_YWn_GEast |
257 |
1 |
(770, 141) |
19 |
|
|
|
|
|
2 |
(770, 144) |
10 |
|
|
|
|
|
3 |
(770, 171) |
1 |
|
|
|
|
|
4 |
(770, 192) |
4 |
|
|
|
|
|
5 |
(770, 195) |
10 |
|
|
|
|
|
6 |
(770, 201) |
20 |
|
|
|
|
|
7 |
(770, 204) |
24 |
|
|
|
|
|
8 |
(770, 207) |
25 |
|
|
|
|
|
9 |
(770, 210) |
75 |
|
|
|
|
|
10 |
(770, 213) |
41 |
|
|
|
|
|
11 |
(770, 216) |
27 |
|
|
|
|
|
12 |
(770, 264) |
1 |
| 2 |
GB[3] |
(509, 132) |
Demo_sb_0/POWER_ON_RESET_N_keep_RNIIUV3/U0_YWn_GEast |
185 |
1 |
(771, 171) |
1 |
|
|
|
|
|
2 |
(771, 195) |
10 |
|
|
|
|
|
3 |
(771, 201) |
18 |
|
|
|
|
|
4 |
(771, 216) |
25 |
|
|
|
|
|
5 |
(772, 204) |
18 |
|
|
|
|
|
6 |
(772, 207) |
18 |
|
|
|
|
|
7 |
(772, 210) |
59 |
|
|
|
|
|
8 |
(772, 213) |
36 |
| 3 |
GB[0] |
(506, 132) |
Demo_sb_0/Demo_sb_MSS_0/FIC_2_APB_M_PRESET_N_keep_RNI21LA/U0_YWn_GEast |
110 |
1 |
(771, 147) |
35 |
|
|
|
|
|
2 |
(771, 168) |
1 |
|
|
|
|
|
3 |
(771, 198) |
24 |
|
|
|
|
|
4 |
(771, 219) |
12 |
|
|
|
|
|
5 |
(773, 141) |
5 |
|
|
|
|
|
6 |
(773, 171) |
12 |
|
|
|
|
|
7 |
(773, 207) |
2 |
|
|
|
|
|
8 |
(773, 216) |
18 |
|
|
|
|
|
9 |
(775, 144) |
1 |
| 4 |
GB[11] |
(521, 132) |
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNI9FDA/U0_YWn |
109 |
|
(254, 0) |
1 |
| 5 |
GB[14] |
(524, 132) |
Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast |
30 |
1 |
(770, 138) |
13 |
|
|
|
|
|
2 |
(773, 144) |
17 |
| 6 |
GB[2] |
(508, 132) |
CORESPI_0/USPI/UCC/un1_resetn_tx_RNIPA23/U0_YWn_GEast |
26 |
1 |
(771, 204) |
6 |
|
|
|
|
|
2 |
(771, 207) |
2 |
|
|
|
|
|
3 |
(771, 210) |
13 |
|
|
|
|
|
4 |
(771, 213) |
5 |
| 7 |
GB[10] |
(520, 132) |
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base_RNI2J49/U0_YWn_GEast |
25 |
1 |
(771, 141) |
19 |
|
|
|
|
|
2 |
(772, 144) |
6 |
| 8 |
GB[5] |
(511, 132) |
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_RNIEI67/U0_YWn_GEast |
14 |
|
(771, 144) |
14 |
| 9 |
GB[15] |
(525, 132) |
Demo_sb_0/CORERESETP_0/sdif0_areset_n_RNIL3AD/U0_YWn_GEast |
14 |
1 |
(771, 138) |
10 |
|
|
|
|
|
2 |
(771, 192) |
2 |
|
|
|
|
|
3 |
(772, 201) |
2 |
| 10 |
GB[4] |
(510, 132) |
FCCC_1/GL0_INST/U0_YWn_GEast |
1 |
|
(770, 234) |
1 |
| 11 |
GB[6] |
(512, 132) |
FCCC_0/GL0_INST/U0_YWn_GEast |
1 |
|
(770, 231) |
1 |
| 12 |
GB[7] |
(513, 132) |
FCCC_0/GL1_INST/U0_YWn_GEast |
1 |
|
(771, 231) |
1 |