pin,slack
CORESPI_0/USPI/UCC/un1_sresetn_10_0_0_a2:A,6723
CORESPI_0/USPI/UCC/un1_sresetn_10_0_0_a2:B,6682
CORESPI_0/USPI/UCC/un1_sresetn_10_0_0_a2:C,3624
CORESPI_0/USPI/UCC/un1_sresetn_10_0_0_a2:Y,3624
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_153:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_153:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_210:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_210:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_61:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_61:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_176:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_176:IPB,
CORESPI_0/USPI/UCON/N_75_i:A,571
CORESPI_0/USPI/UCON/N_75_i:B,2203
CORESPI_0/USPI/UCON/N_75_i:Y,571
CORESPI_0/USPI/UCC/stxs_checkorun:ALn,6056
CORESPI_0/USPI/UCC/stxs_checkorun:CLK,7802
CORESPI_0/USPI/UCC/stxs_checkorun:D,5159
CORESPI_0/USPI/UCC/stxs_checkorun:EN,7726
CORESPI_0/USPI/UCC/stxs_checkorun:Q,7802
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_366:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_366:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_196:B,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_196:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_196:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_353:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_353:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_32:C,8890
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_32:IPC,8890
CORESPI_0/USPI/UCC/mtx_datahold[2]:ALn,
CORESPI_0/USPI/UCC/mtx_datahold[2]:CLK,6944
CORESPI_0/USPI/UCC/mtx_datahold[2]:D,5977
CORESPI_0/USPI/UCC/mtx_datahold[2]:EN,4757
CORESPI_0/USPI/UCC/mtx_datahold[2]:Q,6944
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[3]:A,5082
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[3]:B,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[3]:C,6911
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[3]:D,6821
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[3]:Y,3968
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_171:A,38750
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_171:B,38749
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_171:IPA,38750
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_171:IPB,38749
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[1]:A,5082
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[1]:B,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[1]:C,6911
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[1]:D,6821
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[1]:Y,3968
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_159:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_159:IPB,
CORESPI_0/USPI/UCC/mtx_state_RNITL0P[1]:A,4771
CORESPI_0/USPI/UCC/mtx_state_RNITL0P[1]:B,4681
CORESPI_0/USPI/UCC/mtx_state_RNITL0P[1]:C,4570
CORESPI_0/USPI/UCC/mtx_state_RNITL0P[1]:D,3547
CORESPI_0/USPI/UCC/mtx_state_RNITL0P[1]:Y,3547
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_81:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_81:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_158:A,36351
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_158:B,36182
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_158:IPA,36351
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_158:IPB,36182
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_112:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_112:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_110:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_110:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_350:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_350:IPB,
CORESPI_0/USPI/UCC/spi_clk_count_s[7]:B,7792
CORESPI_0/USPI/UCC/spi_clk_count_s[7]:C,4566
CORESPI_0/USPI/UCC/spi_clk_count_s[7]:FCI,4518
CORESPI_0/USPI/UCC/spi_clk_count_s[7]:S,4518
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc4:A,6082
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc4:B,3896
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc4:C,5967
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc4:Y,3896
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_221:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_221:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_13:C,7314
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_13:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_13:IPC,7314
CORESPI_0/USPI/URXF/empty_out_RNIQ7OE:A,3947
CORESPI_0/USPI/URXF/empty_out_RNIQ7OE:Y,3947
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_212:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_212:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_28:IPENn,
CORESPI_0/USPI/URF/int_raw[5]:ALn,
CORESPI_0/USPI/URF/int_raw[5]:CLK,4489
CORESPI_0/USPI/URF/int_raw[5]:D,2525
CORESPI_0/USPI/URF/int_raw[5]:Q,4489
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_1:IPA,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_28:C,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_28:IPC,
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[4]:A,2242
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[4]:B,3659
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[4]:Y,2242
Demo_sb_0/CORECONFIGP_0/pwdata[31]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[31]:CLK,39190
Demo_sb_0/CORECONFIGP_0/pwdata[31]:D,40590
Demo_sb_0/CORECONFIGP_0/pwdata[31]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[31]:Q,39190
Demo_sb_0/CORECONFIGP_0/pwdata[25]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[25]:CLK,38735
Demo_sb_0/CORECONFIGP_0/pwdata[25]:D,40659
Demo_sb_0/CORECONFIGP_0/pwdata[25]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[25]:Q,38735
CORESPI_0/USPI/URF/control1[3]:ALn,
CORESPI_0/USPI/URF/control1[3]:CLK,3320
CORESPI_0/USPI/URF/control1[3]:D,7334
CORESPI_0/USPI/URF/control1[3]:EN,3607
CORESPI_0/USPI/URF/control1[3]:Q,3320
SERDES_IF2_0/refclk1_inbuf_diff/U_IOPADP:IOUT_P,
SERDES_IF2_0/refclk1_inbuf_diff/U_IOPADP:N2PIN_P,
SERDES_IF2_0/refclk1_inbuf_diff/U_IOPADP:PAD_P,
CORESPI_0/USPI/URF/control2[4]:ALn,
CORESPI_0/USPI/URF/control2[4]:CLK,3659
CORESPI_0/USPI/URF/control2[4]:D,7405
CORESPI_0/USPI/URF/control2[4]:EN,3614
CORESPI_0/USPI/URF/control2[4]:Q,3659
Demo_sb_0/CORERESETP_0/release_sdif1_core_clk_base:ALn,7074
Demo_sb_0/CORERESETP_0/release_sdif1_core_clk_base:CLK,6748
Demo_sb_0/CORERESETP_0/release_sdif1_core_clk_base:D,8867
Demo_sb_0/CORERESETP_0/release_sdif1_core_clk_base:Q,6748
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_299:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_299:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_195:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_195:IPB,
CORESPI_0/USPI/URXF/un1_wr_pointer_q_1.CO0:A,5961
CORESPI_0/USPI/URXF/un1_wr_pointer_q_1.CO0:B,5919
CORESPI_0/USPI/URXF/un1_wr_pointer_q_1.CO0:C,4852
CORESPI_0/USPI/URXF/un1_wr_pointer_q_1.CO0:D,4691
CORESPI_0/USPI/URXF/un1_wr_pointer_q_1.CO0:Y,4691
CORESPI_0/USPI/URF/control1[7]:ALn,
CORESPI_0/USPI/URF/control1[7]:CLK,3651
CORESPI_0/USPI/URF/control1[7]:D,7415
CORESPI_0/USPI/URF/control1[7]:EN,3607
CORESPI_0/USPI/URF/control1[7]:Q,3651
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[5]:A,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[5]:B,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[5]:Y,4944
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_7:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_7:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_76:A,37176
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_76:B,37205
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_76:IPA,37176
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_76:IPB,37205
Demo_sb_0/CORECONFIGP_0/pwdata[4]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[4]:CLK,37319
Demo_sb_0/CORECONFIGP_0/pwdata[4]:D,40534
Demo_sb_0/CORECONFIGP_0/pwdata[4]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[4]:Q,37319
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_16:C,8957
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_16:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_16:IPC,8957
FCCC_1/CCC_INST/IP_INTERFACE_7:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_7:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_131:IPB,
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base_RNI2J49/U0:An,
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base_RNI2J49/U0:YWn,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_157:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_189:IPB,
CORESPI_0/USPI/UTXF/empty_out:ALn,
CORESPI_0/USPI/UTXF/empty_out:CLK,2565
CORESPI_0/USPI/UTXF/empty_out:D,688
CORESPI_0/USPI/UTXF/empty_out:Q,2565
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_79:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_79:IPB,
Demo_sb_0/CORECONFIGP_0/un1_int_sel_0_sqmuxa:A,15915
Demo_sb_0/CORECONFIGP_0/un1_int_sel_0_sqmuxa:B,16872
Demo_sb_0/CORECONFIGP_0/un1_int_sel_0_sqmuxa:Y,15915
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_214:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_214:IPB,
Demo_sb_0/CORERESETP_0/mss_ready_select:ALn,8741
Demo_sb_0/CORERESETP_0/mss_ready_select:CLK,8017
Demo_sb_0/CORERESETP_0/mss_ready_select:EN,7852
Demo_sb_0/CORERESETP_0/mss_ready_select:Q,8017
CORESPI_0/USPI/UCC/stxs_bitsel[2]:ALn,6056
CORESPI_0/USPI/UCC/stxs_bitsel[2]:CLK,4107
CORESPI_0/USPI/UCC/stxs_bitsel[2]:D,4838
CORESPI_0/USPI/UCC/stxs_bitsel[2]:Q,4107
CORESPI_0/USPI/UCC/SYNC1_stxp_dataerr:ALn,
CORESPI_0/USPI/UCC/SYNC1_stxp_dataerr:CLK,8867
CORESPI_0/USPI/UCC/SYNC1_stxp_dataerr:D,8854
CORESPI_0/USPI/UCC/SYNC1_stxp_dataerr:Q,8867
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_8:A,1592
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_8:IPA,1592
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_8:IPB,
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[0]:A,1684
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[0]:B,7824
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[0]:Y,1684
Demo_sb_0/CORERESETP_0/sdif0_areset_n_q1:ALn,6142
Demo_sb_0/CORERESETP_0/sdif0_areset_n_q1:CLK,8867
Demo_sb_0/CORERESETP_0/sdif0_areset_n_q1:Q,8867
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR_RNO:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR_RNO:B,34609
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR_RNO:Y,16991
CORESPI_0/USPI/UCC/stxs_bitsel[1]:ALn,6056
CORESPI_0/USPI/UCC/stxs_bitsel[1]:CLK,4057
CORESPI_0/USPI/UCC/stxs_bitsel[1]:D,4838
CORESPI_0/USPI/UCC/stxs_bitsel[1]:Q,4057
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_178:A,38497
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_178:B,39270
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_178:IPA,38497
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_178:IPB,39270
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[4]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[4]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[4]:D,40534
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[4]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[4]:Q,36887
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_370:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_370:IPB,
GPIO_1_M2F_obuf/U0/U_IOPAD:D,
GPIO_1_M2F_obuf/U0/U_IOPAD:E,
GPIO_1_M2F_obuf/U0/U_IOPAD:PAD,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_45:IPB,
CORESPI_0/USPI/UCC/resetn_rx_s:A,7922
CORESPI_0/USPI/UCC/resetn_rx_s:B,7852
CORESPI_0/USPI/UCC/resetn_rx_s:Y,7852
CORESPI_0/USPI/UCC/mtx_lastframe:ALn,
CORESPI_0/USPI/UCC/mtx_lastframe:CLK,5651
CORESPI_0/USPI/UCC/mtx_lastframe:D,5114
CORESPI_0/USPI/UCC/mtx_lastframe:EN,4763
CORESPI_0/USPI/UCC/mtx_lastframe:Q,5651
GPIO_1_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_1_M2F_obuf/U0/U_IOOUTFF:Y,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[20]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[20]:CLK,37116
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[20]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[20]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[20]:Q,37116
FCCC_0/CCC_INST/IP_INTERFACE_3:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_3:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_3:IPC,
Demo_sb_0/CORECONFIGP_0/pwdata[1]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[1]:CLK,37365
Demo_sb_0/CORECONFIGP_0/pwdata[1]:D,40559
Demo_sb_0/CORECONFIGP_0/pwdata[1]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[1]:Q,37365
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_135:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_135:IPB,
Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/U0:CLKOUT,
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[4]:A,1593
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[4]:B,7824
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[4]:Y,1593
FCCC_0/GL0_INST/U0_RGB1:An,
FCCC_0/GL0_INST/U0_RGB1:YL,
FCCC_0/CCC_INST/IP_INTERFACE_2:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_2:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_2:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_210:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_210:IPB,
SPI_CLK_obuf/U0/U_IOPAD:D,
SPI_CLK_obuf/U0/U_IOPAD:E,
SPI_CLK_obuf/U0/U_IOPAD:PAD,
Demo_sb_0/SYSRESET_POR/INST_SYSRESET_IP:DEVRST_N,
Demo_sb_0/SYSRESET_POR/INST_SYSRESET_IP:POWER_ON_RESET_N,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_24:IPCLKn,
CORESPI_0/USPI/URXF/empty_out_2_1:A,730
CORESPI_0/USPI/URXF/empty_out_2_1:B,682
CORESPI_0/USPI/URXF/empty_out_2_1:C,673
CORESPI_0/USPI/URXF/empty_out_2_1:Y,673
Demo_sb_0/CORERESETP_0/count_sdif0[0]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[0]:CLK,16636
Demo_sb_0/CORERESETP_0/count_sdif0[0]:D,17974
Demo_sb_0/CORERESETP_0/count_sdif0[0]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[0]:Q,16636
CORESPI_0/USPI/URF/int_raw_51_i_a3_i[7]:A,7905
CORESPI_0/USPI/URF/int_raw_51_i_a3_i[7]:B,7926
CORESPI_0/USPI/URF/int_raw_51_i_a3_i[7]:C,2619
CORESPI_0/USPI/URF/int_raw_51_i_a3_i[7]:D,6298
CORESPI_0/USPI/URF/int_raw_51_i_a3_i[7]:Y,2619
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_233:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_233:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_252:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_23:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_111:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_111:IPB,
CORESPI_0/USPI/UTXF/wr_pointer_q_3[4]:A,7958
CORESPI_0/USPI/UTXF/wr_pointer_q_3[4]:B,7903
CORESPI_0/USPI/UTXF/wr_pointer_q_3[4]:C,1594
CORESPI_0/USPI/UTXF/wr_pointer_q_3[4]:D,1509
CORESPI_0/USPI/UTXF/wr_pointer_q_3[4]:Y,1509
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[6]:A,5082
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[6]:B,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[6]:C,6911
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[6]:D,6821
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[6]:Y,3968
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_181:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_140:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_140:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_34:IPB,
CORESPI_0/USPI/UCC/msrxp_alldone_4:A,7964
CORESPI_0/USPI/UCC/msrxp_alldone_4:B,7933
CORESPI_0/USPI/UCC/msrxp_alldone_4:C,7842
CORESPI_0/USPI/UCC/msrxp_alldone_4:D,7786
CORESPI_0/USPI/UCC/msrxp_alldone_4:Y,7786
Demo_sb_0/CORERESETP_0/release_sdif1_core_q1:ALn,7074
Demo_sb_0/CORERESETP_0/release_sdif1_core_q1:CLK,8867
Demo_sb_0/CORERESETP_0/release_sdif1_core_q1:D,4998
Demo_sb_0/CORERESETP_0/release_sdif1_core_q1:Q,8867
Demo_sb_0/CORECONFIGP_0/R_SDIF0_PSEL:A,15409
Demo_sb_0/CORECONFIGP_0/R_SDIF0_PSEL:B,35266
Demo_sb_0/CORECONFIGP_0/R_SDIF0_PSEL:Y,15409
FCCC_0/CCC_INST/IP_INTERFACE_5:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_5:IPC,
CORESPI_0/USPI/UCC/stxs_bitsel_RNO_0[2]:A,6959
CORESPI_0/USPI/UCC/stxs_bitsel_RNO_0[2]:B,4969
CORESPI_0/USPI/UCC/stxs_bitsel_RNO_0[2]:C,6844
CORESPI_0/USPI/UCC/stxs_bitsel_RNO_0[2]:Y,4969
CORESPI_0/USPI/UCC/msrxp_pktend:ALn,
CORESPI_0/USPI/UCC/msrxp_pktend:CLK,8017
CORESPI_0/USPI/UCC/msrxp_pktend:D,7931
CORESPI_0/USPI/UCC/msrxp_pktend:Q,8017
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_227:IPB,
CORESPI_0/USPI/UCC/stxs_strobetx8:A,6028
CORESPI_0/USPI/UCC/stxs_strobetx8:B,5971
CORESPI_0/USPI/UCC/stxs_strobetx8:C,5946
CORESPI_0/USPI/UCC/stxs_strobetx8:D,5812
CORESPI_0/USPI/UCC/stxs_strobetx8:Y,5812
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO[4]:A,7101
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO[4]:B,4890
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO[4]:C,4705
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO[4]:D,1593
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO[4]:Y,1593
CORESPI_0/USPI/URXF/full_out_2_RNO_1:A,5946
CORESPI_0/USPI/URXF/full_out_2_RNO_1:B,5918
CORESPI_0/USPI/URXF/full_out_2_RNO_1:C,4831
CORESPI_0/USPI/URXF/full_out_2_RNO_1:D,4751
CORESPI_0/USPI/URXF/full_out_2_RNO_1:Y,4751
CORESPI_0/USPI/UCC/mtx_datahold[1]:ALn,
CORESPI_0/USPI/UCC/mtx_datahold[1]:CLK,5785
CORESPI_0/USPI/UCC/mtx_datahold[1]:D,5988
CORESPI_0/USPI/UCC/mtx_datahold[1]:EN,4757
CORESPI_0/USPI/UCC/mtx_datahold[1]:Q,5785
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_0:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_0:IPB,
CORESPI_0/USPI/UCC/stxs_strobetx:ALn,6056
CORESPI_0/USPI/UCC/stxs_strobetx:CLK,7882
CORESPI_0/USPI/UCC/stxs_strobetx:D,5159
CORESPI_0/USPI/UCC/stxs_strobetx:EN,7726
CORESPI_0/USPI/UCC/stxs_strobetx:Q,7882
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[22]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[22]:B,34537
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[22]:Y,16991
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc2:A,5989
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc2:B,5906
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc2:C,5847
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc2:D,4707
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc2:Y,4707
CORESPI_0/USPI/URXF/wr_pointer_q_3[3]:A,7951
CORESPI_0/USPI/URXF/wr_pointer_q_3[3]:B,4765
CORESPI_0/USPI/URXF/wr_pointer_q_3[3]:C,4633
CORESPI_0/USPI/URXF/wr_pointer_q_3[3]:Y,4633
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[12]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[12]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[12]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[12]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[12]:Y,36887
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_56:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_56:IPB,
CORESPI_0/USPI/URF/CLK_DIV[0]:ALn,
CORESPI_0/USPI/URF/CLK_DIV[0]:CLK,3524
CORESPI_0/USPI/URF/CLK_DIV[0]:D,7297
CORESPI_0/USPI/URF/CLK_DIV[0]:EN,3484
CORESPI_0/USPI/URF/CLK_DIV[0]:Q,3524
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_22:IPENn,
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2[3]:A,6878
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2[3]:B,6801
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2[3]:C,6662
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2[3]:D,3852
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2[3]:Y,3852
CORESPI_0/USPI/URF/prdata_2[7]:A,3696
CORESPI_0/USPI/URF/prdata_2[7]:B,4774
CORESPI_0/USPI/URF/prdata_2[7]:C,1539
CORESPI_0/USPI/URF/prdata_2[7]:D,1985
CORESPI_0/USPI/URF/prdata_2[7]:Y,1539
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_283:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_283:IPB,
CORESPI_0/USPI/URF/int_raw_1_sqmuxa_0_0:A,3518
CORESPI_0/USPI/URF/int_raw_1_sqmuxa_0_0:B,3508
CORESPI_0/USPI/URF/int_raw_1_sqmuxa_0_0:Y,3508
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_136:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_136:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_283:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_283:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_50:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_28:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_28:IPB,
Demo_sb_0/CORERESETP_0/CONFIG1_DONE_q1:ALn,7074
Demo_sb_0/CORERESETP_0/CONFIG1_DONE_q1:CLK,8867
Demo_sb_0/CORERESETP_0/CONFIG1_DONE_q1:D,
Demo_sb_0/CORERESETP_0/CONFIG1_DONE_q1:Q,8867
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_132:IPA,
CORESPI_0/USPI/URF/prdata_2[6]:A,3749
CORESPI_0/USPI/URF/prdata_2[6]:B,4827
CORESPI_0/USPI/URF/prdata_2[6]:C,1592
CORESPI_0/USPI/URF/prdata_2[6]:D,2038
CORESPI_0/USPI/URF/prdata_2[6]:Y,1592
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_313:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_313:IPB,
CORESPI_0/USPI/URXF/counter_q_RNIQRTM1[4]:A,4344
CORESPI_0/USPI/URXF/counter_q_RNIQRTM1[4]:B,4260
CORESPI_0/USPI/URXF/counter_q_RNIQRTM1[4]:C,4215
CORESPI_0/USPI/URXF/counter_q_RNIQRTM1[4]:D,4131
CORESPI_0/USPI/URXF/counter_q_RNIQRTM1[4]:Y,4131
CORESPI_0/USPI/URF/control1[2]:ALn,
CORESPI_0/USPI/URF/control1[2]:CLK,3383
CORESPI_0/USPI/URF/control1[2]:D,7304
CORESPI_0/USPI/URF/control1[2]:EN,3607
CORESPI_0/USPI/URF/control1[2]:Q,3383
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[0]:A,2265
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[0]:B,3682
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[0]:Y,2265
CORESPI_0/USPI/UCC/stxs_bitsel_6_f0[0]:A,6005
CORESPI_0/USPI/UCC/stxs_bitsel_6_f0[0]:B,7896
CORESPI_0/USPI/UCC/stxs_bitsel_6_f0[0]:C,5003
CORESPI_0/USPI/UCC/stxs_bitsel_6_f0[0]:D,5820
CORESPI_0/USPI/UCC/stxs_bitsel_6_f0[0]:Y,5003
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_359:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_359:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_272:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_272:IPB,
CORESPI_0/USPI/UCC/ssel_rx_q1:ALn,
CORESPI_0/USPI/UCC/ssel_rx_q1:CLK,8867
CORESPI_0/USPI/UCC/ssel_rx_q1:Q,8867
CORESPI_0/USPI/UTXF/data_out_d_0_a2_0_a2[8]:A,4264
CORESPI_0/USPI/UTXF/data_out_d_0_a2_0_a2[8]:B,6987
CORESPI_0/USPI/UTXF/data_out_d_0_a2_0_a2[8]:Y,4264
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_279:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_279:IPB,
Demo_sb_0/CORERESETP_0/release_sdif3_core:ALn,18769
Demo_sb_0/CORERESETP_0/release_sdif3_core:CLK,4998
Demo_sb_0/CORERESETP_0/release_sdif3_core:Q,4998
CORESPI_0/USPI/URF/prdata_2[4]:A,3706
CORESPI_0/USPI/URF/prdata_2[4]:B,4784
CORESPI_0/USPI/URF/prdata_2[4]:C,1549
CORESPI_0/USPI/URF/prdata_2[4]:D,1995
CORESPI_0/USPI/URF/prdata_2[4]:Y,1549
CORESPI_0/USPI/UCC/mtx_pktsel:ALn,
CORESPI_0/USPI/UCC/mtx_pktsel:CLK,8017
CORESPI_0/USPI/UCC/mtx_pktsel:D,5712
CORESPI_0/USPI/UCC/mtx_pktsel:EN,6690
CORESPI_0/USPI/UCC/mtx_pktsel:Q,8017
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_118:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_118:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_310:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_260:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_260:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[22]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[22]:CLK,37208
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[22]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[22]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[22]:Q,37208
Demo_sb_0/CCC_0/GL0_INST/U0_RGB1:An,
Demo_sb_0/CCC_0/GL0_INST/U0_RGB1:YL,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_66:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_66:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_145:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_44:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_44:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_52:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_52:IPB,
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO_0:A,6026
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO_0:B,5971
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO_0:C,4757
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO_0:D,4673
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO_0:Y,4673
CORESPI_0/USPI/URF/prdata_2_6_2_0[7]:A,2231
CORESPI_0/USPI/URF/prdata_2_6_2_0[7]:B,1940
CORESPI_0/USPI/URF/prdata_2_6_2_0[7]:C,4462
CORESPI_0/USPI/URF/prdata_2_6_2_0[7]:D,2596
CORESPI_0/USPI/URF/prdata_2_6_2_0[7]:Y,1940
CORESPI_0/USPI/UCC/stxs_datareg[0]:ALn,6056
CORESPI_0/USPI/UCC/stxs_datareg[0]:CLK,6821
CORESPI_0/USPI/UCC/stxs_datareg[0]:D,5001
CORESPI_0/USPI/UCC/stxs_datareg[0]:EN,5628
CORESPI_0/USPI/UCC/stxs_datareg[0]:Q,6821
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_252:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_252:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_252:IPC,
CORESPI_0/USPI/UCC/un1_resetn_tx_RNIPA23/U0_RGB1:An,
CORESPI_0/USPI/UCC/un1_resetn_tx_RNIPA23/U0_RGB1:YL,6056
SPI_CLK_obuf/U0/U_IOOUTFF:A,
SPI_CLK_obuf/U0/U_IOOUTFF:Y,
Demo_sb_0/CORERESETP_0/sdif0_areset_n:A,
Demo_sb_0/CORERESETP_0/sdif0_areset_n:B,
Demo_sb_0/CORERESETP_0/sdif0_areset_n:Y,
CORESPI_0/USPI/URXF/full_out:ALn,
CORESPI_0/USPI/URXF/full_out:CLK,3880
CORESPI_0/USPI/URXF/full_out:D,571
CORESPI_0/USPI/URXF/full_out:Q,3880
CORESPI_0/USPI/UCC/clock_rx_re:A,5979
CORESPI_0/USPI/UCC/clock_rx_re:B,5887
CORESPI_0/USPI/UCC/clock_rx_re:C,4944
CORESPI_0/USPI/UCC/clock_rx_re:D,5637
CORESPI_0/USPI/UCC/clock_rx_re:Y,4944
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_321:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_321:IPB,
CORESPI_0/USPI/UCC/mtx_first:ALn,
CORESPI_0/USPI/UCC/mtx_first:CLK,8867
CORESPI_0/USPI/UCC/mtx_first:D,5908
CORESPI_0/USPI/UCC/mtx_first:EN,4937
CORESPI_0/USPI/UCC/mtx_first:Q,8867
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_239:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_239:IPB,
Demo_sb_0/CORERESETP_0/sm0_areset_n_rcosc:ALn,
Demo_sb_0/CORERESETP_0/sm0_areset_n_rcosc:CLK,18756
Demo_sb_0/CORERESETP_0/sm0_areset_n_rcosc:D,18868
Demo_sb_0/CORERESETP_0/sm0_areset_n_rcosc:Q,18756
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_15:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_15:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_108:IPA,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_12:CLK,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_12:IPCLKn,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_157:A,36021
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_157:B,35956
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_157:IPA,36021
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_157:IPB,35956
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_215:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_215:IPB,
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[2]:A,5127
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[2]:B,4917
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[2]:C,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[2]:Y,3968
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_105:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_105:IPB,
CORESPI_0/USPI/URXF/un1_counter_q_0_ac0_3:A,5119
CORESPI_0/USPI/URXF/un1_counter_q_0_ac0_3:B,5036
CORESPI_0/USPI/URXF/un1_counter_q_0_ac0_3:C,4977
CORESPI_0/USPI/URXF/un1_counter_q_0_ac0_3:D,3880
CORESPI_0/USPI/URXF/un1_counter_q_0_ac0_3:Y,3880
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_86:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_86:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_5:IPENn,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_162:A,35785
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_162:B,37365
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_162:IPA,35785
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_162:IPB,37365
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_160:A,36412
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_160:B,37971
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_160:IPA,36412
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_160:IPB,37971
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_73:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_73:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_182:IPA,
Demo_sb_0/CORECONFIGP_0/SDIF0_PENABLE:ALn,
Demo_sb_0/CORECONFIGP_0/SDIF0_PENABLE:CLK,18470
Demo_sb_0/CORECONFIGP_0/SDIF0_PENABLE:D,17705
Demo_sb_0/CORECONFIGP_0/SDIF0_PENABLE:Q,18470
CORESPI_0/USPI/UCC/msrxs_datain_0_sqmuxa_1:A,7002
CORESPI_0/USPI/UCC/msrxs_datain_0_sqmuxa_1:B,6925
CORESPI_0/USPI/UCC/msrxs_datain_0_sqmuxa_1:C,4944
CORESPI_0/USPI/UCC/msrxs_datain_0_sqmuxa_1:Y,4944
Demo_sb_0/CORERESETP_0/sm0_areset_n_q1:ALn,6142
Demo_sb_0/CORERESETP_0/sm0_areset_n_q1:CLK,8867
Demo_sb_0/CORERESETP_0/sm0_areset_n_q1:Q,8867
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_254:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_254:IPB,
CORESPI_0/USPI/UCC/spi_data_out_u_1_0:A,
CORESPI_0/USPI/UCC/spi_data_out_u_1_0:B,
CORESPI_0/USPI/UCC/spi_data_out_u_1_0:C,
CORESPI_0/USPI/UCC/spi_data_out_u_1_0:Y,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[18]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[18]:CLK,37166
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[18]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[18]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[18]:Q,37166
CORESPI_0/USPI/UTXF/rd_pointer_d_1_sqmuxa_2_i_0:A,6007
CORESPI_0/USPI/UTXF/rd_pointer_d_1_sqmuxa_2_i_0:B,5950
CORESPI_0/USPI/UTXF/rd_pointer_d_1_sqmuxa_2_i_0:C,4786
CORESPI_0/USPI/UTXF/rd_pointer_d_1_sqmuxa_2_i_0:D,3992
CORESPI_0/USPI/UTXF/rd_pointer_d_1_sqmuxa_2_i_0:Y,3992
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_128:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_128:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:CLK,37205
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[11]:Q,37205
CORESPI_0/USPI/UTXF/un1_data_out_dx_31_RNISPSE2:A,6911
CORESPI_0/USPI/UTXF/un1_data_out_dx_31_RNISPSE2:B,6893
CORESPI_0/USPI/UTXF/un1_data_out_dx_31_RNISPSE2:C,5718
CORESPI_0/USPI/UTXF/un1_data_out_dx_31_RNISPSE2:D,4880
CORESPI_0/USPI/UTXF/un1_data_out_dx_31_RNISPSE2:Y,4880
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_146:IPA,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_35:IPENn,
CORESPI_0/USPI/UCC/mtx_state[1]:ALn,
CORESPI_0/USPI/UCC/mtx_state[1]:CLK,3996
CORESPI_0/USPI/UCC/mtx_state[1]:D,4737
CORESPI_0/USPI/UCC/mtx_state[1]:Q,3996
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_294:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_294:IPB,
CORESPI_0/USPI/UCC/stxs_checkorun_1_sqmuxa:A,5102
CORESPI_0/USPI/UCC/stxs_checkorun_1_sqmuxa:B,5812
CORESPI_0/USPI/UCC/stxs_checkorun_1_sqmuxa:Y,5102
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_146:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_146:IPB,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[11]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[11]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[11]:D,40640
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[11]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[11]:Q,36887
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_q1:ALn,
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_q1:CLK,18868
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_q1:Q,18868
GPIO_3_M2F_obuf/U0/U_IOPAD:D,
GPIO_3_M2F_obuf/U0/U_IOPAD:E,
GPIO_3_M2F_obuf/U0/U_IOPAD:PAD,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_41:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_41:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_250:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_250:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_277:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_277:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[8]:A,34395
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[8]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[8]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[8]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[8]:Y,15915
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc1:A,6940
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc1:B,4798
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc1:C,6818
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc1:Y,4798
CORESPI_0/USPI/UCC/data_rx_q2:ALn,
CORESPI_0/USPI/UCC/data_rx_q2:CLK,6992
CORESPI_0/USPI/UCC/data_rx_q2:D,8867
CORESPI_0/USPI/UCC/data_rx_q2:Q,6992
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_184:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_184:IPB,
Demo_sb_0/CORERESETP_0/next_sdif0_state19:A,5800
Demo_sb_0/CORERESETP_0/next_sdif0_state19:B,5723
Demo_sb_0/CORERESETP_0/next_sdif0_state19:Y,5723
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_0:A,4060
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_0:B,4450
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_0:C,1843
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_0:D,3730
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_0:Y,1843
Demo_sb_0/CORECONFIGP_0/pwdata[9]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[9]:CLK,38395
Demo_sb_0/CORECONFIGP_0/pwdata[9]:D,40641
Demo_sb_0/CORECONFIGP_0/pwdata[9]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[9]:Q,38395
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[7]:A,2231
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[7]:B,3648
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[7]:Y,2231
CORESPI_0/USPI/UCC/stx_async_reset_ok:ALn,
CORESPI_0/USPI/UCC/stx_async_reset_ok:CLK,
CORESPI_0/USPI/UCC/stx_async_reset_ok:D,7858
CORESPI_0/USPI/UCC/stx_async_reset_ok:Q,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_212:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_212:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_17:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_17:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_276:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_276:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_276:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_106:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_106:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_177:A,38431
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_177:B,39178
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_177:IPA,38431
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_177:IPB,39178
CORESPI_0/USPI/URF/control15_1:A,3768
CORESPI_0/USPI/URF/control15_1:B,3750
CORESPI_0/USPI/URF/control15_1:Y,3750
Demo_sb_0/CORECONFIGP_0/int_prdata[0]:A,38733
Demo_sb_0/CORECONFIGP_0/int_prdata[0]:B,38591
Demo_sb_0/CORECONFIGP_0/int_prdata[0]:C,35909
Demo_sb_0/CORECONFIGP_0/int_prdata[0]:D,35890
Demo_sb_0/CORECONFIGP_0/int_prdata[0]:Y,35890
CORESPI_0/USPI/URF/prdata_2_6_2[0]:A,2773
CORESPI_0/USPI/URF/prdata_2_6_2[0]:B,1717
CORESPI_0/USPI/URF/prdata_2_6_2[0]:C,4419
CORESPI_0/USPI/URF/prdata_2_6_2[0]:Y,1717
CORESPI_0/USPI/URXF/un1_rd_pointer_q_1.CO2:A,1806
CORESPI_0/USPI/URXF/un1_rd_pointer_q_1.CO2:B,6997
CORESPI_0/USPI/URXF/un1_rd_pointer_q_1.CO2:C,3882
CORESPI_0/USPI/URXF/un1_rd_pointer_q_1.CO2:Y,1806
CORESPI_0/USPI/UCC/spi_clk_count_cry[3]:B,7759
CORESPI_0/USPI/UCC/spi_clk_count_cry[3]:C,4566
CORESPI_0/USPI/UCC/spi_clk_count_cry[3]:FCI,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[3]:FCO,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[3]:S,4566
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB,
CORESPI_0/USPI/URXF/full_out_2_RNO:A,4206
CORESPI_0/USPI/URXF/full_out_2_RNO:B,1679
CORESPI_0/USPI/URXF/full_out_2_RNO:C,6836
CORESPI_0/USPI/URXF/full_out_2_RNO:D,4751
CORESPI_0/USPI/URXF/full_out_2_RNO:Y,1679
SPISDI_ibuf/U0/U_IOPAD:PAD,
SPISDI_ibuf/U0/U_IOPAD:Y,
Demo_sb_0/CORECONFIGP_0/int_sel_0_sqmuxa:A,35986
Demo_sb_0/CORECONFIGP_0/int_sel_0_sqmuxa:B,35907
Demo_sb_0/CORECONFIGP_0/int_sel_0_sqmuxa:C,15915
Demo_sb_0/CORECONFIGP_0/int_sel_0_sqmuxa:Y,15915
FCCC_1/CCC_INST/IP_INTERFACE_10:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_10:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_249:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_249:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_2:A,4120
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_2:B,4488
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_2:C,1928
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_2:D,3790
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_2:Y,1928
CORESPI_0/USPI/URXF/wr_pointer_q[2]:ALn,
CORESPI_0/USPI/URXF/wr_pointer_q[2]:CLK,5740
CORESPI_0/USPI/URXF/wr_pointer_q[2]:D,4532
CORESPI_0/USPI/URXF/wr_pointer_q[2]:Q,5740
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_115:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_115:IPB,
CORESPI_0/USPI/URXF/un1_wr_pointer_d_1_sqmuxa:A,6878
CORESPI_0/USPI/URXF/un1_wr_pointer_d_1_sqmuxa:B,6738
CORESPI_0/USPI/URXF/un1_wr_pointer_d_1_sqmuxa:C,6657
CORESPI_0/USPI/URXF/un1_wr_pointer_d_1_sqmuxa:D,4532
CORESPI_0/USPI/URXF/un1_wr_pointer_d_1_sqmuxa:Y,4532
GPIO_8_M2F_obuf/U0/U_IOENFF:A,
GPIO_8_M2F_obuf/U0/U_IOENFF:Y,
CORESPI_0/USPI/UCC/SYNC1_stxp_strobetx:ALn,
CORESPI_0/USPI/UCC/SYNC1_stxp_strobetx:CLK,8867
CORESPI_0/USPI/UCC/SYNC1_stxp_strobetx:D,8860
CORESPI_0/USPI/UCC/SYNC1_stxp_strobetx:Q,8867
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_17:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_17:IPB,
CORESPI_0/USPI/UCC/spi_clk_count_cry[4]:B,7775
CORESPI_0/USPI/UCC/spi_clk_count_cry[4]:C,4566
CORESPI_0/USPI/UCC/spi_clk_count_cry[4]:FCI,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[4]:FCO,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[4]:S,4566
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_74:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_74:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_332:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_332:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_296:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_296:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_27:C,687
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_27:IPC,687
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_161:A,36414
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_161:B,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_161:IPA,36414
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_161:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_60:IPA,
Demo_sb_0/CORERESETP_0/count_sdif0[10]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[10]:CLK,17792
Demo_sb_0/CORERESETP_0/count_sdif0[10]:D,17658
Demo_sb_0/CORERESETP_0/count_sdif0[10]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[10]:Q,17792
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_209:A,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_209:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_209:IPB,
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[2]:A,5082
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[2]:B,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[2]:C,6911
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[2]:D,6821
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[2]:Y,3968
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[5]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[5]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[5]:D,40655
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[5]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[5]:Q,36887
Demo_sb_0/CORECONFIGP_0/SDIF0_PENABLE_2:A,17705
Demo_sb_0/CORECONFIGP_0/SDIF0_PENABLE_2:B,17861
Demo_sb_0/CORECONFIGP_0/SDIF0_PENABLE_2:Y,17705
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[12]:A,34494
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[12]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[12]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[12]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[12]:Y,15915
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_6:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_6:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_70:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_79:A,37205
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_79:B,37116
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_79:IPA,37205
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_79:IPB,37116
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_98:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_62:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_319:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_319:IPB,
MUX4_4_0/SPI_CLK:A,
MUX4_4_0/SPI_CLK:B,
MUX4_4_0/SPI_CLK:C,
MUX4_4_0/SPI_CLK:Y,
CORESPI_0/USPI/URXF/rd_pointer_q[0]:ALn,
CORESPI_0/USPI/URXF/rd_pointer_q[0]:CLK,1291
CORESPI_0/USPI/URXF/rd_pointer_q[0]:D,1623
CORESPI_0/USPI/URXF/rd_pointer_q[0]:Q,1291
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_87:A,37237
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_87:IPA,37237
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_87:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[5]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[5]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[5]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[5]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[5]:Y,36887
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[5]:A,5111
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[5]:B,4917
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[5]:C,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[5]:Y,3968
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_159:A,35954
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_159:B,36744
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_159:IPA,35954
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_159:IPB,36744
CORESPI_0/USPI/UCC/SYNC1_msrxp_strobe:ALn,
CORESPI_0/USPI/UCC/SYNC1_msrxp_strobe:CLK,8867
CORESPI_0/USPI/UCC/SYNC1_msrxp_strobe:D,8867
CORESPI_0/USPI/UCC/SYNC1_msrxp_strobe:Q,8867
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_173:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_173:IPB,
CORESPI_0/USPI/UTXF/rd_pointer_q[3]:ALn,
CORESPI_0/USPI/UTXF/rd_pointer_q[3]:CLK,3016
CORESPI_0/USPI/UTXF/rd_pointer_q[3]:D,3992
CORESPI_0/USPI/UTXF/rd_pointer_q[3]:Q,3016
CORESPI_0/USPI/UCC/stxs_bitsel_RNO[2]:A,7958
CORESPI_0/USPI/UCC/stxs_bitsel_RNO[2]:B,5951
CORESPI_0/USPI/UCC/stxs_bitsel_RNO[2]:C,4969
CORESPI_0/USPI/UCC/stxs_bitsel_RNO[2]:D,4838
CORESPI_0/USPI/UCC/stxs_bitsel_RNO[2]:Y,4838
FCCC_0/CCC_INST/IP_INTERFACE_9:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_9:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_9:IPC,
CORESPI_0/USPI/UCC/mtx_firstrx:ALn,
CORESPI_0/USPI/UCC/mtx_firstrx:CLK,7889
CORESPI_0/USPI/UCC/mtx_firstrx:D,8867
CORESPI_0/USPI/UCC/mtx_firstrx:Q,7889
CORESPI_0/USPI/UCC/msrxs_shiftreg[6]:ALn,
CORESPI_0/USPI/UCC/msrxs_shiftreg[6]:CLK,8867
CORESPI_0/USPI/UCC/msrxs_shiftreg[6]:D,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg[6]:EN,6849
CORESPI_0/USPI/UCC/msrxs_shiftreg[6]:Q,8867
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_3:IPC,
GPIO_0_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_0_M2F_obuf/U0/U_IOOUTFF:Y,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_8:IPENn,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_255:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_255:IPB,
CORESPI_0/USPI/URXF/full_out_2:A,1723
CORESPI_0/USPI/URXF/full_out_2:B,1679
CORESPI_0/USPI/URXF/full_out_2:C,571
CORESPI_0/USPI/URXF/full_out_2:D,1507
CORESPI_0/USPI/URXF/full_out_2:Y,571
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_m2[2]:A,6804
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_m2[2]:B,4799
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_m2[2]:C,6808
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_m2[2]:Y,4799
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_11:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_3:A,4085
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_3:B,4445
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_3:C,1549
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_3:D,3755
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_3:Y,1549
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_363:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_363:IPB,
CORESPI_0/USPI/URF/prdata_2_5[1]:A,1993
CORESPI_0/USPI/URF/prdata_2_5[1]:B,4366
CORESPI_0/USPI/URF/prdata_2_5[1]:C,2556
CORESPI_0/USPI/URF/prdata_2_5[1]:Y,1993
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_117:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_117:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_104:A,9981
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_104:IPA,9981
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_104:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_168:B,38337
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_168:IPB,38337
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_179:IPB,
CORESPI_0/USPI/URF/control1[4]:ALn,
CORESPI_0/USPI/URF/control1[4]:CLK,3337
CORESPI_0/USPI/URF/control1[4]:D,7405
CORESPI_0/USPI/URF/control1[4]:EN,3607
CORESPI_0/USPI/URF/control1[4]:Q,3337
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_360:IPA,
CORESPI_0/USPI/URF/clr_rxfifo_5_0_a3_0_a2_1:A,5641
CORESPI_0/USPI/URF/clr_rxfifo_5_0_a3_0_a2_1:B,5579
CORESPI_0/USPI/URF/clr_rxfifo_5_0_a3_0_a2_1:C,5272
CORESPI_0/USPI/URF/clr_rxfifo_5_0_a3_0_a2_1:D,4492
CORESPI_0/USPI/URF/clr_rxfifo_5_0_a3_0_a2_1:Y,4492
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_53:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_53:IPB,
Demo_sb_0/CORERESETP_0/count_sdif0_s_250:B,17626
Demo_sb_0/CORERESETP_0/count_sdif0_s_250:FCO,17626
CORESPI_0/USPI/URF/int_raw_45[5]:A,8017
CORESPI_0/USPI/URF/int_raw_45[5]:B,7926
CORESPI_0/USPI/URF/int_raw_45[5]:C,6385
CORESPI_0/USPI/URF/int_raw_45[5]:D,2525
CORESPI_0/USPI/URF/int_raw_45[5]:Y,2525
CORESPI_0/USPI/URF/int_raw[6]:ALn,
CORESPI_0/USPI/URF/int_raw[6]:CLK,4519
CORESPI_0/USPI/URF/int_raw[6]:D,2619
CORESPI_0/USPI/URF/int_raw[6]:Q,4519
CORESPI_0/USPI/URF/int_raw_48[6]:A,7905
CORESPI_0/USPI/URF/int_raw_48[6]:B,7926
CORESPI_0/USPI/URF/int_raw_48[6]:C,2619
CORESPI_0/USPI/URF/int_raw_48[6]:D,6289
CORESPI_0/USPI/URF/int_raw_48[6]:Y,2619
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_193:IPA,
CORESPI_0/USPI/un1_PADDR_0_a2_0_a2:A,2353
CORESPI_0/USPI/un1_PADDR_0_a2_0_a2:B,2380
CORESPI_0/USPI/un1_PADDR_0_a2_0_a2:C,1423
CORESPI_0/USPI/un1_PADDR_0_a2_0_a2:D,1964
CORESPI_0/USPI/un1_PADDR_0_a2_0_a2:Y,1423
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_342:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_342:IPB,
Demo_sb_0/CORERESETP_0/count_sdif0_RNO[0]:A,17974
Demo_sb_0/CORERESETP_0/count_sdif0_RNO[0]:Y,17974
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[26]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[26]:B,34490
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[26]:Y,16991
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_34:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_34:IPC,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[14]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[14]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[14]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[14]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[14]:Y,36887
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_234:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_234:IPB,
CORESPI_0/USPI/URF/prdata_2[1]:A,3681
CORESPI_0/USPI/URF/prdata_2[1]:B,4759
CORESPI_0/USPI/URF/prdata_2[1]:C,1843
CORESPI_0/USPI/URF/prdata_2[1]:D,1970
CORESPI_0/USPI/URF/prdata_2[1]:Y,1843
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_28:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_28:IPB,
Demo_sb_0/CORERESETP_0/sm0_state[3]:ALn,7074
Demo_sb_0/CORERESETP_0/sm0_state[3]:CLK,8010
Demo_sb_0/CORERESETP_0/sm0_state[3]:D,7786
Demo_sb_0/CORERESETP_0/sm0_state[3]:Q,8010
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_13:C,8890
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_13:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_13:IPC,8890
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_124:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_124:IPB,
Demo_sb_0/CORERESETP_0/release_sdif0_core6_7:A,16983
Demo_sb_0/CORERESETP_0/release_sdif0_core6_7:B,16906
Demo_sb_0/CORERESETP_0/release_sdif0_core6_7:C,16861
Demo_sb_0/CORERESETP_0/release_sdif0_core6_7:D,16783
Demo_sb_0/CORERESETP_0/release_sdif0_core6_7:Y,16783
CORESPI_0/USPI/UCC/spi_clk_count_cry[1]:B,7727
CORESPI_0/USPI/UCC/spi_clk_count_cry[1]:C,4534
CORESPI_0/USPI/UCC/spi_clk_count_cry[1]:FCI,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[1]:FCO,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[1]:S,4566
CORESPI_0/USPI/URF/clr_txfifo:ALn,
CORESPI_0/USPI/URF/clr_txfifo:CLK,3935
CORESPI_0/USPI/URF/clr_txfifo:D,3703
CORESPI_0/USPI/URF/clr_txfifo:Q,3935
CORESPI_0/USPI/URF/prdata_2_6_2[6]:A,4564
CORESPI_0/USPI/URF/prdata_2_6_2[6]:B,2734
CORESPI_0/USPI/URF/prdata_2_6_2[6]:C,1592
CORESPI_0/USPI/URF/prdata_2_6_2[6]:Y,1592
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_179:A,38496
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_179:B,38688
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_179:IPA,38496
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_179:IPB,38688
Demo_sb_0/CORERESETP_0/sdif1_areset_n_rcosc:ALn,
Demo_sb_0/CORERESETP_0/sdif1_areset_n_rcosc:CLK,18769
Demo_sb_0/CORERESETP_0/sdif1_areset_n_rcosc:D,18868
Demo_sb_0/CORERESETP_0/sdif1_areset_n_rcosc:Q,18769
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[1]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[1]:CLK,35928
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[1]:D,40559
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[1]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[1]:Q,35928
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0_RNO:A,3882
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0_RNO:B,6544
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0_RNO:C,4485
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0_RNO:Y,3882
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_2_RNIO0F42:A,6410
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_2_RNIO0F42:B,6332
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_2_RNIO0F42:C,3562
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_2_RNIO0F42:D,5054
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_2_RNIO0F42:Y,3562
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:CLK,37176
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[7]:Q,37176
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_302:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_302:IPB,
Demo_sb_0/CORECONFIGP_0/control_reg_15:A,39672
Demo_sb_0/CORECONFIGP_0/control_reg_15:B,16893
Demo_sb_0/CORECONFIGP_0/control_reg_15:C,38411
Demo_sb_0/CORECONFIGP_0/control_reg_15:D,39458
Demo_sb_0/CORECONFIGP_0/control_reg_15:Y,16893
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_249:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_249:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_177:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_177:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_138:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_138:IPB,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg5:A,39573
Demo_sb_0/CORECONFIGP_0/soft_reset_reg5:B,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg5:C,38312
Demo_sb_0/CORECONFIGP_0/soft_reset_reg5:D,39359
Demo_sb_0/CORECONFIGP_0/soft_reset_reg5:Y,16794
CORESPI_0/USPI/UCC/stxs_datareg_RNO[0]:A,5001
CORESPI_0/USPI/UCC/stxs_datareg_RNO[0]:B,5036
CORESPI_0/USPI/UCC/stxs_datareg_RNO[0]:Y,5001
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_30:C,697
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_30:IPC,697
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_161:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_161:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:CLK,37215
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[9]:Q,37215
CORESPI_0/USPI/URXF/wr_pointer_q_3[2]:A,7944
CORESPI_0/USPI/URXF/wr_pointer_q_3[2]:B,7896
CORESPI_0/USPI/URXF/wr_pointer_q_3[2]:C,5683
CORESPI_0/USPI/URXF/wr_pointer_q_3[2]:D,4532
CORESPI_0/USPI/URXF/wr_pointer_q_3[2]:Y,4532
CORESPI_0/USPI/URF/clr_txfifo_5_0_a3_0_a2:A,4492
CORESPI_0/USPI/URF/clr_txfifo_5_0_a3_0_a2:B,3703
CORESPI_0/USPI/URF/clr_txfifo_5_0_a3_0_a2:C,6341
CORESPI_0/USPI/URF/clr_txfifo_5_0_a3_0_a2:Y,3703
CORESPI_0/USPI/UCC/stxs_datareg[4]:ALn,6056
CORESPI_0/USPI/UCC/stxs_datareg[4]:CLK,6821
CORESPI_0/USPI/UCC/stxs_datareg[4]:D,3968
CORESPI_0/USPI/UCC/stxs_datareg[4]:EN,5628
CORESPI_0/USPI/UCC/stxs_datareg[4]:Q,6821
Demo_sb_0/CORERESETP_0/sm0_state[0]:ALn,7074
Demo_sb_0/CORERESETP_0/sm0_state[0]:CLK,8867
Demo_sb_0/CORERESETP_0/sm0_state[0]:Q,8867
Demo_sb_0/CORERESETP_0/ddr_settled_q1:ALn,7074
Demo_sb_0/CORERESETP_0/ddr_settled_q1:CLK,8867
Demo_sb_0/CORERESETP_0/ddr_settled_q1:D,4998
Demo_sb_0/CORERESETP_0/ddr_settled_q1:Q,8867
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_253:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_58:IPB,
CORESPI_0/USPI/UCC/msrxs_shiftreg[5]:ALn,
CORESPI_0/USPI/UCC/msrxs_shiftreg[5]:CLK,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg[5]:D,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg[5]:EN,6849
CORESPI_0/USPI/UCC/msrxs_shiftreg[5]:Q,7926
FCCC_0/CCC_INST/IP_INTERFACE_10:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_10:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_6:IPC,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_17:C,7499
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_17:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_17:IPC,7499
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_155:IPB,
CORESPI_0/USPI/UTXF/rd_pointer_q[4]:ALn,
CORESPI_0/USPI/UTXF/rd_pointer_q[4]:CLK,3024
CORESPI_0/USPI/UTXF/rd_pointer_q[4]:D,3992
CORESPI_0/USPI/UTXF/rd_pointer_q[4]:Q,3024
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_46:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[11]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[11]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[11]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[11]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[11]:Y,36887
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[1]:A,4890
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[1]:B,3547
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[1]:C,7789
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[1]:D,7689
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[1]:Y,3547
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_4:A,4099
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_4:B,4462
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_4:C,1563
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_4:D,3769
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_4:Y,1563
CORESPI_0/USPI/SPISS[0]:A,
CORESPI_0/USPI/SPISS[0]:B,
CORESPI_0/USPI/SPISS[0]:C,
CORESPI_0/USPI/SPISS[0]:D,
CORESPI_0/USPI/SPISS[0]:Y,
Demo_sb_0/CORERESETP_0/SOFT_RESET_F2M_keep_RNIL3Q6:A,
Demo_sb_0/CORERESETP_0/SOFT_RESET_F2M_keep_RNIL3Q6:Y,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_30:IPENn,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_125:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_125:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_236:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_236:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_6:IPC,
CORESPI_0/USPI/UTXF/counter_q_RNI7N5A2[4]:A,5920
CORESPI_0/USPI/UTXF/counter_q_RNI7N5A2[4]:B,5839
CORESPI_0/USPI/UTXF/counter_q_RNI7N5A2[4]:C,4780
CORESPI_0/USPI/UTXF/counter_q_RNI7N5A2[4]:D,3440
CORESPI_0/USPI/UTXF/counter_q_RNI7N5A2[4]:Y,3440
Demo_sb_0/Demo_sb_MSS_0/FIC_2_APB_M_PRESET_N_keep_RNI21LA/U0:An,
Demo_sb_0/Demo_sb_MSS_0/FIC_2_APB_M_PRESET_N_keep_RNI21LA/U0:YWn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:CLK,37205
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[17]:Q,37205
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_262:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[29]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[29]:CLK,39270
Demo_sb_0/CORECONFIGP_0/pwdata[29]:D,40636
Demo_sb_0/CORECONFIGP_0/pwdata[29]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[29]:Q,39270
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2:A,1590
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2:B,1506
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2:C,1563
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2:D,1435
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2:Y,1435
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_3:IPA,
Demo_sb_0/CORECONFIGP_0/int_prdata_0[0]:A,37609
Demo_sb_0/CORECONFIGP_0/int_prdata_0[0]:B,35941
Demo_sb_0/CORECONFIGP_0/int_prdata_0[0]:C,35890
Demo_sb_0/CORECONFIGP_0/int_prdata_0[0]:Y,35890
CORESPI_0/USPI/UCC/stxs_bitcnt_n1:A,7938
CORESPI_0/USPI/UCC/stxs_bitcnt_n1:B,7883
CORESPI_0/USPI/UCC/stxs_bitcnt_n1:C,5920
CORESPI_0/USPI/UCC/stxs_bitcnt_n1:Y,5920
CORESPI_0/USPI/UCC/msrxs_first:ALn,
CORESPI_0/USPI/UCC/msrxs_first:CLK,8976
CORESPI_0/USPI/UCC/msrxs_first:D,7817
CORESPI_0/USPI/UCC/msrxs_first:EN,5765
CORESPI_0/USPI/UCC/msrxs_first:Q,8976
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_201:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_201:IPB,
CORESPI_0/USPI/URF/prdata_2_sn_m10:A,3754
CORESPI_0/USPI/URF/prdata_2_sn_m10:B,3442
CORESPI_0/USPI/URF/prdata_2_sn_m10:C,3646
CORESPI_0/USPI/URF/prdata_2_sn_m10:D,3549
CORESPI_0/USPI/URF/prdata_2_sn_m10:Y,3442
CORESPI_0/USPI/URXF/counter_q[4]:ALn,
CORESPI_0/USPI/URXF/counter_q[4]:CLK,4344
CORESPI_0/USPI/URXF/counter_q[4]:D,2606
CORESPI_0/USPI/URXF/counter_q[4]:Q,4344
CORESPI_0/USPI/URXF/counter_q[2]:ALn,
CORESPI_0/USPI/URXF/counter_q[2]:CLK,4215
CORESPI_0/USPI/URXF/counter_q[2]:D,2600
CORESPI_0/USPI/URXF/counter_q[2]:Q,4215
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_39:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_39:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_244:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_244:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_263:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_263:IPB,
CORESPI_0/USPI/UCC/rx_cmdsize_4_RNO_0:A,6881
CORESPI_0/USPI/UCC/rx_cmdsize_4_RNO_0:B,6804
CORESPI_0/USPI/UCC/rx_cmdsize_4_RNO_0:C,6746
CORESPI_0/USPI/UCC/rx_cmdsize_4_RNO_0:D,6631
CORESPI_0/USPI/UCC/rx_cmdsize_4_RNO_0:Y,6631
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_26:IPA,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_35:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_35:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_188:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_337:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_337:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_281:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_281:IPB,
CORESPI_0/USPI/URXF/wr_pointer_q_3[1]:A,7960
CORESPI_0/USPI/URXF/wr_pointer_q_3[1]:B,5773
CORESPI_0/USPI/URXF/wr_pointer_q_3[1]:C,4649
CORESPI_0/USPI/URXF/wr_pointer_q_3[1]:Y,4649
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[0],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[1],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[2],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[3],1291
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[4],1102
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[5],1024
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[6],687
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[7],697
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[8],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[9],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR_ARST_N,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR_CLK,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR_EN,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR_SRST_N,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_BLK[0],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_BLK[1],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[0],687
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[1],4483
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[2],4450
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[3],4113
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[4],4488
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[5],4445
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[6],4462
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[7],4463
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[8],4499
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT_ARST_N,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT_CLK,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT_EN,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT_SRST_N,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[0],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[1],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[2],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[3],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[4],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[5],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[6],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[7],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[8],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[9],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR_ARST_N,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR_CLK,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR_EN,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR_SRST_N,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_BLK[0],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_BLK[1],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_DOUT_ARST_N,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_DOUT_CLK,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_DOUT_EN,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_DOUT_SRST_N,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[0],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[1],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[2],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[3],9013
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[4],8901
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[5],8911
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[6],8901
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[7],8890
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[8],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[9],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ARST_N,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_BLK[0],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_BLK[1],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_CLK,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[0],8976
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[10],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[11],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[12],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[13],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[14],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[15],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[16],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[17],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[1],8890
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[2],8911
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[3],8918
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[4],8957
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[5],8960
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[6],8961
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[7],8965
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[8],8966
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[9],
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_WEN,7766
CORESPI_0/USPI/UCC/clk_div_val_reg[6]:ALn,
CORESPI_0/USPI/UCC/clk_div_val_reg[6]:CLK,4872
CORESPI_0/USPI/UCC/clk_div_val_reg[6]:D,8860
CORESPI_0/USPI/UCC/clk_div_val_reg[6]:EN,7753
CORESPI_0/USPI/UCC/clk_div_val_reg[6]:Q,4872
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_221:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_221:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_6:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_6:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_247:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_247:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_295:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_295:IPB,
GPIO_5_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_5_M2F_obuf/U0/U_IOOUTFF:Y,
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0[0]:A,7984
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0[0]:B,7824
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0[0]:C,6840
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0[0]:D,4786
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0[0]:Y,4786
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_273:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_273:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_119:IPA,
MUX4_4_0/SPI_DO:A,
MUX4_4_0/SPI_DO:B,
MUX4_4_0/SPI_DO:C,
MUX4_4_0/SPI_DO:Y,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_204:B,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_204:IPB,
Demo_sb_0/CORERESETP_0/count_sdif0[1]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[1]:CLK,16720
Demo_sb_0/CORERESETP_0/count_sdif0[1]:D,17808
Demo_sb_0/CORERESETP_0/count_sdif0[1]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[1]:Q,16720
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[6]:A,2288
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[6]:B,3705
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[6]:Y,2288
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_31:C,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_31:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_246:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_246:IPB,
CORESPI_0/USPI/URF/int_raw[1]:ALn,
CORESPI_0/USPI/URF/int_raw[1]:CLK,4565
CORESPI_0/USPI/URF/int_raw[1]:D,2525
CORESPI_0/USPI/URF/int_raw[1]:Q,4565
CORESPI_0/USPI/UCC/mtx_state_RNO[1]:A,7997
CORESPI_0/USPI/UCC/mtx_state_RNO[1]:B,7834
CORESPI_0/USPI/UCC/mtx_state_RNO[1]:C,6841
CORESPI_0/USPI/UCC/mtx_state_RNO[1]:D,4737
CORESPI_0/USPI/UCC/mtx_state_RNO[1]:Y,4737
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_1:IPCLKn,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_126:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_126:IPB,
CORESPI_0/USPI/UCC/stxs_bitcnt_RNO[0]:A,6138
CORESPI_0/USPI/UCC/stxs_bitcnt_RNO[0]:B,5957
CORESPI_0/USPI/UCC/stxs_bitcnt_RNO[0]:C,7809
CORESPI_0/USPI/UCC/stxs_bitcnt_RNO[0]:D,7645
CORESPI_0/USPI/UCC/stxs_bitcnt_RNO[0]:Y,5957
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_298:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_298:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[1]:A,34754
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[1]:B,35821
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[1]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[1]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[1]:Y,15915
CORESPI_0/USPI/UCC/mtx_state[0]:ALn,
CORESPI_0/USPI/UCC/mtx_state[0]:CLK,4066
CORESPI_0/USPI/UCC/mtx_state[0]:D,4786
CORESPI_0/USPI/UCC/mtx_state[0]:Q,4066
Demo_sb_0/CORERESETP_0/count_sdif0[2]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[2]:CLK,16816
Demo_sb_0/CORERESETP_0/count_sdif0[2]:D,17786
Demo_sb_0/CORERESETP_0/count_sdif0[2]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[2]:Q,16816
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_63:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_63:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_369:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_369:IPB,
CORESPI_0/USPI/UCC/SYNC2_stxp_dataerr:ALn,
CORESPI_0/USPI/UCC/SYNC2_stxp_dataerr:CLK,8010
CORESPI_0/USPI/UCC/SYNC2_stxp_dataerr:D,8867
CORESPI_0/USPI/UCC/SYNC2_stxp_dataerr:Q,8010
CORESPI_0/USPI/UTXF/un1_wr_pointer_q_1.CO1_m1_e_2:A,6051
CORESPI_0/USPI/UTXF/un1_wr_pointer_q_1.CO1_m1_e_2:B,3158
CORESPI_0/USPI/UTXF/un1_wr_pointer_q_1.CO1_m1_e_2:C,5967
CORESPI_0/USPI/UTXF/un1_wr_pointer_q_1.CO1_m1_e_2:D,5882
CORESPI_0/USPI/UTXF/un1_wr_pointer_q_1.CO1_m1_e_2:Y,3158
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_162:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_162:IPB,
CORESPI_0/USPI/UTXF/empty_out_RNISVSA:A,7892
CORESPI_0/USPI/UTXF/empty_out_RNISVSA:Y,7892
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_154:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_133:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_133:IPB,
CORESPI_0/USPI/URF/prdata_2_1[4]:A,3655
CORESPI_0/USPI/URF/prdata_2_1[4]:B,3572
CORESPI_0/USPI/URF/prdata_2_1[4]:C,2044
CORESPI_0/USPI/URF/prdata_2_1[4]:Y,2044
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_246:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_246:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_14:IPA,
CORESPI_0/USPI/UCC/un1_resetn_tx_RNIPA23/U0:An,
CORESPI_0/USPI/UCC/un1_resetn_tx_RNIPA23/U0:YWn,
Demo_sb_0/CORERESETP_0/sdif0_state_ns_1_0_.N_4_i:A,8006
Demo_sb_0/CORERESETP_0/sdif0_state_ns_1_0_.N_4_i:B,7929
Demo_sb_0/CORERESETP_0/sdif0_state_ns_1_0_.N_4_i:Y,7929
CORESPI_0/USPI/URF/cfg_ssel[4]:ALn,
CORESPI_0/USPI/URF/cfg_ssel[4]:CLK,3540
CORESPI_0/USPI/URF/cfg_ssel[4]:D,7405
CORESPI_0/USPI/URF/cfg_ssel[4]:EN,3562
CORESPI_0/USPI/URF/cfg_ssel[4]:Q,3540
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_358:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_358:IPB,
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_0_i:A,7830
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_0_i:B,7839
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_0_i:C,6798
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_0_i:D,6690
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_0_i:Y,6690
CORESPI_0/USPI/UCC/mtx_bitsel8_0_a2_0_a2:A,4904
CORESPI_0/USPI/UCC/mtx_bitsel8_0_a2_0_a2:B,4752
CORESPI_0/USPI/UCC/mtx_bitsel8_0_a2_0_a2:C,3749
CORESPI_0/USPI/UCC/mtx_bitsel8_0_a2_0_a2:Y,3749
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_90:A,37154
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_90:IPA,37154
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_90:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_272:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_272:IPB,
CORESPI_0/USPI/UCC/SYNC3_msrxp_strobe:ALn,
CORESPI_0/USPI/UCC/SYNC3_msrxp_strobe:CLK,7916
CORESPI_0/USPI/UCC/SYNC3_msrxp_strobe:D,8854
CORESPI_0/USPI/UCC/SYNC3_msrxp_strobe:Q,7916
CORESPI_0/USPI/UCC/msrxp_frames[0]:ALn,
CORESPI_0/USPI/UCC/msrxp_frames[0]:CLK,6631
CORESPI_0/USPI/UCC/msrxp_frames[0]:D,7906
CORESPI_0/USPI/UCC/msrxp_frames[0]:EN,7830
CORESPI_0/USPI/UCC/msrxp_frames[0]:Q,6631
FCCC_0/GL0_INST/U0:An,
FCCC_0/GL0_INST/U0:YWn,
Demo_sb_0/CORERESETP_0/next_sdif0_phy_reset_n_0_sqmuxa_0_a3:A,7909
Demo_sb_0/CORERESETP_0/next_sdif0_phy_reset_n_0_sqmuxa_0_a3:B,7867
Demo_sb_0/CORERESETP_0/next_sdif0_phy_reset_n_0_sqmuxa_0_a3:C,6842
Demo_sb_0/CORERESETP_0/next_sdif0_phy_reset_n_0_sqmuxa_0_a3:Y,6842
CORESPI_0/USPI/URXF/rd_pointer_q_3[0]:A,7938
CORESPI_0/USPI/URXF/rd_pointer_q_3[0]:B,1628
CORESPI_0/USPI/URXF/rd_pointer_q_3[0]:C,1623
CORESPI_0/USPI/URXF/rd_pointer_q_3[0]:Y,1623
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_229:IPB,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[0]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[0]:CLK,35909
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[0]:D,40564
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[0]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[0]:Q,35909
CORESPI_0/USPI/URXF/counter_q_RNIH2R52[1]:A,4789
CORESPI_0/USPI/URXF/counter_q_RNIH2R52[1]:B,4680
CORESPI_0/USPI/URXF/counter_q_RNIH2R52[1]:C,4615
CORESPI_0/USPI/URXF/counter_q_RNIH2R52[1]:FCI,4653
CORESPI_0/USPI/URXF/counter_q_RNIH2R52[1]:FCO,4715
CORESPI_0/USPI/URXF/counter_q_RNIH2R52[1]:S,4615
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_16:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_16:IPB,
Demo_sb_0/CORERESETP_0/sm0_state[4]:ALn,7074
Demo_sb_0/CORERESETP_0/sm0_state[4]:CLK,7786
Demo_sb_0/CORERESETP_0/sm0_state[4]:D,5723
Demo_sb_0/CORERESETP_0/sm0_state[4]:Q,7786
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_167:A,37514
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_167:B,37290
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_167:IPA,37514
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_167:IPB,37290
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_347:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_347:IPB,
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_2_0_RNI1AC02:A,5505
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_2_0_RNI1AC02:B,3607
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_2_0_RNI1AC02:C,6005
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_2_0_RNI1AC02:D,5260
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_2_0_RNI1AC02:Y,3607
Demo_sb_0/CORECONFIGP_0/pwdata[5]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[5]:CLK,38039
Demo_sb_0/CORECONFIGP_0/pwdata[5]:D,40655
Demo_sb_0/CORECONFIGP_0/pwdata[5]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[5]:Q,38039
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_206:A,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_206:IPA,
Demo_sb_0/CORECONFIGP_0/paddr[11]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[11]:CLK,35767
Demo_sb_0/CORECONFIGP_0/paddr[11]:D,40652
Demo_sb_0/CORECONFIGP_0/paddr[11]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[11]:Q,35767
CORESPI_0/USPI/URF/int_raw_1_sqmuxa:A,3750
CORESPI_0/USPI/URF/int_raw_1_sqmuxa:B,4332
CORESPI_0/USPI/URF/int_raw_1_sqmuxa:C,1807
CORESPI_0/USPI/URF/int_raw_1_sqmuxa:D,3508
CORESPI_0/USPI/URF/int_raw_1_sqmuxa:Y,1807
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_92:A,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_92:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_92:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_71:B,37121
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_71:IPB,37121
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[16]:A,34602
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[16]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[16]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[16]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[16]:Y,15915
CORESPI_0/USPI/URF/int_raw_36[2]:A,7931
CORESPI_0/USPI/URF/int_raw_36[2]:B,1807
CORESPI_0/USPI/URF/int_raw_36[2]:C,7856
CORESPI_0/USPI/URF/int_raw_36[2]:Y,1807
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_72:IPB,
GPIO_9_M2F_obuf/U0/U_IOPAD:D,
GPIO_9_M2F_obuf/U0/U_IOPAD:E,
GPIO_9_M2F_obuf/U0/U_IOPAD:PAD,
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[0]:A,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[0]:B,6802
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[0]:Y,4944
CORESPI_0/USPI/UCC/clock_rx_fe:A,4953
CORESPI_0/USPI/UCC/clock_rx_fe:B,4921
CORESPI_0/USPI/UCC/clock_rx_fe:Y,4921
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31:A,4300
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31:B,4209
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31:C,4158
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31:D,3158
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31:Y,3158
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_287:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_84:A,37226
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_84:IPA,37226
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_84:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_24:C,3300
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_24:IPC,3300
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_68:B,37179
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_68:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_68:IPB,37179
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_274:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_274:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_143:B,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_143:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[18]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[18]:CLK,38496
Demo_sb_0/CORECONFIGP_0/pwdata[18]:D,40648
Demo_sb_0/CORECONFIGP_0/pwdata[18]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[18]:Q,38496
Demo_sb_0/CORECONFIGP_0/pwdata[21]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[21]:CLK,38784
Demo_sb_0/CORECONFIGP_0/pwdata[21]:D,40630
Demo_sb_0/CORECONFIGP_0/pwdata[21]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[21]:Q,38784
CORESPI_0/USPI/UCC/spi_clk_count_cry[2]:B,7743
CORESPI_0/USPI/UCC/spi_clk_count_cry[2]:C,4550
CORESPI_0/USPI/UCC/spi_clk_count_cry[2]:FCI,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[2]:FCO,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[2]:S,4566
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_307:IPB,
CORESPI_0/USPI/UCC/spi_clk_count[0]:ALn,
CORESPI_0/USPI/UCC/spi_clk_count[0]:CLK,4518
CORESPI_0/USPI/UCC/spi_clk_count[0]:D,4582
CORESPI_0/USPI/UCC/spi_clk_count[0]:Q,4518
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_213:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_134:IPA,
Demo_sb_0/CORERESETP_0/sdif0_areset_n_clk_base:ALn,6142
Demo_sb_0/CORERESETP_0/sdif0_areset_n_clk_base:CLK,8748
Demo_sb_0/CORERESETP_0/sdif0_areset_n_clk_base:D,8867
Demo_sb_0/CORERESETP_0/sdif0_areset_n_clk_base:Q,8748
CORESPI_0/USPI/UCC/SYNC1_msrxp_pktsel:ALn,
CORESPI_0/USPI/UCC/SYNC1_msrxp_pktsel:CLK,8867
CORESPI_0/USPI/UCC/SYNC1_msrxp_pktsel:D,7933
CORESPI_0/USPI/UCC/SYNC1_msrxp_pktsel:Q,8867
CORESPI_0/USPI/UTXF/un1_rd_pointer_q_1.CO0:A,4040
CORESPI_0/USPI/UTXF/un1_rd_pointer_q_1.CO0:B,6943
CORESPI_0/USPI/UTXF/un1_rd_pointer_q_1.CO0:Y,4040
CORESPI_0/USPI/UCC/N_222_i_i_o2:A,3749
CORESPI_0/USPI/UCC/N_222_i_i_o2:B,3776
CORESPI_0/USPI/UCC/N_222_i_i_o2:Y,3749
CORESPI_0/USPI/UCC/stxs_bitcnt[2]:ALn,6056
CORESPI_0/USPI/UCC/stxs_bitcnt[2]:CLK,5145
CORESPI_0/USPI/UCC/stxs_bitcnt[2]:D,5819
CORESPI_0/USPI/UCC/stxs_bitcnt[2]:EN,7726
CORESPI_0/USPI/UCC/stxs_bitcnt[2]:Q,5145
CORESPI_0/USPI/UCC/rx_cmdsize_4_RNO:A,7075
CORESPI_0/USPI/UCC/rx_cmdsize_4_RNO:B,7011
CORESPI_0/USPI/UCC/rx_cmdsize_4_RNO:Y,7011
CORESPI_0/USPI/UTXF/un1_data_out_dx_31_1:A,4063
CORESPI_0/USPI/UTXF/un1_data_out_dx_31_1:B,3992
CORESPI_0/USPI/UTXF/un1_data_out_dx_31_1:Y,3992
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_174:A,38519
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_174:B,38735
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_174:IPA,38519
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_174:IPB,38735
CORESPI_0/USPI/URF/prdata_2_6_1[0]:A,3601
CORESPI_0/USPI/URF/prdata_2_6_1[0]:B,3524
CORESPI_0/USPI/URF/prdata_2_6_1[0]:C,1717
CORESPI_0/USPI/URF/prdata_2_6_1[0]:D,1868
CORESPI_0/USPI/URF/prdata_2_6_1[0]:Y,1717
CORESPI_0/USPI/UCC/spi_ssel_pos_RNO:A,6984
CORESPI_0/USPI/UCC/spi_ssel_pos_RNO:B,7910
CORESPI_0/USPI/UCC/spi_ssel_pos_RNO:Y,6984
CORESPI_0/USPI/UCC/msrxp_frames[1]:ALn,
CORESPI_0/USPI/UCC/msrxp_frames[1]:CLK,6746
CORESPI_0/USPI/UCC/msrxp_frames[1]:D,7845
CORESPI_0/USPI/UCC/msrxp_frames[1]:EN,7830
CORESPI_0/USPI/UCC/msrxp_frames[1]:Q,6746
BIBUF_0/U0/U_IOINFF:A,
BIBUF_0/U0/U_IOINFF:Y,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_6:IPENn,
CORESPI_0/USPI/UCC/mtx_state_RNO[3]:A,7997
CORESPI_0/USPI/UCC/mtx_state_RNO[3]:B,7834
CORESPI_0/USPI/UCC/mtx_state_RNO[3]:C,6841
CORESPI_0/USPI/UCC/mtx_state_RNO[3]:D,3852
CORESPI_0/USPI/UCC/mtx_state_RNO[3]:Y,3852
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[2]:A,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[2]:B,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[2]:Y,4944
Demo_sb_0/CORERESETP_0/sdif0_areset_n_RNIL3AD/U0:An,
Demo_sb_0/CORERESETP_0/sdif0_areset_n_RNIL3AD/U0:YWn,
Demo_sb_0/CORECONFIGP_0/int_prdata_1_0[1]:A,37710
Demo_sb_0/CORECONFIGP_0/int_prdata_1_0[1]:B,37605
Demo_sb_0/CORECONFIGP_0/int_prdata_1_0[1]:C,35928
Demo_sb_0/CORECONFIGP_0/int_prdata_1_0[1]:D,35821
Demo_sb_0/CORECONFIGP_0/int_prdata_1_0[1]:Y,35821
CORESPI_0/USPI/URF/clr_rxfifo_5_0_a3_0_a2:A,4492
CORESPI_0/USPI/URF/clr_rxfifo_5_0_a3_0_a2:B,3703
CORESPI_0/USPI/URF/clr_rxfifo_5_0_a3_0_a2:C,6319
CORESPI_0/USPI/URF/clr_rxfifo_5_0_a3_0_a2:Y,3703
CORESPI_0/USPI/UCC/mtx_bitsel[0]:ALn,
CORESPI_0/USPI/UCC/mtx_bitsel[0]:CLK,4762
CORESPI_0/USPI/UCC/mtx_bitsel[0]:D,3547
CORESPI_0/USPI/UCC/mtx_bitsel[0]:Q,4762
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_270:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_270:IPB,
PHY_RST_obuf/U0/U_IOENFF:A,
PHY_RST_obuf/U0/U_IOENFF:Y,
FCCC_0/CCC_INST/INST_CCC_IP:CLK0,
FCCC_0/CCC_INST/INST_CCC_IP:CLK1,
FCCC_0/CCC_INST/INST_CCC_IP:CLK2,
FCCC_0/CCC_INST/INST_CCC_IP:CLK3,
FCCC_0/CCC_INST/INST_CCC_IP:GL0,
FCCC_0/CCC_INST/INST_CCC_IP:GL1,
FCCC_0/CCC_INST/INST_CCC_IP:GPD0_ARST_N,
FCCC_0/CCC_INST/INST_CCC_IP:GPD1_ARST_N,
FCCC_0/CCC_INST/INST_CCC_IP:GPD2_ARST_N,
FCCC_0/CCC_INST/INST_CCC_IP:GPD3_ARST_N,
FCCC_0/CCC_INST/INST_CCC_IP:LOCK,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX0_ARST_N,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX0_HOLD_N,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX0_SEL,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX1_ARST_N,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX1_HOLD_N,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX1_SEL,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX2_ARST_N,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX2_HOLD_N,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX2_SEL,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX3_ARST_N,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX3_HOLD_N,
FCCC_0/CCC_INST/INST_CCC_IP:NGMUX3_SEL,
FCCC_0/CCC_INST/INST_CCC_IP:PADDR[2],
FCCC_0/CCC_INST/INST_CCC_IP:PADDR[3],
FCCC_0/CCC_INST/INST_CCC_IP:PADDR[4],
FCCC_0/CCC_INST/INST_CCC_IP:PADDR[5],
FCCC_0/CCC_INST/INST_CCC_IP:PADDR[6],
FCCC_0/CCC_INST/INST_CCC_IP:PADDR[7],
FCCC_0/CCC_INST/INST_CCC_IP:PCLK,
FCCC_0/CCC_INST/INST_CCC_IP:PENABLE,
FCCC_0/CCC_INST/INST_CCC_IP:PLL_ARST_N,
FCCC_0/CCC_INST/INST_CCC_IP:PLL_BYPASS_N,
FCCC_0/CCC_INST/INST_CCC_IP:PLL_POWERDOWN_N,
FCCC_0/CCC_INST/INST_CCC_IP:PRESET_N,
FCCC_0/CCC_INST/INST_CCC_IP:PSEL,
FCCC_0/CCC_INST/INST_CCC_IP:PWDATA[0],
FCCC_0/CCC_INST/INST_CCC_IP:PWDATA[1],
FCCC_0/CCC_INST/INST_CCC_IP:PWDATA[2],
FCCC_0/CCC_INST/INST_CCC_IP:PWDATA[3],
FCCC_0/CCC_INST/INST_CCC_IP:PWDATA[4],
FCCC_0/CCC_INST/INST_CCC_IP:PWDATA[5],
FCCC_0/CCC_INST/INST_CCC_IP:PWDATA[6],
FCCC_0/CCC_INST/INST_CCC_IP:PWDATA[7],
FCCC_0/CCC_INST/INST_CCC_IP:PWRITE,
CORESPI_0/USPI/UTXF/wr_pointer_q[1]:ALn,
CORESPI_0/USPI/UTXF/wr_pointer_q[1]:CLK,3235
CORESPI_0/USPI/UTXF/wr_pointer_q[1]:D,1509
CORESPI_0/USPI/UTXF/wr_pointer_q[1]:Q,3235
CORESPI_0/USPI/URF/int_raw_27[2]:A,1807
CORESPI_0/USPI/URF/int_raw_27[2]:B,6986
CORESPI_0/USPI/URF/int_raw_27[2]:C,5312
CORESPI_0/USPI/URF/int_raw_27[2]:Y,1807
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_149:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_149:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_143:IPA,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_29:C,8901
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_29:IPC,8901
CORESPI_0/USPI/URF/int_raw_42[4]:A,8017
CORESPI_0/USPI/URF/int_raw_42[4]:B,7926
CORESPI_0/USPI/URF/int_raw_42[4]:C,6388
CORESPI_0/USPI/URF/int_raw_42[4]:D,2525
CORESPI_0/USPI/URF/int_raw_42[4]:Y,2525
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_1:A,6192
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_1:B,6109
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_1:C,3267
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_1:D,3016
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_1:FCI,
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_1:FCO,
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_1:Y,3016
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_4:IPENn,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_33:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_33:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_100:A,9882
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_100:B,10008
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_100:IPA,9882
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_100:IPB,10008
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_30:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_30:IPB,
BIBUF_0/U0/U_IOPAD:D,
BIBUF_0/U0/U_IOPAD:E,
BIBUF_0/U0/U_IOPAD:PAD,
BIBUF_0/U0/U_IOPAD:Y,
FCCC_1/CCC_INST/IP_INTERFACE_3:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_3:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_3:IPC,
Demo_sb_0/CORECONFIGP_0/paddr[12]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[12]:CLK,35956
Demo_sb_0/CORECONFIGP_0/paddr[12]:D,40578
Demo_sb_0/CORECONFIGP_0/paddr[12]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[12]:Q,35956
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_12:C,3882
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_12:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_12:IPC,3882
Demo_sb_0/CORERESETP_0/count_sdif0_enable_RNO_0:A,7909
Demo_sb_0/CORERESETP_0/count_sdif0_enable_RNO_0:B,7825
Demo_sb_0/CORERESETP_0/count_sdif0_enable_RNO_0:C,6860
Demo_sb_0/CORERESETP_0/count_sdif0_enable_RNO_0:D,6735
Demo_sb_0/CORERESETP_0/count_sdif0_enable_RNO_0:Y,6735
Demo_sb_0/CORERESETP_0/sdif0_spll_lock_q1:ALn,7074
Demo_sb_0/CORERESETP_0/sdif0_spll_lock_q1:CLK,8867
Demo_sb_0/CORERESETP_0/sdif0_spll_lock_q1:Q,8867
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_0_RNI49RA2:A,4695
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_0_RNI49RA2:B,6755
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_0_RNI49RA2:C,1435
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_0_RNI49RA2:D,4504
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_0_RNI49RA2:Y,1435
Demo_sb_0/CORERESETP_0/count_sdif0_cry[6]:B,17728
Demo_sb_0/CORERESETP_0/count_sdif0_cry[6]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[6]:FCO,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[6]:S,17722
FCCC_1/GL0_INST/U0_RGB1:An,
FCCC_1/GL0_INST/U0_RGB1:YL,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_24:IPCLKn,
Demo_sb_0/CORECONFIGP_0/SDIF_RELEASED_q1:ALn,
Demo_sb_0/CORECONFIGP_0/SDIF_RELEASED_q1:CLK,38867
Demo_sb_0/CORECONFIGP_0/SDIF_RELEASED_q1:D,
Demo_sb_0/CORECONFIGP_0/SDIF_RELEASED_q1:Q,38867
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_103:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_103:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_184:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_184:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_235:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_235:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_120:IPA,
CORESPI_0/USPI/URXF/rd_pointer_q_3[3]:A,1806
CORESPI_0/USPI/URXF/rd_pointer_q_3[3]:B,1667
CORESPI_0/USPI/URXF/rd_pointer_q_3[3]:C,7822
CORESPI_0/USPI/URXF/rd_pointer_q_3[3]:Y,1667
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[2]:A,1920
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[2]:B,3337
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[2]:Y,1920
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_32:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_32:IPB,
CORESPI_0/USPI/URF/int_raw_30_f0_i_i[0]:A,6960
CORESPI_0/USPI/URF/int_raw_30_f0_i_i[0]:B,7926
CORESPI_0/USPI/URF/int_raw_30_f0_i_i[0]:C,2619
CORESPI_0/USPI/URF/int_raw_30_f0_i_i[0]:D,6164
CORESPI_0/USPI/URF/int_raw_30_f0_i_i[0]:Y,2619
CORESPI_0/USPI/UCC/stx_async_reset_ok_2_0_a2_0_a2:A,4838
CORESPI_0/USPI/UCC/stx_async_reset_ok_2_0_a2_0_a2:B,4873
CORESPI_0/USPI/UCC/stx_async_reset_ok_2_0_a2_0_a2:Y,4838
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_322:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_322:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_7:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_7:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_147:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_147:IPB,
Demo_sb_0/CORERESETP_0/next_sdif0_state12_i:A,6783
Demo_sb_0/CORERESETP_0/next_sdif0_state12_i:B,6735
Demo_sb_0/CORERESETP_0/next_sdif0_state12_i:Y,6735
CORESPI_0/USPI/URF/cfg_ssel[3]:ALn,
CORESPI_0/USPI/URF/cfg_ssel[3]:CLK,4503
CORESPI_0/USPI/URF/cfg_ssel[3]:D,7334
CORESPI_0/USPI/URF/cfg_ssel[3]:EN,3562
CORESPI_0/USPI/URF/cfg_ssel[3]:Q,4503
CORESPI_0/USPI/UCC/mtx_state[5]:ALn,
CORESPI_0/USPI/UCC/mtx_state[5]:CLK,6753
CORESPI_0/USPI/UCC/mtx_state[5]:D,3733
CORESPI_0/USPI/UCC/mtx_state[5]:Q,6753
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_238:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_238:IPB,
CORESPI_0/USPI/UCC/txfifo_dhold_dec_2_0_a2_1_a2:A,7911
CORESPI_0/USPI/UCC/txfifo_dhold_dec_2_0_a2_1_a2:B,7903
CORESPI_0/USPI/UCC/txfifo_dhold_dec_2_0_a2_1_a2:C,6882
CORESPI_0/USPI/UCC/txfifo_dhold_dec_2_0_a2_1_a2:D,7755
CORESPI_0/USPI/UCC/txfifo_dhold_dec_2_0_a2_1_a2:Y,6882
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_25:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_25:IPB,
Demo_sb_0/POWER_ON_RESET_N_keep_RNIIUV3/U0_RGB1:An,
Demo_sb_0/POWER_ON_RESET_N_keep_RNIIUV3/U0_RGB1:YL,
Demo_sb_0/CORECONFIGP_0/paddr[7]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[7]:CLK,36414
Demo_sb_0/CORECONFIGP_0/paddr[7]:D,40654
Demo_sb_0/CORECONFIGP_0/paddr[7]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[7]:Q,36414
CORESPI_0/USPI/UCC/msrxs_datain[2]:ALn,
CORESPI_0/USPI/UCC/msrxs_datain[2]:CLK,8918
CORESPI_0/USPI/UCC/msrxs_datain[2]:D,8860
CORESPI_0/USPI/UCC/msrxs_datain[2]:EN,5765
CORESPI_0/USPI/UCC/msrxs_datain[2]:Q,8918
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_97:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_97:IPB,
CORESPI_0/USPI/UTXF/counter_q[3]:ALn,
CORESPI_0/USPI/UTXF/counter_q[3]:CLK,4922
CORESPI_0/USPI/UTXF/counter_q[3]:D,1586
CORESPI_0/USPI/UTXF/counter_q[3]:Q,4922
CORESPI_0/USPI/URXF/counter_d[2]:A,4707
CORESPI_0/USPI/URXF/counter_d[2]:B,1507
CORESPI_0/USPI/URXF/counter_d[2]:C,6683
CORESPI_0/USPI/URXF/counter_d[2]:D,5456
CORESPI_0/USPI/URXF/counter_d[2]:Y,1507
SPISDI_ibuf/U0/U_IOINFF:A,
SPISDI_ibuf/U0/U_IOINFF:Y,
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_3:A,5845
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_3:B,5757
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_3:C,4586
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_3:FCI,4538
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_3:FCO,4538
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_3:S,4660
CORESPI_0/USPI/UTXF/rd_pointer_q[2]:ALn,
CORESPI_0/USPI/UTXF/rd_pointer_q[2]:CLK,3300
CORESPI_0/USPI/UTXF/rd_pointer_q[2]:D,4056
CORESPI_0/USPI/UTXF/rd_pointer_q[2]:Q,3300
GPIO_3_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_3_M2F_obuf/U0/U_IOOUTFF:Y,
Demo_sb_0/CORERESETP_0/count_sdif0[3]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[3]:CLK,16743
Demo_sb_0/CORERESETP_0/count_sdif0[3]:D,17770
Demo_sb_0/CORERESETP_0/count_sdif0[3]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[3]:Q,16743
Demo_sb_0/CORERESETP_0/count_sdif0[6]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[6]:CLK,16783
Demo_sb_0/CORERESETP_0/count_sdif0[6]:D,17722
Demo_sb_0/CORERESETP_0/count_sdif0[6]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[6]:Q,16783
CORESPI_0/USPI/UCC/un1_stxs_strobetx17:A,4939
CORESPI_0/USPI/UCC/un1_stxs_strobetx17:B,4917
CORESPI_0/USPI/UCC/un1_stxs_strobetx17:C,5910
CORESPI_0/USPI/UCC/un1_stxs_strobetx17:D,5749
CORESPI_0/USPI/UCC/un1_stxs_strobetx17:Y,4917
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_335:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_231:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_231:IPB,
CORESPI_0/USPI/UCC/spi_clk_count[7]:ALn,
CORESPI_0/USPI/UCC/spi_clk_count[7]:CLK,4820
CORESPI_0/USPI/UCC/spi_clk_count[7]:D,4518
CORESPI_0/USPI/UCC/spi_clk_count[7]:Q,4820
CORESPI_0/USPI/URXF/counter_q_RNIHU353[5]:A,5291
CORESPI_0/USPI/URXF/counter_q_RNIHU353[5]:B,4131
CORESPI_0/USPI/URXF/counter_q_RNIHU353[5]:C,3996
CORESPI_0/USPI/URXF/counter_q_RNIHU353[5]:Y,3996
BIBUF_0/U0/U_IOENFF:A,
BIBUF_0/U0/U_IOENFF:Y,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_169:A,38551
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_169:B,38441
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_169:IPA,38551
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_169:IPB,38441
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_114:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_114:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_40:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_40:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[4]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[4]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[4]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[4]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[4]:Y,36887
CORESPI_0/USPI/UCC/mtx_re:ALn,
CORESPI_0/USPI/UCC/mtx_re:CLK,8867
CORESPI_0/USPI/UCC/mtx_re:D,6075
CORESPI_0/USPI/UCC/mtx_re:Q,8867
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_318:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_318:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[26]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[26]:CLK,38823
Demo_sb_0/CORECONFIGP_0/pwdata[26]:D,40658
Demo_sb_0/CORECONFIGP_0/pwdata[26]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[26]:Q,38823
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_34:IPA,
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_2_i_1:A,6917
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_2_i_1:B,6867
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_2_i_1:C,6825
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_2_i_1:D,6722
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_2_i_1:Y,6722
FCCC_1/CCC_INST/IP_INTERFACE_0:A,
FCCC_1/CCC_INST/IP_INTERFACE_0:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_0:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_29:IPENn,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_275:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_275:IPB,
Demo_sb_0/CORERESETP_0/count_sdif0[12]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[12]:CLK,16983
Demo_sb_0/CORERESETP_0/count_sdif0[12]:D,17626
Demo_sb_0/CORERESETP_0/count_sdif0[12]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[12]:Q,16983
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_42:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_42:IPB,
CORESPI_0/USPI/URF/int_raw_39[3]:A,8010
CORESPI_0/USPI/URF/int_raw_39[3]:B,1807
CORESPI_0/USPI/URF/int_raw_39[3]:C,7849
CORESPI_0/USPI/URF/int_raw_39[3]:Y,1807
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_75:A,37215
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_75:B,37204
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_75:IPA,37215
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_75:IPB,37204
SPI_DO_obuf/U0/U_IOENFF:A,
SPI_DO_obuf/U0/U_IOENFF:Y,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_334:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_334:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_245:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_245:IPB,
CORESPI_0/USPI/URXF/counter_q_RNI9JN5A[5]:A,3996
CORESPI_0/USPI/URXF/counter_q_RNI9JN5A[5]:B,6053
CORESPI_0/USPI/URXF/counter_q_RNI9JN5A[5]:C,730
CORESPI_0/USPI/URXF/counter_q_RNI9JN5A[5]:D,3947
CORESPI_0/USPI/URXF/counter_q_RNI9JN5A[5]:Y,730
CORESPI_0/USPI/UCC/mtx_oen_1_sqmuxa_0_a3_0_a2:A,4046
CORESPI_0/USPI/UCC/mtx_oen_1_sqmuxa_0_a3_0_a2:B,4068
CORESPI_0/USPI/UCC/mtx_oen_1_sqmuxa_0_a3_0_a2:C,5883
CORESPI_0/USPI/UCC/mtx_oen_1_sqmuxa_0_a3_0_a2:Y,4046
CORESPI_0/USPI/URF/prdata_2_6[1]:A,1843
CORESPI_0/USPI/URF/prdata_2_6[1]:B,2575
CORESPI_0/USPI/URF/prdata_2_6[1]:C,1993
CORESPI_0/USPI/URF/prdata_2_6[1]:Y,1843
CORESPI_0/USPI/UCON/tx_fifo_write_sig_0_sqmuxa_0_a3_0_a2:A,2434
CORESPI_0/USPI/UCON/tx_fifo_write_sig_0_sqmuxa_0_a3_0_a2:B,2637
CORESPI_0/USPI/UCON/tx_fifo_write_sig_0_sqmuxa_0_a3_0_a2:C,1622
CORESPI_0/USPI/UCON/tx_fifo_write_sig_0_sqmuxa_0_a3_0_a2:D,1554
CORESPI_0/USPI/UCON/tx_fifo_write_sig_0_sqmuxa_0_a3_0_a2:Y,1554
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_27:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_27:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_30:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_30:IPB,
Demo_sb_0/CORERESETP_0/release_sdif1_core:ALn,18769
Demo_sb_0/CORERESETP_0/release_sdif1_core:CLK,4998
Demo_sb_0/CORERESETP_0/release_sdif1_core:Q,4998
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[10]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[10]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[10]:D,40605
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[10]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[10]:Q,36887
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_281:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_281:IPB,
CFG0_GND_INST:Y,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_29:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_29:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_106:IPB,
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO_1[4]:A,5114
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO_1[4]:B,5030
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO_1[4]:C,4972
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO_1[4]:D,4894
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO_1[4]:Y,4894
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_56:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_56:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_248:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_248:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[8]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[8]:CLK,38551
Demo_sb_0/CORECONFIGP_0/pwdata[8]:D,40666
Demo_sb_0/CORECONFIGP_0/pwdata[8]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[8]:Q,38551
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:CLK,37176
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[10]:Q,37176
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_19:C,7499
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_19:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_19:IPC,7499
CORESPI_0/USPI/URF/prdata_2_RNO[0]:A,687
CORESPI_0/USPI/URF/prdata_2_RNO[0]:B,1717
CORESPI_0/USPI/URF/prdata_2_RNO[0]:C,2553
CORESPI_0/USPI/URF/prdata_2_RNO[0]:Y,687
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_251:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_205:A,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_205:IPA,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_0:IPCLKn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[3]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[3]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[3]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[3]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[3]:Y,36887
GPIO_4_M2F_obuf/U0/U_IOPAD:D,
GPIO_4_M2F_obuf/U0/U_IOPAD:E,
GPIO_4_M2F_obuf/U0/U_IOPAD:PAD,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_93:IPA,
CORESPI_0/USPI/URXF/wr_pointer_q_3[4]:A,7958
CORESPI_0/USPI/URXF/wr_pointer_q_3[4]:B,7903
CORESPI_0/USPI/URXF/wr_pointer_q_3[4]:C,4691
CORESPI_0/USPI/URXF/wr_pointer_q_3[4]:D,4532
CORESPI_0/USPI/URXF/wr_pointer_q_3[4]:Y,4532
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_91:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_91:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_345:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_345:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[12]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[12]:CLK,38413
Demo_sb_0/CORECONFIGP_0/pwdata[12]:D,40574
Demo_sb_0/CORECONFIGP_0/pwdata[12]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[12]:Q,38413
Demo_sb_0/CORECONFIGP_0/pwdata[10]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[10]:CLK,38750
Demo_sb_0/CORECONFIGP_0/pwdata[10]:D,40605
Demo_sb_0/CORECONFIGP_0/pwdata[10]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[10]:Q,38750
CORESPI_0/USPI/UTXF/counter_d_0_sqmuxa_4_i_0_m2:A,2985
CORESPI_0/USPI/UTXF/counter_d_0_sqmuxa_4_i_0_m2:B,2938
CORESPI_0/USPI/UTXF/counter_d_0_sqmuxa_4_i_0_m2:C,2764
CORESPI_0/USPI/UTXF/counter_d_0_sqmuxa_4_i_0_m2:D,2793
CORESPI_0/USPI/UTXF/counter_d_0_sqmuxa_4_i_0_m2:Y,2764
CORESPI_0/USPI/UCC/mtx_state[2]:ALn,
CORESPI_0/USPI/UCC/mtx_state[2]:CLK,6808
CORESPI_0/USPI/UCC/mtx_state[2]:D,4799
CORESPI_0/USPI/UCC/mtx_state[2]:Q,6808
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_126:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_126:IPB,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_CLK,33893
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[10],35474
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[11],35767
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[12],35956
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[13],36182
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[14],36744
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[2],36315
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[3],36021
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[4],36351
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[5],35954
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[6],36412
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[7],36414
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[8],35785
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PADDR[9],35792
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PENABLE,18470
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[0],34716
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[10],34626
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[11],34545
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[12],34494
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[13],34454
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[14],34636
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[15],34544
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[16],34602
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[17],34449
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[18],34643
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[19],34406
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[1],34754
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[20],34517
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[21],34409
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[22],34537
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[23],34405
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[24],34336
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[25],34218
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[26],34490
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[27],34441
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[28],34349
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[29],34331
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[2],34636
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[30],34580
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[31],34528
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[3],34812
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[4],34732
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[5],34778
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[6],34836
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[7],34781
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[8],34395
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PRDATA[9],34521
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PREADY,33893
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PSEL,15409
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PSLVERR,34609
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[0],37971
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[10],38750
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[11],38663
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[12],38413
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[13],38519
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[14],38347
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[15],38531
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[16],38431
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[17],38497
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[18],38496
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[19],38290
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[1],37365
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[20],38441
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[21],38784
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[22],38749
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[23],38748
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[24],38602
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[25],38735
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[26],38823
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[27],38698
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[28],39178
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[29],39270
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[2],37501
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[30],38688
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[31],39190
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[3],37294
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[4],37319
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[5],38039
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[6],37290
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[7],38337
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[8],38551
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWDATA[9],38395
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PWRITE,37514
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_RSTN,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:CLK_BASE,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_PWRDN[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_PWRDN[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RSTN[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RSTN[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1],9658
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[30],9882
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[31],9815
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[32],9859
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[33],9904
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[34],9981
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[35],9658
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[36],9891
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[37],10008
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[38],9836
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[39],10007
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXERR[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXERR[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[10],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[11],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[12],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[13],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[14],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[15],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[16],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[17],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[18],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[19],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[20],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[21],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[22],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[23],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[24],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[25],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[26],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[27],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[28],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[29],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[30],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[31],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[32],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[33],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[34],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[35],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[36],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[37],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[38],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[39],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[4],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[5],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[6],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[7],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[8],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[9],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXOOB[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXOOB[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXVAL[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXVAL[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:F2HCALIB0,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:F2HCALIB1,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:FAB_PLL_LOCK,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:FAB_REF_CLK,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_ARREADY,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_AWREADY,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_BID[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_BID[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_BID[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_BID[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_BRESP_HRESP[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_BRESP_HRESP[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_BVALID,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[10],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[11],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[12],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[13],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[14],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[15],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[16],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[17],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[18],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[19],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[20],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[21],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[22],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[23],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[24],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[25],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[26],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[27],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[28],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[29],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[30],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[31],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[32],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[33],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[34],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[35],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[36],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[37],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[38],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[39],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[40],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[41],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[42],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[43],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[44],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[45],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[46],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[47],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[48],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[49],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[4],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[50],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[51],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[52],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[53],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[54],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[55],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[56],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[57],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[58],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[59],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[5],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[60],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[61],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[62],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[63],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[6],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[7],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[8],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RDATA_HRDATA[9],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RID[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RID[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RID[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RID[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RLAST,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RRESP[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RRESP[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_RVALID,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M2_WREADY_HREADY,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_ARREADY,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_AWREADY,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_BID[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_BID[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_BID[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_BID[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_BRESP_HRESP[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_BRESP_HRESP[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_BVALID,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[10],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[11],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[12],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[13],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[14],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[15],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[16],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[17],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[18],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[19],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[20],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[21],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[22],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[23],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[24],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[25],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[26],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[27],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[28],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[29],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[30],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[31],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[32],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[33],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[34],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[35],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[36],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[37],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[38],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[39],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[40],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[41],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[42],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[43],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[44],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[45],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[46],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[47],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[48],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[49],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[4],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[50],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[51],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[52],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[53],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[54],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[55],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[56],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[57],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[58],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[59],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[5],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[60],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[61],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[62],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[63],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[6],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[7],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[8],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RDATA_HRDATA[9],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RID[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RID[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RID[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RID[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RLAST,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RRESP[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RRESP[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_RVALID,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:M_WREADY_HREADY,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PCIE2_INTERRUPT[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PCIE2_INTERRUPT[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PCIE2_INTERRUPT[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PCIE2_INTERRUPT[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PCIE2_PERST_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PCIE2_SERDESIF_CORE_RESET_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PCIE2_WAKE_REQ,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PCIE_INTERRUPT[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PCIE_INTERRUPT[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PCIE_INTERRUPT[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PCIE_INTERRUPT[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:PERST_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:REFCLK1,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:RXD0_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:RXD0_P,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:RXD1_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:RXD1_P,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:RXD2_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:RXD2_P,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:RXD3_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:RXD3_P,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[10],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[11],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[12],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[13],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[14],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[15],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[16],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[17],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[18],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[19],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[20],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[21],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[22],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[23],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[24],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[25],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[26],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[27],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[28],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[29],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[30],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[31],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[4],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[5],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[6],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[7],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[8],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARADDR[9],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARBURST[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARBURST[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARID[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARID[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARID[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARID[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARLEN[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARLEN[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARLEN[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARLEN[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARLOCK[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARLOCK[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARSIZE[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARSIZE[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_ARVALID,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[10],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[11],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[12],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[13],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[14],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[15],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[16],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[17],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[18],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[19],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[20],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[21],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[22],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[23],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[24],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[25],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[26],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[27],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[28],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[29],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[30],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[31],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[4],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[5],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[6],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[7],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[8],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWADDR_HADDR[9],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWBURST_HTRANS[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWBURST_HTRANS[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWID_HSEL[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWID_HSEL[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWID_HSEL[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWID_HSEL[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWLEN_HBURST[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWLEN_HBURST[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWLEN_HBURST[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWLEN_HBURST[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWLOCK[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWLOCK[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWSIZE_HSIZE[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWSIZE_HSIZE[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_AWVALID_HWRITE,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_BREADY_HREADY,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_RREADY,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[10],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[11],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[12],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[13],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[14],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[15],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[16],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[17],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[18],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[19],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[20],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[21],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[22],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[23],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[24],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[25],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[26],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[27],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[28],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[29],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[30],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[31],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[32],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[33],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[34],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[35],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[36],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[37],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[38],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[39],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[40],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[41],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[42],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[43],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[44],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[45],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[46],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[47],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[48],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[49],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[4],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[50],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[51],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[52],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[53],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[54],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[55],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[56],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[57],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[58],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[59],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[5],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[60],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[61],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[62],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[63],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[6],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[7],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[8],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WDATA_HWDATA[9],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WID[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WID[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WID[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WID[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WLAST,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WSTRB[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WSTRB[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WSTRB[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WSTRB[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WSTRB[4],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WSTRB[5],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WSTRB[6],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WSTRB[7],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S2_WVALID,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:SERDESIF_CORE_RESET_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:SERDESIF_PHY_RESET_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[10],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[11],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[12],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[13],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[14],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[15],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[16],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[17],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[18],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[19],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[20],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[21],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[22],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[23],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[24],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[25],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[26],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[27],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[28],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[29],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[30],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[31],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[4],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[5],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[6],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[7],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[8],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARADDR[9],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARBURST[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARBURST[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARID[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARID[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARID[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARID[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARLEN[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARLEN[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARLEN[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARLEN[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARLOCK[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARLOCK[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARSIZE[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARSIZE[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_ARVALID,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[10],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[11],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[12],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[13],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[14],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[15],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[16],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[17],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[18],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[19],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[20],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[21],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[22],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[23],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[24],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[25],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[26],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[27],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[28],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[29],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[30],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[31],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[4],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[5],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[6],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[7],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[8],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWADDR_HADDR[9],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWBURST_HTRANS[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWBURST_HTRANS[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWID_HSEL[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWID_HSEL[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWID_HSEL[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWID_HSEL[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWLEN_HBURST[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWLEN_HBURST[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWLEN_HBURST[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWLEN_HBURST[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWLOCK[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWLOCK[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWSIZE_HSIZE[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWSIZE_HSIZE[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_AWVALID_HWRITE,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_BREADY_HREADY,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_RREADY,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[10],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[11],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[12],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[13],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[14],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[15],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[16],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[17],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[18],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[19],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[20],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[21],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[22],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[23],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[24],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[25],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[26],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[27],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[28],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[29],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[30],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[31],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[32],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[33],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[34],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[35],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[36],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[37],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[38],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[39],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[40],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[41],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[42],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[43],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[44],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[45],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[46],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[47],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[48],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[49],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[4],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[50],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[51],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[52],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[53],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[54],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[55],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[56],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[57],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[58],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[59],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[5],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[60],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[61],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[62],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[63],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[6],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[7],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[8],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WDATA_HWDATA[9],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WID[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WID[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WID[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WID[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WLAST,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WSTRB[0],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WSTRB[1],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WSTRB[2],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WSTRB[3],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WSTRB[4],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WSTRB[5],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WSTRB[6],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WSTRB[7],
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:S_WVALID,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:TXD0_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:TXD0_P,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:TXD1_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:TXD1_P,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:TXD2_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:TXD2_P,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:TXD3_N,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:TXD3_P,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:WAKE_REQ,
SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:XAUI_FB_CLK,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:CLK0,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:CLK0_PAD,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:CLK1,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:CLK2,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:CLK3,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GPD0_ARST_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GPD1_ARST_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GPD2_ARST_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GPD3_ARST_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:LOCK,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX0_ARST_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX0_HOLD_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX0_SEL,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX1_ARST_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX1_HOLD_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX1_SEL,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX2_ARST_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX2_HOLD_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX2_SEL,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX3_ARST_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX3_HOLD_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:NGMUX3_SEL,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[2],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[3],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[4],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[5],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[6],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PADDR[7],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PCLK,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PENABLE,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PLL_ARST_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PLL_BYPASS_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PLL_POWERDOWN_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PRESET_N,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PSEL,
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[0],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[1],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[2],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[3],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[4],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[5],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[6],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PWDATA[7],
Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:PWRITE,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_208:A,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_208:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_208:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_5:A,4128
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_5:B,4463
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_5:C,1592
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_5:D,3798
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_5:Y,1592
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_242:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_242:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_263:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_218:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_218:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_168:IPA,
CORESPI_0/USPI/URF/prdata_2_6_2[5]:A,4534
CORESPI_0/USPI/URF/prdata_2_6_2[5]:B,2705
CORESPI_0/USPI/URF/prdata_2_6_2[5]:C,1563
CORESPI_0/USPI/URF/prdata_2_6_2[5]:Y,1563
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_305:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_305:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_34:IPENn,
CORESPI_0/USPI/UCC/mtx_consecutive:ALn,
CORESPI_0/USPI/UCC/mtx_consecutive:CLK,5758
CORESPI_0/USPI/UCC/mtx_consecutive:D,3883
CORESPI_0/USPI/UCC/mtx_consecutive:EN,3624
CORESPI_0/USPI/UCC/mtx_consecutive:Q,5758
CORESPI_0/USPI/UTXF/counter_q_RNIMNHU1[0]:A,4808
CORESPI_0/USPI/UTXF/counter_q_RNIMNHU1[0]:B,4758
CORESPI_0/USPI/UTXF/counter_q_RNIMNHU1[0]:C,4645
CORESPI_0/USPI/UTXF/counter_q_RNIMNHU1[0]:D,3440
CORESPI_0/USPI/UTXF/counter_q_RNIMNHU1[0]:Y,3440
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_175:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_175:IPB,
CORESPI_0/USPI/URXF/un1_rd_pointer_q_1.CO1_m1_e_2:A,6076
CORESPI_0/USPI/URXF/un1_rd_pointer_q_1.CO1_m1_e_2:B,6005
CORESPI_0/USPI/URXF/un1_rd_pointer_q_1.CO1_m1_e_2:C,3882
CORESPI_0/USPI/URXF/un1_rd_pointer_q_1.CO1_m1_e_2:D,5812
CORESPI_0/USPI/URXF/un1_rd_pointer_q_1.CO1_m1_e_2:Y,3882
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_192:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_192:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_192:IPC,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_17:C,8960
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_17:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_17:IPC,8960
CORESPI_0/USPI/UCC/msrxp_frames_4[2]:A,7951
CORESPI_0/USPI/UCC/msrxp_frames_4[2]:B,7916
CORESPI_0/USPI/UCC/msrxp_frames_4[2]:C,7849
CORESPI_0/USPI/UCC/msrxp_frames_4[2]:D,7722
CORESPI_0/USPI/UCC/msrxp_frames_4[2]:Y,7722
CORESPI_0/USPI/URF/control2[2]:ALn,
CORESPI_0/USPI/URF/control2[2]:CLK,4366
CORESPI_0/USPI/URF/control2[2]:D,7319
CORESPI_0/USPI/URF/control2[2]:EN,3614
CORESPI_0/USPI/URF/control2[2]:Q,4366
CORESPI_0/USPI/URXF/un1_rd_pointer_d_1_sqmuxa:A,4768
CORESPI_0/USPI/URXF/un1_rd_pointer_d_1_sqmuxa:B,1522
CORESPI_0/USPI/URXF/un1_rd_pointer_d_1_sqmuxa:C,6717
CORESPI_0/USPI/URXF/un1_rd_pointer_d_1_sqmuxa:D,6538
CORESPI_0/USPI/URXF/un1_rd_pointer_d_1_sqmuxa:Y,1522
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_344:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_344:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_226:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_226:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_23:IPENn,
CORESPI_0/USPI/UCC/spi_clk_count_s_251:B,4545
CORESPI_0/USPI/UCC/spi_clk_count_s_251:FCO,4545
GPIO_0_M2F_obuf/U0/U_IOPAD:D,
GPIO_0_M2F_obuf/U0/U_IOPAD:E,
GPIO_0_M2F_obuf/U0/U_IOPAD:PAD,
Demo_sb_0/CORERESETP_0/release_sdif3_core_q1:ALn,7074
Demo_sb_0/CORERESETP_0/release_sdif3_core_q1:CLK,8867
Demo_sb_0/CORERESETP_0/release_sdif3_core_q1:D,4998
Demo_sb_0/CORERESETP_0/release_sdif3_core_q1:Q,8867
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[6]:A,34836
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[6]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[6]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[6]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[6]:Y,15915
CORESPI_0/USPI/UCC/spi_clk_count[5]:ALn,
CORESPI_0/USPI/UCC/spi_clk_count[5]:CLK,4743
CORESPI_0/USPI/UCC/spi_clk_count[5]:D,4550
CORESPI_0/USPI/UCC/spi_clk_count[5]:Q,4743
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_98:A,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_98:IPA,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[7]:A,34781
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[7]:B,36880
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[7]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[7]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[7]:Y,15915
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_7:A,1563
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_7:IPA,1563
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_7:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_271:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_271:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_244:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_244:IPB,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg5_RNO:A,38553
Demo_sb_0/CORECONFIGP_0/soft_reset_reg5_RNO:B,38395
Demo_sb_0/CORECONFIGP_0/soft_reset_reg5_RNO:C,38312
Demo_sb_0/CORECONFIGP_0/soft_reset_reg5_RNO:Y,38312
CORESPI_0/USPI/URF/prdata_2_1[0]:A,3652
CORESPI_0/USPI/URF/prdata_2_1[0]:B,3551
CORESPI_0/USPI/URF/prdata_2_1[0]:C,687
CORESPI_0/USPI/URF/prdata_2_1[0]:D,1967
CORESPI_0/USPI/URF/prdata_2_1[0]:Y,687
CORESPI_0/USPI/UCC/msrxs_first6:A,6930
CORESPI_0/USPI/UCC/msrxs_first6:B,6853
CORESPI_0/USPI/UCC/msrxs_first6:Y,6853
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_21:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_21:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_327:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_327:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_304:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_304:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_2:IPC,
CORESPI_0/USPI/UCC/data_rx_q1:ALn,
CORESPI_0/USPI/UCC/data_rx_q1:CLK,8867
CORESPI_0/USPI/UCC/data_rx_q1:D,
CORESPI_0/USPI/UCC/data_rx_q1:Q,8867
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:CLK,37255
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[12]:Q,37255
Demo_sb_0/CORERESETP_0/release_sdif0_core6:A,17931
Demo_sb_0/CORERESETP_0/release_sdif0_core6:B,16783
Demo_sb_0/CORERESETP_0/release_sdif0_core6:C,16720
Demo_sb_0/CORERESETP_0/release_sdif0_core6:D,16636
Demo_sb_0/CORERESETP_0/release_sdif0_core6:Y,16636
Demo_sb_0/CORECONFIGP_0/paddr[6]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[6]:CLK,36412
Demo_sb_0/CORECONFIGP_0/paddr[6]:D,40649
Demo_sb_0/CORECONFIGP_0/paddr[6]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[6]:Q,36412
CORESPI_0/USPI/UCC/stxs_first:ALn,6056
CORESPI_0/USPI/UCC/stxs_first:CLK,5812
CORESPI_0/USPI/UCC/stxs_first:D,6809
CORESPI_0/USPI/UCC/stxs_first:EN,7726
CORESPI_0/USPI/UCC/stxs_first:Q,5812
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_130:IPB,
CORESPI_0/USPI/URF/prdata_2_6_2[2]:A,2484
CORESPI_0/USPI/URF/prdata_2_6_2[2]:B,1322
CORESPI_0/USPI/URF/prdata_2_6_2[2]:C,4117
CORESPI_0/USPI/URF/prdata_2_6_2[2]:Y,1322
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_33:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_33:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[31]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[31]:CLK,37154
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[31]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[31]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[31]:Q,37154
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_32:IPENn,
CORESPI_0/USPI/UTXF/empty_out_2_0_0_RNO_0:A,4927
CORESPI_0/USPI/UTXF/empty_out_2_0_0_RNO_0:B,2828
CORESPI_0/USPI/UTXF/empty_out_2_0_0_RNO_0:C,4818
CORESPI_0/USPI/UTXF/empty_out_2_0_0_RNO_0:D,4711
CORESPI_0/USPI/UTXF/empty_out_2_0_0_RNO_0:Y,2828
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_1_RNIUJAU2:A,4585
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_1_RNIUJAU2:B,4537
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_1_RNIUJAU2:C,3440
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_1_RNIUJAU2:D,1394
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_1_RNIUJAU2:Y,1394
CORESPI_0/USPI/URF/prdata_2_6_2_0[0]:A,2265
CORESPI_0/USPI/URF/prdata_2_6_2_0[0]:B,687
CORESPI_0/USPI/URF/prdata_2_6_2_0[0]:C,4496
CORESPI_0/USPI/URF/prdata_2_6_2_0[0]:D,2632
CORESPI_0/USPI/URF/prdata_2_6_2_0[0]:Y,687
CORESPI_0/USPI/UTXF/wr_pointer_d_1_sqmuxa_1_0_a3_0_a2:A,1671
CORESPI_0/USPI/UTXF/wr_pointer_d_1_sqmuxa_1_0_a3_0_a2:B,6872
CORESPI_0/USPI/UTXF/wr_pointer_d_1_sqmuxa_1_0_a3_0_a2:C,3971
CORESPI_0/USPI/UTXF/wr_pointer_d_1_sqmuxa_1_0_a3_0_a2:Y,1671
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_240:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_240:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_240:IPC,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[24]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[24]:CLK,37164
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[24]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[24]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[24]:Q,37164
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_257:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_257:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[6]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[6]:CLK,37290
Demo_sb_0/CORECONFIGP_0/pwdata[6]:D,40624
Demo_sb_0/CORECONFIGP_0/pwdata[6]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[6]:Q,37290
GPIO_4_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_4_M2F_obuf/U0/U_IOOUTFF:Y,
CORESPI_0/USPI/UCC/mtx_state_1_sqmuxa_1_0_a2_0_a2:A,7944
CORESPI_0/USPI/UCC/mtx_state_1_sqmuxa_1_0_a2_0_a2:B,7876
CORESPI_0/USPI/UCC/mtx_state_1_sqmuxa_1_0_a2_0_a2:C,5007
CORESPI_0/USPI/UCC/mtx_state_1_sqmuxa_1_0_a2_0_a2:Y,5007
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc1:A,5149
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc1:B,5058
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc1:C,3974
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc1:Y,3974
CORESPI_0/USPI/URF/control1[5]:ALn,
CORESPI_0/USPI/URF/control1[5]:CLK,3519
CORESPI_0/USPI/URF/control1[5]:D,7410
CORESPI_0/USPI/URF/control1[5]:EN,3607
CORESPI_0/USPI/URF/control1[5]:Q,3519
GPIO_9_M2F_obuf/U0/U_IOENFF:A,
GPIO_9_M2F_obuf/U0/U_IOENFF:Y,
Demo_sb_0/CORERESETP_0/next_sdif_released_0_sqmuxa_0_a3:A,5906
Demo_sb_0/CORERESETP_0/next_sdif_released_0_sqmuxa_0_a3:B,7839
Demo_sb_0/CORERESETP_0/next_sdif_released_0_sqmuxa_0_a3:Y,5906
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_26:C,8918
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_26:IPC,8918
CORESPI_0/USPI/UCC/stxs_datareg[1]:ALn,6056
CORESPI_0/USPI/UCC/stxs_datareg[1]:CLK,6821
CORESPI_0/USPI/UCC/stxs_datareg[1]:D,3968
CORESPI_0/USPI/UCC/stxs_datareg[1]:EN,5628
CORESPI_0/USPI/UCC/stxs_datareg[1]:Q,6821
CORESPI_0/USPI/UCC/mtx_datahold[0]:ALn,
CORESPI_0/USPI/UCC/mtx_datahold[0]:CLK,6044
CORESPI_0/USPI/UCC/mtx_datahold[0]:D,5970
CORESPI_0/USPI/UCC/mtx_datahold[0]:EN,4757
CORESPI_0/USPI/UCC/mtx_datahold[0]:Q,6044
CORESPI_0/USPI/UCC/stxs_bitsel_0_sqmuxa:A,5003
CORESPI_0/USPI/UCC/stxs_bitsel_0_sqmuxa:B,5039
CORESPI_0/USPI/UCC/stxs_bitsel_0_sqmuxa:Y,5003
CORESPI_0/USPI/URXF/counter_q_RNI6HE01[0]:A,3964
CORESPI_0/USPI/URXF/counter_q_RNI6HE01[0]:B,4923
CORESPI_0/USPI/URXF/counter_q_RNI6HE01[0]:Y,3964
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[3]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[3]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[3]:D,40583
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[3]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[3]:Q,36887
CORESPI_0/USPI/UTXF/counter_q[5]:ALn,
CORESPI_0/USPI/UTXF/counter_q[5]:CLK,5774
CORESPI_0/USPI/UTXF/counter_q[5]:D,2440
CORESPI_0/USPI/UTXF/counter_q[5]:Q,5774
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_123:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_123:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_164:A,35474
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_164:B,37294
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_164:IPA,35474
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_164:IPB,37294
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_66:B,37184
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_66:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_66:IPB,37184
CORESPI_0/USPI/URF/prdata_2_6_2[7]:A,4507
CORESPI_0/USPI/URF/prdata_2_6_2[7]:B,2681
CORESPI_0/USPI/URF/prdata_2_6_2[7]:C,1539
CORESPI_0/USPI/URF/prdata_2_6_2[7]:Y,1539
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_1:A,5023
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_1:B,4954
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_1:C,3784
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_1:FCI,3768
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_1:FCO,3768
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_1:S,4537
CORESPI_0/USPI/UCC/stxs_datareg[2]:ALn,6056
CORESPI_0/USPI/UCC/stxs_datareg[2]:CLK,6821
CORESPI_0/USPI/UCC/stxs_datareg[2]:D,3968
CORESPI_0/USPI/UCC/stxs_datareg[2]:EN,5628
CORESPI_0/USPI/UCC/stxs_datareg[2]:Q,6821
Demo_sb_0/CORERESETP_0/count_sdif0_cry[1]:B,17648
Demo_sb_0/CORERESETP_0/count_sdif0_cry[1]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[1]:FCO,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[1]:S,17808
CORESPI_0/USPI/UCON/rx_fifo_read_0_a3_0_a2:A,3417
CORESPI_0/USPI/UCON/rx_fifo_read_0_a3_0_a2:B,1423
CORESPI_0/USPI/UCON/rx_fifo_read_0_a3_0_a2:C,571
CORESPI_0/USPI/UCON/rx_fifo_read_0_a3_0_a2:Y,571
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_180:IPA,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[15]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[15]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[15]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[15]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[15]:Y,36887
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_368:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_368:IPB,
CORESPI_0/USPI/URXF/rd_pointer_q[3]:ALn,
CORESPI_0/USPI/URXF/rd_pointer_q[3]:CLK,687
CORESPI_0/USPI/URXF/rd_pointer_q[3]:D,1667
CORESPI_0/USPI/URXF/rd_pointer_q[3]:Q,687
CORESPI_0/USPI/URF/prdata_2_RNO[7]:A,1940
CORESPI_0/USPI/URF/prdata_2_RNO[7]:B,1539
CORESPI_0/USPI/URF/prdata_2_RNO[7]:C,2517
CORESPI_0/USPI/URF/prdata_2_RNO[7]:Y,1539
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_38:IPA,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[20]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[20]:B,34517
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[20]:Y,16991
CORESPI_0/USPI/UCC/un1_msrxp_strobe:A,7830
CORESPI_0/USPI/UCC/un1_msrxp_strobe:B,7841
CORESPI_0/USPI/UCC/un1_msrxp_strobe:Y,7830
Demo_sb_0/CORECONFIGP_0/pwdata[23]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[23]:CLK,38748
Demo_sb_0/CORECONFIGP_0/pwdata[23]:D,40641
Demo_sb_0/CORECONFIGP_0/pwdata[23]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[23]:Q,38748
CORESPI_0/USPI/UCC/stxs_pktsel:ALn,6056
CORESPI_0/USPI/UCC/stxs_pktsel:CLK,7933
CORESPI_0/USPI/UCC/stxs_pktsel:EN,5844
CORESPI_0/USPI/UCC/stxs_pktsel:Q,7933
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_3:A,3016
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_3:B,3826
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_3:C,7822
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_3:FCI,
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_3:Y,3016
Demo_sb_0/CORERESETP_0/sdif0_state_ns_1_0_.N_5_mux_i:A,7951
Demo_sb_0/CORERESETP_0/sdif0_state_ns_1_0_.N_5_mux_i:B,7896
Demo_sb_0/CORERESETP_0/sdif0_state_ns_1_0_.N_5_mux_i:C,6925
Demo_sb_0/CORERESETP_0/sdif0_state_ns_1_0_.N_5_mux_i:Y,6925
CORESPI_0/USPI/UCC/msrxs_shiftreg[0]:ALn,
CORESPI_0/USPI/UCC/msrxs_shiftreg[0]:CLK,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg[0]:D,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg[0]:EN,6849
CORESPI_0/USPI/UCC/msrxs_shiftreg[0]:Q,7926
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_185:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_185:IPB,
CORESPI_0/USPI/UCC/msrxs_datain[1]:ALn,
CORESPI_0/USPI/UCC/msrxs_datain[1]:CLK,8911
CORESPI_0/USPI/UCC/msrxs_datain[1]:D,8860
CORESPI_0/USPI/UCC/msrxs_datain[1]:EN,5765
CORESPI_0/USPI/UCC/msrxs_datain[1]:Q,8911
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_5:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_5:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[26]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[26]:CLK,37210
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[26]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[26]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[26]:Q,37210
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_20:C,8966
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_20:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_20:IPC,8966
CORESPI_0/USPI/UCC/stxs_datareg5_3:A,5145
CORESPI_0/USPI/UCC/stxs_datareg5_3:B,5102
CORESPI_0/USPI/UCC/stxs_datareg5_3:Y,5102
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_43:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_43:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_211:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_211:IPB,
CORESPI_0/USPI/URF/CLK_DIV[7]:ALn,
CORESPI_0/USPI/URF/CLK_DIV[7]:CLK,3445
CORESPI_0/USPI/URF/CLK_DIV[7]:D,7415
CORESPI_0/USPI/URF/CLK_DIV[7]:EN,3484
CORESPI_0/USPI/URF/CLK_DIV[7]:Q,3445
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_277:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_277:IPB,
CORESPI_0/USPI/URF/prdata_2_RNO[4]:A,2044
CORESPI_0/USPI/URF/prdata_2_RNO[4]:B,1549
CORESPI_0/USPI/URF/prdata_2_RNO[4]:C,2527
CORESPI_0/USPI/URF/prdata_2_RNO[4]:Y,1549
CORESPI_0/USPI/UCC/msrxs_datain[6]:ALn,
CORESPI_0/USPI/UCC/msrxs_datain[6]:CLK,8965
CORESPI_0/USPI/UCC/msrxs_datain[6]:D,8860
CORESPI_0/USPI/UCC/msrxs_datain[6]:EN,5765
CORESPI_0/USPI/UCC/msrxs_datain[6]:Q,8965
CORESPI_0/USPI/UCC/stxp_lastframe:ALn,
CORESPI_0/USPI/UCC/stxp_lastframe:CLK,7933
CORESPI_0/USPI/UCC/stxp_lastframe:D,4264
CORESPI_0/USPI/UCC/stxp_lastframe:EN,7746
CORESPI_0/USPI/UCC/stxp_lastframe:Q,7933
CORESPI_0/USPI/URF/cfg_ssel[7]:ALn,
CORESPI_0/USPI/URF/cfg_ssel[7]:CLK,3529
CORESPI_0/USPI/URF/cfg_ssel[7]:D,7415
CORESPI_0/USPI/URF/cfg_ssel[7]:EN,3562
CORESPI_0/USPI/URF/cfg_ssel[7]:Q,3529
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_351:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_351:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_336:IPA,
CORESPI_0/USPI/UCC/spi_clk_count_cry[6]:B,7792
CORESPI_0/USPI/UCC/spi_clk_count_cry[6]:C,4566
CORESPI_0/USPI/UCC/spi_clk_count_cry[6]:FCI,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[6]:FCO,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[6]:S,4534
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_209:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_209:IPB,
CORESPI_0/USPI/UCC/stxs_bitcnt_n3:A,6939
CORESPI_0/USPI/UCC/stxs_bitcnt_n3:B,5964
CORESPI_0/USPI/UCC/stxs_bitcnt_n3:C,7836
CORESPI_0/USPI/UCC/stxs_bitcnt_n3:Y,5964
CORESPI_0/USPI/UCC/rx_cmdsize:ALn,
CORESPI_0/USPI/UCC/rx_cmdsize:CLK,8017
CORESPI_0/USPI/UCC/rx_cmdsize:D,6631
CORESPI_0/USPI/UCC/rx_cmdsize:Q,8017
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_111:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_111:IPB,
CORESPI_0/USPI/URF/prdata_2_1[3]:A,1928
CORESPI_0/USPI/URF/prdata_2_1[3]:B,3320
CORESPI_0/USPI/URF/prdata_2_1[3]:C,3216
CORESPI_0/USPI/URF/prdata_2_1[3]:Y,1928
CORESPI_0/USPI/UCC/stxs_datareg[3]:ALn,6056
CORESPI_0/USPI/UCC/stxs_datareg[3]:CLK,6821
CORESPI_0/USPI/UCC/stxs_datareg[3]:D,3968
CORESPI_0/USPI/UCC/stxs_datareg[3]:EN,5628
CORESPI_0/USPI/UCC/stxs_datareg[3]:Q,6821
CORESPI_0/USPI/UCC/txfifo_dhold_dec_0_0_o2_i_a2_0_a2:A,4762
CORESPI_0/USPI/UCC/txfifo_dhold_dec_0_0_o2_i_a2_0_a2:B,4754
CORESPI_0/USPI/UCC/txfifo_dhold_dec_0_0_o2_i_a2_0_a2:C,3733
CORESPI_0/USPI/UCC/txfifo_dhold_dec_0_0_o2_i_a2_0_a2:D,4540
CORESPI_0/USPI/UCC/txfifo_dhold_dec_0_0_o2_i_a2_0_a2:Y,3733
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_258:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_258:IPB,
CORESPI_0/USPI/UCC/mtx_alldone_RNO:A,5135
CORESPI_0/USPI/UCC/mtx_alldone_RNO:B,7886
CORESPI_0/USPI/UCC/mtx_alldone_RNO:Y,5135
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_6:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_6:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_0:IPA,
CORESPI_0/USPI/UTXF/counter_q[2]:ALn,
CORESPI_0/USPI/UTXF/counter_q[2]:CLK,4794
CORESPI_0/USPI/UTXF/counter_q[2]:D,2447
CORESPI_0/USPI/UTXF/counter_q[2]:Q,4794
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[2]:A,3631
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[2]:B,3839
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[2]:C,7829
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[2]:Y,3631
Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:A,
Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_290:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_290:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_229:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_229:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_229:IPC,
CORESPI_0/USPI/UCC/un1_stxs_datareg_3_sqmuxa:A,6930
CORESPI_0/USPI/UCC/un1_stxs_datareg_3_sqmuxa:B,5874
CORESPI_0/USPI/UCC/un1_stxs_datareg_3_sqmuxa:C,4917
CORESPI_0/USPI/UCC/un1_stxs_datareg_3_sqmuxa:Y,4917
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_69:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_69:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[9]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[9]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[9]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[9]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[9]:Y,36887
SPI_DO_obuf/U0/U_IOPAD:D,
SPI_DO_obuf/U0/U_IOPAD:E,
SPI_DO_obuf/U0/U_IOPAD:PAD,
FCCC_0/GL1_INST/U0_RGB1:An,
FCCC_0/GL1_INST/U0_RGB1:YL,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_245:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_245:IPB,
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[6]:A,5083
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[6]:B,4917
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[6]:C,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[6]:Y,3968
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_164:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_164:IPB,
Demo_sb_0/CORECONFIGP_0/paddr[5]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[5]:CLK,35954
Demo_sb_0/CORECONFIGP_0/paddr[5]:D,40637
Demo_sb_0/CORECONFIGP_0/paddr[5]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[5]:Q,35954
CORESPI_0/USPI/URF/prdata_2_6_2[4]:A,4518
CORESPI_0/USPI/URF/prdata_2_6_2[4]:B,2691
CORESPI_0/USPI/URF/prdata_2_6_2[4]:C,1549
CORESPI_0/USPI/URF/prdata_2_6_2[4]:Y,1549
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_96:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_96:IPB,
Demo_sb_0/POWER_ON_RESET_N_keep_RNIIUV3/U0:An,
Demo_sb_0/POWER_ON_RESET_N_keep_RNIIUV3/U0:YWn,
CORESPI_0/USPI/UCC/SYNC2_msrxp_pktsel:ALn,
CORESPI_0/USPI/UCC/SYNC2_msrxp_pktsel:CLK,6791
CORESPI_0/USPI/UCC/SYNC2_msrxp_pktsel:D,8867
CORESPI_0/USPI/UCC/SYNC2_msrxp_pktsel:Q,6791
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_RNIEI67/U0_RGB1:An,
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_RNIEI67/U0_RGB1:YL,17077
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_25:C,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_25:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_186:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_186:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_136:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_136:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_15:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_15:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_15:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_48:IPA,
CORESPI_0/USPI/URF/prdata_2_RNO[2]:A,1920
CORESPI_0/USPI/URF/prdata_2_RNO[2]:B,1322
CORESPI_0/USPI/URF/prdata_2_RNO[2]:C,2264
CORESPI_0/USPI/URF/prdata_2_RNO[2]:Y,1322
CORESPI_0/USPI/UCC/spi_ssel_mux:A,6921
CORESPI_0/USPI/UCC/spi_ssel_mux:B,6858
CORESPI_0/USPI/UCC/spi_ssel_mux:C,6720
CORESPI_0/USPI/UCC/spi_ssel_mux:Y,6720
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_1:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_8:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_8:IPB,
CORESPI_0/USPI/UCC/mtx_midbit:ALn,
CORESPI_0/USPI/UCC/mtx_midbit:CLK,7852
CORESPI_0/USPI/UCC/mtx_midbit:D,6882
CORESPI_0/USPI/UCC/mtx_midbit:Q,7852
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_32:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_32:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_17:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_17:IPC,
CORESPI_0/USPI/URF/int_raw[3]:ALn,
CORESPI_0/USPI/URF/int_raw[3]:CLK,3436
CORESPI_0/USPI/URF/int_raw[3]:D,1807
CORESPI_0/USPI/URF/int_raw[3]:Q,3436
CORESPI_0/USPI/un1_PADDR_0_a2_0_a2_1:A,1472
CORESPI_0/USPI/un1_PADDR_0_a2_0_a2_1:B,1423
CORESPI_0/USPI/un1_PADDR_0_a2_0_a2_1:Y,1423
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_213:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_213:IPB,
CORESPI_0/USPI/UCC/stxs_direct:ALn,6056
CORESPI_0/USPI/UCC/stxs_direct:CLK,5910
CORESPI_0/USPI/UCC/stxs_direct:D,6108
CORESPI_0/USPI/UCC/stxs_direct:EN,7726
CORESPI_0/USPI/UCC/stxs_direct:Q,5910
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_89:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_89:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_21:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_21:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_192:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_190:IPB,
CORESPI_0/USPI/UCC/mtx_re_RNO:A,6075
CORESPI_0/USPI/UCC/mtx_re_RNO:B,7913
CORESPI_0/USPI/UCC/mtx_re_RNO:Y,6075
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_371:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_371:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_371:IPC,
FCCC_1/CCC_INST/INST_CCC_IP:CLK0,
FCCC_1/CCC_INST/INST_CCC_IP:CLK1,
FCCC_1/CCC_INST/INST_CCC_IP:CLK2,
FCCC_1/CCC_INST/INST_CCC_IP:CLK3,
FCCC_1/CCC_INST/INST_CCC_IP:GL0,
FCCC_1/CCC_INST/INST_CCC_IP:GPD0_ARST_N,
FCCC_1/CCC_INST/INST_CCC_IP:GPD1_ARST_N,
FCCC_1/CCC_INST/INST_CCC_IP:GPD2_ARST_N,
FCCC_1/CCC_INST/INST_CCC_IP:GPD3_ARST_N,
FCCC_1/CCC_INST/INST_CCC_IP:LOCK,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX0_ARST_N,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX0_HOLD_N,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX0_SEL,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX1_ARST_N,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX1_HOLD_N,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX1_SEL,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX2_ARST_N,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX2_HOLD_N,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX2_SEL,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX3_ARST_N,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX3_HOLD_N,
FCCC_1/CCC_INST/INST_CCC_IP:NGMUX3_SEL,
FCCC_1/CCC_INST/INST_CCC_IP:PADDR[2],
FCCC_1/CCC_INST/INST_CCC_IP:PADDR[3],
FCCC_1/CCC_INST/INST_CCC_IP:PADDR[4],
FCCC_1/CCC_INST/INST_CCC_IP:PADDR[5],
FCCC_1/CCC_INST/INST_CCC_IP:PADDR[6],
FCCC_1/CCC_INST/INST_CCC_IP:PADDR[7],
FCCC_1/CCC_INST/INST_CCC_IP:PCLK,
FCCC_1/CCC_INST/INST_CCC_IP:PENABLE,
FCCC_1/CCC_INST/INST_CCC_IP:PLL_ARST_N,
FCCC_1/CCC_INST/INST_CCC_IP:PLL_BYPASS_N,
FCCC_1/CCC_INST/INST_CCC_IP:PLL_POWERDOWN_N,
FCCC_1/CCC_INST/INST_CCC_IP:PRESET_N,
FCCC_1/CCC_INST/INST_CCC_IP:PSEL,
FCCC_1/CCC_INST/INST_CCC_IP:PWDATA[0],
FCCC_1/CCC_INST/INST_CCC_IP:PWDATA[1],
FCCC_1/CCC_INST/INST_CCC_IP:PWDATA[2],
FCCC_1/CCC_INST/INST_CCC_IP:PWDATA[3],
FCCC_1/CCC_INST/INST_CCC_IP:PWDATA[4],
FCCC_1/CCC_INST/INST_CCC_IP:PWDATA[5],
FCCC_1/CCC_INST/INST_CCC_IP:PWDATA[6],
FCCC_1/CCC_INST/INST_CCC_IP:PWDATA[7],
FCCC_1/CCC_INST/INST_CCC_IP:PWRITE,
CORESPI_0/USPI/URXF/rd_pointer_q[4]:ALn,
CORESPI_0/USPI/URXF/rd_pointer_q[4]:CLK,697
CORESPI_0/USPI/URXF/rd_pointer_q[4]:D,1667
CORESPI_0/USPI/URXF/rd_pointer_q[4]:Q,697
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_22:IPENn,
MUX4_4_0/SPI_SS0:A,
MUX4_4_0/SPI_SS0:B,
MUX4_4_0/SPI_SS0:C,
MUX4_4_0/SPI_SS0:Y,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[25]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[25]:CLK,37226
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[25]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[25]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[25]:Q,37226
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_12:C,8976
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_12:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_12:IPC,8976
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_225:IPA,
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[3]:A,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[3]:B,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[3]:Y,4944
CORESPI_0/USPI/UCC/mtx_re_q2:ALn,
CORESPI_0/USPI/UCC/mtx_re_q2:CLK,5979
CORESPI_0/USPI/UCC/mtx_re_q2:D,8860
CORESPI_0/USPI/UCC/mtx_re_q2:Q,5979
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base_RNI2J49/U0_RGB1:An,
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base_RNI2J49/U0_RGB1:YL,7074
CORESPI_0/USPI/UTXF/rd_pointer_q_3[0]:A,4981
CORESPI_0/USPI/UTXF/rd_pointer_q_3[0]:B,4880
CORESPI_0/USPI/UTXF/rd_pointer_q_3[0]:C,7816
CORESPI_0/USPI/UTXF/rd_pointer_q_3[0]:Y,4880
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_289:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_207:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_207:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_346:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_346:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_217:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_12:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_12:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_59:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_186:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_206:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_206:IPB,
CORESPI_0/USPI/URF/prdata_2_sn_m6:A,2654
CORESPI_0/USPI/URF/prdata_2_sn_m6:B,2591
CORESPI_0/USPI/URF/prdata_2_sn_m6:C,2264
CORESPI_0/USPI/URF/prdata_2_sn_m6:Y,2264
CORESPI_0/USPI/UCC/msrxp_pktend8:A,7931
CORESPI_0/USPI/UCC/msrxp_pktend8:B,7933
CORESPI_0/USPI/UCC/msrxp_pktend8:Y,7931
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_228:IPB,
CORESPI_0/USPI/UCC/clk_div_val_reg[7]:ALn,
CORESPI_0/USPI/UCC/clk_div_val_reg[7]:CLK,4949
CORESPI_0/USPI/UCC/clk_div_val_reg[7]:D,8860
CORESPI_0/USPI/UCC/clk_div_val_reg[7]:EN,7753
CORESPI_0/USPI/UCC/clk_div_val_reg[7]:Q,4949
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_78:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_78:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_26:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_26:IPB,
Demo_sb_0/CORERESETP_0/sdif3_areset_n_rcosc:ALn,
Demo_sb_0/CORERESETP_0/sdif3_areset_n_rcosc:CLK,18769
Demo_sb_0/CORERESETP_0/sdif3_areset_n_rcosc:D,18868
Demo_sb_0/CORERESETP_0/sdif3_areset_n_rcosc:Q,18769
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31_1:A,3235
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31_1:B,3158
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31_1:Y,3158
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_33:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_33:IPC,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[2]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[2]:CLK,36880
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[2]:D,40544
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[2]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[2]:Q,36880
FCCC_1/CCC_INST/IP_INTERFACE_13:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_13:IPC,
FCCC_1/CCC_INST/IP_INTERFACE_11:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_11:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_227:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_227:IPB,
CORESPI_0/USPI/UTXF/rd_pointer_q[1]:ALn,
CORESPI_0/USPI/UTXF/rd_pointer_q[1]:CLK,3489
CORESPI_0/USPI/UTXF/rd_pointer_q[1]:D,4040
CORESPI_0/USPI/UTXF/rd_pointer_q[1]:Q,3489
CORESPI_0/USPI/UCC/spi_data_out_u:A,
CORESPI_0/USPI/UCC/spi_data_out_u:B,
CORESPI_0/USPI/UCC/spi_data_out_u:C,
CORESPI_0/USPI/UCC/spi_data_out_u:D,
CORESPI_0/USPI/UCC/spi_data_out_u:Y,
CORESPI_0/USPI/URF/prdata_2_6_1[7]:A,3529
CORESPI_0/USPI/URF/prdata_2_6_1[7]:B,3445
CORESPI_0/USPI/URF/prdata_2_6_1[7]:C,1892
CORESPI_0/USPI/URF/prdata_2_6_1[7]:D,1539
CORESPI_0/USPI/URF/prdata_2_6_1[7]:Y,1539
CORESPI_0/USPI/UCC/stxs_datareg[6]:ALn,6056
CORESPI_0/USPI/UCC/stxs_datareg[6]:CLK,6821
CORESPI_0/USPI/UCC/stxs_datareg[6]:D,3968
CORESPI_0/USPI/UCC/stxs_datareg[6]:EN,5628
CORESPI_0/USPI/UCC/stxs_datareg[6]:Q,6821
CORESPI_0/USPI/UCC/msrxs_shiftreg[4]:ALn,
CORESPI_0/USPI/UCC/msrxs_shiftreg[4]:CLK,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg[4]:D,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg[4]:EN,6849
CORESPI_0/USPI/UCC/msrxs_shiftreg[4]:Q,7926
CORESPI_0/USPI/URXF/wr_pointer_q[1]:ALn,
CORESPI_0/USPI/URXF/wr_pointer_q[1]:CLK,4532
CORESPI_0/USPI/URXF/wr_pointer_q[1]:D,4649
CORESPI_0/USPI/URXF/wr_pointer_q[1]:Q,4532
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_325:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_325:IPB,
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[1]:A,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[1]:B,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[1]:Y,4944
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_306:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_306:IPB,
GPIO_2_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_2_M2F_obuf/U0/U_IOOUTFF:Y,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:CLK,37225
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PSLVERR:Q,37225
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_145:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_226:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_226:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_112:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_112:IPB,
Demo_sb_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:ALn,
Demo_sb_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:CLK,7882
Demo_sb_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:D,8867
Demo_sb_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:Q,7882
Demo_sb_0/CORERESETP_0/count_sdif0[4]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[4]:CLK,16903
Demo_sb_0/CORERESETP_0/count_sdif0[4]:D,17754
Demo_sb_0/CORERESETP_0/count_sdif0[4]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[4]:Q,16903
CORESPI_0/USPI/UCC/spi_clk_count[2]:ALn,
CORESPI_0/USPI/UCC/spi_clk_count[2]:CLK,4596
CORESPI_0/USPI/UCC/spi_clk_count[2]:D,4566
CORESPI_0/USPI/UCC/spi_clk_count[2]:Q,4596
CORESPI_0/USPI/UTXF/wr_pointer_q_3[0]:A,7944
CORESPI_0/USPI/UTXF/wr_pointer_q_3[0]:B,1743
CORESPI_0/USPI/UTXF/wr_pointer_q_3[0]:C,1610
CORESPI_0/USPI/UTXF/wr_pointer_q_3[0]:Y,1610
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_12:CLK,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_12:IPCLKn,
Demo_sb_0/CORECONFIGP_0/psel:ALn,
Demo_sb_0/CORECONFIGP_0/psel:CLK,15409
Demo_sb_0/CORECONFIGP_0/psel:D,17705
Demo_sb_0/CORECONFIGP_0/psel:Q,15409
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_10:B,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_10:C,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_10:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_10:IPC,
Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An,
Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YL,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_10:IPB,
GPIO_2_M2F_obuf/U0/U_IOENFF:A,
GPIO_2_M2F_obuf/U0/U_IOENFF:Y,
Demo_sb_0/CORERESETP_0/release_sdif0_core:ALn,17077
Demo_sb_0/CORERESETP_0/release_sdif0_core:CLK,4998
Demo_sb_0/CORERESETP_0/release_sdif0_core:EN,16636
Demo_sb_0/CORERESETP_0/release_sdif0_core:Q,4998
Demo_sb_0/CORERESETP_0/MSS_HPMS_READY_int:ALn,8741
Demo_sb_0/CORERESETP_0/MSS_HPMS_READY_int:CLK,
Demo_sb_0/CORERESETP_0/MSS_HPMS_READY_int:D,7882
Demo_sb_0/CORERESETP_0/MSS_HPMS_READY_int:Q,
CORESPI_0/USPI/UTXF/counter_q[1]:ALn,
CORESPI_0/USPI/UTXF/counter_q[1]:CLK,4703
CORESPI_0/USPI/UTXF/counter_q[1]:D,2447
CORESPI_0/USPI/UTXF/counter_q[1]:Q,4703
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_261:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_261:IPB,
CORESPI_0/USPI/UCC/un1_mtx_bitsel_1_sqmuxa_1_0_0_a2:A,4989
CORESPI_0/USPI/UCC/un1_mtx_bitsel_1_sqmuxa_1_0_0_a2:B,6834
CORESPI_0/USPI/UCC/un1_mtx_bitsel_1_sqmuxa_1_0_0_a2:Y,4989
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[7]:A,5082
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[7]:B,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[7]:C,6911
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[7]:D,6821
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[7]:Y,3968
CORESPI_0/USPI/UCC/mtx_busy:ALn,
CORESPI_0/USPI/UCC/mtx_busy:CLK,2406
CORESPI_0/USPI/UCC/mtx_busy:D,6055
CORESPI_0/USPI/UCC/mtx_busy:EN,4721
CORESPI_0/USPI/UCC/mtx_busy:Q,2406
GPIO_5_M2F_obuf/U0/U_IOPAD:D,
GPIO_5_M2F_obuf/U0/U_IOPAD:E,
GPIO_5_M2F_obuf/U0/U_IOPAD:PAD,
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_1:A,6006
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_1:B,4921
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_1:C,3968
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_1:Y,3968
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_198:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_198:IPB,
CORESPI_0/USPI/URXF/counter_q[1]:ALn,
CORESPI_0/USPI/URXF/counter_q[1]:CLK,4131
CORESPI_0/USPI/URXF/counter_q[1]:D,2606
CORESPI_0/USPI/URXF/counter_q[1]:Q,4131
Demo_sb_0/CORERESETP_0/sm0_state_ns[4]:A,8010
Demo_sb_0/CORERESETP_0/sm0_state_ns[4]:B,7920
Demo_sb_0/CORERESETP_0/sm0_state_ns[4]:C,7876
Demo_sb_0/CORERESETP_0/sm0_state_ns[4]:D,5723
Demo_sb_0/CORERESETP_0/sm0_state_ns[4]:Y,5723
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_53:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_53:IPB,
CORESPI_0/USPI/UCC/mtx_fiforead:ALn,
CORESPI_0/USPI/UCC/mtx_fiforead:CLK,2938
CORESPI_0/USPI/UCC/mtx_fiforead:D,4861
CORESPI_0/USPI/UCC/mtx_fiforead:Q,2938
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_12:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_9:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_9:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_9:IPC,
CORESPI_0/USPI/UCC/msrxs_pktsel:A,8017
CORESPI_0/USPI/UCC/msrxs_pktsel:B,7933
CORESPI_0/USPI/UCC/msrxs_pktsel:Y,7933
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_191:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_324:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_77:A,37205
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_77:B,37166
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_77:IPA,37205
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_77:IPB,37166
CORESPI_0/USPI/URXF/counter_q_RNIN2EI2[0]:A,5041
CORESPI_0/USPI/URXF/counter_q_RNIN2EI2[0]:B,6005
CORESPI_0/USPI/URXF/counter_q_RNIN2EI2[0]:C,682
CORESPI_0/USPI/URXF/counter_q_RNIN2EI2[0]:D,3964
CORESPI_0/USPI/URXF/counter_q_RNIN2EI2[0]:Y,682
CORESPI_0/USPI/UCC/txfifo_datadelay[7]:ALn,
CORESPI_0/USPI/UCC/txfifo_datadelay[7]:CLK,
CORESPI_0/USPI/UCC/txfifo_datadelay[7]:D,6022
CORESPI_0/USPI/UCC/txfifo_datadelay[7]:Q,
Demo_sb_0/CORERESETP_0/INIT_DONE_int:ALn,7074
Demo_sb_0/CORERESETP_0/INIT_DONE_int:CLK,
Demo_sb_0/CORERESETP_0/INIT_DONE_int:EN,8792
Demo_sb_0/CORERESETP_0/INIT_DONE_int:Q,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_28:C,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_28:IPC,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[10]:A,34626
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[10]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[10]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[10]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[10]:Y,15915
Demo_sb_0/CORECONFIGP_0/pwdata[24]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[24]:CLK,38602
Demo_sb_0/CORECONFIGP_0/pwdata[24]:D,40634
Demo_sb_0/CORECONFIGP_0/pwdata[24]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[24]:Q,38602
CORESPI_0/USPI/UCC/spi_clk_out:ALn,
CORESPI_0/USPI/UCC/spi_clk_out:CLK,7926
CORESPI_0/USPI/UCC/spi_clk_out:D,8820
CORESPI_0/USPI/UCC/spi_clk_out:Q,7926
Demo_sb_0/CORERESETP_0/sm0_state[5]:ALn,7074
Demo_sb_0/CORERESETP_0/sm0_state[5]:CLK,7845
Demo_sb_0/CORERESETP_0/sm0_state[5]:D,5889
Demo_sb_0/CORERESETP_0/sm0_state[5]:Q,7845
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_9:IPENn,
CORESPI_0/USPI/UCC/txfifo_datadelay[4]:ALn,
CORESPI_0/USPI/UCC/txfifo_datadelay[4]:CLK,6911
CORESPI_0/USPI/UCC/txfifo_datadelay[4]:D,5958
CORESPI_0/USPI/UCC/txfifo_datadelay[4]:Q,6911
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_151:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_151:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_80:A,37180
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_80:B,37193
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_80:IPA,37180
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_80:IPB,37193
Demo_sb_0/CORECONFIGP_0/state_s0_0_a2:A,37386
Demo_sb_0/CORECONFIGP_0/state_s0_0_a2:B,37576
Demo_sb_0/CORECONFIGP_0/state_s0_0_a2:Y,37386
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_103:A,9904
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_103:IPA,9904
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_103:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[17]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[17]:CLK,38497
Demo_sb_0/CORECONFIGP_0/pwdata[17]:D,40654
Demo_sb_0/CORECONFIGP_0/pwdata[17]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[17]:Q,38497
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[12]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[12]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[12]:D,40574
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[12]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[12]:Q,36887
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_15:C,7321
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_15:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_15:IPC,7321
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[4]:A,5108
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[4]:B,4917
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[4]:C,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[4]:Y,3968
CORESPI_0/USPI/UTXF/rd_pointer_q_3[3]:A,4964
CORESPI_0/USPI/UTXF/rd_pointer_q_3[3]:B,3992
CORESPI_0/USPI/UTXF/rd_pointer_q_3[3]:C,7822
CORESPI_0/USPI/UTXF/rd_pointer_q_3[3]:Y,3992
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_230:IPB,
CORESPI_0/USPI/UCC/stxp_lastframe_5_0_a2_0_a2:A,4264
CORESPI_0/USPI/UCC/stxp_lastframe_5_0_a2_0_a2:B,7817
CORESPI_0/USPI/UCC/stxp_lastframe_5_0_a2_0_a2:Y,4264
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_63:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_63:IPB,
CORESPI_0/USPI/URF/prdata_2_6_2_0[2]:A,1987
CORESPI_0/USPI/URF/prdata_2_6_2_0[2]:B,1920
CORESPI_0/USPI/URF/prdata_2_6_2_0[2]:C,4188
CORESPI_0/USPI/URF/prdata_2_6_2_0[2]:D,2335
CORESPI_0/USPI/URF/prdata_2_6_2_0[2]:Y,1920
CORESPI_0/USPI/UCC/N_216_i:A,3551
CORESPI_0/USPI/UCC/N_216_i:B,3547
CORESPI_0/USPI/UCC/N_216_i:Y,3547
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_261:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_82:B,37175
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_82:IPB,37175
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_7:IPENn,
Demo_sb_0/CORERESETP_0/release_sdif0_core_q1:ALn,7074
Demo_sb_0/CORERESETP_0/release_sdif0_core_q1:CLK,8867
Demo_sb_0/CORERESETP_0/release_sdif0_core_q1:D,4998
Demo_sb_0/CORERESETP_0/release_sdif0_core_q1:Q,8867
Demo_sb_0/CORERESETP_0/count_sdif0_cry[2]:B,17664
Demo_sb_0/CORERESETP_0/count_sdif0_cry[2]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[2]:FCO,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[2]:S,17786
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base:ALn,6142
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base:CLK,
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base:D,8867
Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base:Q,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_123:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_123:IPB,
CORESPI_0/USPI/UTXF/full_out_RNI8D7S1:A,3935
CORESPI_0/USPI/UTXF/full_out_RNI8D7S1:B,2764
CORESPI_0/USPI/UTXF/full_out_RNI8D7S1:C,3846
CORESPI_0/USPI/UTXF/full_out_RNI8D7S1:Y,2764
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_19:C,8965
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_19:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_19:IPC,8965
CORESPI_0/USPI/URF/int_raw[7]:ALn,
CORESPI_0/USPI/URF/int_raw[7]:CLK,4462
CORESPI_0/USPI/URF/int_raw[7]:D,2619
CORESPI_0/USPI/URF/int_raw[7]:Q,4462
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_0_wmux:A,6106
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_0_wmux:B,6023
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_0_wmux:C,6044
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_0_wmux:D,5785
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_0_wmux:FCO,
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_0_wmux:Y,5785
Demo_sb_0/CORECONFIGP_0/state[1]:ALn,
Demo_sb_0/CORECONFIGP_0/state[1]:CLK,17705
Demo_sb_0/CORECONFIGP_0/state[1]:D,16035
Demo_sb_0/CORECONFIGP_0/state[1]:Q,17705
FCCC_1/CCC_INST/IP_INTERFACE_16:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_16:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_109:IPA,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_11:B,8908
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_11:C,9006
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_11:IPB,8908
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_11:IPC,9006
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_34:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_34:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_96:IPA,
CORESPI_0/USPI/UCC/mtx_rxbusy:ALn,
CORESPI_0/USPI/UCC/mtx_rxbusy:CLK,2516
CORESPI_0/USPI/UCC/mtx_rxbusy:D,6055
CORESPI_0/USPI/UCC/mtx_rxbusy:EN,4620
CORESPI_0/USPI/UCC/mtx_rxbusy:Q,2516
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_253:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_253:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_253:IPC,
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO_0[4]:A,6088
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO_0[4]:B,6073
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO_0[4]:C,4890
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO_0[4]:D,4894
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2_RNO_0[4]:Y,4890
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_83:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_25:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_132:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_132:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_130:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_130:IPB,
CORESPI_0/USPI/UCC/stxs_dataerr_5_u:A,8004
CORESPI_0/USPI/UCC/stxs_dataerr_5_u:B,7926
CORESPI_0/USPI/UCC/stxs_dataerr_5_u:C,5102
CORESPI_0/USPI/UCC/stxs_dataerr_5_u:D,7682
CORESPI_0/USPI/UCC/stxs_dataerr_5_u:Y,5102
CORESPI_0/USPI/UCC/msrx_async_reset_ok:ALn,
CORESPI_0/USPI/UCC/msrx_async_reset_ok:CLK,4904
CORESPI_0/USPI/UCC/msrx_async_reset_ok:D,8834
CORESPI_0/USPI/UCC/msrx_async_reset_ok:Q,4904
CORESPI_0/USPI/UCC/msrxs_datain[4]:ALn,
CORESPI_0/USPI/UCC/msrxs_datain[4]:CLK,8960
CORESPI_0/USPI/UCC/msrxs_datain[4]:D,8860
CORESPI_0/USPI/UCC/msrxs_datain[4]:EN,5765
CORESPI_0/USPI/UCC/msrxs_datain[4]:Q,8960
CORESPI_0/USPI/URXF/un34_fifo_mem_d_31_2:A,4668
CORESPI_0/USPI/URXF/un34_fifo_mem_d_31_2:B,4584
CORESPI_0/USPI/URXF/un34_fifo_mem_d_31_2:C,4532
CORESPI_0/USPI/URXF/un34_fifo_mem_d_31_2:Y,4532
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[23]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[23]:CLK,37175
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[23]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[23]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[23]:Q,37175
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_29:IPENn,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_198:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_198:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_0:A,
FCCC_0/CCC_INST/IP_INTERFACE_0:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_0:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_239:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_239:IPB,
Demo_sb_0/CORECONFIGP_0/state[0]:ALn,
Demo_sb_0/CORECONFIGP_0/state[0]:CLK,17854
Demo_sb_0/CORECONFIGP_0/state[0]:D,-1229
Demo_sb_0/CORECONFIGP_0/state[0]:Q,17854
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0_a2_0[0]:A,6850
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0_a2_0[0]:B,4786
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0_a2_0[0]:C,6801
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0_a2_0[0]:Y,4786
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_129:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_129:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_54:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_54:IPB,
CORESPI_0/USPI/UCC/stxp_lastframe_RNO:A,7916
CORESPI_0/USPI/UCC/stxp_lastframe_RNO:B,7746
CORESPI_0/USPI/UCC/stxp_lastframe_RNO:C,7805
CORESPI_0/USPI/UCC/stxp_lastframe_RNO:Y,7746
GPIO_4_M2F_obuf/U0/U_IOENFF:A,
GPIO_4_M2F_obuf/U0/U_IOENFF:Y,
CORESPI_0/USPI/URF/prdata_2_6_2_0[5]:A,2258
CORESPI_0/USPI/URF/prdata_2_6_2_0[5]:B,2058
CORESPI_0/USPI/URF/prdata_2_6_2_0[5]:C,4489
CORESPI_0/USPI/URF/prdata_2_6_2_0[5]:D,2620
CORESPI_0/USPI/URF/prdata_2_6_2_0[5]:Y,2058
Demo_sb_0/CORECONFIGP_0/control_reg_1[1]:ALn,
Demo_sb_0/CORECONFIGP_0/control_reg_1[1]:CLK,35821
Demo_sb_0/CORECONFIGP_0/control_reg_1[1]:D,40559
Demo_sb_0/CORECONFIGP_0/control_reg_1[1]:EN,16893
Demo_sb_0/CORECONFIGP_0/control_reg_1[1]:Q,35821
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_69:B,37182
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_69:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_69:IPB,37182
CORESPI_0/USPI/URF/prdata_2_4[3]:A,1932
CORESPI_0/USPI/URF/prdata_2_4[3]:B,2570
CORESPI_0/USPI/URF/prdata_2_4[3]:C,1928
CORESPI_0/USPI/URF/prdata_2_4[3]:Y,1928
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_21:EN,2560
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_21:IPENn,2560
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_107:IPB,
CORESPI_0/USPI/UCC/SYNC3_stxp_strobetx:ALn,
CORESPI_0/USPI/UCC/SYNC3_stxp_strobetx:CLK,2985
CORESPI_0/USPI/UCC/SYNC3_stxp_strobetx:D,8854
CORESPI_0/USPI/UCC/SYNC3_stxp_strobetx:Q,2985
CORESPI_0/USPI/UCC/mtx_holdsel_RNO:A,5994
CORESPI_0/USPI/UCC/mtx_holdsel_RNO:B,7805
CORESPI_0/USPI/UCC/mtx_holdsel_RNO:Y,5994
CORESPI_0/USPI/UCC/SYNC3_stxp_dataerr:ALn,
CORESPI_0/USPI/UCC/SYNC3_stxp_dataerr:CLK,7849
CORESPI_0/USPI/UCC/SYNC3_stxp_dataerr:D,8860
CORESPI_0/USPI/UCC/SYNC3_stxp_dataerr:Q,7849
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_50:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_50:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_155:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_155:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_13:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_13:IPC,
FCCC_0/CCC_INST/IP_INTERFACE_11:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_11:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_240:IPA,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[29]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[29]:B,34331
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[29]:Y,16991
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_64:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_64:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:CLK,37185
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[1]:Q,37185
CORESPI_0/USPI/URF/control2[6]:ALn,
CORESPI_0/USPI/URF/control2[6]:CLK,3705
CORESPI_0/USPI/URF/control2[6]:D,7411
CORESPI_0/USPI/URF/control2[6]:EN,3614
CORESPI_0/USPI/URF/control2[6]:Q,3705
CORESPI_0/USPI/UCC/spi_clk_tick_RNO:A,7003
CORESPI_0/USPI/UCC/spi_clk_tick_RNO:B,5759
CORESPI_0/USPI/UCC/spi_clk_tick_RNO:Y,5759
Demo_sb_0/CORERESETP_0/count_sdif0_cry[8]:B,17760
Demo_sb_0/CORERESETP_0/count_sdif0_cry[8]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[8]:FCO,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[8]:S,17690
Demo_sb_0/CORERESETP_0/CONFIG1_DONE_clk_base:ALn,7074
Demo_sb_0/CORERESETP_0/CONFIG1_DONE_clk_base:CLK,6783
Demo_sb_0/CORERESETP_0/CONFIG1_DONE_clk_base:D,8867
Demo_sb_0/CORERESETP_0/CONFIG1_DONE_clk_base:Q,6783
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO:A,4660
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO:B,4673
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO:C,1563
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO:D,4434
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO:Y,1563
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_152:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_152:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_127:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_127:IPB,
BIBUF_0/U0/U_IOOUTFF:A,
BIBUF_0/U0/U_IOOUTFF:Y,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_284:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_284:IPB,
CORESPI_0/USPI/URXF/counter_d[4]:A,3896
CORESPI_0/USPI/URXF/counter_d[4]:B,1607
CORESPI_0/USPI/URXF/counter_d[4]:C,6783
CORESPI_0/USPI/URXF/counter_d[4]:D,5542
CORESPI_0/USPI/URXF/counter_d[4]:Y,1607
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[4]:A,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[4]:B,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[4]:Y,4944
CORESPI_0/USPI/UCC/msrxs_first_2:A,8004
CORESPI_0/USPI/UCC/msrxs_first_2:B,7817
CORESPI_0/USPI/UCC/msrxs_first_2:C,7889
CORESPI_0/USPI/UCC/msrxs_first_2:Y,7817
Demo_sb_0/CORERESETP_0/SDIF_RELEASED_int:ALn,7074
Demo_sb_0/CORERESETP_0/SDIF_RELEASED_int:CLK,
Demo_sb_0/CORERESETP_0/SDIF_RELEASED_int:EN,5906
Demo_sb_0/CORERESETP_0/SDIF_RELEASED_int:Q,
CORESPI_0/USPI/UCC/mtx_holdsel:ALn,
CORESPI_0/USPI/UCC/mtx_holdsel:CLK,7910
CORESPI_0/USPI/UCC/mtx_holdsel:D,5007
CORESPI_0/USPI/UCC/mtx_holdsel:EN,5994
CORESPI_0/USPI/UCC/mtx_holdsel:Q,7910
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0[5]:A,8004
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0[5]:B,7824
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0[5]:C,6841
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0[5]:D,3733
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0[5]:Y,3733
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_4:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_4:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_267:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_267:IPB,
SPI_SS0_obuf/U0/U_IOPAD:D,
SPI_SS0_obuf/U0/U_IOPAD:E,
SPI_SS0_obuf/U0/U_IOPAD:PAD,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_160:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_160:IPB,
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_2_0:A,5267
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_2_0:B,5260
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_2_0:Y,5260
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_200:B,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_200:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_200:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_36:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_60:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_60:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_49:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_49:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_18:C,7497
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_18:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_18:IPC,7497
CORESPI_0/USPI/URF/CLK_DIV[6]:ALn,
CORESPI_0/USPI/URF/CLK_DIV[6]:CLK,3502
CORESPI_0/USPI/URF/CLK_DIV[6]:D,7411
CORESPI_0/USPI/URF/CLK_DIV[6]:EN,3484
CORESPI_0/USPI/URF/CLK_DIV[6]:Q,3502
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_84:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_84:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_11:IPENn,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_142:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_142:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_140:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_140:IPB,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[7]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[7]:CLK,36880
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[7]:D,40660
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[7]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[7]:Q,36880
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[3]:A,5116
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[3]:B,4917
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[3]:C,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[3]:Y,3968
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_237:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_237:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_131:IPB,
CORESPI_0/USPI/URXF/rd_pointer_q[2]:ALn,
CORESPI_0/USPI/URXF/rd_pointer_q[2]:CLK,1024
CORESPI_0/USPI/URXF/rd_pointer_q[2]:D,1623
CORESPI_0/USPI/URXF/rd_pointer_q[2]:Q,1024
Demo_sb_0/CORECONFIGP_0/paddr[15]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[15]:CLK,17861
Demo_sb_0/CORECONFIGP_0/paddr[15]:D,40590
Demo_sb_0/CORECONFIGP_0/paddr[15]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[15]:Q,17861
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[0]:A,4890
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[0]:B,3547
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[0]:C,7789
CORESPI_0/USPI/UCC/mtx_bitsel_RNO[0]:Y,3547
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_194:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_194:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[15]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[15]:CLK,38531
Demo_sb_0/CORECONFIGP_0/pwdata[15]:D,40654
Demo_sb_0/CORECONFIGP_0/pwdata[15]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[15]:Q,38531
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_11:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_11:IPB,
CORESPI_0/USPI/UTXF/un1_rd_pointer_q_1.CO2:A,7020
CORESPI_0/USPI/UTXF/un1_rd_pointer_q_1.CO2:B,3992
CORESPI_0/USPI/UTXF/un1_rd_pointer_q_1.CO2:C,6904
CORESPI_0/USPI/UTXF/un1_rd_pointer_q_1.CO2:D,6820
CORESPI_0/USPI/UTXF/un1_rd_pointer_q_1.CO2:Y,3992
CORESPI_0/USPI/URXF/rd_pointer_q_3[2]:A,4874
CORESPI_0/USPI/URXF/rd_pointer_q_3[2]:B,7896
CORESPI_0/USPI/URXF/rd_pointer_q_3[2]:C,1623
CORESPI_0/USPI/URXF/rd_pointer_q_3[2]:D,2460
CORESPI_0/USPI/URXF/rd_pointer_q_3[2]:Y,1623
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO:A,4111
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO:B,4483
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO:C,687
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO:D,3781
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO:Y,687
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_292:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_292:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_236:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_236:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_2:A,687
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_2:IPA,687
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[3]:A,34812
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[3]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[3]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[3]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[3]:Y,15915
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_156:A,36315
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_156:B,35767
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_156:IPA,36315
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_156:IPB,35767
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[16]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[16]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[16]:D,40630
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[16]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[16]:Q,36887
CORESPI_0/USPI/UCC/un1_stxs_strobetx17_1:A,4969
CORESPI_0/USPI/UCC/un1_stxs_strobetx17_1:B,5881
CORESPI_0/USPI/UCC/un1_stxs_strobetx17_1:Y,4969
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_1:A,4827
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_1:B,4750
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_1:C,4698
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_1:D,4596
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_1:Y,4596
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_80:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_80:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_175:A,38347
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_175:B,38823
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_175:IPA,38347
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_175:IPB,38823
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_4:A,5382
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_4:B,5284
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_4:C,5274
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_4:Y,5274
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_102:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_102:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_100:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_100:IPB,
Demo_sb_0/CORECONFIGP_0/control_reg_1[0]:ALn,
Demo_sb_0/CORECONFIGP_0/control_reg_1[0]:CLK,35890
Demo_sb_0/CORECONFIGP_0/control_reg_1[0]:D,40564
Demo_sb_0/CORECONFIGP_0/control_reg_1[0]:EN,16893
Demo_sb_0/CORECONFIGP_0/control_reg_1[0]:Q,35890
Demo_sb_0/CORECONFIGP_0/int_prdata_1[0]:A,37690
Demo_sb_0/CORECONFIGP_0/int_prdata_1[0]:B,37612
Demo_sb_0/CORECONFIGP_0/int_prdata_1[0]:C,37627
Demo_sb_0/CORECONFIGP_0/int_prdata_1[0]:D,35909
Demo_sb_0/CORECONFIGP_0/int_prdata_1[0]:Y,35909
CORESPI_0/USPI/UCC/stxs_bitcnt[0]:ALn,6056
CORESPI_0/USPI/UCC/stxs_bitcnt[0]:CLK,6063
CORESPI_0/USPI/UCC/stxs_bitcnt[0]:D,5957
CORESPI_0/USPI/UCC/stxs_bitcnt[0]:EN,7726
CORESPI_0/USPI/UCC/stxs_bitcnt[0]:Q,6063
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNI9FDA/U0:An,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNI9FDA/U0:YWn,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_51:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_51:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_286:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_286:IPB,
Demo_sb_0/CORERESETP_0/sm0_state_ns[5]:A,8010
Demo_sb_0/CORERESETP_0/sm0_state_ns[5]:B,7916
Demo_sb_0/CORERESETP_0/sm0_state_ns[5]:C,5889
Demo_sb_0/CORERESETP_0/sm0_state_ns[5]:D,7786
Demo_sb_0/CORERESETP_0/sm0_state_ns[5]:Y,5889
CORESPI_0/USPI/UCC/un1_stxs_bitcnt_1:A,7081
CORESPI_0/USPI/UCC/un1_stxs_bitcnt_1:B,6113
CORESPI_0/USPI/UCC/un1_stxs_bitcnt_1:C,6979
CORESPI_0/USPI/UCC/un1_stxs_bitcnt_1:D,6938
CORESPI_0/USPI/UCC/un1_stxs_bitcnt_1:Y,6113
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[27]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[27]:B,34441
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[27]:Y,16991
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_4:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_13:IPA,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_7:IPC,
Demo_sb_0/CORERESETP_0/sdif0_areset_n_RNIL3AD/U0_RGB1:An,
Demo_sb_0/CORERESETP_0/sdif0_areset_n_RNIL3AD/U0_RGB1:YL,6142
Demo_sb_0/CORECONFIGP_0/R_SDIF0_PSEL_RNIH4KT:A,15964
Demo_sb_0/CORECONFIGP_0/R_SDIF0_PSEL_RNIH4KT:B,33893
Demo_sb_0/CORECONFIGP_0/R_SDIF0_PSEL_RNIH4KT:Y,15964
CORESPI_0/USPI/UCC/clock_rx_re_slave:A,4973
CORESPI_0/USPI/UCC/clock_rx_re_slave:B,4944
CORESPI_0/USPI/UCC/clock_rx_re_slave:Y,4944
CORESPI_0/USPI/UCC/spi_ssel_pos:ALn,
CORESPI_0/USPI/UCC/spi_ssel_pos:CLK,3618
CORESPI_0/USPI/UCC/spi_ssel_pos:D,6984
CORESPI_0/USPI/UCC/spi_ssel_pos:Q,3618
CORESPI_0/USPI/UCC/mtx_fiforead_0_sqmuxa_0_a2_1_a2:A,7856
CORESPI_0/USPI/UCC/mtx_fiforead_0_sqmuxa_0_a2_1_a2:B,7773
CORESPI_0/USPI/UCC/mtx_fiforead_0_sqmuxa_0_a2_1_a2:C,4757
CORESPI_0/USPI/UCC/mtx_fiforead_0_sqmuxa_0_a2_1_a2:Y,4757
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_287:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_287:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_326:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_326:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_16:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_16:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_46:IPB,
CORESPI_0/USPI/UCC/resetn_rx_d1:ALn,6720
CORESPI_0/USPI/UCC/resetn_rx_d1:CLK,7922
CORESPI_0/USPI/UCC/resetn_rx_d1:Q,7922
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_361:IPB,
CORESPI_0/USPI/URF/prdata_2[3]:A,3741
CORESPI_0/USPI/URF/prdata_2[3]:B,4819
CORESPI_0/USPI/URF/prdata_2[3]:C,1928
CORESPI_0/USPI/URF/prdata_2[3]:D,2030
CORESPI_0/USPI/URF/prdata_2[3]:Y,1928
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_259:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_259:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_333:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_333:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_21:EN,7766
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_21:IPENn,7766
CORESPI_0/USPI/UCON/tx_fifo_write_sig14_0_a3_0_a2:A,2506
CORESPI_0/USPI/UCON/tx_fifo_write_sig14_0_a3_0_a2:B,2453
CORESPI_0/USPI/UCON/tx_fifo_write_sig14_0_a3_0_a2:C,2102
CORESPI_0/USPI/UCON/tx_fifo_write_sig14_0_a3_0_a2:D,1345
CORESPI_0/USPI/UCON/tx_fifo_write_sig14_0_a3_0_a2:Y,1345
CORESPI_0/USPI/URF/prdata_2_6_1[5]:A,3556
CORESPI_0/USPI/URF/prdata_2_6_1[5]:B,3472
CORESPI_0/USPI/URF/prdata_2_6_1[5]:C,1916
CORESPI_0/USPI/URF/prdata_2_6_1[5]:D,1563
CORESPI_0/USPI/URF/prdata_2_6_1[5]:Y,1563
CORESPI_0/USPI/URF/prdata_2[0]:A,3732
CORESPI_0/USPI/URF/prdata_2[0]:B,4810
CORESPI_0/USPI/URF/prdata_2[0]:C,687
CORESPI_0/USPI/URF/prdata_2[0]:D,2021
CORESPI_0/USPI/URF/prdata_2[0]:Y,687
Demo_sb_0/CORERESETP_0/SDIF0_PHY_RESET_N_int:ALn,8748
Demo_sb_0/CORERESETP_0/SDIF0_PHY_RESET_N_int:CLK,
Demo_sb_0/CORERESETP_0/SDIF0_PHY_RESET_N_int:EN,6842
Demo_sb_0/CORERESETP_0/SDIF0_PHY_RESET_N_int:Q,
SPI_DO_obuf/U0/U_IOOUTFF:A,
SPI_DO_obuf/U0/U_IOOUTFF:Y,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_286:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_286:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_138:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_138:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_202:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_202:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_330:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_330:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_75:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_75:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_278:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_278:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_118:IPB,
CORESPI_0/USPI/UCC/stxs_midbit_2:A,6063
CORESPI_0/USPI/UCC/stxs_midbit_2:B,5102
CORESPI_0/USPI/UCC/stxs_midbit_2:C,5966
CORESPI_0/USPI/UCC/stxs_midbit_2:D,5852
CORESPI_0/USPI/UCC/stxs_midbit_2:Y,5102
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_176:A,38531
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_176:B,38698
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_176:IPA,38531
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_176:IPB,38698
CORESPI_0/USPI/URXF/counter_d[1]:A,3974
CORESPI_0/USPI/URXF/counter_d[1]:B,673
CORESPI_0/USPI/URXF/counter_d[1]:C,5849
CORESPI_0/USPI/URXF/counter_d[1]:D,4615
CORESPI_0/USPI/URXF/counter_d[1]:Y,673
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_83:B,37164
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_83:IPB,37164
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_141:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_141:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[30]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[30]:B,34580
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[30]:Y,16991
CORESPI_0/USPI/UTXF/counter_q[0]:ALn,
CORESPI_0/USPI/UTXF/counter_q[0]:CLK,4808
CORESPI_0/USPI/UTXF/counter_q[0]:D,1684
CORESPI_0/USPI/UTXF/counter_q[0]:Q,4808
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_133:IPA,
CORESPI_0/USPI/URXF/rd_pointer_d_1_sqmuxa_2_0:A,5092
CORESPI_0/USPI/URXF/rd_pointer_d_1_sqmuxa_2_0:B,5049
CORESPI_0/USPI/URXF/rd_pointer_d_1_sqmuxa_2_0:C,4928
CORESPI_0/USPI/URXF/rd_pointer_d_1_sqmuxa_2_0:D,3882
CORESPI_0/USPI/URXF/rd_pointer_d_1_sqmuxa_2_0:Y,3882
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_1:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_74:A,37204
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_74:IPA,37204
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_222:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_222:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_18:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_18:IPB,
CORESPI_0/USPI/URXF/counter_q[5]:ALn,
CORESPI_0/USPI/URXF/counter_q[5]:CLK,4810
CORESPI_0/USPI/URXF/counter_q[5]:D,2547
CORESPI_0/USPI/URXF/counter_q[5]:Q,4810
CORESPI_0/USPI/URF/prdata_2_2[3]:A,4618
CORESPI_0/USPI/URF/prdata_2_2[3]:B,3061
CORESPI_0/USPI/URF/prdata_2_2[3]:C,4503
CORESPI_0/USPI/URF/prdata_2_2[3]:Y,3061
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_19:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_19:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_12:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_12:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_197:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_197:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_166:IPB,
Demo_sb_0/CORERESETP_0/count_sdif0_s[12]:B,17793
Demo_sb_0/CORERESETP_0/count_sdif0_s[12]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_s[12]:S,17626
CORESPI_0/USPI/URXF/rd_pointer_q_3[1]:A,7944
CORESPI_0/USPI/URXF/rd_pointer_q_3[1]:B,7890
CORESPI_0/USPI/URXF/rd_pointer_q_3[1]:C,1562
CORESPI_0/USPI/URXF/rd_pointer_q_3[1]:D,1522
CORESPI_0/USPI/URXF/rd_pointer_q_3[1]:Y,1522
CORESPI_0/USPI/UTXF/counter_q[4]:ALn,
CORESPI_0/USPI/UTXF/counter_q[4]:CLK,5665
CORESPI_0/USPI/UTXF/counter_q[4]:D,1593
CORESPI_0/USPI/UTXF/counter_q[4]:Q,5665
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_204:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_204:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_204:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_101:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_101:IPB,
Demo_sb_0/CORERESETP_0/RESET_N_M2F_clk_base:ALn,
Demo_sb_0/CORERESETP_0/RESET_N_M2F_clk_base:CLK,7926
Demo_sb_0/CORERESETP_0/RESET_N_M2F_clk_base:D,8867
Demo_sb_0/CORERESETP_0/RESET_N_M2F_clk_base:Q,7926
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_34:IPENn,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_11:IPENn,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_1:IPC,
CORESPI_0/USPI/UCC/msrxp_alldone:ALn,
CORESPI_0/USPI/UCC/msrxp_alldone:CLK,7069
CORESPI_0/USPI/UCC/msrxp_alldone:D,7786
CORESPI_0/USPI/UCC/msrxp_alldone:Q,7069
SPI_SS0_obuf/U0/U_IOENFF:A,
SPI_SS0_obuf/U0/U_IOENFF:Y,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_183:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_115:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_115:IPB,
Demo_sb_0/CORERESETP_0/MSS_HPMS_READY_int_4:A,8017
Demo_sb_0/CORERESETP_0/MSS_HPMS_READY_int_4:B,7926
Demo_sb_0/CORERESETP_0/MSS_HPMS_READY_int_4:C,7882
Demo_sb_0/CORERESETP_0/MSS_HPMS_READY_int_4:Y,7882
CORESPI_0/USPI/UCC/stxs_midbit:ALn,6056
CORESPI_0/USPI/UCC/stxs_midbit:CLK,7929
CORESPI_0/USPI/UCC/stxs_midbit:D,6100
CORESPI_0/USPI/UCC/stxs_midbit:EN,7726
CORESPI_0/USPI/UCC/stxs_midbit:Q,7929
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_139:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_139:IPB,
Demo_sb_0/CORERESETP_0/release_sdif0_core6_8:A,16868
Demo_sb_0/CORERESETP_0/release_sdif0_core6_8:B,16825
Demo_sb_0/CORERESETP_0/release_sdif0_core6_8:C,16743
Demo_sb_0/CORERESETP_0/release_sdif0_core6_8:D,16636
Demo_sb_0/CORERESETP_0/release_sdif0_core6_8:Y,16636
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_279:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_279:IPB,
CORESPI_0/USPI/URF/cfg_ssel[1]:ALn,
CORESPI_0/USPI/URF/cfg_ssel[1]:CLK,3440
CORESPI_0/USPI/URF/cfg_ssel[1]:D,7319
CORESPI_0/USPI/URF/cfg_ssel[1]:EN,3562
CORESPI_0/USPI/URF/cfg_ssel[1]:Q,3440
CORESPI_0/USPI/URF/control2_1_sqmuxa:A,5437
CORESPI_0/USPI/URF/control2_1_sqmuxa:B,3614
CORESPI_0/USPI/URF/control2_1_sqmuxa:C,6280
CORESPI_0/USPI/URF/control2_1_sqmuxa:D,5947
CORESPI_0/USPI/URF/control2_1_sqmuxa:Y,3614
CORESPI_0/USPI/URF/clr_rxfifo:ALn,
CORESPI_0/USPI/URF/clr_rxfifo:CLK,3956
CORESPI_0/USPI/URF/clr_rxfifo:D,3703
CORESPI_0/USPI/URF/clr_rxfifo:Q,3956
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_2_i:A,7870
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_2_i:B,6722
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_2_i:C,6836
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_2_i:D,5628
CORESPI_0/USPI/UCC/stxs_datareg_1_sqmuxa_2_i:Y,5628
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_4:A,5874
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_4:B,5749
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_4:C,4585
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_4:FCI,4538
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_4:FCO,4538
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_4:S,4585
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_224:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_224:IPB,
CORESPI_0/USPI/UCC/stxs_datareg[7]:ALn,6056
CORESPI_0/USPI/UCC/stxs_datareg[7]:CLK,
CORESPI_0/USPI/UCC/stxs_datareg[7]:D,3968
CORESPI_0/USPI/UCC/stxs_datareg[7]:EN,5628
CORESPI_0/USPI/UCC/stxs_datareg[7]:Q,
CORESPI_0/USPI/UCC/spi_clk_count_cry[0]:B,7711
CORESPI_0/USPI/UCC/spi_clk_count_cry[0]:C,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[0]:FCI,4545
CORESPI_0/USPI/UCC/spi_clk_count_cry[0]:FCO,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[0]:S,4582
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_88:A,37275
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_88:IPA,37275
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_88:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_d[0]_0_sqmuxa_0_a2_0_a2:A,2560
CORESPI_0/USPI/UTXF/fifo_mem_d[0]_0_sqmuxa_0_a2_0_a2:B,7733
CORESPI_0/USPI/UTXF/fifo_mem_d[0]_0_sqmuxa_0_a2_0_a2:Y,2560
CORESPI_0/USPI/UCC/clk_div_val_reg[0]:ALn,
CORESPI_0/USPI/UCC/clk_div_val_reg[0]:CLK,4672
CORESPI_0/USPI/UCC/clk_div_val_reg[0]:D,8860
CORESPI_0/USPI/UCC/clk_div_val_reg[0]:EN,7753
CORESPI_0/USPI/UCC/clk_div_val_reg[0]:Q,4672
Demo_sb_0/CORERESETP_0/count_sdif0[11]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[11]:CLK,16906
Demo_sb_0/CORERESETP_0/count_sdif0[11]:D,17642
Demo_sb_0/CORERESETP_0/count_sdif0[11]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[11]:Q,16906
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_77:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_77:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_200:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_200:IPB,
CORESPI_0/USPI/UCC/txfifo_datadelay[1]:ALn,
CORESPI_0/USPI/UCC/txfifo_datadelay[1]:CLK,6911
CORESPI_0/USPI/UCC/txfifo_datadelay[1]:D,5988
CORESPI_0/USPI/UCC/txfifo_datadelay[1]:Q,6911
CORESPI_0/USPI/UCC/mtx_lastbit:ALn,
CORESPI_0/USPI/UCC/mtx_lastbit:CLK,6930
CORESPI_0/USPI/UCC/mtx_lastbit:D,6855
CORESPI_0/USPI/UCC/mtx_lastbit:Q,6930
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_43:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_43:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_343:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_343:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_183:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_183:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[19]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[19]:B,34406
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[19]:Y,16991
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_5:IPC,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[30]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[30]:CLK,37261
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[30]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[30]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[30]:Q,37261
SPI_CLK_obuf/U0/U_IOENFF:A,
SPI_CLK_obuf/U0/U_IOENFF:Y,
Demo_sb_0/CORERESETP_0/release_sdif2_core_clk_base:ALn,7074
Demo_sb_0/CORERESETP_0/release_sdif2_core_clk_base:CLK,6793
Demo_sb_0/CORERESETP_0/release_sdif2_core_clk_base:D,8867
Demo_sb_0/CORERESETP_0/release_sdif2_core_clk_base:Q,6793
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:CLK,37182
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[6]:Q,37182
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_148:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_148:IPB,
CORESPI_0/USPI/UCC/msrxp_frames[2]:ALn,
CORESPI_0/USPI/UCC/msrxp_frames[2]:CLK,6804
CORESPI_0/USPI/UCC/msrxp_frames[2]:D,7722
CORESPI_0/USPI/UCC/msrxp_frames[2]:EN,7830
CORESPI_0/USPI/UCC/msrxp_frames[2]:Q,6804
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_340:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_340:IPB,
CORESPI_0/USPI/UTXF/empty_out_2_0_0_RNO_1:A,3947
CORESPI_0/USPI/UTXF/empty_out_2_0_0_RNO_1:B,2828
CORESPI_0/USPI/UTXF/empty_out_2_0_0_RNO_1:C,3858
CORESPI_0/USPI/UTXF/empty_out_2_0_0_RNO_1:Y,2828
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_232:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_232:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_352:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_352:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_220:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_220:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_137:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_137:IPB,
Demo_sb_0/CORERESETP_0/count_sdif0[5]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[5]:CLK,16938
Demo_sb_0/CORERESETP_0/count_sdif0[5]:D,17738
Demo_sb_0/CORERESETP_0/count_sdif0[5]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[5]:Q,16938
CORESPI_0/USPI/UCC/stxs_bitcnt[4]:ALn,6056
CORESPI_0/USPI/UCC/stxs_bitcnt[4]:CLK,5966
CORESPI_0/USPI/UCC/stxs_bitcnt[4]:D,5964
CORESPI_0/USPI/UCC/stxs_bitcnt[4]:EN,7726
CORESPI_0/USPI/UCC/stxs_bitcnt[4]:Q,5966
CORESPI_0/USPI/URF/cfg_ssel[6]:ALn,
CORESPI_0/USPI/URF/cfg_ssel[6]:CLK,3586
CORESPI_0/USPI/URF/cfg_ssel[6]:D,7411
CORESPI_0/USPI/URF/cfg_ssel[6]:EN,3562
CORESPI_0/USPI/URF/cfg_ssel[6]:Q,3586
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_0:A,4749
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_0:B,4672
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_0:C,4620
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_0:D,4518
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_0:Y,4518
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_303:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_303:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_0:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_116:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_116:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_189:IPA,
Demo_sb_0/CORECONFIGP_0/pwdata[30]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[30]:CLK,38688
Demo_sb_0/CORECONFIGP_0/pwdata[30]:D,40666
Demo_sb_0/CORECONFIGP_0/pwdata[30]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[30]:Q,38688
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_1[4]:A,6981
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_1[4]:B,6910
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_1[4]:C,3839
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_1[4]:D,4897
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_1[4]:Y,3839
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_99:A,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_99:B,9891
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_99:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_99:IPB,9891
CORESPI_0/USPI/UCC/clk_div_val_reg[2]:ALn,
CORESPI_0/USPI/UCC/clk_div_val_reg[2]:CLK,4750
CORESPI_0/USPI/UCC/clk_div_val_reg[2]:D,8860
CORESPI_0/USPI/UCC/clk_div_val_reg[2]:EN,7753
CORESPI_0/USPI/UCC/clk_div_val_reg[2]:Q,4750
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_61:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_108:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_108:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_300:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_55:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_55:IPB,
Demo_sb_0/CORERESETP_0/mss_ready_state:ALn,8741
Demo_sb_0/CORERESETP_0/mss_ready_state:CLK,7852
Demo_sb_0/CORERESETP_0/mss_ready_state:EN,8785
Demo_sb_0/CORERESETP_0/mss_ready_state:Q,7852
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_10:B,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_10:C,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_10:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_10:IPC,
CORESPI_0/USPI/UCC/clk_div_val_reg6_i_0_a2_i_o3_i_o2:A,4066
CORESPI_0/USPI/UCC/clk_div_val_reg6_i_0_a2_i_o3_i_o2:B,3996
CORESPI_0/USPI/UCC/clk_div_val_reg6_i_0_a2_i_o3_i_o2:Y,3996
CORESPI_0/USPI/URF/prdata_2[2]:A,3442
CORESPI_0/USPI/URF/prdata_2[2]:B,4521
CORESPI_0/USPI/URF/prdata_2[2]:C,1322
CORESPI_0/USPI/URF/prdata_2[2]:D,1732
CORESPI_0/USPI/URF/prdata_2[2]:Y,1322
Demo_sb_0/CORERESETP_0/release_sdif2_core:ALn,18769
Demo_sb_0/CORERESETP_0/release_sdif2_core:CLK,4998
Demo_sb_0/CORERESETP_0/release_sdif2_core:Q,4998
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[10]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[10]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[10]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[10]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[10]:Y,36887
Demo_sb_0/CORERESETP_0/release_sdif0_core6_1:A,16938
Demo_sb_0/CORERESETP_0/release_sdif0_core6_1:B,16903
Demo_sb_0/CORERESETP_0/release_sdif0_core6_1:C,16816
Demo_sb_0/CORERESETP_0/release_sdif0_core6_1:D,16720
Demo_sb_0/CORERESETP_0/release_sdif0_core6_1:Y,16720
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:CLK,37182
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[3]:Q,37182
CORESPI_0/USPI/URXF/counter_q_RNI2UJE5[4]:A,4961
CORESPI_0/USPI/URXF/counter_q_RNI2UJE5[4]:B,4872
CORESPI_0/USPI/URXF/counter_q_RNI2UJE5[4]:C,4775
CORESPI_0/USPI/URXF/counter_q_RNI2UJE5[4]:FCI,4715
CORESPI_0/USPI/URXF/counter_q_RNI2UJE5[4]:FCO,4715
CORESPI_0/USPI/URXF/counter_q_RNI2UJE5[4]:S,5542
CORESPI_0/USPI/UCC/clock_rx_q3:ALn,
CORESPI_0/USPI/UCC/clock_rx_q3:CLK,4921
CORESPI_0/USPI/UCC/clock_rx_q3:D,8854
CORESPI_0/USPI/UCC/clock_rx_q3:Q,4921
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_52:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_52:IPB,
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc5:A,5870
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc5:B,2764
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc5:C,5774
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc5:D,5665
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc5:Y,2764
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_38:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_38:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_0:IPA,
Demo_sb_0/CORECONFIGP_0/paddr[3]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[3]:CLK,36021
Demo_sb_0/CORECONFIGP_0/paddr[3]:D,40459
Demo_sb_0/CORECONFIGP_0/paddr[3]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[3]:Q,36021
CORESPI_0/USPI/UCC/stxs_checkorun_5_u:A,7865
CORESPI_0/USPI/UCC/stxs_checkorun_5_u:B,5159
CORESPI_0/USPI/UCC/stxs_checkorun_5_u:C,7842
CORESPI_0/USPI/UCC/stxs_checkorun_5_u:D,7802
CORESPI_0/USPI/UCC/stxs_checkorun_5_u:Y,5159
CORESPI_0/USPI/URXF/un1_data_out_dx_31_2:A,4023
CORESPI_0/USPI/URXF/un1_data_out_dx_31_2:B,3932
CORESPI_0/USPI/URXF/un1_data_out_dx_31_2:C,3882
CORESPI_0/USPI/URXF/un1_data_out_dx_31_2:Y,3882
CORESPI_0/USPI/URF/prdata_2_4[1]:A,4565
CORESPI_0/USPI/URF/prdata_2_4[1]:B,3023
CORESPI_0/USPI/URF/prdata_2_4[1]:C,2684
CORESPI_0/USPI/URF/prdata_2_4[1]:D,1843
CORESPI_0/USPI/URF/prdata_2_4[1]:Y,1843
CORESPI_0/USPI/URXF/un1_wr_pointer_q_1.CO2:A,6952
CORESPI_0/USPI/URXF/un1_wr_pointer_q_1.CO2:B,6875
CORESPI_0/USPI/URXF/un1_wr_pointer_q_1.CO2:C,4691
CORESPI_0/USPI/URXF/un1_wr_pointer_q_1.CO2:Y,4691
CORESPI_0/USPI/URF/prdata_2_1[7]:A,3651
CORESPI_0/USPI/URF/prdata_2_1[7]:B,3468
CORESPI_0/USPI/URF/prdata_2_1[7]:C,2406
CORESPI_0/USPI/URF/prdata_2_1[7]:D,1940
CORESPI_0/USPI/URF/prdata_2_1[7]:Y,1940
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_219:IPA,
CORESPI_0/USPI/URF/prdata_2_5_1_1[1]:A,3555
CORESPI_0/USPI/URF/prdata_2_5_1_1[1]:B,1993
CORESPI_0/USPI/URF/prdata_2_5_1_1[1]:C,3440
CORESPI_0/USPI/URF/prdata_2_5_1_1[1]:Y,1993
CORESPI_0/USPI/UCC/clock_rx_q1:ALn,
CORESPI_0/USPI/UCC/clock_rx_q1:CLK,8867
CORESPI_0/USPI/UCC/clock_rx_q1:D,7865
CORESPI_0/USPI/UCC/clock_rx_q1:Q,8867
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_187:IPA,
MAC_TBI_MDC_obuf/U0/U_IOENFF:A,
MAC_TBI_MDC_obuf/U0/U_IOENFF:Y,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_171:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_171:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[17]:A,34449
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[17]:B,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[17]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[17]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[17]:Y,15915
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_339:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_339:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_44:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_158:IPA,
CORESPI_0/USPI/URXF/rd_pointer_d_1_sqmuxa_2:A,6907
CORESPI_0/USPI/URXF/rd_pointer_d_1_sqmuxa_2:B,4797
CORESPI_0/USPI/URXF/rd_pointer_d_1_sqmuxa_2:C,1562
CORESPI_0/USPI/URXF/rd_pointer_d_1_sqmuxa_2:Y,1562
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_285:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_285:IPB,
Demo_sb_0/CORECONFIGP_0/INIT_DONE_q2:ALn,
Demo_sb_0/CORECONFIGP_0/INIT_DONE_q2:CLK,35941
Demo_sb_0/CORECONFIGP_0/INIT_DONE_q2:D,38867
Demo_sb_0/CORECONFIGP_0/INIT_DONE_q2:Q,35941
CORESPI_0/USPI/URXF/full_out_RNIQ4NI:A,3956
CORESPI_0/USPI/URXF/full_out_RNIQ4NI:B,3880
CORESPI_0/USPI/URXF/full_out_RNIQ4NI:C,3880
CORESPI_0/USPI/URXF/full_out_RNIQ4NI:Y,3880
Demo_sb_0/CORERESETP_0/sm0_state[6]:ALn,7074
Demo_sb_0/CORERESETP_0/sm0_state[6]:CLK,8792
Demo_sb_0/CORERESETP_0/sm0_state[6]:EN,7845
Demo_sb_0/CORERESETP_0/sm0_state[6]:Q,8792
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_220:IPA,
Demo_sb_0/CORECONFIGP_0/int_prdata[16]:A,38674
Demo_sb_0/CORECONFIGP_0/int_prdata[16]:B,38620
Demo_sb_0/CORECONFIGP_0/int_prdata[16]:C,38605
Demo_sb_0/CORECONFIGP_0/int_prdata[16]:D,36887
Demo_sb_0/CORECONFIGP_0/int_prdata[16]:Y,36887
CORESPI_0/USPI/UCC/stxs_txready_at_ssel:ALn,6720
CORESPI_0/USPI/UCC/stxs_txready_at_ssel:CLK,5946
CORESPI_0/USPI/UCC/stxs_txready_at_ssel:D,8847
CORESPI_0/USPI/UCC/stxs_txready_at_ssel:EN,7852
CORESPI_0/USPI/UCC/stxs_txready_at_ssel:Q,5946
CORESPI_0/USPI/UCC/spi_di_mux:A,
CORESPI_0/USPI/UCC/spi_di_mux:B,6992
CORESPI_0/USPI/UCC/spi_di_mux:C,6802
CORESPI_0/USPI/UCC/spi_di_mux:Y,6802
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_62:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_62:IPB,
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2_1[3]:A,3852
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2_1[3]:B,5758
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2_1[3]:C,5651
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2_1[3]:Y,3852
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_7:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_7:IPC,
CORESPI_0/USPI/UCC/msrxp_strobe:ALn,
CORESPI_0/USPI/UCC/msrxp_strobe:CLK,3880
CORESPI_0/USPI/UCC/msrxp_strobe:D,7916
CORESPI_0/USPI/UCC/msrxp_strobe:Q,3880
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_15:C,8918
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_15:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_15:IPC,8918
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_8:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_8:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_8:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_199:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_199:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_242:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_242:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_8:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_8:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_8:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_205:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_205:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_205:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_114:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_114:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_254:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_254:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_40:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_40:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[29]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[29]:CLK,37275
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[29]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[29]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[29]:Q,37275
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc3:A,3880
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc3:B,5912
CORESPI_0/USPI/URXF/un1_counter_q_0_axbxc3:Y,3880
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_13:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_137:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_137:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_12:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_12:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_39:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_39:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_5:IPC,
Demo_sb_0/CORERESETP_0/sdif3_areset_n_rcosc_q1:ALn,
Demo_sb_0/CORERESETP_0/sdif3_areset_n_rcosc_q1:CLK,18868
Demo_sb_0/CORERESETP_0/sdif3_areset_n_rcosc_q1:Q,18868
Demo_sb_0/CORECONFIGP_0/paddr[2]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[2]:CLK,36315
Demo_sb_0/CORECONFIGP_0/paddr[2]:D,40458
Demo_sb_0/CORECONFIGP_0/paddr[2]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[2]:Q,36315
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[28]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[28]:B,34349
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[28]:Y,16991
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_82:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_82:IPB,
CORESPI_0/USPI/UTXF/counter_q_RNIG5V6[3]:A,4922
CORESPI_0/USPI/UTXF/counter_q_RNIG5V6[3]:B,4838
CORESPI_0/USPI/UTXF/counter_q_RNIG5V6[3]:C,4780
CORESPI_0/USPI/UTXF/counter_q_RNIG5V6[3]:Y,4780
CORESPI_0/USPI/UCC/clk_div_val_reg[5]:ALn,
CORESPI_0/USPI/UCC/clk_div_val_reg[5]:CLK,4872
CORESPI_0/USPI/UCC/clk_div_val_reg[5]:D,8860
CORESPI_0/USPI/UCC/clk_div_val_reg[5]:EN,7753
CORESPI_0/USPI/UCC/clk_div_val_reg[5]:Q,4872
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_122:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_122:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_120:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_120:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_225:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_225:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_11:B,8901
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_11:C,9013
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_11:IPB,8901
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_11:IPC,9013
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_202:B,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_202:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_273:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_273:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_27:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_27:IPB,
CORESPI_0/USPI/UCC/SYNC2_stxp_strobetx:ALn,
CORESPI_0/USPI/UCC/SYNC2_stxp_strobetx:CLK,2793
CORESPI_0/USPI/UCC/SYNC2_stxp_strobetx:D,8867
CORESPI_0/USPI/UCC/SYNC2_stxp_strobetx:Q,2793
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_33:IPENn,
CORESPI_0/USPI/URF/CLK_DIV[4]:ALn,
CORESPI_0/USPI/URF/CLK_DIV[4]:CLK,3456
CORESPI_0/USPI/URF/CLK_DIV[4]:D,7405
CORESPI_0/USPI/URF/CLK_DIV[4]:EN,3484
CORESPI_0/USPI/URF/CLK_DIV[4]:Q,3456
FCCC_1/CCC_INST/IP_INTERFACE_2:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_2:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_2:IPC,
Demo_sb_0/CORERESETP_0/count_sdif0_cry[11]:B,17793
Demo_sb_0/CORERESETP_0/count_sdif0_cry[11]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[11]:FCO,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[11]:S,17642
FCCC_1/CCC_INST/IP_INTERFACE_1:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_1:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_5:A,1928
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_5:IPA,1928
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_5:IPB,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[9]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[9]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[9]:D,40641
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[9]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[9]:Q,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:CLK,37180
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[14]:Q,37180
CORESPI_0/USPI/UCC/stxs_datareg_3_sqmuxa:A,6107
CORESPI_0/USPI/UCC/stxs_datareg_3_sqmuxa:B,6005
CORESPI_0/USPI/UCC/stxs_datareg_3_sqmuxa:C,6933
CORESPI_0/USPI/UCC/stxs_datareg_3_sqmuxa:Y,6005
CORESPI_0/USPI/URXF/counter_d[3]:A,3880
CORESPI_0/USPI/URXF/counter_d[3]:B,1507
CORESPI_0/USPI/URXF/counter_d[3]:C,6683
CORESPI_0/USPI/URXF/counter_d[3]:D,5456
CORESPI_0/USPI/URXF/counter_d[3]:Y,1507
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_269:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_269:IPB,
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_4_RNIQ0F42:A,6410
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_4_RNIQ0F42:B,6087
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_4_RNIQ0F42:C,5274
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_4_RNIQ0F42:D,3484
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_4_RNIQ0F42:Y,3484
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_232:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_232:IPB,
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_0:A,5007
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_0:B,4911
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_0:C,3747
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_0:FCO,3768
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_0:Y,3747
CORESPI_0/USPI/URXF/empty_out_2:A,1723
CORESPI_0/USPI/URXF/empty_out_2:B,673
CORESPI_0/USPI/URXF/empty_out_2:C,1607
CORESPI_0/USPI/URXF/empty_out_2:D,1507
CORESPI_0/USPI/URXF/empty_out_2:Y,673
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[6]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[6]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[6]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[6]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[6]:Y,36887
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_23:IPENn,
CORESPI_0/USPI/UCC/mtx_bitsel[4]:ALn,
CORESPI_0/USPI/UCC/mtx_bitsel[4]:CLK,4754
CORESPI_0/USPI/UCC/mtx_bitsel[4]:D,3584
CORESPI_0/USPI/UCC/mtx_bitsel[4]:Q,4754
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_349:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_349:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_4:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_4:IPC,
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2[1]:A,6784
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2[1]:B,4737
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2[1]:C,6753
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2[1]:D,6632
CORESPI_0/USPI/UCC/mtx_state_ns_i_0_0_a2[1]:Y,4737
CORESPI_0/USPI/UCC/mtx_state[3]:ALn,
CORESPI_0/USPI/UCC/mtx_state[3]:CLK,5765
CORESPI_0/USPI/UCC/mtx_state[3]:D,3852
CORESPI_0/USPI/UCC/mtx_state[3]:Q,5765
Demo_sb_0/CORECONFIGP_0/state_ns_0[1]:A,37764
Demo_sb_0/CORECONFIGP_0/state_ns_0[1]:B,16035
Demo_sb_0/CORECONFIGP_0/state_ns_0[1]:C,37869
Demo_sb_0/CORECONFIGP_0/state_ns_0[1]:Y,16035
Demo_sb_0/Demo_sb_MSS_0/MMUART_1_RXD_PAD/U_IOINFF:A,
Demo_sb_0/Demo_sb_MSS_0/MMUART_1_RXD_PAD/U_IOINFF:Y,
Demo_sb_0/CORECONFIGP_0/paddr[4]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[4]:CLK,36351
Demo_sb_0/CORECONFIGP_0/paddr[4]:D,40517
Demo_sb_0/CORECONFIGP_0/paddr[4]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[4]:Q,36351
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_2:A,4872
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_2:B,4795
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_2:C,4743
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_2:D,4641
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_2:Y,4641
CORESPI_0/USPI/UCC/mtx_first_RNO:A,5908
CORESPI_0/USPI/UCC/mtx_first_RNO:B,7910
CORESPI_0/USPI/UCC/mtx_first_RNO:Y,5908
CORESPI_0/USPI/UCC/msrxs_shiftreg[1]:ALn,
CORESPI_0/USPI/UCC/msrxs_shiftreg[1]:CLK,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg[1]:D,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg[1]:EN,6849
CORESPI_0/USPI/UCC/msrxs_shiftreg[1]:Q,7926
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_274:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_274:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_256:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_256:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_165:A,15409
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_165:B,37319
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_165:IPA,15409
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_165:IPB,37319
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_248:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_248:IPB,
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[7]:A,5172
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[7]:B,4917
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[7]:C,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[7]:Y,3968
CORESPI_0/USPI/UCC/mtx_state[4]:ALn,
CORESPI_0/USPI/UCC/mtx_state[4]:CLK,4857
CORESPI_0/USPI/UCC/mtx_state[4]:D,6734
CORESPI_0/USPI/UCC/mtx_state[4]:Q,4857
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_49:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_105:A,9658
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_105:IPA,9658
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_105:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_15:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_15:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_15:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_65:B,37225
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_65:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_65:IPB,37225
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_234:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_234:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_172:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_172:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_14:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_14:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_14:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_309:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_293:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_293:IPB,
CORESPI_0/USPI/UCC/stxs_bitcnt_0_sqmuxa:A,3968
CORESPI_0/USPI/UCC/stxs_bitcnt_0_sqmuxa:B,4864
CORESPI_0/USPI/UCC/stxs_bitcnt_0_sqmuxa:Y,3968
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_357:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_357:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_14:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_14:IPB,
MAC_TBI_MDC_obuf/U0/U_IOPAD:D,
MAC_TBI_MDC_obuf/U0/U_IOPAD:E,
MAC_TBI_MDC_obuf/U0/U_IOPAD:PAD,
CORESPI_0/USPI/URF/prdata_2_1[2]:A,1987
CORESPI_0/USPI/URF/prdata_2_1[2]:B,3383
CORESPI_0/USPI/URF/prdata_2_1[2]:C,3272
CORESPI_0/USPI/URF/prdata_2_1[2]:Y,1987
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_211:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_211:IPB,
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_2[4]:A,5176
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_2[4]:B,4890
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_2[4]:C,4918
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_2[4]:Y,4890
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_147:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_147:IPB,
PHY_RST_obuf/U0/U_IOOUTFF:A,
PHY_RST_obuf/U0/U_IOOUTFF:Y,
Demo_sb_0/CoreAPB3_0/iPSELS[0]:A,1553
Demo_sb_0/CoreAPB3_0/iPSELS[0]:B,1515
Demo_sb_0/CoreAPB3_0/iPSELS[0]:C,571
Demo_sb_0/CoreAPB3_0/iPSELS[0]:D,1355
Demo_sb_0/CoreAPB3_0/iPSELS[0]:Y,571
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:CLK,37204
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[16]:Q,37204
SPI_SS0_obuf/U0/U_IOOUTFF:A,
SPI_SS0_obuf/U0/U_IOOUTFF:Y,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_282:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_282:IPB,
Demo_sb_0/CORECONFIGP_0/state_s0_0_a2_i:A,17705
Demo_sb_0/CORECONFIGP_0/state_s0_0_a2_i:B,17854
Demo_sb_0/CORECONFIGP_0/state_s0_0_a2_i:Y,17705
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[24]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[24]:B,34336
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[24]:Y,16991
CORESPI_0/USPI/URF/CLK_DIV[5]:ALn,
CORESPI_0/USPI/URF/CLK_DIV[5]:CLK,3472
CORESPI_0/USPI/URF/CLK_DIV[5]:D,7410
CORESPI_0/USPI/URF/CLK_DIV[5]:EN,3484
CORESPI_0/USPI/URF/CLK_DIV[5]:Q,3472
CORESPI_0/USPI/UCC/clk_div_val_reg[4]:ALn,
CORESPI_0/USPI/UCC/clk_div_val_reg[4]:CLK,4795
CORESPI_0/USPI/UCC/clk_div_val_reg[4]:D,8860
CORESPI_0/USPI/UCC/clk_div_val_reg[4]:EN,7753
CORESPI_0/USPI/UCC/clk_div_val_reg[4]:Q,4795
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_125:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_125:IPB,
CORESPI_0/USPI/UTXF/wr_pointer_q[0]:ALn,
CORESPI_0/USPI/UTXF/wr_pointer_q[0]:CLK,4158
CORESPI_0/USPI/UTXF/wr_pointer_q[0]:D,1610
CORESPI_0/USPI/UTXF/wr_pointer_q[0]:Q,4158
CORESPI_0/USPI/URF/prdata_2_4_1_0[1]:A,3431
CORESPI_0/USPI/URF/prdata_2_4_1_0[1]:B,3383
CORESPI_0/USPI/URF/prdata_2_4_1_0[1]:C,1843
CORESPI_0/USPI/URF/prdata_2_4_1_0[1]:D,3103
CORESPI_0/USPI/URF/prdata_2_4_1_0[1]:Y,1843
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_3:A,4949
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_3:B,4872
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_3:C,4820
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_3:D,4718
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE_3:Y,4718
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_121:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_121:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_18:C,8961
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_18:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_18:IPC,8961
FCCC_0/CCC_INST/IP_INTERFACE_4:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_4:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_230:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_230:IPB,
CORESPI_0/USPI/URXF/rd_pointer_q[1]:ALn,
CORESPI_0/USPI/URXF/rd_pointer_q[1]:CLK,1102
CORESPI_0/USPI/URXF/rd_pointer_q[1]:D,1522
CORESPI_0/USPI/URXF/rd_pointer_q[1]:Q,1102
Demo_sb_0/CORERESETP_0/sdif1_areset_n_rcosc_q1:ALn,
Demo_sb_0/CORERESETP_0/sdif1_areset_n_rcosc_q1:CLK,18868
Demo_sb_0/CORERESETP_0/sdif1_areset_n_rcosc_q1:Q,18868
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_6:A,4075
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_6:B,4499
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_6:C,1539
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_6:D,3745
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_6:Y,1539
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_10:IPB,
Demo_sb_0/CORERESETP_0/count_sdif0_cry[3]:B,17680
Demo_sb_0/CORERESETP_0/count_sdif0_cry[3]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[3]:FCO,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[3]:S,17770
Demo_sb_0/Demo_sb_MSS_0/MMUART_1_TXD_PAD/U_IOPAD:D,
Demo_sb_0/Demo_sb_MSS_0/MMUART_1_TXD_PAD/U_IOPAD:E,
Demo_sb_0/Demo_sb_MSS_0/MMUART_1_TXD_PAD/U_IOPAD:PAD,
Demo_sb_0/CORERESETP_0/count_sdif0_cry[10]:B,17792
Demo_sb_0/CORERESETP_0/count_sdif0_cry[10]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[10]:FCO,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[10]:S,17658
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_107:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_267:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_267:IPB,
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc:ALn,
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc:CLK,
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc:D,18868
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc:Q,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_166:A,18470
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_166:B,38039
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_166:IPA,18470
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_166:IPB,38039
CORESPI_0/USPI/URXF/full_out_2_0_RNO:A,4930
CORESPI_0/USPI/URXF/full_out_2_0_RNO:B,5884
CORESPI_0/USPI/URXF/full_out_2_0_RNO:C,571
CORESPI_0/USPI/URXF/full_out_2_0_RNO:D,4693
CORESPI_0/USPI/URXF/full_out_2_0_RNO:Y,571
CORESPI_0/USPI/UCC/mtx_re_q1:ALn,
CORESPI_0/USPI/UCC/mtx_re_q1:CLK,5887
CORESPI_0/USPI/UCC/mtx_re_q1:D,8867
CORESPI_0/USPI/UCC/mtx_re_q1:Q,5887
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_0:IPC,
CORESPI_0/USPI/UCC/rx_alldone:ALn,
CORESPI_0/USPI/UCC/rx_alldone:CLK,7882
CORESPI_0/USPI/UCC/rx_alldone:D,8860
CORESPI_0/USPI/UCC/rx_alldone:Q,7882
Demo_sb_0/CORERESETP_0/sm0_state[1]:ALn,7074
Demo_sb_0/CORERESETP_0/sm0_state[1]:CLK,7889
Demo_sb_0/CORERESETP_0/sm0_state[1]:D,8867
Demo_sb_0/CORERESETP_0/sm0_state[1]:Q,7889
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_196:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_196:IPB,
Demo_sb_0/CORECONFIGP_0/paddr[13]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[13]:CLK,35907
Demo_sb_0/CORECONFIGP_0/paddr[13]:D,40600
Demo_sb_0/CORECONFIGP_0/paddr[13]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[13]:Q,35907
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_266:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_266:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_0:IPCLKn,
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0_o2_0:A,3996
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0_o2_0:B,3972
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0_o2_0:C,4857
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0_o2_0:D,4694
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0_o2_0:Y,3972
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_284:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_284:IPB,
Demo_sb_0/CORERESETP_0/sdif2_areset_n_rcosc_q1:ALn,
Demo_sb_0/CORERESETP_0/sdif2_areset_n_rcosc_q1:CLK,18868
Demo_sb_0/CORERESETP_0/sdif2_areset_n_rcosc_q1:Q,18868
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[13]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[13]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[13]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[13]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[13]:Y,36887
Demo_sb_0/CORERESETP_0/count_sdif0_cry[4]:B,17696
Demo_sb_0/CORERESETP_0/count_sdif0_cry[4]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[4]:FCO,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[4]:S,17754
CORESPI_0/USPI/UCC/mtx_spi_data_out:ALn,
CORESPI_0/USPI/UCC/mtx_spi_data_out:CLK,
CORESPI_0/USPI/UCC/mtx_spi_data_out:D,3016
CORESPI_0/USPI/UCC/mtx_spi_data_out:Q,
Demo_sb_0/CORERESETP_0/next_sm0_state25:A,6870
Demo_sb_0/CORERESETP_0/next_sm0_state25:B,6793
Demo_sb_0/CORERESETP_0/next_sm0_state25:C,6748
Demo_sb_0/CORERESETP_0/next_sm0_state25:D,5723
Demo_sb_0/CORERESETP_0/next_sm0_state25:Y,5723
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:CLK,37121
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[5]:Q,37121
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_139:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_139:IPB,
Demo_sb_0/CORERESETP_0/count_sdif0_cry[7]:B,17744
Demo_sb_0/CORERESETP_0/count_sdif0_cry[7]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[7]:FCO,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[7]:S,17706
Demo_sb_0/CORECONFIGP_0/int_prdata24:A,38726
Demo_sb_0/CORECONFIGP_0/int_prdata24:B,38613
Demo_sb_0/CORECONFIGP_0/int_prdata24:C,38539
Demo_sb_0/CORECONFIGP_0/int_prdata24:Y,38539
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_24:C,1024
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_24:IPC,1024
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_153:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_153:IPB,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[13]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[13]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[13]:D,40629
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[13]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[13]:Q,36887
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_20:IPENn,
CORESPI_0/USPI/URF/sticky_10_iv_i[0]:A,8010
CORESPI_0/USPI/URF/sticky_10_iv_i[0]:B,6876
CORESPI_0/USPI/URF/sticky_10_iv_i[0]:C,2541
CORESPI_0/USPI/URF/sticky_10_iv_i[0]:Y,2541
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_154:IPB,
CORESPI_0/USPI/URXF/counter_q_RNI69MB4[3]:A,4938
CORESPI_0/USPI/URXF/counter_q_RNI69MB4[3]:B,4857
CORESPI_0/USPI/URXF/counter_q_RNI69MB4[3]:C,4760
CORESPI_0/USPI/URXF/counter_q_RNI69MB4[3]:FCI,4715
CORESPI_0/USPI/URXF/counter_q_RNI69MB4[3]:FCO,4715
CORESPI_0/USPI/URXF/counter_q_RNI69MB4[3]:S,5456
CORESPI_0/USPI/UCC/stxs_state6_0_a2_0_a2:A,4838
CORESPI_0/USPI/UCC/stxs_state6_0_a2_0_a2:B,5750
CORESPI_0/USPI/UCC/stxs_state6_0_a2_0_a2:Y,4838
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_25:IPCLKn,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_27:C,3016
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_27:IPC,3016
Demo_sb_0/CORERESETP_0/sdif0_spll_lock_q2:ALn,7074
Demo_sb_0/CORERESETP_0/sdif0_spll_lock_q2:CLK,6735
Demo_sb_0/CORERESETP_0/sdif0_spll_lock_q2:D,8867
Demo_sb_0/CORERESETP_0/sdif0_spll_lock_q2:Q,6735
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_32:C,8890
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_32:IPC,8890
CORESPI_0/USPI/URXF/counter_q[0]:ALn,
CORESPI_0/USPI/URXF/counter_q[0]:CLK,4272
CORESPI_0/USPI/URXF/counter_q[0]:D,2547
CORESPI_0/USPI/URXF/counter_q[0]:Q,4272
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_214:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_16:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_16:IPB,
CORESPI_0/USPI/UCC/SYNC3_msrxp_pktsel:ALn,
CORESPI_0/USPI/UCC/SYNC3_msrxp_pktsel:CLK,7933
CORESPI_0/USPI/UCC/SYNC3_msrxp_pktsel:D,8827
CORESPI_0/USPI/UCC/SYNC3_msrxp_pktsel:Q,7933
CORESPI_0/USPI/UCC/SYNC1_stxs_txready:ALn,
CORESPI_0/USPI/UCC/SYNC1_stxs_txready:CLK,6825
CORESPI_0/USPI/UCC/SYNC1_stxs_txready:D,8847
CORESPI_0/USPI/UCC/SYNC1_stxs_txready:Q,6825
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_280:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_280:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_28:IPENn,
CORESPI_0/USPI/UCC/stxs_bitsel_0_sqmuxa_0:A,5003
CORESPI_0/USPI/UCC/stxs_bitsel_0_sqmuxa_0:B,5928
CORESPI_0/USPI/UCC/stxs_bitsel_0_sqmuxa_0:Y,5003
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_323:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_323:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_269:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_269:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_91:A,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_91:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_91:IPB,
CORESPI_0/USPI/URF/control2[1]:ALn,
CORESPI_0/USPI/URF/control2[1]:CLK,4419
CORESPI_0/USPI/URF/control2[1]:D,7297
CORESPI_0/USPI/URF/control2[1]:EN,3614
CORESPI_0/USPI/URF/control2[1]:Q,4419
CORESPI_0/USPI/UCC/mtx_bitsel[3]:ALn,
CORESPI_0/USPI/UCC/mtx_bitsel[3]:CLK,3733
CORESPI_0/USPI/UCC/mtx_bitsel[3]:D,3584
CORESPI_0/USPI/UCC/mtx_bitsel[3]:Q,3733
Demo_sb_0/CORECONFIGP_0/pwdata[19]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[19]:CLK,38290
Demo_sb_0/CORECONFIGP_0/pwdata[19]:D,40652
Demo_sb_0/CORECONFIGP_0/pwdata[19]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[19]:Q,38290
CORESPI_0/USPI/URF/control1[1]:ALn,
CORESPI_0/USPI/URF/control1[1]:CLK,2484
CORESPI_0/USPI/URF/control1[1]:D,7319
CORESPI_0/USPI/URF/control1[1]:EN,3607
CORESPI_0/USPI/URF/control1[1]:Q,2484
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_128:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_128:IPB,
GPIO_2_M2F_obuf/U0/U_IOPAD:D,
GPIO_2_M2F_obuf/U0/U_IOPAD:E,
GPIO_2_M2F_obuf/U0/U_IOPAD:PAD,
CORESPI_0/USPI/UCC/stxs_lastbit_3:A,7990
CORESPI_0/USPI/UCC/stxs_lastbit_3:B,7827
CORESPI_0/USPI/UCC/stxs_lastbit_3:C,7836
CORESPI_0/USPI/UCC/stxs_lastbit_3:D,7735
CORESPI_0/USPI/UCC/stxs_lastbit_3:Y,7735
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_320:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_320:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_76:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_76:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_6:A,1549
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_6:IPA,1549
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_6:IPB,
Demo_sb_0/CORECONFIGP_0/next_state5:A,-2087
Demo_sb_0/CORECONFIGP_0/next_state5:B,-2141
Demo_sb_0/CORECONFIGP_0/next_state5:Y,-2141
CORESPI_0/USPI/UCC/stxs_lastbit:ALn,6056
CORESPI_0/USPI/UCC/stxs_lastbit:CLK,6853
CORESPI_0/USPI/UCC/stxs_lastbit:D,7735
CORESPI_0/USPI/UCC/stxs_lastbit:EN,7726
CORESPI_0/USPI/UCC/stxs_lastbit:Q,6853
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:CLK,37097
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[15]:Q,37097
CORESPI_0/USPI/UCC/msrxs_shiftreg[2]:ALn,
CORESPI_0/USPI/UCC/msrxs_shiftreg[2]:CLK,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg[2]:D,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg[2]:EN,6849
CORESPI_0/USPI/UCC/msrxs_shiftreg[2]:Q,7926
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_194:IPA,
CORESPI_0/USPI/UCC/spi_clk_count_cry[5]:B,7791
CORESPI_0/USPI/UCC/spi_clk_count_cry[5]:C,4566
CORESPI_0/USPI/UCC/spi_clk_count_cry[5]:FCI,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[5]:FCO,4518
CORESPI_0/USPI/UCC/spi_clk_count_cry[5]:S,4550
FCCC_0/CCC_INST/IP_INTERFACE_1:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_1:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[0]:A,34716
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[0]:B,35890
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[0]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[0]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[0]:Y,15915
Demo_sb_0/CORERESETP_0/count_sdif0_cry[9]:B,17776
Demo_sb_0/CORERESETP_0/count_sdif0_cry[9]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[9]:FCO,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[9]:S,17674
CORESPI_0/USPI/UTXF/wr_pointer_q[4]:ALn,
CORESPI_0/USPI/UTXF/wr_pointer_q[4]:CLK,4300
CORESPI_0/USPI/UTXF/wr_pointer_q[4]:D,1509
CORESPI_0/USPI/UTXF/wr_pointer_q[4]:Q,4300
FCCC_1/CCC_INST/IP_INTERFACE_9:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_9:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_9:IPC,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[18]:A,34643
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[18]:B,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[18]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[18]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[18]:Y,15915
CORESPI_0/USPI/URF/prdata_2_6_1[2]:A,3306
CORESPI_0/USPI/URF/prdata_2_6_1[2]:B,3222
CORESPI_0/USPI/URF/prdata_2_6_1[2]:C,1683
CORESPI_0/USPI/URF/prdata_2_6_1[2]:D,1322
CORESPI_0/USPI/URF/prdata_2_6_1[2]:Y,1322
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_9:B,1102
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_9:C,1291
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_9:IPB,1102
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_9:IPC,1291
CORESPI_0/USPI/UCC/un1_resetn_tx:A,
CORESPI_0/USPI/UCC/un1_resetn_tx:B,
CORESPI_0/USPI/UCC/un1_resetn_tx:C,
CORESPI_0/USPI/UCC/un1_resetn_tx:Y,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_10:IPENn,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_86:A,37229
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_86:IPA,37229
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_86:IPB,
AND2_0/U0:A,
AND2_0/U0:B,
AND2_0/U0:Y,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[21]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[21]:B,34409
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[21]:Y,16991
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_163:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_163:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_173:A,38413
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_173:B,38602
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_173:IPA,38413
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_173:IPB,38602
Demo_sb_0/CORECONFIGP_0/paddr[10]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[10]:CLK,35474
Demo_sb_0/CORECONFIGP_0/paddr[10]:D,40658
Demo_sb_0/CORECONFIGP_0/paddr[10]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[10]:Q,35474
CORESPI_0/USPI/UTXF/rd_pointer_q_3[2]:A,4980
CORESPI_0/USPI/UTXF/rd_pointer_q_3[2]:B,4056
CORESPI_0/USPI/UTXF/rd_pointer_q_3[2]:C,7838
CORESPI_0/USPI/UTXF/rd_pointer_q_3[2]:D,7738
CORESPI_0/USPI/UTXF/rd_pointer_q_3[2]:Y,4056
CORESPI_0/USPI/URF/prdata_2_1[6]:A,3701
CORESPI_0/USPI/URF/prdata_2_1[6]:B,3618
CORESPI_0/USPI/URF/prdata_2_1[6]:C,3454
CORESPI_0/USPI/URF/prdata_2_1[6]:D,1993
CORESPI_0/USPI/URF/prdata_2_1[6]:Y,1993
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_235:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_235:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_141:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_141:IPB,
CORESPI_0/USPI/URXF/full_out_2_RNO_0:A,4206
CORESPI_0/USPI/URXF/full_out_2_RNO_0:B,4918
CORESPI_0/USPI/URXF/full_out_2_RNO_0:Y,4206
CORESPI_0/USPI/URXF/counter_q_RNIVJHH6[5]:B,3947
CORESPI_0/USPI/URXF/counter_q_RNIVJHH6[5]:C,4810
CORESPI_0/USPI/URXF/counter_q_RNIVJHH6[5]:D,4475
CORESPI_0/USPI/URXF/counter_q_RNIVJHH6[5]:FCI,4715
CORESPI_0/USPI/URXF/counter_q_RNIVJHH6[5]:S,3947
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_32:IPENn,
Demo_sb_0/CCC_0/CLK0_PAD_INST/U_IOPAD:PAD,
Demo_sb_0/CCC_0/CLK0_PAD_INST/U_IOPAD:Y,
CORESPI_0/USPI/UCC/mtx_pktsel_0_sqmuxa_0_a2_i_o2:A,3624
CORESPI_0/USPI/UCC/mtx_pktsel_0_sqmuxa_0_a2_i_o2:B,4497
CORESPI_0/USPI/UCC/mtx_pktsel_0_sqmuxa_0_a2_i_o2:Y,3624
CORESPI_0/USPI/UTXF/wr_pointer_d_1_sqmuxa_1_0_a3_0_a2_0:A,3158
CORESPI_0/USPI/UTXF/wr_pointer_d_1_sqmuxa_1_0_a3_0_a2_0:B,5028
CORESPI_0/USPI/UTXF/wr_pointer_d_1_sqmuxa_1_0_a3_0_a2_0:Y,3158
CORESPI_0/USPI/URF/control1[6]:ALn,
CORESPI_0/USPI/URF/control1[6]:CLK,3701
CORESPI_0/USPI/URF/control1[6]:D,7411
CORESPI_0/USPI/URF/control1[6]:EN,3607
CORESPI_0/USPI/URF/control1[6]:Q,3701
Demo_sb_0/CORECONFIGP_0/SDIF_RELEASED_q2:ALn,
Demo_sb_0/CORECONFIGP_0/SDIF_RELEASED_q2:CLK,36887
Demo_sb_0/CORECONFIGP_0/SDIF_RELEASED_q2:D,38867
Demo_sb_0/CORECONFIGP_0/SDIF_RELEASED_q2:Q,36887
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_149:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_149:IPB,
Demo_sb_0/CORECONFIGP_0/state_ns_0_a3[0]:A,-2141
Demo_sb_0/CORECONFIGP_0/state_ns_0_a3[0]:B,37004
Demo_sb_0/CORECONFIGP_0/state_ns_0_a3[0]:C,36689
Demo_sb_0/CORECONFIGP_0/state_ns_0_a3[0]:Y,-2141
CORESPI_0/USPI/URXF/wr_pointer_q_3[0]:A,7951
CORESPI_0/USPI/URXF/wr_pointer_q_3[0]:B,5795
CORESPI_0/USPI/URXF/wr_pointer_q_3[0]:C,4633
CORESPI_0/USPI/URXF/wr_pointer_q_3[0]:Y,4633
CORESPI_0/USPI/UCC/stxs_state_1_sqmuxa:A,6108
CORESPI_0/USPI/UCC/stxs_state_1_sqmuxa:B,7817
CORESPI_0/USPI/UCC/stxs_state_1_sqmuxa:Y,6108
Demo_sb_0/Demo_sb_MSS_0/MMUART_1_RXD_PAD/U_IOPAD:PAD,
Demo_sb_0/Demo_sb_MSS_0/MMUART_1_RXD_PAD/U_IOPAD:Y,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_35:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_15:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_15:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_15:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_233:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_233:IPB,
CORESPI_0/USPI/URF/N_87_i_0_a2:A,1807
CORESPI_0/USPI/URF/N_87_i_0_a2:B,3508
CORESPI_0/USPI/URF/N_87_i_0_a2:C,3488
CORESPI_0/USPI/URF/N_87_i_0_a2:Y,1807
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_169:IPA,
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i_a2_0_0:A,6845
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i_a2_0_0:B,6862
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i_a2_0_0:Y,6845
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_251:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_251:IPB,
CORESPI_0/USPI/UCC/mtx_state_RNO[2]:A,7872
CORESPI_0/USPI/UCC/mtx_state_RNO[2]:B,6900
CORESPI_0/USPI/UCC/mtx_state_RNO[2]:C,6841
CORESPI_0/USPI/UCC/mtx_state_RNO[2]:D,4799
CORESPI_0/USPI/UCC/mtx_state_RNO[2]:Y,4799
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_42:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_42:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_317:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_317:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_110:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_9:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_9:IPB,
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31_RNITJIL:A,4835
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31_RNITJIL:B,1509
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31_RNITJIL:C,6717
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31_RNITJIL:D,6518
CORESPI_0/USPI/UTXF/un34_fifo_mem_d_31_RNITJIL:Y,1509
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_31:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_31:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0_RNO:A,7807
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0_RNO:B,7766
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0_RNO:Y,7766
CORESPI_0/USPI/URF/int_raw[4]:ALn,
CORESPI_0/USPI/URF/int_raw[4]:CLK,4473
CORESPI_0/USPI/URF/int_raw[4]:D,2525
CORESPI_0/USPI/URF/int_raw[4]:Q,4473
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_109:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_109:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_5:IPENn,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_255:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_255:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_99:IPA,
CORESPI_0/USPI/URF/sticky[0]:ALn,
CORESPI_0/USPI/URF/sticky[0]:CLK,3431
CORESPI_0/USPI/URF/sticky[0]:D,2541
CORESPI_0/USPI/URF/sticky[0]:Q,3431
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_243:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_243:IPB,
CORESPI_0/USPI/URF/control2_1_sqmuxa_1:A,5564
CORESPI_0/USPI/URF/control2_1_sqmuxa_1:B,5444
CORESPI_0/USPI/URF/control2_1_sqmuxa_1:C,5437
CORESPI_0/USPI/URF/control2_1_sqmuxa_1:Y,5437
CORESPI_0/USPI/UCC/un1_sresetn_9_0_0_o2:A,3957
CORESPI_0/USPI/UCC/un1_sresetn_9_0_0_o2:B,3839
CORESPI_0/USPI/UCC/un1_sresetn_9_0_0_o2:Y,3839
CORESPI_0/USPI/UCC/msrxs_shiftreg[3]:ALn,
CORESPI_0/USPI/UCC/msrxs_shiftreg[3]:CLK,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg[3]:D,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg[3]:EN,6849
CORESPI_0/USPI/UCC/msrxs_shiftreg[3]:Q,7926
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_24:IPA,
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0_a2[5]:A,6831
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0_a2[5]:B,6773
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0_a2[5]:C,5728
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0_a2[5]:D,3733
CORESPI_0/USPI/UCC/mtx_state_ns_0_0_0_a2[5]:Y,3733
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_222:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_222:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[5]:A,34778
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[5]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[5]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[5]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[5]:Y,15915
CORESPI_0/USPI/URF/prdata_2_3[3]:A,3519
CORESPI_0/USPI/URF/prdata_2_3[3]:B,3436
CORESPI_0/USPI/URF/prdata_2_3[3]:C,1932
CORESPI_0/USPI/URF/prdata_2_3[3]:Y,1932
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_362:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_285:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_285:IPB,
CORESPI_0/USPI/URF/int_raw_27[3]:A,1807
CORESPI_0/USPI/URF/int_raw_27[3]:B,6986
CORESPI_0/USPI/URF/int_raw_27[3]:C,5371
CORESPI_0/USPI/URF/int_raw_27[3]:Y,1807
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i[4]:A,3584
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i[4]:B,3839
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i[4]:C,7829
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i[4]:D,6788
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i[4]:Y,3584
CORESPI_0/USPI/URF/prdata_2_RNO[5]:A,2058
CORESPI_0/USPI/URF/prdata_2_RNO[5]:B,1563
CORESPI_0/USPI/URF/prdata_2_RNO[5]:C,2541
CORESPI_0/USPI/URF/prdata_2_RNO[5]:Y,1563
CORESPI_0/USPI/UCC/rx_cmdsize_4_1:A,6960
CORESPI_0/USPI/UCC/rx_cmdsize_4_1:B,6938
CORESPI_0/USPI/UCC/rx_cmdsize_4_1:C,6825
CORESPI_0/USPI/UCC/rx_cmdsize_4_1:D,6791
CORESPI_0/USPI/UCC/rx_cmdsize_4_1:Y,6791
CORESPI_0/USPI/UCC/msrxp_frames_4[0]:A,7993
CORESPI_0/USPI/UCC/msrxp_frames_4[0]:B,7906
CORESPI_0/USPI/UCC/msrxp_frames_4[0]:Y,7906
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_258:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_258:IPB,
Demo_sb_0/CORERESETP_0/count_sdif0_enable_q1:ALn,18756
Demo_sb_0/CORERESETP_0/count_sdif0_enable_q1:CLK,18868
Demo_sb_0/CORERESETP_0/count_sdif0_enable_q1:D,2737
Demo_sb_0/CORERESETP_0/count_sdif0_enable_q1:Q,18868
CORESPI_0/USPI/UCC/msrxs_strobe:ALn,
CORESPI_0/USPI/UCC/msrxs_strobe:CLK,8867
CORESPI_0/USPI/UCC/msrxs_strobe:D,7919
CORESPI_0/USPI/UCC/msrxs_strobe:EN,5710
CORESPI_0/USPI/UCC/msrxs_strobe:Q,8867
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[14]:A,34636
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[14]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[14]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[14]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[14]:Y,15915
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_14:C,7354
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_14:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_14:IPC,7354
MAC_TBI_MDC_obuf/U0/U_IOOUTFF:A,
MAC_TBI_MDC_obuf/U0/U_IOOUTFF:Y,
FCCC_1/CCC_INST/IP_INTERFACE_8:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_8:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_8:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_167:IPB,
Demo_sb_0/CORECONFIGP_0/pwrite:ALn,
Demo_sb_0/CORECONFIGP_0/pwrite:CLK,37514
Demo_sb_0/CORECONFIGP_0/pwrite:D,40567
Demo_sb_0/CORECONFIGP_0/pwrite:EN,37386
Demo_sb_0/CORECONFIGP_0/pwrite:Q,37514
Demo_sb_0/CORECONFIGP_0/pwdata[28]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[28]:CLK,39178
Demo_sb_0/CORECONFIGP_0/pwdata[28]:D,40664
Demo_sb_0/CORECONFIGP_0/pwdata[28]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[28]:Q,39178
CORESPI_0/USPI/UTXF/un1_counter_q_1_ac0_3:A,4903
CORESPI_0/USPI/UTXF/un1_counter_q_1_ac0_3:B,2764
CORESPI_0/USPI/UTXF/un1_counter_q_1_ac0_3:C,4794
CORESPI_0/USPI/UTXF/un1_counter_q_1_ac0_3:D,4703
CORESPI_0/USPI/UTXF/un1_counter_q_1_ac0_3:Y,2764
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[8]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[8]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[8]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[8]:D,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[8]:Y,36887
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_355:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_355:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_33:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_33:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_57:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_57:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[11]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[11]:CLK,38663
Demo_sb_0/CORECONFIGP_0/pwdata[11]:D,40640
Demo_sb_0/CORECONFIGP_0/pwdata[11]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[11]:Q,38663
CORESPI_0/USPI/URXF/full_out_2_0:A,3910
CORESPI_0/USPI/URXF/full_out_2_0:B,5717
CORESPI_0/USPI/URXF/full_out_2_0:C,571
CORESPI_0/USPI/URXF/full_out_2_0:D,1482
CORESPI_0/USPI/URXF/full_out_2_0:Y,571
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_37:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_37:IPB,
Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0:An,
Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0:YWn,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_135:B,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_135:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_135:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_14:IPA,
FCCC_1/CCC_INST/IP_INTERFACE_14:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_14:IPC,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:CLK,37180
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:D,38614
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:EN,-2141
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:Q,37180
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[2]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[2]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[2]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[2]:D,36880
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[2]:Y,36880
CORESPI_0/USPI/URF/prdata_2_6_1[4]:A,3540
CORESPI_0/USPI/URF/prdata_2_6_1[4]:B,3456
CORESPI_0/USPI/URF/prdata_2_6_1[4]:C,1902
CORESPI_0/USPI/URF/prdata_2_6_1[4]:D,1549
CORESPI_0/USPI/URF/prdata_2_6_1[4]:Y,1549
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_4:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_4:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_113:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_113:IPB,
CORESPI_0/USPI/URF/CLK_DIV[3]:ALn,
CORESPI_0/USPI/URF/CLK_DIV[3]:CLK,4618
CORESPI_0/USPI/URF/CLK_DIV[3]:D,7334
CORESPI_0/USPI/URF/CLK_DIV[3]:EN,3484
CORESPI_0/USPI/URF/CLK_DIV[3]:Q,4618
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_16:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_16:IPC,
CORESPI_0/USPI/UCC/stxs_checkorun_0_sqmuxa:A,5159
CORESPI_0/USPI/UCC/stxs_checkorun_0_sqmuxa:B,5860
CORESPI_0/USPI/UCC/stxs_checkorun_0_sqmuxa:Y,5159
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_2:IPA,
CORESPI_0/USPI/UTXF/rd_pointer_q_3[1]:A,4964
CORESPI_0/USPI/UTXF/rd_pointer_q_3[1]:B,4040
CORESPI_0/USPI/UTXF/rd_pointer_q_3[1]:C,7816
CORESPI_0/USPI/UTXF/rd_pointer_q_3[1]:Y,4040
GPIO_0_M2F_obuf/U0/U_IOENFF:A,
GPIO_0_M2F_obuf/U0/U_IOENFF:Y,
Demo_sb_0/CORERESETP_0/ddr_settled:ALn,18756
Demo_sb_0/CORERESETP_0/ddr_settled:CLK,4998
Demo_sb_0/CORERESETP_0/ddr_settled:Q,4998
CORESPI_0/USPI/UCC/stxs_midbit_3:A,6100
CORESPI_0/USPI/UCC/stxs_midbit_3:B,7827
CORESPI_0/USPI/UCC/stxs_midbit_3:Y,6100
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_41:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_41:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_243:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_243:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_29:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_29:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_275:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_1:A,3664
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_1:B,1322
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_1:C,4113
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_1:D,3549
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNO_1:Y,1322
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_142:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:CLK,37204
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[8]:Q,37204
CORESPI_0/USPI/UCC/clk_div_val_reg[1]:ALn,
CORESPI_0/USPI/UCC/clk_div_val_reg[1]:CLK,4749
CORESPI_0/USPI/UCC/clk_div_val_reg[1]:D,8860
CORESPI_0/USPI/UCC/clk_div_val_reg[1]:EN,7753
CORESPI_0/USPI/UCC/clk_div_val_reg[1]:Q,4749
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:CLK,37205
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[13]:Q,37205
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_329:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_329:IPB,
CORESPI_0/USPI/UCC/msrxs_datain[3]:ALn,
CORESPI_0/USPI/UCC/msrxs_datain[3]:CLK,8957
CORESPI_0/USPI/UCC/msrxs_datain[3]:D,8860
CORESPI_0/USPI/UCC/msrxs_datain[3]:EN,5765
CORESPI_0/USPI/UCC/msrxs_datain[3]:Q,8957
Demo_sb_0/CORECONFIGP_0/pwdata[7]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[7]:CLK,38337
Demo_sb_0/CORECONFIGP_0/pwdata[7]:D,40660
Demo_sb_0/CORECONFIGP_0/pwdata[7]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[7]:Q,38337
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_354:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_354:IPB,
Demo_sb_0/CORERESETP_0/SOFT_M3_RESET_keep_RNIGVMD:A,
Demo_sb_0/CORERESETP_0/SOFT_M3_RESET_keep_RNIGVMD:Y,
CORESPI_0/USPI/UTXF/wr_pointer_q[3]:ALn,
CORESPI_0/USPI/UTXF/wr_pointer_q[3]:CLK,4209
CORESPI_0/USPI/UTXF/wr_pointer_q[3]:D,1610
CORESPI_0/USPI/UTXF/wr_pointer_q[3]:Q,4209
CORESPI_0/USPI/UCC/stxs_txzeros:ALn,6056
CORESPI_0/USPI/UCC/stxs_txzeros:CLK,8010
CORESPI_0/USPI/UCC/stxs_txzeros:D,5115
CORESPI_0/USPI/UCC/stxs_txzeros:EN,7726
CORESPI_0/USPI/UCC/stxs_txzeros:Q,8010
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_178:IPB,
CORESPI_0/USPI/URF/prdata_2_RNO[6]:A,1993
CORESPI_0/USPI/URF/prdata_2_RNO[6]:B,1592
CORESPI_0/USPI/URF/prdata_2_RNO[6]:C,2570
CORESPI_0/USPI/URF/prdata_2_RNO[6]:Y,1592
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_134:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_134:IPB,
GPIO_5_M2F_obuf/U0/U_IOENFF:A,
GPIO_5_M2F_obuf/U0/U_IOENFF:Y,
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[1]:A,5138
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[1]:B,4917
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[1]:C,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv[1]:Y,3968
CORESPI_0/USPI/UCC/clock_rx_q2:ALn,
CORESPI_0/USPI/UCC/clock_rx_q2:CLK,4953
CORESPI_0/USPI/UCC/clock_rx_q2:D,8867
CORESPI_0/USPI/UCC/clock_rx_q2:Q,4953
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_278:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_278:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_338:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_338:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_203:B,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_203:IPB,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[15]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[15]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[15]:D,40654
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[15]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[15]:Q,36887
Demo_sb_0/CORERESETP_0/sm0_state_ns[2]:A,8010
Demo_sb_0/CORERESETP_0/sm0_state_ns[2]:B,7910
Demo_sb_0/CORERESETP_0/sm0_state_ns[2]:C,7889
Demo_sb_0/CORERESETP_0/sm0_state_ns[2]:Y,7889
Demo_sb_0/CORERESETP_0/sdif0_state[0]:ALn,8748
Demo_sb_0/CORERESETP_0/sdif0_state[0]:CLK,7825
Demo_sb_0/CORERESETP_0/sdif0_state[0]:D,6925
Demo_sb_0/CORERESETP_0/sdif0_state[0]:Q,7825
CORESPI_0/USPI/URXF/full_out_RNI6HE01:A,4272
CORESPI_0/USPI/URXF/full_out_RNI6HE01:B,4210
CORESPI_0/USPI/URXF/full_out_RNI6HE01:C,4111
CORESPI_0/USPI/URXF/full_out_RNI6HE01:D,3996
CORESPI_0/USPI/URXF/full_out_RNI6HE01:Y,3996
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_185:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_185:IPB,
CORESPI_0/USPI/URF/prdata_2_6[3]:A,3061
CORESPI_0/USPI/URF/prdata_2_6[3]:B,3668
CORESPI_0/USPI/URF/prdata_2_6[3]:C,2562
CORESPI_0/USPI/URF/prdata_2_6[3]:D,1928
CORESPI_0/USPI/URF/prdata_2_6[3]:Y,1928
CORESPI_0/USPI/URF/int_raw[0]:ALn,
CORESPI_0/USPI/URF/int_raw[0]:CLK,4496
CORESPI_0/USPI/URF/int_raw[0]:D,2619
CORESPI_0/USPI/URF/int_raw[0]:Q,4496
Demo_sb_0/CORERESETP_0/sm0_state_ns[3]:A,8010
Demo_sb_0/CORERESETP_0/sm0_state_ns[3]:B,7926
Demo_sb_0/CORERESETP_0/sm0_state_ns[3]:C,7836
Demo_sb_0/CORERESETP_0/sm0_state_ns[3]:D,7786
Demo_sb_0/CORERESETP_0/sm0_state_ns[3]:Y,7786
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_70:B,37177
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_70:IPB,37177
Demo_sb_0/CORERESETP_0/count_sdif0_enable_rcosc:ALn,18756
Demo_sb_0/CORERESETP_0/count_sdif0_enable_rcosc:CLK,18714
Demo_sb_0/CORERESETP_0/count_sdif0_enable_rcosc:D,18868
Demo_sb_0/CORERESETP_0/count_sdif0_enable_rcosc:Q,18714
CORESPI_0/USPI/UCC/msrxs_datain[5]:ALn,
CORESPI_0/USPI/UCC/msrxs_datain[5]:CLK,8961
CORESPI_0/USPI/UCC/msrxs_datain[5]:D,8860
CORESPI_0/USPI/UCC/msrxs_datain[5]:EN,5765
CORESPI_0/USPI/UCC/msrxs_datain[5]:Q,8961
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_12:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_8:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_127:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_127:IPB,
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[3]:A,1586
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[3]:B,7824
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[3]:Y,1586
CORESPI_0/USPI/URF/cfg_ssel[0]:ALn,
CORESPI_0/USPI/URF/cfg_ssel[0]:CLK,3601
CORESPI_0/USPI/URF/cfg_ssel[0]:D,7297
CORESPI_0/USPI/URF/cfg_ssel[0]:EN,3562
CORESPI_0/USPI/URF/cfg_ssel[0]:Q,3601
CORESPI_0/USPI/URF/prdata_2_1_1[7]:A,2565
CORESPI_0/USPI/URF/prdata_2_1_1[7]:B,2484
CORESPI_0/USPI/URF/prdata_2_1_1[7]:C,2516
CORESPI_0/USPI/URF/prdata_2_1_1[7]:D,2406
CORESPI_0/USPI/URF/prdata_2_1_1[7]:Y,2406
CORESPI_0/USPI/UCC/mtx_lastframe_1_sqmuxa_0_a2_1_a2:A,7870
CORESPI_0/USPI/UCC/mtx_lastframe_1_sqmuxa_0_a2_1_a2:B,7779
CORESPI_0/USPI/UCC/mtx_lastframe_1_sqmuxa_0_a2_1_a2:C,4763
CORESPI_0/USPI/UCC/mtx_lastframe_1_sqmuxa_0_a2_1_a2:Y,4763
FCCC_0/CCC_INST/IP_INTERFACE_6:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_6:IPC,
CORESPI_0/USPI/UTXF/full_out:ALn,
CORESPI_0/USPI/UTXF/full_out:CLK,3216
CORESPI_0/USPI/UTXF/full_out:D,1435
CORESPI_0/USPI/UTXF/full_out:Q,3216
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_116:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_116:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[2]:A,34636
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[2]:B,36880
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[2]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[2]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[2]:Y,15915
CORESPI_0/USPI/UTXF/wr_pointer_q_3[3]:A,7951
CORESPI_0/USPI/UTXF/wr_pointer_q_3[3]:B,1659
CORESPI_0/USPI/UTXF/wr_pointer_q_3[3]:C,1610
CORESPI_0/USPI/UTXF/wr_pointer_q_3[3]:Y,1610
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_72:A,37182
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_72:IPA,37182
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[4]:A,34732
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[4]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[4]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[4]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[4]:Y,15915
CORESPI_0/USPI/URXF/counter_q_RNIBLO83[2]:A,4922
CORESPI_0/USPI/URXF/counter_q_RNIBLO83[2]:B,4842
CORESPI_0/USPI/URXF/counter_q_RNIBLO83[2]:C,4745
CORESPI_0/USPI/URXF/counter_q_RNIBLO83[2]:FCI,4715
CORESPI_0/USPI/URXF/counter_q_RNIBLO83[2]:FCO,4715
CORESPI_0/USPI/URXF/counter_q_RNIBLO83[2]:S,5456
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[11]:A,34545
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[11]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[11]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[11]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[11]:Y,15915
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_31:IPENn,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_31:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_31:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_8:IPENn,
CORESPI_0/USPI/UCON/tx_fifo_write_sig_0_sqmuxa_0_a3_0_a2_0:A,1657
CORESPI_0/USPI/UCON/tx_fifo_write_sig_0_sqmuxa_0_a3_0_a2_0:B,1554
CORESPI_0/USPI/UCON/tx_fifo_write_sig_0_sqmuxa_0_a3_0_a2_0:Y,1554
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_13:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_13:IPC,
CORESPI_0/USPI/UCC/stxs_txzeros_4_f0:A,8010
CORESPI_0/USPI/UCC/stxs_txzeros_4_f0:B,7827
CORESPI_0/USPI/UCC/stxs_txzeros_4_f0:C,5115
CORESPI_0/USPI/UCC/stxs_txzeros_4_f0:Y,5115
Demo_sb_0/CORERESETP_0/count_sdif0[8]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[8]:CLK,16861
Demo_sb_0/CORERESETP_0/count_sdif0[8]:D,17690
Demo_sb_0/CORERESETP_0/count_sdif0[8]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[8]:Q,16861
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNI9FDA/U0_RGB1:An,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNI9FDA/U0_RGB1:YL,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_150:B,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_150:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_150:IPB,
CORESPI_0/USPI/URXF/rd_pointer_q_3[4]:A,1806
CORESPI_0/USPI/URXF/rd_pointer_q_3[4]:B,1667
CORESPI_0/USPI/URXF/rd_pointer_q_3[4]:C,7829
CORESPI_0/USPI/URXF/rd_pointer_q_3[4]:D,7728
CORESPI_0/USPI/URXF/rd_pointer_q_3[4]:Y,1667
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_35:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_58:IPA,
Demo_sb_0/CORECONFIGP_0/pwdata[0]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[0]:CLK,37971
Demo_sb_0/CORECONFIGP_0/pwdata[0]:D,40564
Demo_sb_0/CORECONFIGP_0/pwdata[0]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[0]:Q,37971
CORESPI_0/USPI/URXF/empty_out:ALn,
CORESPI_0/USPI/URXF/empty_out:CLK,3272
CORESPI_0/USPI/URXF/empty_out:D,673
CORESPI_0/USPI/URXF/empty_out:Q,3272
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_93:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_291:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_291:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_262:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_262:IPB,
CORESPI_0/USPI/UTXF/un1_data_out_dx_31:A,5003
CORESPI_0/USPI/UTXF/un1_data_out_dx_31:B,3992
CORESPI_0/USPI/UTXF/un1_data_out_dx_31:C,4894
CORESPI_0/USPI/UTXF/un1_data_out_dx_31:D,4809
CORESPI_0/USPI/UTXF/un1_data_out_dx_31:Y,3992
CORESPI_0/USPI/UCC/stxs_bitcnt_n2:A,7958
CORESPI_0/USPI/UCC/stxs_bitcnt_n2:B,7890
CORESPI_0/USPI/UCC/stxs_bitcnt_n2:C,7809
CORESPI_0/USPI/UCC/stxs_bitcnt_n2:D,5819
CORESPI_0/USPI/UCC/stxs_bitcnt_n2:Y,5819
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[2]:A,7872
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[2]:B,5606
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[2]:C,4798
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[2]:D,2447
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[2]:Y,2447
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_215:IPB,
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_0:A,5785
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_0:B,6913
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_0:C,6944
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_0:D,3826
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_0:FCI,
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_0:FCO,
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_0:Y,3826
Demo_sb_0/CORECONFIGP_0/pwdata[16]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[16]:CLK,38431
Demo_sb_0/CORECONFIGP_0/pwdata[16]:D,40630
Demo_sb_0/CORECONFIGP_0/pwdata[16]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[16]:Q,38431
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_266:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_266:IPB,
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc2:A,6940
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc2:B,4798
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc2:C,6831
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc2:D,6724
CORESPI_0/USPI/UTXF/un1_counter_q_1_axbxc2:Y,4798
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_9:A,1539
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_9:IPA,1539
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_9:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_144:IPB,
CORESPI_0/USPI/URF/prdata_2_6_1[6]:A,3586
CORESPI_0/USPI/URF/prdata_2_6_1[6]:B,3502
CORESPI_0/USPI/URF/prdata_2_6_1[6]:C,1945
CORESPI_0/USPI/URF/prdata_2_6_1[6]:D,1592
CORESPI_0/USPI/URF/prdata_2_6_1[6]:Y,1592
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_25:IPCLKn,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_348:IPB,
CORESPI_0/USPI/URF/prdata_2_6_2_0[6]:A,2288
CORESPI_0/USPI/URF/prdata_2_6_2_0[6]:B,1993
CORESPI_0/USPI/URF/prdata_2_6_2_0[6]:C,4519
CORESPI_0/USPI/URF/prdata_2_6_2_0[6]:D,2649
CORESPI_0/USPI/URF/prdata_2_6_2_0[6]:Y,1993
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_2:A,3016
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_2:B,6999
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_2:C,4096
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_2:D,3968
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_2:FCI,
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_2:FCO,
CORESPI_0/USPI/UCC/mtx_spi_data_out_2_u_2_1_wmux_2:Y,3016
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_19:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_19:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_280:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_280:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_218:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_68:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_68:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_67:B,37185
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_67:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_67:IPB,37185
GPIO_3_M2F_obuf/U0/U_IOENFF:A,
GPIO_3_M2F_obuf/U0/U_IOENFF:Y,
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0_0:A,3972
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0_0:B,3847
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0_0:C,3749
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0_0:D,3547
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0_0:Y,3547
CORESPI_0/USPI/UCC/stxs_bitcnt_c2:A,7088
CORESPI_0/USPI/UCC/stxs_bitcnt_c2:B,6991
CORESPI_0/USPI/UCC/stxs_bitcnt_c2:C,6939
CORESPI_0/USPI/UCC/stxs_bitcnt_c2:Y,6939
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_367:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_367:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_26:C,8911
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_26:IPC,8911
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_264:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_264:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_264:IPC,
CORESPI_0/USPI/UCC/stxs_state:ALn,6056
CORESPI_0/USPI/UCC/stxs_state:CLK,3468
CORESPI_0/USPI/UCC/stxs_state:EN,5946
CORESPI_0/USPI/UCC/stxs_state:Q,3468
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_104:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_104:IPB,
Demo_sb_0/CORERESETP_0/next_release_ext_reset_0_sqmuxa_0_a3:A,7922
Demo_sb_0/CORERESETP_0/next_release_ext_reset_0_sqmuxa_0_a3:B,7845
Demo_sb_0/CORERESETP_0/next_release_ext_reset_0_sqmuxa_0_a3:Y,7845
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_315:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_14:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_14:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_14:IPC,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[28]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[28]:CLK,37237
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[28]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[28]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[28]:Q,37237
CORESPI_0/USPI/UCC/un1_sresetn_9_0_0:A,7896
CORESPI_0/USPI/UCC/un1_sresetn_9_0_0:B,5034
CORESPI_0/USPI/UCC/un1_sresetn_9_0_0:C,4721
CORESPI_0/USPI/UCC/un1_sresetn_9_0_0:Y,4721
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[21]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[21]:CLK,37193
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[21]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[21]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[21]:Q,37193
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_308:IPB,
CORESPI_0/USPI/UCC/spi_clk_count[1]:ALn,
CORESPI_0/USPI/UCC/spi_clk_count[1]:CLK,4620
CORESPI_0/USPI/UCC/spi_clk_count[1]:D,4566
CORESPI_0/USPI/UCC/spi_clk_count[1]:Q,4620
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_9:IPENn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:CLK,37177
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[4]:Q,37177
CORESPI_0/USPI/UCC/mtx_state_RNO[4]:A,7997
CORESPI_0/USPI/UCC/mtx_state_RNO[4]:B,7886
CORESPI_0/USPI/UCC/mtx_state_RNO[4]:C,7750
CORESPI_0/USPI/UCC/mtx_state_RNO[4]:D,6734
CORESPI_0/USPI/UCC/mtx_state_RNO[4]:Y,6734
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_5:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_5:IPC,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_29:C,8901
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_29:IPC,8901
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[8]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[8]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[8]:D,40666
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[8]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[8]:Q,36887
Demo_sb_0/CORECONFIGP_0/pwdata[22]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[22]:CLK,38749
Demo_sb_0/CORECONFIGP_0/pwdata[22]:D,40627
Demo_sb_0/CORECONFIGP_0/pwdata[22]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[22]:Q,38749
Demo_sb_0/CORECONFIGP_0/pwdata[20]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[20]:CLK,38441
Demo_sb_0/CORECONFIGP_0/pwdata[20]:D,40630
Demo_sb_0/CORECONFIGP_0/pwdata[20]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[20]:Q,38441
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_88:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_88:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_45:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_45:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_182:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_180:A,38290
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_180:B,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_180:C,39190
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_180:IPA,38290
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_180:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_180:IPC,39190
CORESPI_0/USPI/UCC/stxs_bitcnt[1]:ALn,6056
CORESPI_0/USPI/UCC/stxs_bitcnt[1]:CLK,5852
CORESPI_0/USPI/UCC/stxs_bitcnt[1]:D,5920
CORESPI_0/USPI/UCC/stxs_bitcnt[1]:EN,7726
CORESPI_0/USPI/UCC/stxs_bitcnt[1]:Q,5852
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_23:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_89:A,37261
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_89:IPA,37261
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_89:IPB,
Demo_sb_0/CORERESETP_0/SDIF0_PHY_RESET_N:A,
Demo_sb_0/CORERESETP_0/SDIF0_PHY_RESET_N:B,
Demo_sb_0/CORERESETP_0/SDIF0_PHY_RESET_N:Y,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_260:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_260:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_193:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_193:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_193:IPC,
Demo_sb_0/CORECONFIGP_0/control_reg_15_0:A,38595
Demo_sb_0/CORECONFIGP_0/control_reg_15_0:B,38494
Demo_sb_0/CORECONFIGP_0/control_reg_15_0:C,38411
Demo_sb_0/CORECONFIGP_0/control_reg_15_0:Y,38411
CORESPI_0/USPI/UTXF/un1_wr_pointer_q_1.CO2:A,3158
CORESPI_0/USPI/UTXF/un1_wr_pointer_q_1.CO2:B,1594
CORESPI_0/USPI/UTXF/un1_wr_pointer_q_1.CO2:C,6837
CORESPI_0/USPI/UTXF/un1_wr_pointer_q_1.CO2:Y,1594
Demo_sb_0/Demo_sb_MSS_0/FIC_2_APB_M_PRESET_N_keep_RNI21LA/U0_RGB1:An,
Demo_sb_0/Demo_sb_MSS_0/FIC_2_APB_M_PRESET_N_keep_RNI21LA/U0_RGB1:YL,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_7:IPENn,
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i_a2_0:A,5730
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i_a2_0:B,3733
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i_a2_0:C,5654
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i_a2_0:Y,3733
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[6]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[6]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[6]:D,40624
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[6]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[6]:Q,36887
CORESPI_0/USPI/UTXF/empty_out_2_0_0_1:A,1685
CORESPI_0/USPI/UTXF/empty_out_2_0_0_1:B,688
CORESPI_0/USPI/UTXF/empty_out_2_0_0_1:C,4280
CORESPI_0/USPI/UTXF/empty_out_2_0_0_1:D,2764
CORESPI_0/USPI/UTXF/empty_out_2_0_0_1:Y,688
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_3:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_314:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_314:IPB,
Demo_sb_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0:A,-2141
Demo_sb_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0:B,15964
Demo_sb_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0:C,37554
Demo_sb_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0:Y,-2141
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_RNIEI67/U0:An,
Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_RNIEI67/U0:YWn,
CORESPI_0/USPI/URF/prdata_2_1[5]:A,3671
CORESPI_0/USPI/URF/prdata_2_1[5]:B,3588
CORESPI_0/USPI/URF/prdata_2_1[5]:C,2058
CORESPI_0/USPI/URF/prdata_2_1[5]:Y,2058
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_129:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_129:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_163:A,35792
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_163:B,37501
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_163:IPA,35792
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_163:IPB,37501
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:A,1843
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:IPA,1843
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_3:IPB,
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i[3]:A,3584
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i[3]:B,3839
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i[3]:C,7842
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i[3]:D,7735
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i[3]:Y,3584
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_297:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_297:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_31:IPENn,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_174:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_174:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_199:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_199:IPB,
Demo_sb_0/CCC_0/CLK0_PAD_INST/U_IOINFF:A,
Demo_sb_0/CCC_0/CLK0_PAD_INST/U_IOINFF:Y,
CORESPI_0/USPI/URXF/counter_q_RNIOGT21[0]:A,4812
CORESPI_0/USPI/URXF/counter_q_RNIOGT21[0]:B,4750
CORESPI_0/USPI/URXF/counter_q_RNIOGT21[0]:C,4653
CORESPI_0/USPI/URXF/counter_q_RNIOGT21[0]:FCO,4653
CORESPI_0/USPI/URXF/counter_q_RNIOGT21[0]:Y,4930
CORESPI_0/USPI/UCC/spi_clk_count_1_sqmuxa_i_i_a2:A,5739
CORESPI_0/USPI/UCC/spi_clk_count_1_sqmuxa_i_i_a2:B,4518
CORESPI_0/USPI/UCC/spi_clk_count_1_sqmuxa_i_i_a2:Y,4518
Demo_sb_0/CORECONFIGP_0/paddr[14]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[14]:CLK,36744
Demo_sb_0/CORECONFIGP_0/paddr[14]:D,40588
Demo_sb_0/CORECONFIGP_0/paddr[14]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[14]:Q,36744
CORESPI_0/USPI/UCC/un1_sresetn_10_0_0:A,7902
CORESPI_0/USPI/UCC/un1_sresetn_10_0_0:B,7847
CORESPI_0/USPI/UCC/un1_sresetn_10_0_0:C,4946
CORESPI_0/USPI/UCC/un1_sresetn_10_0_0:D,3624
CORESPI_0/USPI/UCC/un1_sresetn_10_0_0:Y,3624
CORESPI_0/USPI/UCC/mtx_bitsel[1]:ALn,
CORESPI_0/USPI/UCC/mtx_bitsel[1]:CLK,4540
CORESPI_0/USPI/UCC/mtx_bitsel[1]:D,3547
CORESPI_0/USPI/UCC/mtx_bitsel[1]:Q,4540
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_90:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_156:IPA,
CORESPI_0/USPI/URF/cfg_ssel[2]:ALn,
CORESPI_0/USPI/URF/cfg_ssel[2]:CLK,3306
CORESPI_0/USPI/URF/cfg_ssel[2]:D,7304
CORESPI_0/USPI/URF/cfg_ssel[2]:EN,3562
CORESPI_0/USPI/URF/cfg_ssel[2]:Q,3306
CORESPI_0/USPI/URF/cfg_ssel[5]:ALn,
CORESPI_0/USPI/URF/cfg_ssel[5]:CLK,3556
CORESPI_0/USPI/URF/cfg_ssel[5]:D,7410
CORESPI_0/USPI/URF/cfg_ssel[5]:EN,3562
CORESPI_0/USPI/URF/cfg_ssel[5]:Q,3556
Demo_sb_0/CORERESETP_0/release_sdif2_core_q1:ALn,7074
Demo_sb_0/CORERESETP_0/release_sdif2_core_q1:CLK,8867
Demo_sb_0/CORERESETP_0/release_sdif2_core_q1:D,4998
Demo_sb_0/CORERESETP_0/release_sdif2_core_q1:Q,8867
Demo_sb_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:ALn,
Demo_sb_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:CLK,8867
Demo_sb_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_q1:Q,8867
CORESPI_0/USPI/URXF/wr_pointer_q[0]:ALn,
CORESPI_0/USPI/URXF/wr_pointer_q[0]:CLK,5699
CORESPI_0/USPI/URXF/wr_pointer_q[0]:D,4633
CORESPI_0/USPI/URXF/wr_pointer_q[0]:Q,5699
CORESPI_0/USPI/URF/control2[7]:ALn,
CORESPI_0/USPI/URF/control2[7]:CLK,3648
CORESPI_0/USPI/URF/control2[7]:D,7415
CORESPI_0/USPI/URF/control2[7]:EN,3614
CORESPI_0/USPI/URF/control2[7]:Q,3648
Demo_sb_0/CORERESETP_0/release_sdif3_core_clk_base:ALn,7074
Demo_sb_0/CORERESETP_0/release_sdif3_core_clk_base:CLK,6870
Demo_sb_0/CORERESETP_0/release_sdif3_core_clk_base:D,8867
Demo_sb_0/CORERESETP_0/release_sdif3_core_clk_base:Q,6870
FCCC_1/CCC_INST/IP_INTERFACE_5:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_5:IPC,
Demo_sb_0/CORECONFIGP_0/INIT_DONE_q1:ALn,
Demo_sb_0/CORECONFIGP_0/INIT_DONE_q1:CLK,38867
Demo_sb_0/CORECONFIGP_0/INIT_DONE_q1:D,
Demo_sb_0/CORECONFIGP_0/INIT_DONE_q1:Q,38867
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_54:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_54:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_356:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_356:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[23]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[23]:B,34405
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[23]:Y,16991
Demo_sb_0/CoreAPB3_0/iPSELS_1_0[0]:A,614
Demo_sb_0/CoreAPB3_0/iPSELS_1_0[0]:B,571
Demo_sb_0/CoreAPB3_0/iPSELS_1_0[0]:Y,571
PHY_RST_obuf/U0/U_IOPAD:D,
PHY_RST_obuf/U0/U_IOPAD:E,
PHY_RST_obuf/U0/U_IOPAD:PAD,
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_2:A,4999
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_2:B,4884
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_2:C,3720
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_2:FCI,3768
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_2:FCO,4538
CORESPI_0/USPI/UTXF/un1_counter_q_0_cry_2:S,3720
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_4:IPC,
CORESPI_0/USPI/UCC/msrxp_frames_4[1]:A,7954
CORESPI_0/USPI/UCC/msrxp_frames_4[1]:B,7909
CORESPI_0/USPI/UCC/msrxp_frames_4[1]:C,7845
CORESPI_0/USPI/UCC/msrxp_frames_4[1]:Y,7845
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_1:IPCLKn,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_219:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_219:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_24:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_197:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_197:IPB,
Demo_sb_0/CORERESETP_0/mss_ready_select6:A,7922
Demo_sb_0/CORERESETP_0/mss_ready_select6:B,7852
Demo_sb_0/CORERESETP_0/mss_ready_select6:Y,7852
CORESPI_0/USPI/UCC/stxs_bitcnt[3]:ALn,6056
CORESPI_0/USPI/UCC/stxs_bitcnt[3]:CLK,5102
CORESPI_0/USPI/UCC/stxs_bitcnt[3]:D,5964
CORESPI_0/USPI/UCC/stxs_bitcnt[3]:EN,7726
CORESPI_0/USPI/UCC/stxs_bitcnt[3]:Q,5102
CORESPI_0/USPI/UCC/spi_clk_count[3]:ALn,
CORESPI_0/USPI/UCC/spi_clk_count[3]:CLK,4698
CORESPI_0/USPI/UCC/spi_clk_count[3]:D,4566
CORESPI_0/USPI/UCC/spi_clk_count[3]:Q,4698
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_181:IPA,
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[5]:A,2258
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[5]:B,3675
CORESPI_0/USPI/URF/prdata_2_6_2_0_1[5]:Y,2258
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_231:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_231:IPB,
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[5]:A,5082
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[5]:B,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[5]:C,6911
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[5]:D,6821
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[5]:Y,3968
CORESPI_0/USPI/UCC/stxs_bitsel_RNO[1]:A,7951
CORESPI_0/USPI/UCC/stxs_bitsel_RNO[1]:B,7896
CORESPI_0/USPI/UCC/stxs_bitsel_RNO[1]:C,5907
CORESPI_0/USPI/UCC/stxs_bitsel_RNO[1]:D,4838
CORESPI_0/USPI/UCC/stxs_bitsel_RNO[1]:Y,4838
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_7:IPC,
CORESPI_0/USPI/URF/int_raw[2]:ALn,
CORESPI_0/USPI/URF/int_raw[2]:CLK,3572
CORESPI_0/USPI/URF/int_raw[2]:D,1807
CORESPI_0/USPI/URF/int_raw[2]:Q,3572
CORESPI_0/USPI/UTXF/un1_counter_q_0_s_5:B,5774
CORESPI_0/USPI/UTXF/un1_counter_q_0_s_5:C,5657
CORESPI_0/USPI/UTXF/un1_counter_q_0_s_5:D,4280
CORESPI_0/USPI/UTXF/un1_counter_q_0_s_5:FCI,4538
CORESPI_0/USPI/UTXF/un1_counter_q_0_s_5:S,4280
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_30:C,3024
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_30:IPC,3024
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:A,1322
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:IPA,1322
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:IPB,
Demo_sb_0/CORERESETP_0/release_sdif0_core_clk_base:ALn,7074
Demo_sb_0/CORERESETP_0/release_sdif0_core_clk_base:CLK,5723
Demo_sb_0/CORERESETP_0/release_sdif0_core_clk_base:D,8867
Demo_sb_0/CORERESETP_0/release_sdif0_core_clk_base:Q,5723
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_73:A,37176
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_73:IPA,37176
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_148:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_148:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_208:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_208:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_16:C,7413
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_16:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_16:IPC,7413
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_265:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_265:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_265:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_20:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_20:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_36:IPA,
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_2:A,5054
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_2:B,5233
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_2:C,5139
CORESPI_0/USPI/URF/un1_CLK_DIV_1_sqmuxa_1_2:Y,5054
CORESPI_0/USPI/UCC/SYNC2_msrxp_strobe:ALn,
CORESPI_0/USPI/UCC/SYNC2_msrxp_strobe:CLK,7786
CORESPI_0/USPI/UCC/SYNC2_msrxp_strobe:D,8867
CORESPI_0/USPI/UCC/SYNC2_msrxp_strobe:Q,7786
Demo_sb_0/CORERESETP_0/count_sdif0_enable_RNO:A,7944
Demo_sb_0/CORERESETP_0/count_sdif0_enable_RNO:Y,7944
FCCC_1/CCC_INST/IP_INTERFACE_17:IPB,
FCCC_1/CCC_INST/IP_INTERFACE_17:IPC,
CORESPI_0/USPI/URXF/counter_q[3]:ALn,
CORESPI_0/USPI/URXF/counter_q[3]:CLK,4260
CORESPI_0/USPI/URXF/counter_q[3]:D,2600
CORESPI_0/USPI/URXF/counter_q[3]:Q,4260
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i:A,6923
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i:B,4937
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i:C,6845
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i:D,6690
CORESPI_0/USPI/UCC/un1_mtx_alldone_2_sqmuxa_2_0_i:Y,4937
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_271:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_271:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_228:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_228:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_228:IPC,
CORESPI_0/USPI/URF/control1[0]:ALn,
CORESPI_0/USPI/URF/control1[0]:CLK,3547
CORESPI_0/USPI/URF/control1[0]:D,7297
CORESPI_0/USPI/URF/control1[0]:EN,3607
CORESPI_0/USPI/URF/control1[0]:Q,3547
Demo_sb_0/CORECONFIGP_0/pwdata[3]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[3]:CLK,37294
Demo_sb_0/CORECONFIGP_0/pwdata[3]:D,40583
Demo_sb_0/CORECONFIGP_0/pwdata[3]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[3]:Q,37294
CORESPI_0/USPI/UCC/mtx_bitsel[2]:ALn,
CORESPI_0/USPI/UCC/mtx_bitsel[2]:CLK,3797
CORESPI_0/USPI/UCC/mtx_bitsel[2]:D,3631
CORESPI_0/USPI/UCC/mtx_bitsel[2]:Q,3797
Demo_sb_0/CORERESETP_0/RESET_N_M2F_q1:ALn,
Demo_sb_0/CORERESETP_0/RESET_N_M2F_q1:CLK,8867
Demo_sb_0/CORERESETP_0/RESET_N_M2F_q1:Q,8867
CORESPI_0/USPI/UCC/msrxs_datain[0]:ALn,
CORESPI_0/USPI/UCC/msrxs_datain[0]:CLK,8890
CORESPI_0/USPI/UCC/msrxs_datain[0]:D,7736
CORESPI_0/USPI/UCC/msrxs_datain[0]:EN,5765
CORESPI_0/USPI/UCC/msrxs_datain[0]:Q,8890
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_265:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_265:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[13]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[13]:CLK,38519
Demo_sb_0/CORECONFIGP_0/pwdata[13]:D,40629
Demo_sb_0/CORECONFIGP_0/pwdata[13]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[13]:Q,38519
CORESPI_0/USPI/URXF/wr_pointer_q[4]:ALn,
CORESPI_0/USPI/URXF/wr_pointer_q[4]:CLK,4668
CORESPI_0/USPI/URXF/wr_pointer_q[4]:D,4532
CORESPI_0/USPI/URXF/wr_pointer_q[4]:Q,4668
CORESPI_0/USPI/UCC/mtx_consecutive_0_sqmuxa_0_a2_0_a2:A,7924
CORESPI_0/USPI/UCC/mtx_consecutive_0_sqmuxa_0_a2_0_a2:B,7844
CORESPI_0/USPI/UCC/mtx_consecutive_0_sqmuxa_0_a2_0_a2:C,3883
CORESPI_0/USPI/UCC/mtx_consecutive_0_sqmuxa_0_a2_0_a2:Y,3883
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_0[4]:A,3797
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_0[4]:B,3733
CORESPI_0/USPI/UCC/mtx_bitsel_10_i_i_o2_0[4]:Y,3733
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[31]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[31]:B,34528
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[31]:Y,16991
CORESPI_0/USPI/URF/control2[3]:ALn,
CORESPI_0/USPI/URF/control2[3]:CLK,4117
CORESPI_0/USPI/URF/control2[3]:D,7304
CORESPI_0/USPI/URF/control2[3]:EN,3614
CORESPI_0/USPI/URF/control2[3]:Q,4117
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_35:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_35:IPC,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_8:IPC,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_1:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_1:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[7]:A,38667
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[7]:B,38620
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[7]:C,38605
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[7]:D,36880
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO_0[7]:Y,36880
CORESPI_0/USPI/UCC/ssel_rx_q2:ALn,
CORESPI_0/USPI/UCC/ssel_rx_q2:CLK,6921
CORESPI_0/USPI/UCC/ssel_rx_q2:D,8867
CORESPI_0/USPI/UCC/ssel_rx_q2:Q,6921
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_188:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_188:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_78:A,37255
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_78:B,37256
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_78:IPA,37255
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_78:IPB,37256
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_217:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_217:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_217:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_268:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_268:IPB,
CORESPI_0/USPI/URF/sticky[1]:ALn,
CORESPI_0/USPI/URF/sticky[1]:CLK,3383
CORESPI_0/USPI/URF/sticky[1]:D,2676
CORESPI_0/USPI/URF/sticky[1]:Q,3383
Demo_sb_0/CORECONFIGP_0/pwdata[2]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[2]:CLK,37501
Demo_sb_0/CORECONFIGP_0/pwdata[2]:D,40544
Demo_sb_0/CORECONFIGP_0/pwdata[2]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[2]:Q,37501
CORESPI_0/USPI/URF/int_raw_33[1]:A,8010
CORESPI_0/USPI/URF/int_raw_33[1]:B,7926
CORESPI_0/USPI/URF/int_raw_33[1]:C,6283
CORESPI_0/USPI/URF/int_raw_33[1]:D,2525
CORESPI_0/USPI/URF/int_raw_33[1]:Y,2525
CORESPI_0/USPI/UCC/txfifo_datadelay[6]:ALn,
CORESPI_0/USPI/UCC/txfifo_datadelay[6]:CLK,6911
CORESPI_0/USPI/UCC/txfifo_datadelay[6]:D,5933
CORESPI_0/USPI/UCC/txfifo_datadelay[6]:Q,6911
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_216:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_216:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_216:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_241:IPB,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[14]:ALn,
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[14]:CLK,36887
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[14]:D,40651
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[14]:EN,16794
Demo_sb_0/CORECONFIGP_0/soft_reset_reg[14]:Q,36887
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_20:IPENn,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_6:IPENn,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_14:C,8911
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_14:IPB,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/CFG_14:IPC,8911
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[0],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[1],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[2],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[3],3590
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[4],3489
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[5],3300
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[6],3016
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[7],3024
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[8],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR[9],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR_ARST_N,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR_CLK,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR_EN,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_ADDR_SRST_N,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_BLK[0],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_BLK[1],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[0],4264
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[1],5036
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[2],5138
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[3],5127
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[4],3826
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[5],3267
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[6],3016
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[7],4096
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT[8],3968
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT_ARST_N,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT_CLK,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT_EN,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:A_DOUT_SRST_N,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[0],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[1],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[2],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[3],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[4],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[5],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[6],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[7],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[8],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR[9],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR_ARST_N,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR_CLK,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR_EN,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_ADDR_SRST_N,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_BLK[0],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_BLK[1],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_DOUT_ARST_N,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_DOUT_CLK,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_DOUT_EN,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:B_DOUT_SRST_N,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[0],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[1],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[2],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[3],9006
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[4],8908
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[5],8918
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[6],8901
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[7],8890
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[8],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ADDR[9],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_ARST_N,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_BLK[0],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_BLK[1],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_CLK,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[0],3882
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[10],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[11],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[12],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[13],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[14],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[15],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[16],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[17],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[1],7314
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[2],7354
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[3],7321
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[4],7413
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[5],7499
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[6],7497
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[7],7499
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[8],7509
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_DIN[9],
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/INST_RAM64x18_IP:C_WEN,2560
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_9:B,3489
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_9:C,3590
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_9:IPB,3489
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_9:IPC,3590
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_365:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_365:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_31:C,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_31:IPC,
CORESPI_0/USPI/UTXF/empty_out_2_0_0_1_RNO:A,3720
CORESPI_0/USPI/UTXF/empty_out_2_0_0_1_RNO:B,688
CORESPI_0/USPI/UTXF/empty_out_2_0_0_1_RNO:C,3747
CORESPI_0/USPI/UTXF/empty_out_2_0_0_1_RNO:D,2828
CORESPI_0/USPI/UTXF/empty_out_2_0_0_1_RNO:Y,688
CORESPI_0/USPI/URXF/full_out_2_RNO_2:A,4947
CORESPI_0/USPI/URXF/full_out_2_RNO_2:B,4831
CORESPI_0/USPI/URXF/full_out_2_RNO_2:C,4844
CORESPI_0/USPI/URXF/full_out_2_RNO_2:Y,4831
SERDES_IF2_0/refclk1_inbuf_diff/U_IOPADN:N2POUT_P,
SERDES_IF2_0/refclk1_inbuf_diff/U_IOPADN:PAD_P,
CORESPI_0/USPI/UCC/resetn_rx_d2:ALn,6720
CORESPI_0/USPI/UCC/resetn_rx_d2:CLK,7852
CORESPI_0/USPI/UCC/resetn_rx_d2:D,8860
CORESPI_0/USPI/UCC/resetn_rx_d2:Q,7852
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_237:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_237:IPB,
CORESPI_0/USPI/UTXF/wr_pointer_q_3[2]:A,2663
CORESPI_0/USPI/UTXF/wr_pointer_q_3[2]:B,1654
CORESPI_0/USPI/UTXF/wr_pointer_q_3[2]:C,7829
CORESPI_0/USPI/UTXF/wr_pointer_q_3[2]:D,3939
CORESPI_0/USPI/UTXF/wr_pointer_q_3[2]:Y,1654
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_10:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_10:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[19]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[19]:CLK,37256
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[19]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[19]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[19]:Q,37256
CORESPI_0/USPI/URF/CLK_DIV[1]:ALn,
CORESPI_0/USPI/URF/CLK_DIV[1]:CLK,3555
CORESPI_0/USPI/URF/CLK_DIV[1]:D,7319
CORESPI_0/USPI/URF/CLK_DIV[1]:EN,3484
CORESPI_0/USPI/URF/CLK_DIV[1]:Q,3555
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_4:IPENn,
CORESPI_0/USPI/URF/CLK_DIV[2]:ALn,
CORESPI_0/USPI/URF/CLK_DIV[2]:CLK,3222
CORESPI_0/USPI/URF/CLK_DIV[2]:D,7304
CORESPI_0/USPI/URF/CLK_DIV[2]:EN,3484
CORESPI_0/USPI/URF/CLK_DIV[2]:Q,3222
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_165:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_165:IPB,
CORESPI_0/USPI/UTXF/rd_pointer_q[0]:ALn,
CORESPI_0/USPI/UTXF/rd_pointer_q[0]:CLK,3590
CORESPI_0/USPI/UTXF/rd_pointer_q[0]:D,4880
CORESPI_0/USPI/UTXF/rd_pointer_q[0]:Q,3590
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_201:B,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_201:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_11:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[25]:A,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[25]:B,34218
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[25]:Y,16991
Demo_sb_0/CORECONFIGP_0/int_prdata[1]:A,38667
Demo_sb_0/CORECONFIGP_0/int_prdata[1]:B,38620
Demo_sb_0/CORECONFIGP_0/int_prdata[1]:C,35821
Demo_sb_0/CORECONFIGP_0/int_prdata[1]:D,36887
Demo_sb_0/CORECONFIGP_0/int_prdata[1]:Y,35821
CORESPI_0/USPI/UCC/stxs_datareg[5]:ALn,6056
CORESPI_0/USPI/UCC/stxs_datareg[5]:CLK,6821
CORESPI_0/USPI/UCC/stxs_datareg[5]:D,3968
CORESPI_0/USPI/UCC/stxs_datareg[5]:EN,5628
CORESPI_0/USPI/UCC/stxs_datareg[5]:Q,6821
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_97:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_55:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_55:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_64:B,37180
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_64:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_64:IPB,37180
Demo_sb_0/CORERESETP_0/CONFIG2_DONE_q1:ALn,7074
Demo_sb_0/CORERESETP_0/CONFIG2_DONE_q1:CLK,8867
Demo_sb_0/CORERESETP_0/CONFIG2_DONE_q1:D,
Demo_sb_0/CORERESETP_0/CONFIG2_DONE_q1:Q,8867
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_2:IPC,
CORESPI_0/USPI/UCC/mtx_lastframe_1_sqmuxa_0_a2_1_a2_0:A,5765
CORESPI_0/USPI/UCC/mtx_lastframe_1_sqmuxa_0_a2_1_a2_0:B,5730
CORESPI_0/USPI/UCC/mtx_lastframe_1_sqmuxa_0_a2_1_a2_0:C,4707
CORESPI_0/USPI/UCC/mtx_lastframe_1_sqmuxa_0_a2_1_a2_0:D,3624
CORESPI_0/USPI/UCC/mtx_lastframe_1_sqmuxa_0_a2_1_a2_0:Y,3624
CORESPI_0/USPI/UCC/mtx_pktsel_RNO:A,7003
CORESPI_0/USPI/UCC/mtx_pktsel_RNO:B,7920
CORESPI_0/USPI/UCC/mtx_pktsel_RNO:C,5823
CORESPI_0/USPI/UCC/mtx_pktsel_RNO:D,5712
CORESPI_0/USPI/UCC/mtx_pktsel_RNO:Y,5712
SERDES_IF2_0/refclk1_inbuf_diff/U_IOINFF:A,
SERDES_IF2_0/refclk1_inbuf_diff/U_IOINFF:Y,
Demo_sb_0/CORECONFIGP_0/paddr[9]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[9]:CLK,35792
Demo_sb_0/CORECONFIGP_0/paddr[9]:D,40662
Demo_sb_0/CORECONFIGP_0/paddr[9]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[9]:Q,35792
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[27]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[27]:CLK,37229
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[27]:D,16991
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[27]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[27]:Q,37229
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_364:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_364:IPB,
CORESPI_0/USPI/UCC/un1_resetn_rx:A,
CORESPI_0/USPI/UCC/un1_resetn_rx:B,6720
CORESPI_0/USPI/UCC/un1_resetn_rx:C,7724
CORESPI_0/USPI/UCC/un1_resetn_rx:Y,6720
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_124:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_124:IPB,
GPIO_9_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_9_M2F_obuf/U0/U_IOOUTFF:Y,
CORESPI_0/USPI/UCC/stxs_pktsel_0_sqmuxa:A,6773
CORESPI_0/USPI/UCC/stxs_pktsel_0_sqmuxa:B,5781
CORESPI_0/USPI/UCC/stxs_pktsel_0_sqmuxa:C,5719
CORESPI_0/USPI/UCC/stxs_pktsel_0_sqmuxa:D,4838
CORESPI_0/USPI/UCC/stxs_pktsel_0_sqmuxa:Y,4838
CORESPI_0/USPI/UCC/UCLKMUX1/clkout:A,7865
CORESPI_0/USPI/UCC/UCLKMUX1/clkout:B,7926
CORESPI_0/USPI/UCC/UCLKMUX1/clkout:Y,7865
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_316:IPA,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_10:IPENn,
CORESPI_0/USPI/UCC/txfifo_datadelay[3]:ALn,
CORESPI_0/USPI/UCC/txfifo_datadelay[3]:CLK,6911
CORESPI_0/USPI/UCC/txfifo_datadelay[3]:D,5966
CORESPI_0/USPI/UCC/txfifo_datadelay[3]:Q,6911
CORESPI_0/USPI/UCC/rx_cmdsize_4:A,7011
CORESPI_0/USPI/UCC/rx_cmdsize_4:B,7916
CORESPI_0/USPI/UCC/rx_cmdsize_4:C,6791
CORESPI_0/USPI/UCC/rx_cmdsize_4:D,6631
CORESPI_0/USPI/UCC/rx_cmdsize_4:Y,6631
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_48:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_48:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_328:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_328:IPB,
CORESPI_0/USPI/UCC/msrxs_datain[7]:ALn,
CORESPI_0/USPI/UCC/msrxs_datain[7]:CLK,8966
CORESPI_0/USPI/UCC/msrxs_datain[7]:D,8867
CORESPI_0/USPI/UCC/msrxs_datain[7]:EN,5765
CORESPI_0/USPI/UCC/msrxs_datain[7]:Q,8966
CORESPI_0/USPI/UCC/tx_alldone:A,7069
CORESPI_0/USPI/UCC/tx_alldone:B,6876
CORESPI_0/USPI/UCC/tx_alldone:C,6948
CORESPI_0/USPI/UCC/tx_alldone:Y,6876
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_259:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_259:IPB,
CORESPI_0/USPI/UCC/spi_clk_count[4]:ALn,
CORESPI_0/USPI/UCC/spi_clk_count[4]:CLK,4641
CORESPI_0/USPI/UCC/spi_clk_count[4]:D,4566
CORESPI_0/USPI/UCC/spi_clk_count[4]:Q,4641
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_250:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_250:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_81:A,37097
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_81:B,37208
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_81:IPA,37097
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_81:IPB,37208
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_65:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_65:IPB,
CORESPI_0/USPI/UTXF/wr_pointer_q_3[1]:A,7951
CORESPI_0/USPI/UTXF/wr_pointer_q_3[1]:B,7896
CORESPI_0/USPI/UTXF/wr_pointer_q_3[1]:C,1671
CORESPI_0/USPI/UTXF/wr_pointer_q_3[1]:D,1509
CORESPI_0/USPI/UTXF/wr_pointer_q_3[1]:Y,1509
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_282:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_282:IPB,
Demo_sb_0/CORERESETP_0/count_sdif0_cry[5]:B,17712
Demo_sb_0/CORERESETP_0/count_sdif0_cry[5]:FCI,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[5]:FCO,17626
Demo_sb_0/CORERESETP_0/count_sdif0_cry[5]:S,17738
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_113:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_113:IPB,
Demo_sb_0/CORERESETP_0/sdif2_areset_n_rcosc:ALn,
Demo_sb_0/CORERESETP_0/sdif2_areset_n_rcosc:CLK,18769
Demo_sb_0/CORERESETP_0/sdif2_areset_n_rcosc:D,18868
Demo_sb_0/CORERESETP_0/sdif2_areset_n_rcosc:Q,18769
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[13]:A,34454
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[13]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[13]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[13]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[13]:Y,15915
CORESPI_0/USPI/UCC/mtx_alldone:ALn,
CORESPI_0/USPI/UCC/mtx_alldone:CLK,6948
CORESPI_0/USPI/UCC/mtx_alldone:D,5135
CORESPI_0/USPI/UCC/mtx_alldone:Q,6948
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE:A,4718
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE:B,4641
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE:C,4596
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE:D,4518
CORESPI_0/USPI/UCC/spi_clk_nextd4_NE:Y,4518
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_101:A,9815
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_101:B,9836
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_101:IPA,9815
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_101:IPB,9836
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_331:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_331:IPB,
CORESPI_0/USPI/URF/sticky_13_iv_i[1]:A,2676
CORESPI_0/USPI/URF/sticky_13_iv_i[1]:B,7926
CORESPI_0/USPI/URF/sticky_13_iv_i[1]:C,7882
CORESPI_0/USPI/URF/sticky_13_iv_i[1]:Y,2676
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[1]:A,7872
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[1]:B,5612
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[1]:C,4798
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[1]:D,2447
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[1]:Y,2447
CORESPI_0/USPI/UCC/msrxs_strobe_RNO:A,7929
CORESPI_0/USPI/UCC/msrxs_strobe_RNO:B,7852
CORESPI_0/USPI/UCC/msrxs_strobe_RNO:C,6853
CORESPI_0/USPI/UCC/msrxs_strobe_RNO:D,5710
CORESPI_0/USPI/UCC/msrxs_strobe_RNO:Y,5710
Demo_sb_0/CORERESETP_0/count_sdif0_enable:ALn,8748
Demo_sb_0/CORERESETP_0/count_sdif0_enable:CLK,2737
Demo_sb_0/CORERESETP_0/count_sdif0_enable:D,7944
Demo_sb_0/CORERESETP_0/count_sdif0_enable:EN,6735
Demo_sb_0/CORERESETP_0/count_sdif0_enable:Q,2737
CORESPI_0/USPI/UCC/un1_stxs_bitsel_1:A,4107
CORESPI_0/USPI/UCC/un1_stxs_bitsel_1:B,4057
CORESPI_0/USPI/UCC/un1_stxs_bitsel_1:C,3968
CORESPI_0/USPI/UCC/un1_stxs_bitsel_1:Y,3968
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_247:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_247:IPB,
CORESPI_0/USPI/UCC/clk_div_val_reg[3]:ALn,
CORESPI_0/USPI/UCC/clk_div_val_reg[3]:CLK,4827
CORESPI_0/USPI/UCC/clk_div_val_reg[3]:D,8860
CORESPI_0/USPI/UCC/clk_div_val_reg[3]:EN,7753
CORESPI_0/USPI/UCC/clk_div_val_reg[3]:Q,4827
CORESPI_0/USPI/URF/control2[5]:ALn,
CORESPI_0/USPI/URF/control2[5]:CLK,3675
CORESPI_0/USPI/URF/control2[5]:D,7410
CORESPI_0/USPI/URF/control2[5]:EN,3614
CORESPI_0/USPI/URF/control2[5]:Q,3675
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_33:IPENn,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_57:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_57:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_85:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_85:IPB,
Demo_sb_0/CORERESETP_0/sdif0_state[1]:ALn,8748
Demo_sb_0/CORERESETP_0/sdif0_state[1]:CLK,7909
Demo_sb_0/CORERESETP_0/sdif0_state[1]:D,7929
Demo_sb_0/CORERESETP_0/sdif0_state[1]:Q,7909
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_152:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_152:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_150:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_150:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_144:A,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_144:IPA,
FCCC_0/CCC_INST/IP_INTERFACE_17:IPB,
FCCC_0/CCC_INST/IP_INTERFACE_17:IPC,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_121:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_119:IPB,
CORESPI_0/USPI/UTXF/un1_counter_q_1_ac0_3_RNIG6MF:A,7068
CORESPI_0/USPI/UTXF/un1_counter_q_1_ac0_3_RNIG6MF:B,4691
CORESPI_0/USPI/UTXF/un1_counter_q_1_ac0_3_RNIG6MF:C,3903
CORESPI_0/USPI/UTXF/un1_counter_q_1_ac0_3_RNIG6MF:D,1544
CORESPI_0/USPI/UTXF/un1_counter_q_1_ac0_3_RNIG6MF:Y,1544
CORESPI_0/USPI/UTXF/wr_pointer_q[2]:ALn,
CORESPI_0/USPI/UTXF/wr_pointer_q[2]:CLK,3158
CORESPI_0/USPI/UTXF/wr_pointer_q[2]:D,1654
CORESPI_0/USPI/UTXF/wr_pointer_q[2]:Q,3158
GPIO_1_M2F_obuf/U0/U_IOENFF:A,
GPIO_1_M2F_obuf/U0/U_IOENFF:Y,
CORESPI_0/USPI/URXF/wr_pointer_q[3]:ALn,
CORESPI_0/USPI/URXF/wr_pointer_q[3]:CLK,4584
CORESPI_0/USPI/URXF/wr_pointer_q[3]:D,4633
CORESPI_0/USPI/URXF/wr_pointer_q[3]:Q,4584
CORESPI_0/USPI/UCC/txfifo_datadelay[2]:ALn,
CORESPI_0/USPI/UCC/txfifo_datadelay[2]:CLK,6911
CORESPI_0/USPI/UCC/txfifo_datadelay[2]:D,5977
CORESPI_0/USPI/UCC/txfifo_datadelay[2]:Q,6911
CORESPI_0/USPI/UCC/txfifo_datadelay[0]:ALn,
CORESPI_0/USPI/UCC/txfifo_datadelay[0]:CLK,6911
CORESPI_0/USPI/UCC/txfifo_datadelay[0]:D,5970
CORESPI_0/USPI/UCC/txfifo_datadelay[0]:Q,6911
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_170:IPA,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_20:C,7509
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_20:IPB,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_20:IPC,7509
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_37:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_2:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_2:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_2:IPC,
CORESPI_0/USPI/UCC/stxs_first_3_f0:A,8004
CORESPI_0/USPI/UCC/stxs_first_3_f0:B,7817
CORESPI_0/USPI/UCC/stxs_first_3_f0:C,6809
CORESPI_0/USPI/UCC/stxs_first_3_f0:Y,6809
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_92:IPB,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[9]:A,34521
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[9]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[9]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[9]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[9]:Y,15915
CORESPI_0/USPI/UCC/spi_clk_count[6]:ALn,
CORESPI_0/USPI/UCC/spi_clk_count[6]:CLK,4718
CORESPI_0/USPI/UCC/spi_clk_count[6]:D,4534
CORESPI_0/USPI/UCC/spi_clk_count[6]:Q,4718
CORESPI_0/USPI/URXF/wr_pointer_d_1_sqmuxa_1:A,5740
CORESPI_0/USPI/URXF/wr_pointer_d_1_sqmuxa_1:B,5699
CORESPI_0/USPI/URXF/wr_pointer_d_1_sqmuxa_1:C,4594
CORESPI_0/USPI/URXF/wr_pointer_d_1_sqmuxa_1:D,4532
CORESPI_0/USPI/URXF/wr_pointer_d_1_sqmuxa_1:Y,4532
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_207:A,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_207:IPA,
GPIO_8_M2F_obuf/U0/U_IOOUTFF:A,
GPIO_8_M2F_obuf/U0/U_IOOUTFF:Y,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_3:IPA,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_3:IPB,
Demo_sb_0/CCC_0/CCC_INST/IP_INTERFACE_3:IPC,
CORESPI_0/USPI/UCC/stxs_dataerr:ALn,6056
CORESPI_0/USPI/UCC/stxs_dataerr:CLK,6028
CORESPI_0/USPI/UCC/stxs_dataerr:D,5102
CORESPI_0/USPI/UCC/stxs_dataerr:EN,7726
CORESPI_0/USPI/UCC/stxs_dataerr:Q,6028
CORESPI_0/USPI/UCC/stxs_bitsel[0]:ALn,6056
CORESPI_0/USPI/UCC/stxs_bitsel[0]:CLK,3968
CORESPI_0/USPI/UCC/stxs_bitsel[0]:D,5003
CORESPI_0/USPI/UCC/stxs_bitsel[0]:Q,3968
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[5]:A,7015
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[5]:B,4525
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[5]:C,3010
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[5]:D,1590
CORESPI_0/USPI/UTXF/counter_d_i_0_i_a2[5]:Y,1590
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_203:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_203:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_20:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_20:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_270:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_270:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_67:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_67:IPB,
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[4]:A,5082
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[4]:B,3968
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[4]:C,6911
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[4]:D,6821
CORESPI_0/USPI/UCC/stxs_datareg_10_iv_0[4]:Y,3968
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_257:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_257:IPB,
CORESPI_0/USPI/UCC/msrxp_alldone_0_sqmuxa:A,8004
CORESPI_0/USPI/UCC/msrxp_alldone_0_sqmuxa:B,7916
CORESPI_0/USPI/UCC/msrxp_alldone_0_sqmuxa:Y,7916
CORESPI_0/USPI/URXF/full_out_2_RNO_3:A,4880
CORESPI_0/USPI/URXF/full_out_2_RNO_3:B,4796
CORESPI_0/USPI/URXF/full_out_2_RNO_3:C,4751
CORESPI_0/USPI/URXF/full_out_2_RNO_3:Y,4751
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_RXBUS_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_RXBUS_MGPIO3A_H2F_B,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_TXBUS_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_TXBUS_MGPIO2A_H2F_B,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_TX_EBL_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CAN_TX_EBL_MGPIO4A_H2F_B,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE,571
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB,-2141
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_MDDR_APB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:COLF,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CONFIG_PRESET_N,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CRSF,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F2HCALIB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F2H_INTERRUPT[0],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F2H_INTERRUPT[10],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F2H_INTERRUPT[11],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F2H_INTERRUPT[12],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F2H_INTERRUPT[13],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F2H_INTERRUPT[14],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F2H_INTERRUPT[15],
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Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PADDR[8],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PADDR[9],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PENABLE,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PSEL,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[0],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[10],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[11],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[12],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[13],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[14],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[15],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[1],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[2],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[3],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[4],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[5],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[6],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[7],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[8],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWDATA[9],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDDR_FABRIC_PWRITE,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDIF,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDOENF,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MDOF,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO0A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO10A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO11A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO11B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO12A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO13A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO14A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO15A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO16A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO17B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO18B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO19B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO1A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO20B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO21B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO22B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO24B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO25B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO26B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO27B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO28B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO29B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO2A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO30B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO31B_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO3A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO4A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO5A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO6A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO7A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO8A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MGPIO9A_F2H_GPIN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_CTS_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_DCD_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_DSR_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_DTR_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_RI_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_RTS_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_RXD_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_SCK_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART0_TXD_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_CTS_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_DCD_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_DSR_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_RI_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_RTS_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_RXD_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_RXD_USBC_DATA3_MGPIO26B_IN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_SCK_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_TXD_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_TXD_USBC_DATA2_MGPIO24B_OE,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:MMUART1_TXD_USBC_DATA2_MGPIO24B_OUT,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[10],40658
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[11],40652
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[12],40578
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[13],40600
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[14],40588
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[15],40590
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[2],37605
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[3],37690
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[4],37627
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[5],40637
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[6],40649
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[7],40654
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[8],40652
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PADDR[9],40662
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PENABLE,-2087
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[0],37184
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[10],37176
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[11],37205
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[12],37255
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[13],37205
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[14],37180
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[15],37097
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[16],37204
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[17],37205
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[18],37166
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[19],37256
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[1],37185
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[20],37116
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[21],37193
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[22],37208
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[23],37175
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[24],37164
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[25],37226
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[26],37210
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[27],37229
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[28],37237
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[29],37275
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[2],37179
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[30],37261
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[31],37154
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[3],37182
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[4],37177
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[5],37121
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[6],37182
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[7],37176
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[8],37204
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PRDATA[9],37215
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PREADY,37180
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PSEL,-2141
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PSLVERR,37225
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[0],40564
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[10],40605
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[11],40640
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[12],40574
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[13],40629
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[14],40651
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[15],40654
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[16],40630
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[17],40654
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[18],40648
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[19],40652
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[1],40559
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[20],40630
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[21],40630
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[22],40627
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[23],40641
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[24],40634
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[25],40659
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[26],40658
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[27],40660
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[28],40664
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[29],40636
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[2],40544
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[30],40666
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[31],40590
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[3],40583
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[4],40534
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[5],40655
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[6],40624
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[7],40660
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[8],40666
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWDATA[9],40641
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PWRITE,39359
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PRESET_N,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[0],9882
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[1],9815
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[2],9859
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[3],9904
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[4],9981
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[5],9658
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[6],9891
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[7],10008
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[8],9836
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RCGF[9],10007
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[0],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[1],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[2],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[3],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[4],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[5],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[6],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RXDF[7],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RX_CLKPF,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RX_DVF,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RX_ERRF,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:RX_EV,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SLEEPHOLDREQ,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SMBALERT_NI0,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SMBALERT_NI1,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SMBSUS_NI0,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SMBSUS_NI1,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_CLK_IN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_CLK_OUT,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SDI_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SDI_MGPIO5A_H2F_B,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SDO_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SDO_MGPIO6A_H2F_A,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS0_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS0_MGPIO7A_H2F_A,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS1_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS1_MGPIO8A_H2F_B,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS2_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS2_MGPIO9A_H2F_B,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS3_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_CLK_IN,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SDI_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SDI_MGPIO11A_H2F_B,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SDO_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS0_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS1_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS2_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI1_SS3_F2H_SCP,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TCGF[0],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TCGF[1],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TCGF[2],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TCGF[3],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TCGF[4],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TCGF[5],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TCGF[6],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TCGF[7],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TCGF[8],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TCGF[9],
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:TX_CLKPF,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USER_MSS_GPIO_RESET_N,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:USER_MSS_RESET_N,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:XCLK_FAB,
Demo_sb_0/CORERESETP_0/ddr_settled_clk_base:ALn,7074
Demo_sb_0/CORERESETP_0/ddr_settled_clk_base:CLK,5800
Demo_sb_0/CORERESETP_0/ddr_settled_clk_base:D,8867
Demo_sb_0/CORERESETP_0/ddr_settled_clk_base:Q,5800
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_256:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_256:IPB,
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO_1:A,5021
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO_1:B,4944
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO_1:C,4891
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO_1:D,4757
CORESPI_0/USPI/UTXF/full_out_2_0_a2_0_a2_RNO_1:Y,4757
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_117:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_117:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[14]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[14]:CLK,38347
Demo_sb_0/CORECONFIGP_0/pwdata[14]:D,40651
Demo_sb_0/CORECONFIGP_0/pwdata[14]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[14]:Q,38347
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_223:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_223:IPB,
Demo_sb_0/CORECONFIGP_0/pwdata[27]:ALn,
Demo_sb_0/CORECONFIGP_0/pwdata[27]:CLK,38698
Demo_sb_0/CORECONFIGP_0/pwdata[27]:D,40660
Demo_sb_0/CORECONFIGP_0/pwdata[27]:EN,37386
Demo_sb_0/CORECONFIGP_0/pwdata[27]:Q,38698
CORESPI_0/USPI/UCC/un1_mtx_bitsel_1_sqmuxa_1_0_0:A,7930
CORESPI_0/USPI/UCC/un1_mtx_bitsel_1_sqmuxa_1_0_0:B,7819
CORESPI_0/USPI/UCC/un1_mtx_bitsel_1_sqmuxa_1_0_0:C,4989
CORESPI_0/USPI/UCC/un1_mtx_bitsel_1_sqmuxa_1_0_0:D,4620
CORESPI_0/USPI/UCC/un1_mtx_bitsel_1_sqmuxa_1_0_0:Y,4620
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_238:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_238:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_22:IPB,
CORESPI_0/USPI/UCC/txfifo_datadelay[5]:ALn,
CORESPI_0/USPI/UCC/txfifo_datadelay[5]:CLK,6911
CORESPI_0/USPI/UCC/txfifo_datadelay[5]:D,5961
CORESPI_0/USPI/UCC/txfifo_datadelay[5]:Q,6911
Demo_sb_0/CORECONFIGP_0/paddr[8]:ALn,
Demo_sb_0/CORECONFIGP_0/paddr[8]:CLK,35785
Demo_sb_0/CORECONFIGP_0/paddr[8]:D,40652
Demo_sb_0/CORECONFIGP_0/paddr[8]:EN,37386
Demo_sb_0/CORECONFIGP_0/paddr[8]:Q,35785
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_25:C,
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/CFG_25:IPC,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_87:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_87:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_18:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_18:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_172:A,38663
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_172:B,38748
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_172:IPA,38663
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_172:IPB,38748
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_170:A,38395
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_170:B,38784
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_170:IPA,38395
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_170:IPB,38784
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_341:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_341:IPB,
GPIO_8_M2F_obuf/U0/U_IOPAD:D,
GPIO_8_M2F_obuf/U0/U_IOPAD:E,
GPIO_8_M2F_obuf/U0/U_IOPAD:PAD,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:CLK,37179
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[2]:Q,37179
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_187:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_187:IPB,
CORESPI_0/USPI/UCC/txfifo_davailable:ALn,
CORESPI_0/USPI/UCC/txfifo_davailable:CLK,5971
CORESPI_0/USPI/UCC/txfifo_davailable:D,7892
CORESPI_0/USPI/UCC/txfifo_davailable:Q,5971
Demo_sb_0/CORERESETP_0/sm0_areset_n_rcosc_q1:ALn,
Demo_sb_0/CORERESETP_0/sm0_areset_n_rcosc_q1:CLK,18868
Demo_sb_0/CORERESETP_0/sm0_areset_n_rcosc_q1:Q,18868
CORESPI_0/USPI/UTXF/empty_out_2_0_0:A,1544
CORESPI_0/USPI/UTXF/empty_out_2_0_0:B,7834
CORESPI_0/USPI/UTXF/empty_out_2_0_0:C,688
CORESPI_0/USPI/UTXF/empty_out_2_0_0:D,1394
CORESPI_0/USPI/UTXF/empty_out_2_0_0:Y,688
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_15:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_15:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_22:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_22:IPB,
Demo_sb_0/CORERESETP_0/sm0_state[2]:ALn,7074
Demo_sb_0/CORERESETP_0/sm0_state[2]:CLK,7926
Demo_sb_0/CORERESETP_0/sm0_state[2]:D,7889
Demo_sb_0/CORERESETP_0/sm0_state[2]:Q,7926
Demo_sb_0/CCC_0/GL0_INST/U0:An,
Demo_sb_0/CCC_0/GL0_INST/U0:YWn,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_47:IPB,
CORESPI_0/USPI/URF/prdata_2[5]:A,3720
CORESPI_0/USPI/URF/prdata_2[5]:B,4798
CORESPI_0/USPI/URF/prdata_2[5]:C,1563
CORESPI_0/USPI/URF/prdata_2[5]:D,2009
CORESPI_0/USPI/URF/prdata_2[5]:Y,1563
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_102:A,9859
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_102:B,10007
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_102:IPA,9859
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_102:IPB,10007
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_195:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_151:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_151:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_51:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_51:IPB,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_301:IPA,
SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_301:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_241:IPA,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_241:IPB,
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_241:IPC,
CORESPI_0/USPI/URXF/fifo_mem_q_fifo_mem_q_0_0/FF_30:IPENn,
Demo_sb_0/CORERESETP_0/count_sdif0[7]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[7]:CLK,16825
Demo_sb_0/CORERESETP_0/count_sdif0[7]:D,17706
Demo_sb_0/CORERESETP_0/count_sdif0[7]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[7]:Q,16825
CORESPI_0/USPI/UTXF/fifo_mem_q_fifo_mem_q_0_0/FF_35:IPENn,
FCCC_1/GL0_INST/U0:An,
FCCC_1/GL0_INST/U0:YWn,
CORESPI_0/USPI/UCON/tx_fifo_write_sig_0_sqmuxa_0_a2_0:A,1351
CORESPI_0/USPI/UCON/tx_fifo_write_sig_0_sqmuxa_0_a2_0:B,1345
CORESPI_0/USPI/UCON/tx_fifo_write_sig_0_sqmuxa_0_a2_0:Y,1345
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:ALn,
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:CLK,37184
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:D,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:EN,38539
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA[0]:Q,37184
CORESPI_0/USPI/UCC/stxs_strobetx_5_iv:A,6113
CORESPI_0/USPI/UCC/stxs_strobetx_5_iv:B,5159
CORESPI_0/USPI/UCC/stxs_strobetx_5_iv:C,7882
CORESPI_0/USPI/UCC/stxs_strobetx_5_iv:D,7670
CORESPI_0/USPI/UCC/stxs_strobetx_5_iv:Y,5159
FCCC_0/GL1_INST/U0:An,
FCCC_0/GL1_INST/U0:YWn,
Demo_sb_0/CORERESETP_0/count_sdif0[9]:ALn,17077
Demo_sb_0/CORERESETP_0/count_sdif0[9]:CLK,16868
Demo_sb_0/CORERESETP_0/count_sdif0[9]:D,17674
Demo_sb_0/CORERESETP_0/count_sdif0[9]:EN,18714
Demo_sb_0/CORERESETP_0/count_sdif0[9]:Q,16868
Demo_sb_0/CORERESETP_0/CONFIG2_DONE_clk_base:ALn,7074
Demo_sb_0/CORERESETP_0/CONFIG2_DONE_clk_base:CLK,7916
Demo_sb_0/CORERESETP_0/CONFIG2_DONE_clk_base:D,8867
Demo_sb_0/CORERESETP_0/CONFIG2_DONE_clk_base:Q,7916
CORESPI_0/USPI/UTXF/rd_pointer_q_3[4]:A,4964
CORESPI_0/USPI/UTXF/rd_pointer_q_3[4]:B,3992
CORESPI_0/USPI/UTXF/rd_pointer_q_3[4]:C,7829
CORESPI_0/USPI/UTXF/rd_pointer_q_3[4]:D,7728
CORESPI_0/USPI/UTXF/rd_pointer_q_3[4]:Y,3992
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[6]:A,4944
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[6]:B,7926
CORESPI_0/USPI/UCC/msrxs_shiftreg_5[6]:Y,4944
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[15]:A,34544
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[15]:B,36887
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[15]:C,15915
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[15]:D,16783
Demo_sb_0/CORECONFIGP_0/FIC_2_APB_M_PRDATA_RNO[15]:Y,15915
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_122:IPA,
CORESPI_0/USPI/UCC/spi_clk_tick:ALn,
CORESPI_0/USPI/UCC/spi_clk_tick:CLK,4497
CORESPI_0/USPI/UCC/spi_clk_tick:D,5759
CORESPI_0/USPI/UCC/spi_clk_tick:Q,4497
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0:A,6963
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0:B,6945
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0:C,4046
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0:D,3547
CORESPI_0/USPI/UCC/un1_sresetn_15_0_0:Y,3547
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_85:A,37210
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_85:IPA,37210
Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_85:IPB,
CORESPI_0/USPI/URF/prdata_2_6_2_0[4]:A,2242
CORESPI_0/USPI/URF/prdata_2_6_2_0[4]:B,2044
CORESPI_0/USPI/URF/prdata_2_6_2_0[4]:C,4473
CORESPI_0/USPI/URF/prdata_2_6_2_0[4]:D,2606
CORESPI_0/USPI/URF/prdata_2_6_2_0[4]:Y,2044
CORESPI_0/USPI/UCC/stxs_bitcnt_n4:A,6939
CORESPI_0/USPI/UCC/stxs_bitcnt_n4:B,5964
CORESPI_0/USPI/UCC/stxs_bitcnt_n4:C,7836
CORESPI_0/USPI/UCC/stxs_bitcnt_n4:D,7735
CORESPI_0/USPI/UCC/stxs_bitcnt_n4:Y,5964
CORESPI_0/USPI/UCON/tx_fifo_write_iv_0:A,1554
CORESPI_0/USPI/UCON/tx_fifo_write_iv_0:B,3480
CORESPI_0/USPI/UCON/tx_fifo_write_iv_0:C,688
CORESPI_0/USPI/UCON/tx_fifo_write_iv_0:D,1345
CORESPI_0/USPI/UCON/tx_fifo_write_iv_0:Y,688
CLK0_PAD,
DEVRST_N,
MMUART_1_RXD,
REFCLK1_N,
REFCLK1_P,
RXD0_N,
RXD0_P,
RXD1_N,
RXD1_P,
RXD2_N,
RXD2_P,
RXD3_N,
RXD3_P,
SPISDI,
GPIO_0_M2F,
GPIO_1_M2F,
GPIO_2_M2F,
GPIO_3_M2F,
GPIO_4_M2F,
GPIO_5_M2F,
GPIO_8_M2F,
GPIO_9_M2F,
MAC_TBI_MDC,
MMUART_1_TXD,
PHY_RST,
SPI_CLK,
SPI_DO,
SPI_SS0,
TXD0_N,
TXD0_P,
TXD1_N,
TXD1_P,
TXD2_N,
TXD2_P,
TXD3_N,
TXD3_P,
PHY_MDIO,
