Global Net Report

Microsemi Corporation - Microsemi Libero Software Release v2021.1 (Version 2021.1.0.17)

Date: Tue Jun 15 15:18:14 2021

Global Nets Information

From GB Location Net Name Fanout
1 GB[14] (524, 132) Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNI9FDA/U0_YWn 111
2 GB[11] (521, 132) Demo_sb_0/Demo_sb_MSS_0/FIC_2_APB_M_PCLK_inferred_clock_RNI1SM8/U0_YWn 110
3 GB[6] (512, 132) Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast 57
4 GB[4] (510, 132) Demo_sb_0/CCC_0/GL0_INST/U0_YWn_GEast 43
5 GB[1] (507, 132) Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base_RNI2J49/U0_YWn_GEast 25
6 GB[15] (525, 132) Demo_sb_0/FABOSC_0/I_RCOSC_1MHZ_FAB_CLKINT/U0_YWn_GEast 25
7 GB[2] (508, 132) Demo_sb_0/CORERESETP_0/sdif0_areset_n_RNIL3AD/U0_YWn_GEast 14
8 GB[5] (511, 132) Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_RNIEI67/U0_YWn_GEast 14
9 GB[0] (506, 132) FCCC_0/GL0_INST/U0_YWn_GEast 1
10 GB[3] (509, 132) FCCC_0/GL1_INST/U0_YWn_GEast 1
11 GB[7] (513, 132) FCCC_1/GL0_INST/U0_YWn_GEast 1

I/O to GB Connections

(none)

Fabric to GB Connections

From From Location To Net Name Net Type Fanout
1 Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CONFIG_PRESET_N (924, 266) GB[14] Demo_sb_0.Demo_sb_MSS_0.FIC_2_APB_M_PRESET_N ROUTED 2
2 Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB (924, 266) GB[11] Demo_sb_0/Demo_sb_MSS_0/FIC_2_APB_M_PCLK ROUTED 1
3 Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT (25, 254) GB[6] Demo_sb_0/FABOSC_0/N_RCOSC_25_50MHZ_CLKINT ROUTED 1
4 Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base:Q (644, 124) GB[1] Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base_0 ROUTED 1
5 Demo_sb_0/FABOSC_0/I_RCOSC_1MHZ_FAB:CLKOUT (27, 254) GB[15] Demo_sb_0/FABOSC_0/N_RCOSC_1MHZ_CLKINT ROUTED 3
6 Demo_sb_0/CORERESETP_0/sdif0_areset_n:Y (816, 129) GB[2] Demo_sb_0/CORERESETP_0/sm0_areset_n ROUTED 1
7 Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc:Q (645, 130) GB[5] Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_0 ROUTED 1

CCC to GB Connections

From From Location Pin Swapped for Back Annotation Only To Net Name Net Type Fanout
1 Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 CCC-NW1 (18, 254) None GB[4] Demo_sb_0/CCC_0/GL0_net HARDWIRED 1
2 FCCC_0/CCC_INST/INST_CCC_IP:GL0 CCC-SW1 (18, 11) None GB[0] FCCC_0/GL0_net HARDWIRED 1
3 FCCC_0/CCC_INST/INST_CCC_IP:GL1 CCC-SW1 (18, 11) GL1 => GL3 GB[3] FCCC_0/GL1_net HARDWIRED 1
4 FCCC_1/CCC_INST/INST_CCC_IP:GL0 CCC-SW0 (0, 11) GL0 => GL3 GB[7] FCCC_1/GL0_net HARDWIRED 1

CCC Input Connections

Port Name Pin Number I/O Function From From Location To (Pin Swapped for Back Annotation Only) CCC Location Net Name Net Type Fanout
1 CLK0_PAD H1 MSIO156PB8/GB6/CCC_NW1_CLKI1 Demo_sb_0/CCC_0/CLK0_PAD_INST/U_IOPAD:Y (0, 148) CLK0_PAD => CLK1_PAD CCC-NW1 (18, 254) Demo_sb_0/CCC_0/CLK0_PAD_net HARDWIRED 2
2 - - - SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1] (12, 2) FCCC_0/CCC_INST/INST_CCC_IP:CLK0 CCC-SW1 (18, 11) SERDES_IF2_0_EPCS_3_RX_CLK ROUTED 1
3 - - - SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1] (12, 2) FCCC_1/CCC_INST/INST_CCC_IP:CLK0 CCC-SW0 (0, 11) SERDES_IF2_0_EPCS_3_TX_CLK ROUTED 1

Local Nets to RGB Connections

(none)

Global Nets to RGB Connections

From From Location Net Name Fanout RGB Location RGB Fanout
1 GB[14] (524, 132) Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST_RNI9FDA/U0_YWn 111 (255, 9) 12
2 GB[11] (521, 132) Demo_sb_0/Demo_sb_MSS_0/FIC_2_APB_M_PCLK_inferred_clock_RNI1SM8/U0_YWn 110 1 (254, 0) 1
2 (254, 9) 12
3 GB[6] (512, 132) Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast 57 1 (773, 120) 17
2 (773, 123) 2
3 (773, 129) 13
4 (774, 126) 25
4 GB[4] (510, 132) Demo_sb_0/CCC_0/GL0_INST/U0_YWn_GEast 43 1 (770, 120) 8
2 (770, 264) 1
3 (771, 123) 11
4 (771, 126) 16
5 (771, 129) 7
5 GB[1] (507, 132) Demo_sb_0/CORERESETP_0/sm0_areset_n_clk_base_RNI2J49/U0_YWn_GEast 25 1 (772, 120) 4
2 (772, 123) 7
3 (773, 126) 14
6 GB[15] (525, 132) Demo_sb_0/FABOSC_0/I_RCOSC_1MHZ_FAB_CLKINT/U0_YWn_GEast 25 1 (772, 126) 23
2 (772, 129) 2
7 GB[2] (508, 132) Demo_sb_0/CORERESETP_0/sdif0_areset_n_RNIL3AD/U0_YWn_GEast 14 1 (774, 123) 4
2 (774, 129) 10
8 GB[5] (511, 132) Demo_sb_0/CORERESETP_0/sdif0_areset_n_rcosc_RNIEI67/U0_YWn_GEast 14 (771, 120) 14
9 GB[0] (506, 132) FCCC_0/GL0_INST/U0_YWn_GEast 1 (770, 231) 1
10 GB[3] (509, 132) FCCC_0/GL1_INST/U0_YWn_GEast 1 (771, 231) 1
11 GB[7] (513, 132) FCCC_1/GL0_INST/U0_YWn_GEast 1 (770, 234) 1

Warning: Local Clock Nets

The following clocks are routed using regular routing resources instead of dedicated global resources. Clocks using regular routing are more susceptible to noise than those using dedicated global resources. Microchip recommends promoting these signals to dedicated global resources.

From Driving Net To
1 program_recovery_WA_0/Clock_check_0/un1_pulse10:Y program_recovery_WA_0/Clock_check_0/un1_pulse10 program_recovery_WA_0/Clock_check_0/un1_pulse10_1_rs:CLK