"CLK0_PAD",20,"CLK0_PAD","CLK0_PAD"
"Demo_sb_0/CCC_0/GL0",10,"Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0","Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0"
"Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT",20,"Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT","Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT"
"FCCC_0/GL0",16,"FCCC_0/CCC_INST/INST_CCC_IP:GL0","FCCC_0/CCC_INST/INST_CCC_IP:GL0"
"FCCC_0/GL1",16,"FCCC_0/CCC_INST/INST_CCC_IP:GL1","FCCC_0/CCC_INST/INST_CCC_IP:GL1"
"FCCC_1/GL0",8,"FCCC_1/CCC_INST/INST_CCC_IP:GL0","FCCC_1/CCC_INST/INST_CCC_IP:GL0"
"Demo_sb_0/Demo_sb_MSS_0/CLK_CONFIG_APB",40,"Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB","Demo_sb_0/Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB"
"Demo_sb_0/FABOSC_0/I_RCOSC_1MHZ/CLKOUT",1000,"Demo_sb_0/FABOSC_0/I_RCOSC_1MHZ:CLKOUT","Demo_sb_0/FABOSC_0/I_RCOSC_1MHZ:CLKOUT"
"SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1]",8,"SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]","SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]"
"SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]",8,"SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1]","SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1]"
