Timing Report Max Delay Analysis

SmartTime Version v11.7
Microsemi Corporation - Microsemi Libero Software Release v11.7 (Version 11.7.0.119)
Date: Wed Feb 17 17:40:03 2016


Design: CoreTSE_Webserver
Family: SmartFusion2
Die: M2S090TS
Package: 484 FBGA
Temperature Range: 0 - 85 C
Voltage Range: 1.14 - 1.26 V
Speed Grade: -1
Design State: Post-Layout
Data source: Production
Min Operating Conditions: BEST - 1.26 V - 0 C
Max Operating Conditions: WORST - 1.14 V - 85 C
Scenario for Timing Analysis: timing_analysis


-----------------------------------------------------
SUMMARY

Clock Domain:               CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBi01:Q
Period (ns):                6.276                                                                           
Frequency (MHz):            159.337                                                                         
Required Period (ns):       N/A                                                                             
Required Frequency (MHz):   N/A                                                                             
External Setup (ns):        N/A                                                                             
External Hold (ns):         N/A                                                                             
Min Clock-To-Out (ns):      N/A                                                                             
Max Clock-To-Out (ns):      N/A                                                                             

Clock Domain:               FCCC_0/GL0                                                                      
Period (ns):                12.216                                                                          
Frequency (MHz):            81.860                                                                          
Required Period (ns):       20.000                                                                          
Required Frequency (MHz):   50.000                                                                          
External Setup (ns):        3.342                                                                           
External Hold (ns):         -1.423                                                                          
Min Clock-To-Out (ns):      5.897                                                                           
Max Clock-To-Out (ns):      15.780                                                                          

Clock Domain:               FCCC_1/GL0                                                                      
Period (ns):                8.074                                                                           
Frequency (MHz):            123.854                                                                         
Required Period (ns):       16.000                                                                          
Required Frequency (MHz):   62.500                                                                          
External Setup (ns):        N/A                                                                             
External Hold (ns):         N/A                                                                             
Min Clock-To-Out (ns):      N/A                                                                             
Max Clock-To-Out (ns):      N/A                                                                             

Clock Domain:               FCCC_1/GL1                                                                      
Period (ns):                2.178                                                                           
Frequency (MHz):            459.137                                                                         
Required Period (ns):       16.000                                                                          
Required Frequency (MHz):   62.500                                                                          
External Setup (ns):        N/A                                                                             
External Hold (ns):         N/A                                                                             
Min Clock-To-Out (ns):      N/A                                                                             
Max Clock-To-Out (ns):      N/A                                                                             

Clock Domain:               FCCC_2/GL0                                                                      
Period (ns):                4.831                                                                           
Frequency (MHz):            206.996                                                                         
Required Period (ns):       8.000                                                                           
Required Frequency (MHz):   125.000                                                                         
External Setup (ns):        N/A                                                                             
External Hold (ns):         N/A                                                                             
Min Clock-To-Out (ns):      N/A                                                                             
Max Clock-To-Out (ns):      N/A                                                                             

Clock Domain:               FCCC_3/GL0                                                                      
Period (ns):                2.520                                                                           
Frequency (MHz):            396.825                                                                         
Required Period (ns):       8.000                                                                           
Required Frequency (MHz):   125.000                                                                         
External Setup (ns):        N/A                                                                             
External Hold (ns):         N/A                                                                             
Min Clock-To-Out (ns):      N/A                                                                             
Max Clock-To-Out (ns):      N/A                                                                             

Clock Domain:               OSC_0/I_RCOSC_25_50MHZ/CLKOUT                                                   
Period (ns):                2.445                                                                           
Frequency (MHz):            408.998                                                                         
Required Period (ns):       20.000                                                                          
Required Frequency (MHz):   50.000                                                                          
External Setup (ns):        N/A                                                                             
External Hold (ns):         N/A                                                                             
Min Clock-To-Out (ns):      N/A                                                                             
Max Clock-To-Out (ns):      N/A                                                                             

Clock Domain:               CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB                                          
Period (ns):                19.434                                                                          
Frequency (MHz):            51.456                                                                          
Required Period (ns):       80.000                                                                          
Required Frequency (MHz):   12.500                                                                          
External Setup (ns):        N/A                                                                             
External Hold (ns):         N/A                                                                             
Min Clock-To-Out (ns):      N/A                                                                             
Max Clock-To-Out (ns):      N/A                                                                             

Clock Domain:               SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1]                                        
Period (ns):                1.818                                                                           
Frequency (MHz):            550.055                                                                         
Required Period (ns):       8.000                                                                           
Required Frequency (MHz):   125.000                                                                         
External Setup (ns):        N/A                                                                             
External Hold (ns):         N/A                                                                             
Min Clock-To-Out (ns):      N/A                                                                             
Max Clock-To-Out (ns):      N/A                                                                             

Clock Domain:               SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]                                        
Period (ns):                1.142                                                                           
Frequency (MHz):            875.657                                                                         
Required Period (ns):       8.000                                                                           
Required Frequency (MHz):   125.000                                                                         
External Setup (ns):        N/A                                                                             
External Hold (ns):         N/A                                                                             
Min Clock-To-Out (ns):      N/A                                                                             
Max Clock-To-Out (ns):      N/A                                                                             

Clock Domain:               FCCC_3/GL1                                                                      
Period (ns):                2.520                                                                           
Frequency (MHz):            396.825                                                                         
Required Period (ns):       8.000                                                                           
Required Frequency (MHz):   125.000                                                                         
External Setup (ns):        N/A                                                                             
External Hold (ns):         N/A                                                                             
Min Clock-To-Out (ns):      N/A                                                                             
Max Clock-To-Out (ns):      N/A                                                                             

                            Input to Output                                                                 
Min Delay (ns):             N/A                                                                             
Max Delay (ns):             N/A                                                                             

END SUMMARY
-----------------------------------------------------

Clock Domain CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBi01:Q

SET Register to Register

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBl0OII[3]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBOIIII[9]:D
  Delay (ns):                  5.952                                                                           
  Slack (ns):                                                                                                  
  Arrival (ns):                10.458                                                                          
  Required (ns):                                                                                               
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         6.276                                                                           

Path 2
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBl0OII[3]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBOIIII[15]:D
  Delay (ns):                  5.858                                                                           
  Slack (ns):                                                                                                  
  Arrival (ns):                10.364                                                                          
  Required (ns):                                                                                               
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         6.164                                                                           

Path 3
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBl0OII[1]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBOIIII[8]:D
  Delay (ns):                  5.838                                                                           
  Slack (ns):                                                                                                  
  Arrival (ns):                10.353                                                                          
  Required (ns):                                                                                               
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         6.162                                                                           

Path 4
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBl0OII[2]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBOIIII[8]:D
  Delay (ns):                  5.679                                                                           
  Slack (ns):                                                                                                  
  Arrival (ns):                10.194                                                                          
  Required (ns):                                                                                               
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         6.003                                                                           

Path 5
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBi0OII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBOIIII[15]:D
  Delay (ns):                  5.668                                                                           
  Slack (ns):                                                                                                  
  Arrival (ns):                10.176                                                                          
  Required (ns):                                                                                               
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         5.976                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBl0OII[3]:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBOIIII[9]:D
  data required time                             N/C       
  data arrival time                          -   10.458    
  slack                                          N/C       
  ________________________________________________________
  Data arrival time calculation
  0.000                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBi01:Q
               +     0.000          Clock source
  0.000                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBi01:Q (r)
               +     2.661          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/CORETSE_AHBi01
  2.661                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9:An (f)
               +     0.374          cell: ADLIB:GBM
  3.035                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9:YWn (f)
               +     0.642          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9/U0_YWn
  3.677                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9/U0_RGB1_RGB5:An (f)
               +     0.316          cell: ADLIB:RGB
  3.993                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9/U0_RGB1_RGB5:YR (r)
               +     0.513          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9/U0_RGB1_RGB5_rgbr_net_1
  4.506                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBl0OII[3]:CLK (r)
               +     0.092          cell: ADLIB:SLE
  4.598                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBl0OII[3]:Q (r)
               +     0.646          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBl0OII[3]
  5.244                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBo01_0_a2_3:A (r)
               +     0.158          cell: ADLIB:CFG2
  5.402                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBo01_0_a2_3:Y (r)
               +     0.541          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/N_1800
  5.943                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBi1OII_RNI6P961[1]:B (r)
               +     0.074          cell: ADLIB:CFG4
  6.017                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBi1OII_RNI6P961[1]:Y (r)
               +     0.639          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/un1_m1_e_1_2
  6.656                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBo01_0_a2_4_0_RNIL3UR2:B (r)
               +     0.158          cell: ADLIB:CFG3
  6.814                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBo01_0_a2_4_0_RNIL3UR2:Y (r)
               +     0.696          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/N_1805
  7.510                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBiOIII_0_0_a2_10[6]:A (r)
               +     0.074          cell: ADLIB:CFG2
  7.584                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBiOIII_0_0_a2_10[6]:Y (r)
               +     0.252          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/N_1808
  7.836                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBiOIII_0_a2_2[9]:A (r)
               +     0.202          cell: ADLIB:CFG2
  8.038                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBiOIII_0_a2_2[9]:Y (r)
               +     0.876          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/N_1546
  8.914                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBiOIII_0_3[9]:D (r)
               +     0.292          cell: ADLIB:CFG4
  9.206                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBiOIII_0_3[9]:Y (r)
               +     0.885          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBiOIII_0_3[9]
  10.091                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBiOIII_0[9]:D (r)
               +     0.292          cell: ADLIB:CFG4
  10.383                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBiOIII_0[9]:Y (r)
               +     0.075          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBiOIII[9]
  10.458                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBOIIII[9]:D (r)
                                    
  10.458                       data arrival time
  ________________________________________________________
  Data required time calculation
  N/C                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBi01:Q
               +     0.000          Clock source
  N/C                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBi01:Q (r)
               +     2.661          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/CORETSE_AHBi01
  N/C                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9:An (f)
               +     0.374          cell: ADLIB:GBM
  N/C                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9:YWn (f)
               +     0.646          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9/U0_YWn
  N/C                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9/U0_RGB1_RGB2:An (f)
               +     0.316          cell: ADLIB:RGB
  N/C                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9/U0_RGB1_RGB2:YR (r)
               +     0.439          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/CORETSE_AHBi01_inferred_clock_RNIGRJ9/U0_RGB1_RGB2_rgbr_net_1
  N/C                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBOIIII[9]:CLK (r)
               -     0.254          Library setup time: ADLIB:SLE
  N/C                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBI011/CORETSE_AHBOIIII[9]:D


END SET Register to Register

----------------------------------------------------

SET External Setup

No Path 

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path 

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path 

END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path 

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path 

END SET Asynchronous to Register

----------------------------------------------------

Clock Domain FCCC_0/GL0

SET Register to Register

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBOil0/CORETSE_AHBOiOl[1]:CLK
  To:                          CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[2]
  Delay (ns):                  11.200                                                                          
  Slack (ns):                  7.784                                                                           
  Arrival (ns):                16.445                                                                          
  Required (ns):               24.229                                                                          
  Setup (ns):                  1.184                                                                           
  Minimum Period (ns):         12.216                                                                          

Path 2
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBOil0/CORETSE_AHBOiOl[0]:CLK
  To:                          CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[2]
  Delay (ns):                  11.174                                                                          
  Slack (ns):                  7.797                                                                           
  Arrival (ns):                16.432                                                                          
  Required (ns):               24.229                                                                          
  Setup (ns):                  1.184                                                                           
  Minimum Period (ns):         12.203                                                                          

Path 3
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBOil0/CORETSE_AHBOiOl[7]:CLK
  To:                          CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[2]
  Delay (ns):                  10.635                                                                          
  Slack (ns):                  8.349                                                                           
  Arrival (ns):                15.880                                                                          
  Required (ns):               24.229                                                                          
  Setup (ns):                  1.184                                                                           
  Minimum Period (ns):         11.651                                                                          

Path 4
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBOil0/CORETSE_AHBOiOl[7]:CLK
  To:                          CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[6]
  Delay (ns):                  10.947                                                                          
  Slack (ns):                  8.387                                                                           
  Arrival (ns):                16.192                                                                          
  Required (ns):               24.579                                                                          
  Setup (ns):                  0.834                                                                           
  Minimum Period (ns):         11.613                                                                          

Path 5
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBOil0/CORETSE_AHBOiOl[7]:CLK
  To:                          CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[17]
  Delay (ns):                  10.713                                                                          
  Slack (ns):                  8.409                                                                           
  Arrival (ns):                15.958                                                                          
  Required (ns):               24.367                                                                          
  Setup (ns):                  1.046                                                                           
  Minimum Period (ns):         11.591                                                                          


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBOil0/CORETSE_AHBOiOl[1]:CLK
  To: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[2]
  data required time                             24.229    
  data arrival time                          -   16.445    
  slack                                          7.784     
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_0/GL0
               +     0.000          Clock source
  0.000                        FCCC_0/CCC_INST/INST_CCC_IP:GL0 (r)
               +     3.397          Clock generation
  3.397                        
               +     0.198          net: FCCC_0/GL0_net
  3.595                        FCCC_0/GL0_INST:An (r)
               +     0.178          cell: ADLIB:GBM
  3.773                        FCCC_0/GL0_INST:YEn (f)
               +     0.626          net: FCCC_0/GL0_INST/U0_YWn_GEast
  4.399                        FCCC_0/GL0_INST/U0_RGB1_RGB5:An (f)
               +     0.316          cell: ADLIB:RGB
  4.715                        FCCC_0/GL0_INST/U0_RGB1_RGB5:YR (r)
               +     0.530          net: FCCC_0/GL0_INST/U0_RGB1_RGB5_rgbr_net_1
  5.245                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBOil0/CORETSE_AHBOiOl[1]:CLK (r)
               +     0.087          cell: ADLIB:SLE
  5.332                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBOil0/CORETSE_AHBOiOl[1]:Q (r)
               +     1.552          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBoi1[1]
  6.884                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBo1li/CORETSE_AHBI10i_1_0_0_i_o3:B (r)
               +     0.096          cell: ADLIB:CFG2
  6.980                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBo1li/CORETSE_AHBI10i_1_0_0_i_o3:Y (f)
               +     1.635          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI_CORETSE_AHBO0ooI/CORETSE_AHBo1li_inst_1/N_5195
  8.615                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBo1li/un75_CORETSE_AHBIOIi:C (f)
               +     0.147          cell: ADLIB:CFG3
  8.762                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBo1li/un75_CORETSE_AHBIOIi:Y (r)
               +     0.685          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/un75_CORETSE_AHBIOIi
  9.447                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_2[2]:B (r)
               +     0.202          cell: ADLIB:CFG4
  9.649                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_2[2]:Y (r)
               +     0.441          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_2[2]
  10.090                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_5[2]:A (r)
               +     0.202          cell: ADLIB:CFG3
  10.292                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_5[2]:Y (r)
               +     0.779          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_5[2]
  11.071                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_10[2]:D (r)
               +     0.202          cell: ADLIB:CFG4
  11.273                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_10[2]:Y (r)
               +     1.112          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_10[2]
  12.385                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_25[2]:C (r)
               +     0.074          cell: ADLIB:CFG4
  12.459                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_25[2]:Y (r)
               +     1.142          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_25[2]
  13.601                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_29[2]:D (r)
               +     0.202          cell: ADLIB:CFG4
  13.803                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_29[2]:Y (r)
               +     0.649          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBO1i_29[2]
  14.452                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBlil0/un9_CORETSE_AHBIiOl[2]:B (r)
               +     0.074          cell: ADLIB:CFG4
  14.526                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBlil0/un9_CORETSE_AHBIiOl[2]:Y (r)
               +     0.091          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBlil0/un9_CORETSE_AHBIiOl[2]
  14.617                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBlil0/CORETSE_AHBIiOl[2]:B (r)
               +     0.074          cell: ADLIB:CFG4
  14.691                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIOooI/CORETSE_AHBlil0/CORETSE_AHBIiOl[2]:Y (r)
               +     0.312          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBIol0[2]
  15.003                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CoreAHBLite_0_AHBmslave3_HRDATA_m[2]:B (r)
               +     0.282          cell: ADLIB:CFG4
  15.285                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CoreAHBLite_0_AHBmslave3_HRDATA_m[2]:Y (r)
               +     0.966          net: CoreAHBLite_0_AHBmslave3_HRDATA_m[2]
  16.251                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:A (r)
               +     0.194          cell: ADLIB:IP_INTERFACE
  16.445                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_4:IPA (r)
               +     0.000          net: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/F_HM0_RDATA_net[2]
  16.445                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[2] (r)
                                    
  16.445                       data arrival time
  ________________________________________________________
  Data required time calculation
  20.000                       FCCC_0/GL0
               +     0.000          Clock source
  20.000                       FCCC_0/CCC_INST/INST_CCC_IP:GL0 (r)
               +     3.397          Clock generation
  23.397                       
               +     0.198          net: FCCC_0/GL0_net
  23.595                       FCCC_0/GL0_INST:An (r)
               +     0.178          cell: ADLIB:GBM
  23.773                       FCCC_0/GL0_INST:YEn (f)
               +     0.629          net: FCCC_0/GL0_INST/U0_YWn_GEast
  24.402                       FCCC_0/GL0_INST/U0_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  24.718                       FCCC_0/GL0_INST/U0_RGB1:YR (r)
               +     0.407          net: FCCC_0/GL0_INST/U0_RGB1_YR
  25.125                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B (r)
               +     0.209          cell: ADLIB:IP_INTERFACE
  25.334                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB (r)
               +     0.079          net: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/CLK_BASE_net
  25.413                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE (r)
               -     1.184          Library setup time: ADLIB:MSS_075_IP
  24.229                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:F_HM0_RDATA[2]
                                    
  24.229                       data required time


END SET Register to Register

----------------------------------------------------

SET External Setup

Path 1
  From:                        PHY_MDIO
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBIIOi[0]:D
  Delay (ns):                  8.166                                                                           
  Slack (ns):                                                                                                  
  Arrival (ns):                8.166                                                                           
  Required (ns):                                                                                               
  Setup (ns):                  0.174                                                                           
  External Setup (ns):         3.342                                                                           


Expanded Path 1
  From: PHY_MDIO
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBIIOi[0]:D
  data required time                             N/C       
  data arrival time                          -   8.166     
  slack                                          N/C       
  ________________________________________________________
  Data arrival time calculation
  0.000                        PHY_MDIO (f)
               +     0.000          net: PHY_MDIO
  0.000                        BIBUF_0/U0/U_IOPAD:PAD (f)
               +     2.550          cell: ADLIB:IOPAD_BI
  2.550                        BIBUF_0/U0/U_IOPAD:Y (f)
               +     0.000          net: BIBUF_0/U0/YIN1
  2.550                        BIBUF_0/U0/U_IOINFF:A (f)
               +     0.090          cell: ADLIB:IOINFF_BYPASS
  2.640                        BIBUF_0/U0/U_IOINFF:Y (f)
               +     2.670          net: BIBUF_0_Y
  5.310                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBOIOi_0_a2[0]:B (f)
               +     0.287          cell: ADLIB:CFG4
  5.597                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBOIOi_0_a2[0]:Y (f)
               +     2.408          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/N_808
  8.005                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBOIOi_0[0]:D (f)
               +     0.087          cell: ADLIB:CFG4
  8.092                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBOIOi_0[0]:Y (f)
               +     0.074          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI_inst_1/CORETSE_AHBooOo/CORETSE_AHBOIOi[0]
  8.166                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBIIOi[0]:D (f)
                                    
  8.166                        data arrival time
  ________________________________________________________
  Data required time calculation
  N/C                          FCCC_0/GL0
               +     0.000          Clock source
  N/C                          FCCC_0/CCC_INST/INST_CCC_IP:GL0 (r)
               +     3.397          Clock generation
  N/C                          
               +     0.172          net: FCCC_0/GL0_net
  N/C                          FCCC_0/GL0_INST:An (r)
               +     0.155          cell: ADLIB:GBM
  N/C                          FCCC_0/GL0_INST:YEn (f)
               +     0.539          net: FCCC_0/GL0_INST/U0_YWn_GEast
  N/C                          FCCC_0/GL0_INST/U0_RGB1_RGB22:An (f)
               +     0.275          cell: ADLIB:RGB
  N/C                          FCCC_0/GL0_INST/U0_RGB1_RGB22:YR (r)
               +     0.460          net: FCCC_0/GL0_INST/U0_RGB1_RGB22_rgbr_net_1
  N/C                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBIIOi[0]:CLK (r)
               -     0.174          Library setup time: ADLIB:SLE
  N/C                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBIIOi[0]:D


END SET External Setup

----------------------------------------------------

SET Clock to Output

Path 1
  From:                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE
  To:                          GPIO_7_M2F
  Delay (ns):                  10.355                                                                          
  Slack (ns):                                                                                                  
  Arrival (ns):                15.780                                                                          
  Required (ns):                                                                                               
  Clock to Out (ns):           15.780                                                                          

Path 2
  From:                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE
  To:                          GPIO_5_M2F
  Delay (ns):                  10.318                                                                          
  Slack (ns):                                                                                                  
  Arrival (ns):                15.743                                                                          
  Required (ns):                                                                                               
  Clock to Out (ns):           15.743                                                                          

Path 3
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBooOo/CORETSE_AHBI11:CLK
  To:                          PHY_MDIO
  Delay (ns):                  10.423                                                                          
  Slack (ns):                                                                                                  
  Arrival (ns):                15.664                                                                          
  Required (ns):                                                                                               
  Clock to Out (ns):           15.664                                                                          

Path 4
  From:                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE
  To:                          GPIO_1_M2F
  Delay (ns):                  10.051                                                                          
  Slack (ns):                                                                                                  
  Arrival (ns):                15.476                                                                          
  Required (ns):                                                                                               
  Clock to Out (ns):           15.476                                                                          

Path 5
  From:                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE
  To:                          GPIO_6_M2F
  Delay (ns):                  9.907                                                                           
  Slack (ns):                                                                                                  
  Arrival (ns):                15.332                                                                          
  Required (ns):                                                                                               
  Clock to Out (ns):           15.332                                                                          


Expanded Path 1
  From: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE
  To: GPIO_7_M2F
  data required time                             N/C       
  data arrival time                          -   15.780    
  slack                                          N/C       
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_0/GL0
               +     0.000          Clock source
  0.000                        FCCC_0/CCC_INST/INST_CCC_IP:GL0 (r)
               +     3.397          Clock generation
  3.397                        
               +     0.198          net: FCCC_0/GL0_net
  3.595                        FCCC_0/GL0_INST:An (r)
               +     0.178          cell: ADLIB:GBM
  3.773                        FCCC_0/GL0_INST:YEn (f)
               +     0.629          net: FCCC_0/GL0_INST/U0_YWn_GEast
  4.402                        FCCC_0/GL0_INST/U0_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  4.718                        FCCC_0/GL0_INST/U0_RGB1:YR (r)
               +     0.407          net: FCCC_0/GL0_INST/U0_RGB1_YR
  5.125                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:B (r)
               +     0.209          cell: ADLIB:IP_INTERFACE
  5.334                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_268:IPB (r)
               +     0.091          net: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/CLK_BASE_net
  5.425                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_BASE (r)
               +     1.423          cell: ADLIB:MSS_075_IP
  6.848                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:SPI0_SS0_MGPIO7A_H2F_B (f)
               +     5.923          net: GPIO_7_M2F_c
  12.771                       GPIO_7_M2F_obuf/U0/U_IOOUTFF:A (f)
               +     0.343          cell: ADLIB:IOOUTFF_BYPASS
  13.114                       GPIO_7_M2F_obuf/U0/U_IOOUTFF:Y (f)
               +     0.000          net: GPIO_7_M2F_obuf/U0/DOUT
  13.114                       GPIO_7_M2F_obuf/U0/U_IOPAD:D (f)
               +     2.666          cell: ADLIB:IOPAD_TRI
  15.780                       GPIO_7_M2F_obuf/U0/U_IOPAD:PAD (f)
               +     0.000          net: GPIO_7_M2F
  15.780                       GPIO_7_M2F (f)
                                    
  15.780                       data arrival time
  ________________________________________________________
  Data required time calculation
  N/C                          FCCC_0/GL0
               +     0.000          Clock source
  N/C                          FCCC_0/CCC_INST/INST_CCC_IP:GL0 (r)
               +     3.397          Clock generation
  N/C                          
                                    
  N/C                          GPIO_7_M2F (f)


END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

Path 1
  From:                        CoreResetP_0/MSS_HPMS_READY_int:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBI1li/CORETSE_AHBII1i/CORETSE_AHBoo0i[5]:ALn
  Delay (ns):                  5.745                                                                           
  Slack (ns):                  13.834                                                                          
  Arrival (ns):                10.980                                                                          
  Required (ns):               24.814                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         6.166                                                                           
  Skew (ns):                   0.068                                                                           

Path 2
  From:                        CoreResetP_0/MSS_HPMS_READY_int:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBI1li/CORETSE_AHBII1i/CORETSE_AHBoo0i[9]:ALn
  Delay (ns):                  5.745                                                                           
  Slack (ns):                  13.834                                                                          
  Arrival (ns):                10.980                                                                          
  Required (ns):               24.814                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         6.166                                                                           
  Skew (ns):                   0.068                                                                           

Path 3
  From:                        CoreResetP_0/MSS_HPMS_READY_int:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBI1li/CORETSE_AHBII1i/CORETSE_AHBoo0i[3]:ALn
  Delay (ns):                  5.745                                                                           
  Slack (ns):                  13.834                                                                          
  Arrival (ns):                10.980                                                                          
  Required (ns):               24.814                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         6.166                                                                           
  Skew (ns):                   0.068                                                                           

Path 4
  From:                        CoreResetP_0/MSS_HPMS_READY_int:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBI1li/CORETSE_AHBII1i/CORETSE_AHBoo0i[8]:ALn
  Delay (ns):                  5.745                                                                           
  Slack (ns):                  13.834                                                                          
  Arrival (ns):                10.980                                                                          
  Required (ns):               24.814                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         6.166                                                                           
  Skew (ns):                   0.068                                                                           

Path 5
  From:                        CoreResetP_0/MSS_HPMS_READY_int:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBI1li/CORETSE_AHBII1i/CORETSE_AHBoo0i[7]:ALn
  Delay (ns):                  5.745                                                                           
  Slack (ns):                  13.834                                                                          
  Arrival (ns):                10.980                                                                          
  Required (ns):               24.814                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         6.166                                                                           
  Skew (ns):                   0.068                                                                           


Expanded Path 1
  From: CoreResetP_0/MSS_HPMS_READY_int:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBI1li/CORETSE_AHBII1i/CORETSE_AHBoo0i[5]:ALn
  data required time                             24.814    
  data arrival time                          -   10.980    
  slack                                          13.834    
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_0/GL0
               +     0.000          Clock source
  0.000                        FCCC_0/CCC_INST/INST_CCC_IP:GL0 (r)
               +     3.397          Clock generation
  3.397                        
               +     0.198          net: FCCC_0/GL0_net
  3.595                        FCCC_0/GL0_INST:An (r)
               +     0.178          cell: ADLIB:GBM
  3.773                        FCCC_0/GL0_INST:YEn (f)
               +     0.627          net: FCCC_0/GL0_INST/U0_YWn_GEast
  4.400                        FCCC_0/GL0_INST/U0_RGB1_RGB25:An (f)
               +     0.316          cell: ADLIB:RGB
  4.716                        FCCC_0/GL0_INST/U0_RGB1_RGB25:YR (r)
               +     0.519          net: FCCC_0/GL0_INST/U0_RGB1_RGB25_rgbr_net_1
  5.235                        CoreResetP_0/MSS_HPMS_READY_int:CLK (r)
               +     0.092          cell: ADLIB:SLE
  5.327                        CoreResetP_0/MSS_HPMS_READY_int:Q (r)
               +     3.757          net: CoreResetP_0/MSS_HPMS_READY_int
  9.084                        CoreResetP_0/MSS_HPMS_READY_int_RNI13UF:An (f)
               +     0.374          cell: ADLIB:GBM
  9.458                        CoreResetP_0/MSS_HPMS_READY_int_RNI13UF:YWn (f)
               +     0.635          net: CoreResetP_0/MSS_HPMS_READY_int_RNI13UF/U0_YWn
  10.093                       CoreResetP_0/MSS_HPMS_READY_int_RNI13UF/U0_RGB1_RGB5:An (f)
               +     0.316          cell: ADLIB:RGB
  10.409                       CoreResetP_0/MSS_HPMS_READY_int_RNI13UF/U0_RGB1_RGB5:YR (r)
               +     0.571          net: CoreResetP_0/MSS_HPMS_READY_int_RNI13UF/U0_RGB1_RGB5_rgbr_net_1
  10.980                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBI1li/CORETSE_AHBII1i/CORETSE_AHBoo0i[5]:ALn (r)
                                    
  10.980                       data arrival time
  ________________________________________________________
  Data required time calculation
  20.000                       FCCC_0/GL0
               +     0.000          Clock source
  20.000                       FCCC_0/CCC_INST/INST_CCC_IP:GL0 (r)
               +     3.397          Clock generation
  23.397                       
               +     0.198          net: FCCC_0/GL0_net
  23.595                       FCCC_0/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  23.772                       FCCC_0/GL0_INST:YWn (f)
               +     0.614          net: FCCC_0/GL0_INST/U0_YWn
  24.386                       FCCC_0/GL0_INST/U0_RGB1_RGB6:An (f)
               +     0.316          cell: ADLIB:RGB
  24.702                       FCCC_0/GL0_INST/U0_RGB1_RGB6:YR (r)
               +     0.465          net: FCCC_0/GL0_INST/U0_RGB1_RGB6_rgbr_net_1
  25.167                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBI1li/CORETSE_AHBII1i/CORETSE_AHBoo0i[5]:CLK (r)
               -     0.353          Library recovery time: ADLIB:SLE
  24.814                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBOlooI.CORETSE_AHBO0ooI/CORETSE_AHBI1li/CORETSE_AHBII1i/CORETSE_AHBoo0i[5]:ALn
                                    
  24.814                       data required time


END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path 

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path 

END SET Asynchronous to Register

----------------------------------------------------

SET OSC_0/I_RCOSC_25_50MHZ/CLKOUT to FCCC_0/GL0

No Path 

END SET OSC_0/I_RCOSC_25_50MHZ/CLKOUT to FCCC_0/GL0

----------------------------------------------------

SET CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB to FCCC_0/GL0

Path 1
  From:                        CoreConfigP_0/control_reg_1[0]:CLK
  To:                          CoreResetP_0/CONFIG1_DONE_q1:D
  Delay (ns):                  1.024                                                                           
  Slack (ns):                  18.607                                                                          
  Arrival (ns):                6.332                                                                           
  Required (ns):               24.939                                                                          
  Setup (ns):                  0.254                                                                           

Path 2
  From:                        CoreConfigP_0/control_reg_1[1]:CLK
  To:                          CoreResetP_0/CONFIG2_DONE_q1:D
  Delay (ns):                  0.858                                                                           
  Slack (ns):                  18.762                                                                          
  Arrival (ns):                6.155                                                                           
  Required (ns):               24.917                                                                          
  Setup (ns):                  0.254                                                                           


Expanded Path 1
  From: CoreConfigP_0/control_reg_1[0]:CLK
  To: CoreResetP_0/CONFIG1_DONE_q1:D
  data required time                             24.939    
  data arrival time                          -   6.332     
  slack                                          18.607    
  ________________________________________________________
  Data arrival time calculation
  0.000                        CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB
               +     0.000          Clock source
  0.000                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB (r)
               +     3.474          net: CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB
  3.474                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8:An (f)
               +     0.374          cell: ADLIB:GBM
  3.848                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8:YEn (f)
               +     0.625          net: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_YWn_GEast
  4.473                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  4.789                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_RGB1:YR (r)
               +     0.519          net: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_RGB1_YR
  5.308                        CoreConfigP_0/control_reg_1[0]:CLK (r)
               +     0.087          cell: ADLIB:SLE
  5.395                        CoreConfigP_0/control_reg_1[0]:Q (r)
               +     0.937          net: CoreConfigP_0_CONFIG1_DONE
  6.332                        CoreResetP_0/CONFIG1_DONE_q1:D (r)
                                    
  6.332                        data arrival time
  ________________________________________________________
  Data required time calculation
  20.000                       FCCC_0/GL0
               +     0.000          Clock source
  20.000                       FCCC_0/CCC_INST/INST_CCC_IP:GL0 (r)
               +     3.397          Clock generation
  23.397                       
               +     0.198          net: FCCC_0/GL0_net
  23.595                       FCCC_0/GL0_INST:An (r)
               +     0.178          cell: ADLIB:GBM
  23.773                       FCCC_0/GL0_INST:YEn (f)
               +     0.629          net: FCCC_0/GL0_INST/U0_YWn_GEast
  24.402                       FCCC_0/GL0_INST/U0_RGB1_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  24.718                       FCCC_0/GL0_INST/U0_RGB1_RGB1:YR (r)
               +     0.475          net: FCCC_0/GL0_INST/U0_RGB1_RGB1_rgbr_net_1
  25.193                       CoreResetP_0/CONFIG1_DONE_q1:CLK (r)
               -     0.254          Library setup time: ADLIB:SLE
  24.939                       CoreResetP_0/CONFIG1_DONE_q1:D
                                    
  24.939                       data required time


END SET CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB to FCCC_0/GL0

----------------------------------------------------

SET FCCC_3/GL0 to FCCC_0/GL0

No Path 

END SET FCCC_3/GL0 to FCCC_0/GL0

----------------------------------------------------

SET FCCC_3/GL1 to FCCC_0/GL0

No Path 

END SET FCCC_3/GL1 to FCCC_0/GL0

----------------------------------------------------

Clock Domain FCCC_1/GL0

SET Register to Register

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBOiIOI[11]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBl0oi[26]:D
  Delay (ns):                  7.766                                                                           
  Slack (ns):                  7.926                                                                           
  Arrival (ns):                11.991                                                                          
  Required (ns):               19.917                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         8.074                                                                           

Path 2
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBOiIOI[12]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBl0oi[26]:D
  Delay (ns):                  7.686                                                                           
  Slack (ns):                  7.994                                                                           
  Arrival (ns):                11.923                                                                          
  Required (ns):               19.917                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         8.006                                                                           

Path 3
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBlIlOI[7]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBl0oi[26]:D
  Delay (ns):                  7.582                                                                           
  Slack (ns):                  8.113                                                                           
  Arrival (ns):                11.804                                                                          
  Required (ns):               19.917                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         7.887                                                                           

Path 4
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBOiIOI[0]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBl0oi[26]:D
  Delay (ns):                  7.550                                                                           
  Slack (ns):                  8.143                                                                           
  Arrival (ns):                11.774                                                                          
  Required (ns):               19.917                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         7.857                                                                           

Path 5
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBIOlOI:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBl0oi[26]:D
  Delay (ns):                  7.566                                                                           
  Slack (ns):                  8.148                                                                           
  Arrival (ns):                11.769                                                                          
  Required (ns):               19.917                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         7.852                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBOiIOI[11]:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBl0oi[26]:D
  data required time                             19.917    
  data arrival time                          -   11.991    
  slack                                          7.926     
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_1/GL0
               +     0.000          Clock source
  0.000                        FCCC_1/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.400          Clock generation
  2.400                        
               +     0.198          net: FCCC_1/GL0_net
  2.598                        FCCC_1/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  2.775                        FCCC_1/GL0_INST:YWn (f)
               +     0.618          net: FCCC_1/GL0_INST/U0_YWn
  3.393                        FCCC_1/GL0_INST/U0_RGB1_RGB9:An (f)
               +     0.316          cell: ADLIB:RGB
  3.709                        FCCC_1/GL0_INST/U0_RGB1_RGB9:YR (r)
               +     0.516          net: FCCC_1/GL0_INST/U0_RGB1_RGB9_rgbr_net_1
  4.225                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBOiIOI[11]:CLK (r)
               +     0.087          cell: ADLIB:SLE
  4.312                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBOiIOI[11]:Q (r)
               +     0.640          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBOiIOI[11]
  4.952                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBiO11[1]:A (r)
               +     0.158          cell: ADLIB:CFG3
  5.110                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBiO11[1]:Y (r)
               +     0.250          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiO11[1]
  5.360                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOoIOI/CORETSE_AHBO1OoI.m3:C (r)
               +     0.225          cell: ADLIB:CFG3
  5.585                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOoIOI/CORETSE_AHBO1OoI.m3:Y (f)
               +     0.210          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOoIOI_inst_1/m3
  5.795                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOoIOI/CORETSE_AHBO1OoI.m7:B (f)
               +     0.296          cell: ADLIB:CFG4
  6.091                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOoIOI/CORETSE_AHBO1OoI.m7:Y (f)
               +     0.301          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOoIOI_inst_1/i5_mux
  6.392                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOoIOI/CORETSE_AHBO1OoI.m10_ns:D (f)
               +     0.323          cell: ADLIB:CFG4
  6.715                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOoIOI/CORETSE_AHBO1OoI.m10_ns:Y (f)
               +     0.593          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBO1OoI_net_1
  7.308                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOloi_i_o3[1]:C (f)
               +     0.164          cell: ADLIB:CFG4
  7.472                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOloi_i_o3[1]:Y (f)
               +     0.620          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/N_294
  8.092                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/un8_CORETSE_AHBIlOoI_0_RNO_0:C (f)
               +     0.084          cell: ADLIB:CFG4
  8.176                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/un8_CORETSE_AHBIlOoI_0_RNO_0:Y (f)
               +     0.223          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/un8_CORETSE_AHBIlOoI_0_RNO_0
  8.399                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/un8_CORETSE_AHBIlOoI_0:D (f)
               +     0.084          cell: ADLIB:CFG4
  8.483                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/un8_CORETSE_AHBIlOoI_0:Y (f)
               +     0.465          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/un8_CORETSE_AHBIlOoI
  8.948                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBIlOoI_4:D (f)
               +     0.099          cell: ADLIB:CFG4
  9.047                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBIlOoI_4:Y (r)
               +     0.615          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBIlOoI_4
  9.662                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBIlOoI:C (r)
               +     0.202          cell: ADLIB:CFG4
  9.864                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBIlOoI:Y (r)
               +     0.662          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBIlOoI
  10.526                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBIlOoI_RNIDRS8L:C (r)
               +     0.143          cell: ADLIB:CFG4
  10.669                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBIlOoI_RNIDRS8L:Y (f)
               +     0.301          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_m3_1_0
  10.970                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBIlOoI_RNIV4MUP:D (f)
               +     0.363          cell: ADLIB:CFG4
  11.333                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBIlOoI_RNIV4MUP:Y (f)
               +     0.453          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_m3_1_1
  11.786                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBo0OoI_0_1_iv_0_1_RNICA3EQ[1]:A (f)
               +     0.140          cell: ADLIB:CFG2
  11.926                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBloIOI/CORETSE_AHBo0OoI_0_1_iv_0_1_RNICA3EQ[1]:Y (r)
               +     0.065          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_N_4_8_i_0
  11.991                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBl0oi[26]:D (r)
                                    
  11.991                       data arrival time
  ________________________________________________________
  Data required time calculation
  16.000                       FCCC_1/GL0
               +     0.000          Clock source
  16.000                       FCCC_1/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.400          Clock generation
  18.400                       
               +     0.198          net: FCCC_1/GL0_net
  18.598                       FCCC_1/GL0_INST:An (r)
               +     0.178          cell: ADLIB:GBM
  18.776                       FCCC_1/GL0_INST:YEn (f)
               +     0.619          net: FCCC_1/GL0_INST/U0_YWn_GEast
  19.395                       FCCC_1/GL0_INST/U0_RGB1_RGB7:An (f)
               +     0.317          cell: ADLIB:RGB
  19.712                       FCCC_1/GL0_INST/U0_RGB1_RGB7:YL (r)
               +     0.459          net: FCCC_1/GL0_INST/U0_RGB1_RGB7_rgbl_net_1
  20.171                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBl0oi[26]:CLK (r)
               -     0.254          Library setup time: ADLIB:SLE
  19.917                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBl0oi[26]:D
                                    
  19.917                       data required time


END SET Register to Register

----------------------------------------------------

SET External Setup

No Path 

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path 

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlOlII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOii0[0]:ALn
  Delay (ns):                  4.028                                                                           
  Slack (ns):                  11.602                                                                          
  Arrival (ns):                8.221                                                                           
  Required (ns):               19.823                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         4.398                                                                           
  Skew (ns):                   0.017                                                                           

Path 2
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlOlII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[5]:ALn
  Delay (ns):                  4.017                                                                           
  Slack (ns):                  11.602                                                                          
  Arrival (ns):                8.210                                                                           
  Required (ns):               19.812                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         4.398                                                                           
  Skew (ns):                   0.028                                                                           

Path 3
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlOlII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBOIlOI[7]:ALn
  Delay (ns):                  4.014                                                                           
  Slack (ns):                  11.602                                                                          
  Arrival (ns):                8.207                                                                           
  Required (ns):               19.809                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         4.398                                                                           
  Skew (ns):                   0.031                                                                           

Path 4
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlOlII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBOIlOI[8]:ALn
  Delay (ns):                  4.014                                                                           
  Slack (ns):                  11.602                                                                          
  Arrival (ns):                8.207                                                                           
  Required (ns):               19.809                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         4.398                                                                           
  Skew (ns):                   0.031                                                                           

Path 5
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlOlII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBOIlOI[6]:ALn
  Delay (ns):                  4.014                                                                           
  Slack (ns):                  11.602                                                                          
  Arrival (ns):                8.207                                                                           
  Required (ns):               19.809                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         4.398                                                                           
  Skew (ns):                   0.031                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlOlII:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOii0[0]:ALn
  data required time                             19.823    
  data arrival time                          -   8.221     
  slack                                          11.602    
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_1/GL0
               +     0.000          Clock source
  0.000                        FCCC_1/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.400          Clock generation
  2.400                        
               +     0.198          net: FCCC_1/GL0_net
  2.598                        FCCC_1/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  2.775                        FCCC_1/GL0_INST:YWn (f)
               +     0.611          net: FCCC_1/GL0_INST/U0_YWn
  3.386                        FCCC_1/GL0_INST/U0_RGB1_RGB4:An (f)
               +     0.316          cell: ADLIB:RGB
  3.702                        FCCC_1/GL0_INST/U0_RGB1_RGB4:YR (r)
               +     0.491          net: FCCC_1/GL0_INST/U0_RGB1_RGB4_rgbr_net_1
  4.193                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlOlII:CLK (r)
               +     0.108          cell: ADLIB:SLE
  4.301                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlOlII:Q (f)
               +     0.054          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBlOlII
  4.355                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoOlII:C (f)
               +     0.315          cell: ADLIB:CFG4
  4.670                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoOlII:Y (r)
               +     1.665          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBoOlII
  6.335                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoOlII_RNIPHQF:An (f)
               +     0.374          cell: ADLIB:GBM
  6.709                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoOlII_RNIPHQF:YEn (f)
               +     0.626          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBoOlII_RNIPHQF/U0_YWn_GEast
  7.335                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBoOlII_RNIPHQF/U0_RGB1_RGB8:An (f)
               +     0.317          cell: ADLIB:RGB
  7.652                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBoOlII_RNIPHQF/U0_RGB1_RGB8:YL (r)
               +     0.569          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBoOlII_RNIPHQF/U0_RGB1_RGB8_rgbl_net_1
  8.221                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOii0[0]:ALn (r)
                                    
  8.221                        data arrival time
  ________________________________________________________
  Data required time calculation
  16.000                       FCCC_1/GL0
               +     0.000          Clock source
  16.000                       FCCC_1/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.400          Clock generation
  18.400                       
               +     0.198          net: FCCC_1/GL0_net
  18.598                       FCCC_1/GL0_INST:An (r)
               +     0.178          cell: ADLIB:GBM
  18.776                       FCCC_1/GL0_INST:YEn (f)
               +     0.617          net: FCCC_1/GL0_INST/U0_YWn_GEast
  19.393                       FCCC_1/GL0_INST/U0_RGB1_RGB8:An (f)
               +     0.317          cell: ADLIB:RGB
  19.710                       FCCC_1/GL0_INST/U0_RGB1_RGB8:YL (r)
               +     0.466          net: FCCC_1/GL0_INST/U0_RGB1_RGB8_rgbl_net_1
  20.176                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOii0[0]:CLK (r)
               -     0.353          Library recovery time: ADLIB:SLE
  19.823                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBil11/CORETSE_AHBOii0[0]:ALn
                                    
  19.823                       data required time


END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path 

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path 

END SET Asynchronous to Register

----------------------------------------------------

SET FCCC_0/GL0 to FCCC_1/GL0

No Path 

END SET FCCC_0/GL0 to FCCC_1/GL0

----------------------------------------------------

SET SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1] to FCCC_1/GL0

Path 1
  From:                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[18]:D
  Delay (ns):                  6.203                                                                           
  Slack (ns):                  5.702                                                                           
  Arrival (ns):                6.203                                                                           
  Required (ns):               11.905                                                                          
  Setup (ns):                  0.254                                                                           

Path 2
  From:                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[12]:D
  Delay (ns):                  6.063                                                                           
  Slack (ns):                  5.838                                                                           
  Arrival (ns):                6.063                                                                           
  Required (ns):               11.901                                                                          
  Setup (ns):                  0.254                                                                           

Path 3
  From:                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[16]:D
  Delay (ns):                  6.057                                                                           
  Slack (ns):                  5.856                                                                           
  Arrival (ns):                6.057                                                                           
  Required (ns):               11.913                                                                          
  Setup (ns):                  0.254                                                                           

Path 4
  From:                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[15]:D
  Delay (ns):                  5.997                                                                           
  Slack (ns):                  5.908                                                                           
  Arrival (ns):                5.997                                                                           
  Required (ns):               11.905                                                                          
  Setup (ns):                  0.254                                                                           

Path 5
  From:                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[19]:D
  Delay (ns):                  5.706                                                                           
  Slack (ns):                  6.205                                                                           
  Arrival (ns):                5.706                                                                           
  Required (ns):               11.911                                                                          
  Setup (ns):                  0.254                                                                           


Expanded Path 1
  From: SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[18]:D
  data required time                             11.905    
  data arrival time                          -   6.203     
  slack                                          5.702     
  ________________________________________________________
  Data arrival time calculation
  0.000                        SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1]
               +     0.000          Clock source
  0.000                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1] (r)
               +     0.299          cell: ADLIB:SERDESIF_075_IP
  0.299                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[38] (r)
               +     3.522          net: SERDES_IF2_0_EPCS_3_RX_DATA[8]
  3.821                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]_CFG1A_TEST:A (r)
               +     0.074          cell: ADLIB:CFG1A_TEST
  3.895                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]_CFG1A_TEST:Y (r)
               +     0.232          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]_CFG1A_TEST_net
  4.127                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]_CFG1C_TEST0:A (r)
               +     0.202          cell: ADLIB:CFG1C_TEST
  4.329                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]_CFG1C_TEST0:Y (r)
               +     0.233          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]_CFG1C_TEST_net0
  4.562                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]_CFG1C_TEST:A (r)
               +     0.202          cell: ADLIB:CFG1C_TEST
  4.764                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]_CFG1C_TEST:Y (r)
               +     0.222          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]_CFG1C_TEST_net
  4.986                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]:B (r)
               +     0.158          cell: ADLIB:CFG3
  5.144                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]:Y (r)
               +     1.059          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[18]
  6.203                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[18]:D (r)
                                    
  6.203                        data arrival time
  ________________________________________________________
  Data required time calculation
  8.000                        FCCC_1/GL0
               +     0.000          Clock source
  8.000                        FCCC_1/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.400          Clock generation
  10.400                       
               +     0.198          net: FCCC_1/GL0_net
  10.598                       FCCC_1/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  10.775                       FCCC_1/GL0_INST:YWn (f)
               +     0.619          net: FCCC_1/GL0_INST/U0_YWn
  11.394                       FCCC_1/GL0_INST/U0_RGB1_RGB11:An (f)
               +     0.316          cell: ADLIB:RGB
  11.710                       FCCC_1/GL0_INST/U0_RGB1_RGB11:YR (r)
               +     0.449          net: FCCC_1/GL0_INST/U0_RGB1_RGB11_rgbr_net_1
  12.159                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[18]:CLK (r)
               -     0.254          Library setup time: ADLIB:SLE
  11.905                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[18]:D
                                    
  11.905                       data required time


END SET SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1] to FCCC_1/GL0

----------------------------------------------------

SET FCCC_1/GL1 to FCCC_1/GL0

No Path 

END SET FCCC_1/GL1 to FCCC_1/GL0

----------------------------------------------------

SET FCCC_2/GL0 to FCCC_1/GL0

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[6]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[16]:D
  Delay (ns):                  3.408                                                                           
  Slack (ns):                  4.245                                                                           
  Arrival (ns):                7.668                                                                           
  Required (ns):               11.913                                                                          
  Setup (ns):                  0.254                                                                           

Path 2
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[2]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[12]:D
  Delay (ns):                  3.128                                                                           
  Slack (ns):                  4.492                                                                           
  Arrival (ns):                7.409                                                                           
  Required (ns):               11.901                                                                          
  Setup (ns):                  0.254                                                                           

Path 3
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBo110:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[18]:D
  Delay (ns):                  3.065                                                                           
  Slack (ns):                  4.557                                                                           
  Arrival (ns):                7.348                                                                           
  Required (ns):               11.905                                                                          
  Setup (ns):                  0.254                                                                           

Path 4
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBlI1II[8]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[18]:D
  Delay (ns):                  3.042                                                                           
  Slack (ns):                  4.590                                                                           
  Arrival (ns):                7.315                                                                           
  Required (ns):               11.905                                                                          
  Setup (ns):                  0.254                                                                           

Path 5
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[5]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[15]:D
  Delay (ns):                  3.001                                                                           
  Slack (ns):                  4.636                                                                           
  Arrival (ns):                7.269                                                                           
  Required (ns):               11.905                                                                          
  Setup (ns):                  0.254                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[6]:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[16]:D
  data required time                             11.913    
  data arrival time                          -   7.668     
  slack                                          4.245     
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_2/GL0
               +     0.000          Clock source
  0.000                        FCCC_2/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.469          Clock generation
  2.469                        
               +     0.199          net: FCCC_2/GL0_net
  2.668                        FCCC_2/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  2.845                        FCCC_2/GL0_INST:YWn (f)
               +     0.603          net: FCCC_2/GL0_INST/U0_YWn
  3.448                        FCCC_2/GL0_INST/U0_RGB1_RGB3:An (f)
               +     0.316          cell: ADLIB:RGB
  3.764                        FCCC_2/GL0_INST/U0_RGB1_RGB3:YR (r)
               +     0.496          net: FCCC_2/GL0_INST/U0_RGB1_RGB3_rgbr_net_1
  4.260                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[6]:CLK (r)
               +     0.087          cell: ADLIB:SLE
  4.347                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[6]:Q (r)
               +     0.773          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBI0i0[6]
  5.120                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBol1[6]:D (r)
               +     0.282          cell: ADLIB:CFG4
  5.402                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBol1[6]:Y (r)
               +     1.354          net: CORETSE_AHB_0_TCG[6]
  6.756                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[16]:A (r)
               +     0.074          cell: ADLIB:CFG3
  6.830                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[16]:Y (r)
               +     0.838          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[16]
  7.668                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[16]:D (r)
                                    
  7.668                        data arrival time
  ________________________________________________________
  Data required time calculation
  8.000                        FCCC_1/GL0
               +     0.000          Clock source
  8.000                        FCCC_1/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.400          Clock generation
  10.400                       
               +     0.198          net: FCCC_1/GL0_net
  10.598                       FCCC_1/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  10.775                       FCCC_1/GL0_INST:YWn (f)
               +     0.619          net: FCCC_1/GL0_INST/U0_YWn
  11.394                       FCCC_1/GL0_INST/U0_RGB1_RGB11:An (f)
               +     0.316          cell: ADLIB:RGB
  11.710                       FCCC_1/GL0_INST/U0_RGB1_RGB11:YR (r)
               +     0.457          net: FCCC_1/GL0_INST/U0_RGB1_RGB11_rgbr_net_1
  12.167                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[16]:CLK (r)
               -     0.254          Library setup time: ADLIB:SLE
  11.913                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI[16]:D
                                    
  11.913                       data required time


END SET FCCC_2/GL0 to FCCC_1/GL0

----------------------------------------------------

Clock Domain FCCC_1/GL1

SET Register to Register

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoiIII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:D
  Delay (ns):                  0.467                                                                           
  Slack (ns):                  15.206                                                                          
  Arrival (ns):                4.690                                                                           
  Required (ns):               19.896                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         0.794                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoiIII:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:D
  data required time                             19.896    
  data arrival time                          -   4.690     
  slack                                          15.206    
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_1/GL1
               +     0.000          Clock source
  0.000                        FCCC_1/CCC_INST/INST_CCC_IP:GL1 (r)
               +     2.430          Clock generation
  2.430                        
               +     0.199          net: FCCC_1/GL1_net
  2.629                        FCCC_1/GL1_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  2.806                        FCCC_1/GL1_INST:YWn (f)
               +     0.597          net: FCCC_1/GL1_INST/U0_YWn
  3.403                        FCCC_1/GL1_INST/U0_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  3.719                        FCCC_1/GL1_INST/U0_RGB1:YR (r)
               +     0.504          net: FCCC_1/GL1_INST/U0_RGB1_YR
  4.223                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoiIII:CLK (r)
               +     0.087          cell: ADLIB:SLE
  4.310                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoiIII:Q (r)
               +     0.380          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBoiIII
  4.690                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:D (r)
                                    
  4.690                        data arrival time
  ________________________________________________________
  Data required time calculation
  16.000                       FCCC_1/GL1
               +     0.000          Clock source
  16.000                       FCCC_1/CCC_INST/INST_CCC_IP:GL1 (r)
               +     2.430          Clock generation
  18.430                       
               +     0.199          net: FCCC_1/GL1_net
  18.629                       FCCC_1/GL1_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  18.806                       FCCC_1/GL1_INST:YWn (f)
               +     0.597          net: FCCC_1/GL1_INST/U0_YWn
  19.403                       FCCC_1/GL1_INST/U0_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  19.719                       FCCC_1/GL1_INST/U0_RGB1:YR (r)
               +     0.431          net: FCCC_1/GL1_INST/U0_RGB1_YR
  20.150                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:CLK (r)
               -     0.254          Library setup time: ADLIB:SLE
  19.896                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:D
                                    
  19.896                       data required time


END SET Register to Register

----------------------------------------------------

SET External Setup

No Path 

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path 

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[4]:ALn
  Delay (ns):                  1.778                                                                           
  Slack (ns):                  13.822                                                                          
  Arrival (ns):                5.992                                                                           
  Required (ns):               19.814                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         2.178                                                                           
  Skew (ns):                   0.047                                                                           

Path 2
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[8]:ALn
  Delay (ns):                  1.778                                                                           
  Slack (ns):                  13.823                                                                          
  Arrival (ns):                5.992                                                                           
  Required (ns):               19.815                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         2.177                                                                           
  Skew (ns):                   0.046                                                                           

Path 3
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[1]:ALn
  Delay (ns):                  1.778                                                                           
  Slack (ns):                  13.823                                                                          
  Arrival (ns):                5.992                                                                           
  Required (ns):               19.815                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         2.177                                                                           
  Skew (ns):                   0.046                                                                           

Path 4
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[3]:ALn
  Delay (ns):                  1.778                                                                           
  Slack (ns):                  13.831                                                                          
  Arrival (ns):                5.992                                                                           
  Required (ns):               19.823                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         2.169                                                                           
  Skew (ns):                   0.038                                                                           

Path 5
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[7]:ALn
  Delay (ns):                  1.597                                                                           
  Slack (ns):                  13.995                                                                          
  Arrival (ns):                5.811                                                                           
  Required (ns):               19.806                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         2.005                                                                           
  Skew (ns):                   0.055                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[4]:ALn
  data required time                             19.814    
  data arrival time                          -   5.992     
  slack                                          13.822    
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_1/GL1
               +     0.000          Clock source
  0.000                        FCCC_1/CCC_INST/INST_CCC_IP:GL1 (r)
               +     2.430          Clock generation
  2.430                        
               +     0.199          net: FCCC_1/GL1_net
  2.629                        FCCC_1/GL1_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  2.806                        FCCC_1/GL1_INST:YWn (f)
               +     0.597          net: FCCC_1/GL1_INST/U0_YWn
  3.403                        FCCC_1/GL1_INST/U0_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  3.719                        FCCC_1/GL1_INST/U0_RGB1:YR (r)
               +     0.495          net: FCCC_1/GL1_INST/U0_RGB1_YR
  4.214                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:CLK (r)
               +     0.108          cell: ADLIB:SLE
  4.322                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBiiIII:Q (f)
               +     0.053          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBiiIII
  4.375                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBOOlII:C (f)
               +     0.315          cell: ADLIB:CFG4
  4.690                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBOOlII:Y (r)
               +     1.302          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBOOlII_i
  5.992                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[4]:ALn (r)
                                    
  5.992                        data arrival time
  ________________________________________________________
  Data required time calculation
  16.000                       FCCC_1/GL1
               +     0.000          Clock source
  16.000                       FCCC_1/CCC_INST/INST_CCC_IP:GL1 (r)
               +     2.430          Clock generation
  18.430                       
               +     0.199          net: FCCC_1/GL1_net
  18.629                       FCCC_1/GL1_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  18.806                       FCCC_1/GL1_INST:YWn (f)
               +     0.610          net: FCCC_1/GL1_INST/U0_YWn
  19.416                       FCCC_1/GL1_INST/U0_RGB1_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  19.732                       FCCC_1/GL1_INST/U0_RGB1_RGB1:YR (r)
               +     0.435          net: FCCC_1/GL1_INST/U0_RGB1_RGB1_rgbr_net_1
  20.167                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[4]:CLK (r)
               -     0.353          Library recovery time: ADLIB:SLE
  19.814                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[4]:ALn
                                    
  19.814                       data required time


END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path 

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path 

END SET Asynchronous to Register

----------------------------------------------------

SET FCCC_0/GL0 to FCCC_1/GL1

No Path 

END SET FCCC_0/GL0 to FCCC_1/GL1

----------------------------------------------------

SET SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1] to FCCC_1/GL1

Path 1
  From:                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[9]:D
  Delay (ns):                  5.937                                                                           
  Slack (ns):                  5.982                                                                           
  Arrival (ns):                5.937                                                                           
  Required (ns):               11.919                                                                          
  Setup (ns):                  0.254                                                                           

Path 2
  From:                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[0]:D
  Delay (ns):                  5.631                                                                           
  Slack (ns):                  6.280                                                                           
  Arrival (ns):                5.631                                                                           
  Required (ns):               11.911                                                                          
  Setup (ns):                  0.254                                                                           

Path 3
  From:                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[1]:D
  Delay (ns):                  5.528                                                                           
  Slack (ns):                  6.386                                                                           
  Arrival (ns):                5.528                                                                           
  Required (ns):               11.914                                                                          
  Setup (ns):                  0.254                                                                           

Path 4
  From:                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[2]:D
  Delay (ns):                  5.420                                                                           
  Slack (ns):                  6.499                                                                           
  Arrival (ns):                5.420                                                                           
  Required (ns):               11.919                                                                          
  Setup (ns):                  0.254                                                                           

Path 5
  From:                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[5]:D
  Delay (ns):                  5.333                                                                           
  Slack (ns):                  6.578                                                                           
  Arrival (ns):                5.333                                                                           
  Required (ns):               11.911                                                                          
  Setup (ns):                  0.254                                                                           


Expanded Path 1
  From: SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[9]:D
  data required time                             11.919    
  data arrival time                          -   5.937     
  slack                                          5.982     
  ________________________________________________________
  Data arrival time calculation
  0.000                        SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1]
               +     0.000          Clock source
  0.000                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1] (r)
               +     0.266          cell: ADLIB:SERDESIF_075_IP
  0.266                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXDATA[39] (r)
               +     3.595          net: SERDES_IF2_0_EPCS_3_RX_DATA[9]
  3.861                        mdr_mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]_CFG1C_TEST_CFG1A_TEST:A (r)
               +     0.074          cell: ADLIB:CFG1A_TEST
  3.935                        mdr_mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]_CFG1C_TEST_CFG1A_TEST:Y (r)
               +     0.305          net: mdr_mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]_CFG1C_TEST_CFG1A_TEST_net
  4.240                        mdr_mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]_CFG1C_TEST_CFG1D_TEST:A (r)
               +     0.345          cell: ADLIB:CFG1D_TEST
  4.585                        mdr_mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]_CFG1C_TEST_CFG1D_TEST:Y (r)
               +     0.233          net: mdr_mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]_CFG1C_TEST_CFG1D_TEST_net
  4.818                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]_CFG1C_TEST:A (r)
               +     0.202          cell: ADLIB:CFG1C_TEST
  5.020                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]_CFG1C_TEST:Y (r)
               +     0.532          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]_CFG1C_TEST_net
  5.552                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]:B (r)
               +     0.074          cell: ADLIB:CFG3
  5.626                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]:Y (r)
               +     0.311          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[19]
  5.937                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[9]:D (r)
                                    
  5.937                        data arrival time
  ________________________________________________________
  Data required time calculation
  8.000                        FCCC_1/GL1
               +     0.000          Clock source
  8.000                        FCCC_1/CCC_INST/INST_CCC_IP:GL1 (r)
               +     2.430          Clock generation
  10.430                       
               +     0.199          net: FCCC_1/GL1_net
  10.629                       FCCC_1/GL1_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  10.806                       FCCC_1/GL1_INST:YWn (f)
               +     0.606          net: FCCC_1/GL1_INST/U0_YWn
  11.412                       FCCC_1/GL1_INST/U0_RGB1_RGB0:An (f)
               +     0.316          cell: ADLIB:RGB
  11.728                       FCCC_1/GL1_INST/U0_RGB1_RGB0:YR (r)
               +     0.445          net: FCCC_1/GL1_INST/U0_RGB1_RGB0_rgbr_net_1
  12.173                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[9]:CLK (r)
               -     0.254          Library setup time: ADLIB:SLE
  11.919                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[9]:D
                                    
  11.919                       data required time


END SET SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1] to FCCC_1/GL1

----------------------------------------------------

SET FCCC_2/GL0 to FCCC_1/GL1

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[0]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[0]:D
  Delay (ns):                  3.237                                                                           
  Slack (ns):                  4.393                                                                           
  Arrival (ns):                7.518                                                                           
  Required (ns):               11.911                                                                          
  Setup (ns):                  0.254                                                                           

Path 2
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBlI1II[0]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[0]:D
  Delay (ns):                  2.683                                                                           
  Slack (ns):                  4.960                                                                           
  Arrival (ns):                6.951                                                                           
  Required (ns):               11.911                                                                          
  Setup (ns):                  0.254                                                                           

Path 3
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[6]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[6]:D
  Delay (ns):                  2.648                                                                           
  Slack (ns):                  5.004                                                                           
  Arrival (ns):                6.908                                                                           
  Required (ns):               11.912                                                                          
  Setup (ns):                  0.254                                                                           

Path 4
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[1]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[1]:D
  Delay (ns):                  2.519                                                                           
  Slack (ns):                  5.129                                                                           
  Arrival (ns):                6.785                                                                           
  Required (ns):               11.914                                                                          
  Setup (ns):                  0.254                                                                           

Path 5
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[2]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[2]:D
  Delay (ns):                  2.485                                                                           
  Slack (ns):                  5.153                                                                           
  Arrival (ns):                6.766                                                                           
  Required (ns):               11.919                                                                          
  Setup (ns):                  0.254                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[0]:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[0]:D
  data required time                             11.911    
  data arrival time                          -   7.518     
  slack                                          4.393     
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_2/GL0
               +     0.000          Clock source
  0.000                        FCCC_2/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.469          Clock generation
  2.469                        
               +     0.199          net: FCCC_2/GL0_net
  2.668                        FCCC_2/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  2.845                        FCCC_2/GL0_INST:YWn (f)
               +     0.603          net: FCCC_2/GL0_INST/U0_YWn
  3.448                        FCCC_2/GL0_INST/U0_RGB1_RGB3:An (f)
               +     0.316          cell: ADLIB:RGB
  3.764                        FCCC_2/GL0_INST/U0_RGB1_RGB3:YR (r)
               +     0.517          net: FCCC_2/GL0_INST/U0_RGB1_RGB3_rgbr_net_1
  4.281                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[0]:CLK (r)
               +     0.087          cell: ADLIB:SLE
  4.368                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[0]:Q (r)
               +     0.740          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBI0i0[0]
  5.108                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBol1[0]:D (r)
               +     0.282          cell: ADLIB:CFG4
  5.390                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBol1[0]:Y (r)
               +     1.212          net: CORETSE_AHB_0_TCG[0]
  6.602                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[10]:A (r)
               +     0.202          cell: ADLIB:CFG3
  6.804                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[10]:Y (r)
               +     0.714          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBioIOI_5[10]
  7.518                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[0]:D (r)
                                    
  7.518                        data arrival time
  ________________________________________________________
  Data required time calculation
  8.000                        FCCC_1/GL1
               +     0.000          Clock source
  8.000                        FCCC_1/CCC_INST/INST_CCC_IP:GL1 (r)
               +     2.430          Clock generation
  10.430                       
               +     0.199          net: FCCC_1/GL1_net
  10.629                       FCCC_1/GL1_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  10.806                       FCCC_1/GL1_INST:YWn (f)
               +     0.606          net: FCCC_1/GL1_INST/U0_YWn
  11.412                       FCCC_1/GL1_INST/U0_RGB1_RGB0:An (f)
               +     0.316          cell: ADLIB:RGB
  11.728                       FCCC_1/GL1_INST/U0_RGB1_RGB0:YR (r)
               +     0.437          net: FCCC_1/GL1_INST/U0_RGB1_RGB0_rgbr_net_1
  12.165                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[0]:CLK (r)
               -     0.254          Library setup time: ADLIB:SLE
  11.911                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBol11/CORETSE_AHBooIOI[0]:D
                                    
  11.911                       data required time


END SET FCCC_2/GL0 to FCCC_1/GL1

----------------------------------------------------

Clock Domain FCCC_2/GL0

SET Register to Register

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBIi0II[3]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBlO1II[8]:D
  Delay (ns):                  4.499                                                                           
  Slack (ns):                  3.169                                                                           
  Arrival (ns):                8.794                                                                           
  Required (ns):               11.963                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         4.831                                                                           

Path 2
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBO011/CORETSE_AHBOlI1:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBO011/CORETSE_AHBOlI1:D
  Delay (ns):                  4.495                                                                           
  Slack (ns):                  3.185                                                                           
  Arrival (ns):                8.761                                                                           
  Required (ns):               11.946                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         4.815                                                                           

Path 3
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBiio[0]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBlO1II[8]:D
  Delay (ns):                  4.450                                                                           
  Slack (ns):                  3.209                                                                           
  Arrival (ns):                8.754                                                                           
  Required (ns):               11.963                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         4.791                                                                           

Path 4
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBIi0II[3]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBlO1II[9]:D
  Delay (ns):                  4.416                                                                           
  Slack (ns):                  3.244                                                                           
  Arrival (ns):                8.711                                                                           
  Required (ns):               11.955                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         4.756                                                                           

Path 5
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBiio[0]:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBlO1II[9]:D
  Delay (ns):                  4.367                                                                           
  Slack (ns):                  3.284                                                                           
  Arrival (ns):                8.671                                                                           
  Required (ns):               11.955                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         4.716                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBIi0II[3]:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBlO1II[8]:D
  data required time                             11.963    
  data arrival time                          -   8.794     
  slack                                          3.169     
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_2/GL0
               +     0.000          Clock source
  0.000                        FCCC_2/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.469          Clock generation
  2.469                        
               +     0.199          net: FCCC_2/GL0_net
  2.668                        FCCC_2/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  2.845                        FCCC_2/GL0_INST:YWn (f)
               +     0.612          net: FCCC_2/GL0_INST/U0_YWn
  3.457                        FCCC_2/GL0_INST/U0_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  3.773                        FCCC_2/GL0_INST/U0_RGB1:YR (r)
               +     0.522          net: FCCC_2/GL0_INST/U0_RGB1_YR
  4.295                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBIi0II[3]:CLK (r)
               +     0.087          cell: ADLIB:SLE
  4.382                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBIi0II[3]:Q (r)
               +     1.285          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBIi0II[3]
  5.667                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/CORETSE_AHBlo0oI_cnst_5_0_.m8_0:A (r)
               +     0.158          cell: ADLIB:CFG3
  5.825                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/CORETSE_AHBlo0oI_cnst_5_0_.m8_0:Y (r)
               +     0.784          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/N_1708_1
  6.609                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/un1_CORETSE_AHBIi0II[0]:A (r)
               +     0.202          cell: ADLIB:CFG3
  6.811                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/un1_CORETSE_AHBIi0II[0]:Y (r)
               +     0.601          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/un1_CORETSE_AHBIi0II[0]
  7.412                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/un1_CORETSE_AHBIi0II_RNI4L0M5[0]:A (r)
               +     0.143          cell: ADLIB:CFG4
  7.555                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/un1_CORETSE_AHBIi0II_RNI4L0M5[0]:Y (f)
               +     0.208          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/un1_N_3_mux_0
  7.763                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/CORETSE_AHBlo0oI238_1_0_0_RNIR553B[0]:D (f)
               +     0.347          cell: ADLIB:CFG4
  8.110                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/CORETSE_AHBlo0oI238_1_0_0_RNIR553B[0]:Y (r)
               +     0.452          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/un1_CORETSE_AHBlo0oI226
  8.562                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/CORETSE_AHBlo0oI_iv[7]:C (r)
               +     0.158          cell: ADLIB:CFG4
  8.720                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBo01II/CORETSE_AHBlo0oI_iv[7]:Y (r)
               +     0.074          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBIO1II[8]
  8.794                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBlO1II[8]:D (r)
                                    
  8.794                        data arrival time
  ________________________________________________________
  Data required time calculation
  8.000                        FCCC_2/GL0
               +     0.000          Clock source
  8.000                        FCCC_2/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.469          Clock generation
  10.469                       
               +     0.199          net: FCCC_2/GL0_net
  10.668                       FCCC_2/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  10.845                       FCCC_2/GL0_INST:YWn (f)
               +     0.611          net: FCCC_2/GL0_INST/U0_YWn
  11.456                       FCCC_2/GL0_INST/U0_RGB1_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  11.772                       FCCC_2/GL0_INST/U0_RGB1_RGB1:YR (r)
               +     0.445          net: FCCC_2/GL0_INST/U0_RGB1_RGB1_rgbr_net_1
  12.217                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBlO1II[8]:CLK (r)
               -     0.254          Library setup time: ADLIB:SLE
  11.963                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBlO1II[8]:D
                                    
  11.963                       data required time


END SET Register to Register

----------------------------------------------------

SET External Setup

No Path 

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path 

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlO0o:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBO011/CORETSE_AHBl1l1[8]:ALn
  Delay (ns):                  3.923                                                                           
  Slack (ns):                  3.686                                                                           
  Arrival (ns):                8.191                                                                           
  Required (ns):               11.877                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         4.314                                                                           
  Skew (ns):                   0.038                                                                           

Path 2
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlO0o:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBO011/CORETSE_AHBl1l1[1]:ALn
  Delay (ns):                  3.922                                                                           
  Slack (ns):                  3.687                                                                           
  Arrival (ns):                8.190                                                                           
  Required (ns):               11.877                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         4.313                                                                           
  Skew (ns):                   0.038                                                                           

Path 3
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlO0o:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBO011/CORETSE_AHBl1l1[13]:ALn
  Delay (ns):                  3.922                                                                           
  Slack (ns):                  3.687                                                                           
  Arrival (ns):                8.190                                                                           
  Required (ns):               11.877                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         4.313                                                                           
  Skew (ns):                   0.038                                                                           

Path 4
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlO0o:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBO011/CORETSE_AHBi101/CORETSE_AHBOoI1:ALn
  Delay (ns):                  3.921                                                                           
  Slack (ns):                  3.687                                                                           
  Arrival (ns):                8.189                                                                           
  Required (ns):               11.876                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         4.313                                                                           
  Skew (ns):                   0.039                                                                           

Path 5
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlO0o:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBO011/CORETSE_AHBioI1[5]:ALn
  Delay (ns):                  3.921                                                                           
  Slack (ns):                  3.687                                                                           
  Arrival (ns):                8.189                                                                           
  Required (ns):               11.876                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         4.313                                                                           
  Skew (ns):                   0.039                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlO0o:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBO011/CORETSE_AHBl1l1[8]:ALn
  data required time                             11.877    
  data arrival time                          -   8.191     
  slack                                          3.686     
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_2/GL0
               +     0.000          Clock source
  0.000                        FCCC_2/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.469          Clock generation
  2.469                        
               +     0.199          net: FCCC_2/GL0_net
  2.668                        FCCC_2/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  2.845                        FCCC_2/GL0_INST:YWn (f)
               +     0.598          net: FCCC_2/GL0_INST/U0_YWn
  3.443                        FCCC_2/GL0_INST/U0_RGB1_RGB9:An (f)
               +     0.316          cell: ADLIB:RGB
  3.759                        FCCC_2/GL0_INST/U0_RGB1_RGB9:YR (r)
               +     0.509          net: FCCC_2/GL0_INST/U0_RGB1_RGB9_rgbr_net_1
  4.268                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlO0o:CLK (r)
               +     0.108          cell: ADLIB:SLE
  4.376                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBlO0o:Q (f)
               +     0.051          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBlO0o
  4.427                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoO0o:C (f)
               +     0.315          cell: ADLIB:CFG4
  4.742                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoO0o:Y (r)
               +     1.572          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBoO0o
  6.314                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoO0o_RNIQ2P4:An (f)
               +     0.374          cell: ADLIB:GBM
  6.688                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011/CORETSE_AHBoO0o_RNIQ2P4:YWn (f)
               +     0.604          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBoO0o_RNIQ2P4/U0_YWn
  7.292                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBoO0o_RNIQ2P4/U0_RGB1_RGB8:An (f)
               +     0.316          cell: ADLIB:RGB
  7.608                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBoO0o_RNIQ2P4/U0_RGB1_RGB8:YR (r)
               +     0.583          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBi011_inst_1/CORETSE_AHBoO0o_RNIQ2P4/U0_RGB1_RGB8_rgbr_net_1
  8.191                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBO011/CORETSE_AHBl1l1[8]:ALn (r)
                                    
  8.191                        data arrival time
  ________________________________________________________
  Data required time calculation
  8.000                        FCCC_2/GL0
               +     0.000          Clock source
  8.000                        FCCC_2/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.469          Clock generation
  10.469                       
               +     0.199          net: FCCC_2/GL0_net
  10.668                       FCCC_2/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  10.845                       FCCC_2/GL0_INST:YWn (f)
               +     0.598          net: FCCC_2/GL0_INST/U0_YWn
  11.443                       FCCC_2/GL0_INST/U0_RGB1_RGB9:An (f)
               +     0.316          cell: ADLIB:RGB
  11.759                       FCCC_2/GL0_INST/U0_RGB1_RGB9:YR (r)
               +     0.471          net: FCCC_2/GL0_INST/U0_RGB1_RGB9_rgbr_net_1
  12.230                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBO011/CORETSE_AHBl1l1[8]:CLK (r)
               -     0.353          Library recovery time: ADLIB:SLE
  11.877                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBO011/CORETSE_AHBl1l1[8]:ALn
                                    
  11.877                       data required time


END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path 

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path 

END SET Asynchronous to Register

----------------------------------------------------

SET FCCC_0/GL0 to FCCC_2/GL0

No Path 

END SET FCCC_0/GL0 to FCCC_2/GL0

----------------------------------------------------

SET FCCC_1/GL0 to FCCC_2/GL0

No Path 

END SET FCCC_1/GL0 to FCCC_2/GL0

----------------------------------------------------

SET SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1] to FCCC_2/GL0

Path 1
  From:                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1]
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBIOI[0]:D
  Delay (ns):                  5.696                                                                           
  Slack (ns):                  6.278                                                                           
  Arrival (ns):                5.696                                                                           
  Required (ns):               11.974                                                                          
  Setup (ns):                  0.254                                                                           


Expanded Path 1
  From: SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1]
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBIOI[0]:D
  data required time                             11.974    
  data arrival time                          -   5.696     
  slack                                          6.278     
  ________________________________________________________
  Data arrival time calculation
  0.000                        SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]
               +     0.000          Clock source
  0.000                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1] (r)
               +     1.015          cell: ADLIB:SERDESIF_075_IP
  1.015                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_READY[1] (r)
               +     4.681          net: SERDES_IF2_0_EPCS_3_READY
  5.696                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBIOI[0]:D (r)
                                    
  5.696                        data arrival time
  ________________________________________________________
  Data required time calculation
  8.000                        FCCC_2/GL0
               +     0.000          Clock source
  8.000                        FCCC_2/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.469          Clock generation
  10.469                       
               +     0.199          net: FCCC_2/GL0_net
  10.668                       FCCC_2/GL0_INST:An (r)
               +     0.178          cell: ADLIB:GBM
  10.846                       FCCC_2/GL0_INST:YEn (f)
               +     0.641          net: FCCC_2/GL0_INST/U0_YWn_GEast
  11.487                       FCCC_2/GL0_INST/U0_RGB1_RGB14:An (f)
               +     0.316          cell: ADLIB:RGB
  11.803                       FCCC_2/GL0_INST/U0_RGB1_RGB14:YR (r)
               +     0.425          net: FCCC_2/GL0_INST/U0_RGB1_RGB14_rgbr_net_1
  12.228                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBIOI[0]:CLK (r)
               -     0.254          Library setup time: ADLIB:SLE
  11.974                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBIOI[0]:D
                                    
  11.974                       data required time


END SET SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1] to FCCC_2/GL0

----------------------------------------------------

SET FCCC_3/GL0 to FCCC_2/GL0

No Path 

END SET FCCC_3/GL0 to FCCC_2/GL0

----------------------------------------------------

SET FCCC_3/GL1 to FCCC_2/GL0

No Path 

END SET FCCC_3/GL1 to FCCC_2/GL0

----------------------------------------------------

Clock Domain FCCC_3/GL0

Info: The maximum frequency of this clock domain is limited by the minimum pulse widths of pin CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBoo0/CORETSE_AHBooOoI_CORETSE_AHBooOoI_0_6/INST_RAM1K18_IP:B_CLK

SET Register to Register

No Path 

END SET Register to Register

----------------------------------------------------

SET External Setup

No Path 

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path 

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path 

END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path 

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path 

END SET Asynchronous to Register

----------------------------------------------------

SET FCCC_0/GL0 to FCCC_3/GL0

No Path 

END SET FCCC_0/GL0 to FCCC_3/GL0

----------------------------------------------------

SET FCCC_1/GL0 to FCCC_3/GL0

No Path 

END SET FCCC_1/GL0 to FCCC_3/GL0

----------------------------------------------------

SET FCCC_2/GL0 to FCCC_3/GL0

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBo110:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBl1Oo/CORETSE_AHBIOlo/CORETSE_AHBoi1II:D
  Delay (ns):                  7.966                                                                           
  Slack (ns):                  7.494                                                                           
  Arrival (ns):                12.249                                                                          
  Required (ns):               19.743                                                                          
  Setup (ns):                  0.174                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBo110:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBl1Oo/CORETSE_AHBIOlo/CORETSE_AHBoi1II:D
  data required time                             19.743    
  data arrival time                          -   12.249    
  slack                                          7.494     
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_2/GL0
               +     0.000          Clock source
  0.000                        FCCC_2/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.469          Clock generation
  2.469                        
               +     0.199          net: FCCC_2/GL0_net
  2.668                        FCCC_2/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  2.845                        FCCC_2/GL0_INST:YWn (f)
               +     0.602          net: FCCC_2/GL0_INST/U0_YWn
  3.447                        FCCC_2/GL0_INST/U0_RGB1_RGB5:An (f)
               +     0.316          cell: ADLIB:RGB
  3.763                        FCCC_2/GL0_INST/U0_RGB1_RGB5:YR (r)
               +     0.520          net: FCCC_2/GL0_INST/U0_RGB1_RGB5_rgbr_net_1
  4.283                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBo110:CLK (r)
               +     0.108          cell: ADLIB:SLE
  4.391                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBo110:Q (f)
               +     0.730          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBo110
  5.121                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST6:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  5.493                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST6:Y (f)
               +     0.204          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net6
  5.697                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST5:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  6.069                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST5:Y (f)
               +     0.301          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net5
  6.370                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST4:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  6.742                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST4:Y (f)
               +     0.204          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net4
  6.946                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST3:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  7.318                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST3:Y (f)
               +     0.300          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net3
  7.618                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST2:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  7.990                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST2:Y (f)
               +     0.204          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net2
  8.194                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST1:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  8.566                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST1:Y (f)
               +     0.301          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net1
  8.867                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST0:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  9.239                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST0:Y (f)
               +     0.205          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net0
  9.444                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  9.816                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST:Y (f)
               +     0.793          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net
  10.609                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01:A (f)
               +     0.209          cell: ADLIB:CFG3
  10.818                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01:Y (f)
               +     1.431          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBll
  12.249                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBl1Oo/CORETSE_AHBIOlo/CORETSE_AHBoi1II:D (f)
                                    
  12.249                       data arrival time
  ________________________________________________________
  Data required time calculation
  8.000                        FCCC_3/GL0
               +     0.000          Clock source
  8.000                        FCCC_3/CCC_INST/INST_CCC_IP:GL0 (r)
               +     7.020          Clock generation
  15.020                       
               +     0.199          net: FCCC_3/GL0_net
  15.219                       FCCC_3/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  15.396                       FCCC_3/GL0_INST:YWn (f)
               +     0.613          net: FCCC_3/GL0_INST/U0_YWn
  16.009                       FCCC_3/GL0_INST/U0_RGB1:An (f)
               +     0.317          cell: ADLIB:RGB
  16.326                       FCCC_3/GL0_INST/U0_RGB1:YL (r)
               +     0.407          net: FCCC_3/FCCC_3_GL0
  16.733                       FCCC_3/CCC_INST/IP_INTERFACE_1:A (r)
               +     0.194          cell: ADLIB:IP_INTERFACE
  16.927                       FCCC_3/CCC_INST/IP_INTERFACE_1:IPA (r)
               +     0.000          net: FCCC_3/CCC_INST/CLK1_net
  16.927                       FCCC_3/CCC_INST/INST_CCC_IP:CLK1 (r)
               +     1.228          cell: ADLIB:CCC_IP
  18.155                       FCCC_3/CCC_INST/INST_CCC_IP:GL1 (r)
               +     0.198          net: FCCC_3/GL1_net
  18.353                       FCCC_3/GL1_INST:An (r)
               +     0.178          cell: ADLIB:GBM
  18.531                       FCCC_3/GL1_INST:YEn (f)
               +     0.619          net: FCCC_3/GL1_INST/U0_YWn_GEast
  19.150                       FCCC_3/GL1_INST/U0_RGB1_RGB24:An (f)
               +     0.317          cell: ADLIB:RGB
  19.467                       FCCC_3/GL1_INST/U0_RGB1_RGB24:YL (r)
               +     0.450          net: FCCC_3/GL1_INST/U0_RGB1_RGB24_rgbl_net_1
  19.917                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBl1Oo/CORETSE_AHBIOlo/CORETSE_AHBoi1II:CLK (r)
               -     0.174          Library setup time: ADLIB:SLE
  19.743                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBl1Oo/CORETSE_AHBIOlo/CORETSE_AHBoi1II:D
                                    
  19.743                       data required time


END SET FCCC_2/GL0 to FCCC_3/GL0

----------------------------------------------------

SET FCCC_3/GL1 to FCCC_3/GL0

No Path 

END SET FCCC_3/GL1 to FCCC_3/GL0

----------------------------------------------------

Clock Domain OSC_0/I_RCOSC_25_50MHZ/CLKOUT

SET Register to Register

Path 1
  From:                        CoreResetP_0/count_sdif0[7]:CLK
  To:                          CoreResetP_0/release_sdif0_core:EN
  Delay (ns):                  2.014                                                                           
  Slack (ns):                  17.555                                                                          
  Arrival (ns):                10.242                                                                          
  Required (ns):               27.797                                                                          
  Setup (ns):                  0.335                                                                           
  Minimum Period (ns):         2.445                                                                           

Path 2
  From:                        CoreResetP_0/count_sdif0[0]:CLK
  To:                          CoreResetP_0/count_sdif0[12]:D
  Delay (ns):                  2.019                                                                           
  Slack (ns):                  17.651                                                                          
  Arrival (ns):                10.218                                                                          
  Required (ns):               27.869                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         2.349                                                                           

Path 3
  From:                        CoreResetP_0/count_sdif0[9]:CLK
  To:                          CoreResetP_0/release_sdif0_core:EN
  Delay (ns):                  1.880                                                                           
  Slack (ns):                  17.689                                                                          
  Arrival (ns):                10.108                                                                          
  Required (ns):               27.797                                                                          
  Setup (ns):                  0.335                                                                           
  Minimum Period (ns):         2.311                                                                           

Path 4
  From:                        CoreResetP_0/count_sdif0[1]:CLK
  To:                          CoreResetP_0/count_sdif0[12]:D
  Delay (ns):                  1.939                                                                           
  Slack (ns):                  17.703                                                                          
  Arrival (ns):                10.166                                                                          
  Required (ns):               27.869                                                                          
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         2.297                                                                           

Path 5
  From:                        CoreResetP_0/count_sdif0[8]:CLK
  To:                          CoreResetP_0/release_sdif0_core:EN
  Delay (ns):                  1.871                                                                           
  Slack (ns):                  17.710                                                                          
  Arrival (ns):                10.087                                                                          
  Required (ns):               27.797                                                                          
  Setup (ns):                  0.335                                                                           
  Minimum Period (ns):         2.290                                                                           


Expanded Path 1
  From: CoreResetP_0/count_sdif0[7]:CLK
  To: CoreResetP_0/release_sdif0_core:EN
  data required time                             27.797    
  data arrival time                          -   10.242    
  slack                                          17.555    
  ________________________________________________________
  Data arrival time calculation
  0.000                        OSC_0/I_RCOSC_25_50MHZ/CLKOUT
               +     0.000          Clock source
  0.000                        OSC_0/I_RCOSC_25_50MHZ:CLKOUT (r)
               +     2.640          net: OSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC
  2.640                        OSC_0/I_RCOSC_25_50MHZ_FAB:A (r)
               +     0.152          cell: ADLIB:RCOSC_25_50MHZ_FAB
  2.792                        OSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT (r)
               +     3.603          net: OSC_0/N_RCOSC_25_50MHZ_CLKINT
  6.395                        OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An (f)
               +     0.374          cell: ADLIB:GBM
  6.769                        OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn (f)
               +     0.595          net: OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast
  7.364                        OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  7.680                        OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YR (r)
               +     0.548          net: OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_YR
  8.228                        CoreResetP_0/count_sdif0[7]:CLK (r)
               +     0.087          cell: ADLIB:SLE
  8.315                        CoreResetP_0/count_sdif0[7]:Q (r)
               +     0.662          net: CoreResetP_0/count_sdif0[7]
  8.977                        CoreResetP_0/release_sdif0_core4_7:B (r)
               +     0.143          cell: ADLIB:CFG4
  9.120                        CoreResetP_0/release_sdif0_core4_7:Y (f)
               +     0.300          net: CoreResetP_0/release_sdif0_core4_7
  9.420                        CoreResetP_0/release_sdif0_core4:B (f)
               +     0.287          cell: ADLIB:CFG4
  9.707                        CoreResetP_0/release_sdif0_core4:Y (f)
               +     0.535          net: CoreResetP_0/release_sdif0_core4
  10.242                       CoreResetP_0/release_sdif0_core:EN (f)
                                    
  10.242                       data arrival time
  ________________________________________________________
  Data required time calculation
  20.000                       OSC_0/I_RCOSC_25_50MHZ/CLKOUT
               +     0.000          Clock source
  20.000                       OSC_0/I_RCOSC_25_50MHZ:CLKOUT (r)
               +     2.640          net: OSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC
  22.640                       OSC_0/I_RCOSC_25_50MHZ_FAB:A (r)
               +     0.152          cell: ADLIB:RCOSC_25_50MHZ_FAB
  22.792                       OSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT (r)
               +     3.603          net: OSC_0/N_RCOSC_25_50MHZ_CLKINT
  26.395                       OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An (f)
               +     0.374          cell: ADLIB:GBM
  26.769                       OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn (f)
               +     0.595          net: OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast
  27.364                       OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  27.680                       OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YR (r)
               +     0.452          net: OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_YR
  28.132                       CoreResetP_0/release_sdif0_core:CLK (r)
               -     0.335          Library setup time: ADLIB:SLE
  27.797                       CoreResetP_0/release_sdif0_core:EN
                                    
  27.797                       data required time


END SET Register to Register

----------------------------------------------------

SET External Setup

No Path 

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path 

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

Path 1
  From:                        CoreResetP_0/sm0_areset_n_rcosc:CLK
  To:                          CoreResetP_0/ddr_settled:ALn
  Delay (ns):                  1.418                                                                           
  Slack (ns):                  18.157                                                                          
  Arrival (ns):                9.613                                                                           
  Required (ns):               27.770                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         1.843                                                                           
  Skew (ns):                   0.072                                                                           

Path 2
  From:                        CoreResetP_0/sm0_areset_n_rcosc:CLK
  To:                          CoreResetP_0/count_sdif0_enable_rcosc:ALn
  Delay (ns):                  1.418                                                                           
  Slack (ns):                  18.157                                                                          
  Arrival (ns):                9.613                                                                           
  Required (ns):               27.770                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         1.843                                                                           
  Skew (ns):                   0.072                                                                           

Path 3
  From:                        CoreResetP_0/sm0_areset_n_rcosc:CLK
  To:                          CoreResetP_0/count_sdif0_enable_q1:ALn
  Delay (ns):                  1.418                                                                           
  Slack (ns):                  18.158                                                                          
  Arrival (ns):                9.613                                                                           
  Required (ns):               27.771                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         1.842                                                                           
  Skew (ns):                   0.071                                                                           

Path 4
  From:                        CoreResetP_0/sdif0_areset_n_rcosc:CLK
  To:                          CoreResetP_0/count_sdif0[12]:ALn
  Delay (ns):                  1.175                                                                           
  Slack (ns):                  18.425                                                                          
  Arrival (ns):                9.345                                                                           
  Required (ns):               27.770                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         1.575                                                                           
  Skew (ns):                   0.047                                                                           

Path 5
  From:                        CoreResetP_0/sdif0_areset_n_rcosc:CLK
  To:                          CoreResetP_0/release_sdif0_core:ALn
  Delay (ns):                  1.176                                                                           
  Slack (ns):                  18.433                                                                          
  Arrival (ns):                9.346                                                                           
  Required (ns):               27.779                                                                          
  Recovery (ns):               0.353                                                                           
  Minimum Period (ns):         1.567                                                                           
  Skew (ns):                   0.038                                                                           


Expanded Path 1
  From: CoreResetP_0/sm0_areset_n_rcosc:CLK
  To: CoreResetP_0/ddr_settled:ALn
  data required time                             27.770    
  data arrival time                          -   9.613     
  slack                                          18.157    
  ________________________________________________________
  Data arrival time calculation
  0.000                        OSC_0/I_RCOSC_25_50MHZ/CLKOUT
               +     0.000          Clock source
  0.000                        OSC_0/I_RCOSC_25_50MHZ:CLKOUT (r)
               +     2.640          net: OSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC
  2.640                        OSC_0/I_RCOSC_25_50MHZ_FAB:A (r)
               +     0.152          cell: ADLIB:RCOSC_25_50MHZ_FAB
  2.792                        OSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT (r)
               +     3.603          net: OSC_0/N_RCOSC_25_50MHZ_CLKINT
  6.395                        OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An (f)
               +     0.374          cell: ADLIB:GBM
  6.769                        OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn (f)
               +     0.592          net: OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast
  7.361                        OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  7.677                        OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_RGB1:YR (r)
               +     0.518          net: OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_RGB1_rgbr_net_1
  8.195                        CoreResetP_0/sm0_areset_n_rcosc:CLK (r)
               +     0.087          cell: ADLIB:SLE
  8.282                        CoreResetP_0/sm0_areset_n_rcosc:Q (r)
               +     1.331          net: CoreResetP_0/sm0_areset_n_rcosc
  9.613                        CoreResetP_0/ddr_settled:ALn (r)
                                    
  9.613                        data arrival time
  ________________________________________________________
  Data required time calculation
  20.000                       OSC_0/I_RCOSC_25_50MHZ/CLKOUT
               +     0.000          Clock source
  20.000                       OSC_0/I_RCOSC_25_50MHZ:CLKOUT (r)
               +     2.640          net: OSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC
  22.640                       OSC_0/I_RCOSC_25_50MHZ_FAB:A (r)
               +     0.152          cell: ADLIB:RCOSC_25_50MHZ_FAB
  22.792                       OSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT (r)
               +     3.603          net: OSC_0/N_RCOSC_25_50MHZ_CLKINT
  26.395                       OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An (f)
               +     0.374          cell: ADLIB:GBM
  26.769                       OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn (f)
               +     0.595          net: OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast
  27.364                       OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  27.680                       OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YR (r)
               +     0.443          net: OSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_YR
  28.123                       CoreResetP_0/ddr_settled:CLK (r)
               -     0.353          Library recovery time: ADLIB:SLE
  27.770                       CoreResetP_0/ddr_settled:ALn
                                    
  27.770                       data required time


END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path 

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path 

END SET Asynchronous to Register

----------------------------------------------------

SET FCCC_0/GL0 to OSC_0/I_RCOSC_25_50MHZ/CLKOUT

No Path 

END SET FCCC_0/GL0 to OSC_0/I_RCOSC_25_50MHZ/CLKOUT

----------------------------------------------------

Clock Domain CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB

SET Register to Register

Path 1
  From:                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB
  To:                          CoreConfigP_0/FIC_2_APB_M_PREADY:EN
  Delay (ns):                  4.614                                                                           
  Slack (ns):                  0.305                                                                           
  Arrival (ns):                4.614                                                                           
  Required (ns):               4.919                                                                           
  Setup (ns):                  0.335                                                                           
  Minimum Period (ns):         -0.305                                                                          

Path 2
  From:                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB
  To:                          CoreConfigP_0/control_reg_1[1]:EN
  Delay (ns):                  4.321                                                                           
  Slack (ns):                  0.575                                                                           
  Arrival (ns):                4.321                                                                           
  Required (ns):               4.896                                                                           
  Setup (ns):                  0.335                                                                           
  Minimum Period (ns):         -0.575                                                                          

Path 3
  From:                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB
  To:                          CoreConfigP_0/control_reg_1[0]:EN
  Delay (ns):                  4.321                                                                           
  Slack (ns):                  0.585                                                                           
  Arrival (ns):                4.321                                                                           
  Required (ns):               4.906                                                                           
  Setup (ns):                  0.335                                                                           
  Minimum Period (ns):         -0.585                                                                          

Path 4
  From:                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB
  To:                          CoreConfigP_0/state[0]:D
  Delay (ns):                  3.190                                                                           
  Slack (ns):                  1.802                                                                           
  Arrival (ns):                3.190                                                                           
  Required (ns):               4.992                                                                           
  Setup (ns):                  0.254                                                                           
  Minimum Period (ns):         -1.802                                                                          

Path 5
  From:                        CoreConfigP_0/psel:CLK
  To:                          SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:APB_PSEL
  Delay (ns):                  6.994                                                                           
  Slack (ns):                  30.283                                                                          
  Arrival (ns):                12.485                                                                          
  Required (ns):               42.768                                                                          
  Setup (ns):                  2.663                                                                           
  Minimum Period (ns):         19.434                                                                          


Expanded Path 1
  From: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB
  To: CoreConfigP_0/FIC_2_APB_M_PREADY:EN
  data required time                             4.919     
  data arrival time                          -   4.614     
  slack                                          0.305     
  ________________________________________________________
  Data arrival time calculation
  0.000                        CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB
               +     0.000          Clock source
  0.000                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB (r)
               +     0.849          cell: ADLIB:MSS_075_IP
  0.849                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:PER2_FABRIC_PENABLE (r)
               +     1.340          net: CoreTSE_Webserver_MSS_0_FIC_2_APB_MASTER_PENABLE
  2.189                        mdr_CoreConfigP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0_i_o3_CFG1A_TEST:A (r)
               +     0.074          cell: ADLIB:CFG1A_TEST
  2.263                        mdr_CoreConfigP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0_i_o3_CFG1A_TEST:Y (r)
               +     0.353          net: mdr_CoreConfigP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0_i_o3_CFG1A_TEST_net
  2.616                        CoreConfigP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0_i_o3:A (r)
               +     0.074          cell: ADLIB:CFG3
  2.690                        CoreConfigP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0_i_o3:Y (r)
               +     0.243          net: CoreConfigP_0/N_1597
  2.933                        CoreConfigP_0/FIC_2_APB_M_PREADY_RNO:C (r)
               +     0.225          cell: ADLIB:CFG4
  3.158                        CoreConfigP_0/FIC_2_APB_M_PREADY_RNO:Y (f)
               +     1.456          net: CoreConfigP_0/N_13_i_0
  4.614                        CoreConfigP_0/FIC_2_APB_M_PREADY:EN (f)
                                    
  4.614                        data arrival time
  ________________________________________________________
  Data required time calculation
  0.000                        CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB
               +     0.000          Clock source
  0.000                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB (r)
               +     3.474          net: CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB
  3.474                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8:An (f)
               +     0.374          cell: ADLIB:GBM
  3.848                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8:YEn (f)
               +     0.615          net: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_YWn_GEast
  4.463                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_RGB1_RGB0:An (f)
               +     0.316          cell: ADLIB:RGB
  4.779                        CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_RGB1_RGB0:YR (r)
               +     0.475          net: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_RGB1_RGB0_rgbr_net_1
  5.254                        CoreConfigP_0/FIC_2_APB_M_PREADY:CLK (r)
               -     0.335          Library setup time: ADLIB:SLE
  4.919                        CoreConfigP_0/FIC_2_APB_M_PREADY:EN
                                    
  4.919                        data required time


END SET Register to Register

----------------------------------------------------

SET External Setup

No Path 

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path 

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path 

END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path 

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path 

END SET Asynchronous to Register

----------------------------------------------------

SET FCCC_0/GL0 to CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB

Path 1
  From:                        CoreResetP_0/INIT_DONE_int:CLK
  To:                          CoreConfigP_0/INIT_DONE_q1:D
  Delay (ns):                  0.948                                                                           
  Slack (ns):                  18.780                                                                          
  Arrival (ns):                6.197                                                                           
  Required (ns):               24.977                                                                          
  Setup (ns):                  0.254                                                                           

Path 2
  From:                        CoreResetP_0/SDIF_RELEASED_int:CLK
  To:                          CoreConfigP_0/SDIF_RELEASED_q1:D
  Delay (ns):                  0.843                                                                           
  Slack (ns):                  18.905                                                                          
  Arrival (ns):                6.082                                                                           
  Required (ns):               24.987                                                                          
  Setup (ns):                  0.254                                                                           


Expanded Path 1
  From: CoreResetP_0/INIT_DONE_int:CLK
  To: CoreConfigP_0/INIT_DONE_q1:D
  data required time                             24.977    
  data arrival time                          -   6.197     
  slack                                          18.780    
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_0/GL0
               +     0.000          Clock source
  0.000                        FCCC_0/CCC_INST/INST_CCC_IP:GL0 (r)
               +     3.397          Clock generation
  3.397                        
               +     0.198          net: FCCC_0/GL0_net
  3.595                        FCCC_0/GL0_INST:An (r)
               +     0.178          cell: ADLIB:GBM
  3.773                        FCCC_0/GL0_INST:YEn (f)
               +     0.629          net: FCCC_0/GL0_INST/U0_YWn_GEast
  4.402                        FCCC_0/GL0_INST/U0_RGB1_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  4.718                        FCCC_0/GL0_INST/U0_RGB1_RGB1:YR (r)
               +     0.531          net: FCCC_0/GL0_INST/U0_RGB1_RGB1_rgbr_net_1
  5.249                        CoreResetP_0/INIT_DONE_int:CLK (r)
               +     0.087          cell: ADLIB:SLE
  5.336                        CoreResetP_0/INIT_DONE_int:Q (r)
               +     0.861          net: CoreResetP_0_INIT_DONE
  6.197                        CoreConfigP_0/INIT_DONE_q1:D (r)
                                    
  6.197                        data arrival time
  ________________________________________________________
  Data required time calculation
  20.000                       CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB
               +     0.000          Clock source
  20.000                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB (r)
               +     3.474          net: CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB
  23.474                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8:An (f)
               +     0.374          cell: ADLIB:GBM
  23.848                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8:YEn (f)
               +     0.625          net: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_YWn_GEast
  24.473                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_RGB1:An (f)
               +     0.316          cell: ADLIB:RGB
  24.789                       CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_RGB1:YR (r)
               +     0.442          net: CoreTSE_Webserver_MSS_0/MSS_ADLIB_INST_RNI3KN8/U0_RGB1_YR
  25.231                       CoreConfigP_0/INIT_DONE_q1:CLK (r)
               -     0.254          Library setup time: ADLIB:SLE
  24.977                       CoreConfigP_0/INIT_DONE_q1:D
                                    
  24.977                       data required time


END SET FCCC_0/GL0 to CoreTSE_Webserver_MSS_0/CLK_CONFIG_APB

----------------------------------------------------

Clock Domain SERDES_IF2_0/SERDESIF_INST/EPCS_RXCLK[1]

Info: The maximum frequency of this clock domain is limited by the period of pin SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_RXCLK[1]

SET Register to Register

No Path 

END SET Register to Register

----------------------------------------------------

SET External Setup

No Path 

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path 

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path 

END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path 

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path 

END SET Asynchronous to Register

----------------------------------------------------

Clock Domain SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]

Info: The maximum frequency of this clock domain is limited by the period of pin SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1]

SET Register to Register

No Path 

END SET Register to Register

----------------------------------------------------

SET External Setup

No Path 

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path 

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path 

END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path 

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path 

END SET Asynchronous to Register

----------------------------------------------------

SET FCCC_2/GL0 to SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[0]:CLK
  To:                          SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[20]
  Delay (ns):                  5.541                                                                           
  Slack (ns):                  4.014                                                                           
  Arrival (ns):                9.822                                                                           
  Required (ns):               13.836                                                                          
  Setup (ns):                  2.164                                                                           

Path 2
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[4]:CLK
  To:                          SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[24]
  Delay (ns):                  5.506                                                                           
  Slack (ns):                  4.079                                                                           
  Arrival (ns):                9.787                                                                           
  Required (ns):               13.866                                                                          
  Setup (ns):                  2.134                                                                           

Path 3
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[2]:CLK
  To:                          SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[22]
  Delay (ns):                  5.441                                                                           
  Slack (ns):                  4.174                                                                           
  Arrival (ns):                9.722                                                                           
  Required (ns):               13.896                                                                          
  Setup (ns):                  2.104                                                                           

Path 4
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[3]:CLK
  To:                          SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[23]
  Delay (ns):                  5.369                                                                           
  Slack (ns):                  4.226                                                                           
  Arrival (ns):                9.628                                                                           
  Required (ns):               13.854                                                                          
  Setup (ns):                  2.146                                                                           

Path 5
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[7]:CLK
  To:                          SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[27]
  Delay (ns):                  5.438                                                                           
  Slack (ns):                  4.238                                                                           
  Arrival (ns):                9.698                                                                           
  Required (ns):               13.936                                                                          
  Setup (ns):                  2.064                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[0]:CLK
  To: SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[20]
  data required time                             13.836    
  data arrival time                          -   9.822     
  slack                                          4.014     
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_2/GL0
               +     0.000          Clock source
  0.000                        FCCC_2/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.469          Clock generation
  2.469                        
               +     0.199          net: FCCC_2/GL0_net
  2.668                        FCCC_2/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  2.845                        FCCC_2/GL0_INST:YWn (f)
               +     0.603          net: FCCC_2/GL0_INST/U0_YWn
  3.448                        FCCC_2/GL0_INST/U0_RGB1_RGB3:An (f)
               +     0.316          cell: ADLIB:RGB
  3.764                        FCCC_2/GL0_INST/U0_RGB1_RGB3:YR (r)
               +     0.517          net: FCCC_2/GL0_INST/U0_RGB1_RGB3_rgbr_net_1
  4.281                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[0]:CLK (r)
               +     0.108          cell: ADLIB:SLE
  4.389                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBI0i0[0]:Q (f)
               +     0.718          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBI0i0[0]
  5.107                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBol1[0]:D (f)
               +     0.296          cell: ADLIB:CFG4
  5.403                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBIoi0/CORETSE_AHBiI11/CORETSE_AHBol1[0]:Y (f)
               +     4.134          net: CORETSE_AHB_0_TCG[0]
  9.537                        SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_200:B (f)
               +     0.224          cell: ADLIB:IP_INTERFACE
  9.761                        SERDES_IF2_0/SERDESIF_INST/IP_INTERFACE_200:IPB (f)
               +     0.061          net: SERDES_IF2_0/SERDESIF_INST/EPCS_TXDATA_net[20]
  9.822                        SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[20] (f)
                                    
  9.822                        data arrival time
  ________________________________________________________
  Data required time calculation
  16.000                       SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]
               +     0.000          Clock source
  16.000                       SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXCLK[1] (r)
               -     2.164          Library setup time: ADLIB:SERDESIF_075_IP
  13.836                       SERDES_IF2_0/SERDESIF_INST/INST_SERDESIF_IP:EPCS_TXDATA[20]
                                    
  13.836                       data required time


END SET FCCC_2/GL0 to SERDES_IF2_0/SERDESIF_INST/EPCS_TXCLK[1]

----------------------------------------------------

Clock Domain FCCC_3/GL1

Info: The maximum frequency of this clock domain is limited by the minimum pulse widths of pin CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBoo0/CORETSE_AHBooOoI_CORETSE_AHBooOoI_0_6/INST_RAM1K18_IP:B_CLK

SET Register to Register

No Path 

END SET Register to Register

----------------------------------------------------

SET External Setup

No Path 

END SET External Setup

----------------------------------------------------

SET Clock to Output

No Path 

END SET Clock to Output

----------------------------------------------------

SET Register to Asynchronous

No Path 

END SET Register to Asynchronous

----------------------------------------------------

SET External Recovery

No Path 

END SET External Recovery

----------------------------------------------------

SET Asynchronous to Register

No Path 

END SET Asynchronous to Register

----------------------------------------------------

SET FCCC_0/GL0 to FCCC_3/GL1

No Path 

END SET FCCC_0/GL0 to FCCC_3/GL1

----------------------------------------------------

SET FCCC_1/GL0 to FCCC_3/GL1

No Path 

END SET FCCC_1/GL0 to FCCC_3/GL1

----------------------------------------------------

SET FCCC_2/GL0 to FCCC_3/GL1

Path 1
  From:                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBo110:CLK
  To:                          CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBl1Oo/CORETSE_AHBIOlo/CORETSE_AHBoi1II:D
  Delay (ns):                  7.966                                                                           
  Slack (ns):                  7.494                                                                           
  Arrival (ns):                12.249                                                                          
  Required (ns):               19.743                                                                          
  Setup (ns):                  0.174                                                                           


Expanded Path 1
  From: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBo110:CLK
  To: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBl1Oo/CORETSE_AHBIOlo/CORETSE_AHBoi1II:D
  data required time                             19.743    
  data arrival time                          -   12.249    
  slack                                          7.494     
  ________________________________________________________
  Data arrival time calculation
  0.000                        FCCC_2/GL0
               +     0.000          Clock source
  0.000                        FCCC_2/CCC_INST/INST_CCC_IP:GL0 (r)
               +     2.469          Clock generation
  2.469                        
               +     0.199          net: FCCC_2/GL0_net
  2.668                        FCCC_2/GL0_INST:An (r)
               +     0.177          cell: ADLIB:GBM
  2.845                        FCCC_2/GL0_INST:YWn (f)
               +     0.602          net: FCCC_2/GL0_INST/U0_YWn
  3.447                        FCCC_2/GL0_INST/U0_RGB1_RGB5:An (f)
               +     0.316          cell: ADLIB:RGB
  3.763                        FCCC_2/GL0_INST/U0_RGB1_RGB5:YR (r)
               +     0.520          net: FCCC_2/GL0_INST/U0_RGB1_RGB5_rgbr_net_1
  4.283                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBo110:CLK (r)
               +     0.108          cell: ADLIB:SLE
  4.391                        CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBOoi0/CORETSE_AHBo110:Q (f)
               +     0.730          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBo110
  5.121                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST6:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  5.493                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST6:Y (f)
               +     0.204          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net6
  5.697                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST5:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  6.069                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST5:Y (f)
               +     0.301          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net5
  6.370                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST4:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  6.742                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST4:Y (f)
               +     0.204          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net4
  6.946                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST3:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  7.318                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST3:Y (f)
               +     0.300          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net3
  7.618                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST2:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  7.990                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST2:Y (f)
               +     0.204          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net2
  8.194                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST1:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  8.566                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST1:Y (f)
               +     0.301          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net1
  8.867                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST0:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  9.239                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST0:Y (f)
               +     0.205          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net0
  9.444                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST:A (f)
               +     0.372          cell: ADLIB:CFG1D_TEST
  9.816                        mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST:Y (f)
               +     0.793          net: mdr_CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0_CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01_CFG1D_TEST_net
  10.609                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01:A (f)
               +     0.209          cell: ADLIB:CFG3
  10.818                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBio0.CORETSE_AHBOi0/CORETSE_AHBlOO1/CORETSE_AHBO01:Y (f)
               +     1.431          net: CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBll
  12.249                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBl1Oo/CORETSE_AHBIOlo/CORETSE_AHBoi1II:D (f)
                                    
  12.249                       data arrival time
  ________________________________________________________
  Data required time calculation
  8.000                        FCCC_3/GL1
               +     0.000          Clock source
  8.000                        FCCC_3/CCC_INST/INST_CCC_IP:GL1 (r)
               +    10.155          Clock generation
  18.155                       
               +     0.198          net: FCCC_3/GL1_net
  18.353                       FCCC_3/GL1_INST:An (r)
               +     0.178          cell: ADLIB:GBM
  18.531                       FCCC_3/GL1_INST:YEn (f)
               +     0.619          net: FCCC_3/GL1_INST/U0_YWn_GEast
  19.150                       FCCC_3/GL1_INST/U0_RGB1_RGB24:An (f)
               +     0.317          cell: ADLIB:RGB
  19.467                       FCCC_3/GL1_INST/U0_RGB1_RGB24:YL (r)
               +     0.450          net: FCCC_3/GL1_INST/U0_RGB1_RGB24_rgbl_net_1
  19.917                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBl1Oo/CORETSE_AHBIOlo/CORETSE_AHBoi1II:CLK (r)
               -     0.174          Library setup time: ADLIB:SLE
  19.743                       CORETSE_AHB_0/CoreTSE_top_inst/CORETSE_AHBilI/CORETSE_AHBiOooI/CORETSE_AHBl1Oo/CORETSE_AHBIOlo/CORETSE_AHBoi1II:D
                                    
  19.743                       data required time


END SET FCCC_2/GL0 to FCCC_3/GL1

----------------------------------------------------

SET FCCC_3/GL0 to FCCC_3/GL1

No Path 

END SET FCCC_3/GL0 to FCCC_3/GL1

----------------------------------------------------

Path set Pin to Pin

SET Input to Output

No Path 

END SET Input to Output

----------------------------------------------------

Path set User Sets

