
*******************************************
       Libero SoC, MSS and IP Core VERSIONS
*******************************************

This design was tested with the following: 
	Libero SoC Version: 11.8
	SOftConsole Version 4.0
	MSS Version: 1.1.500
	


******************************************
     DESIGN FILE DIRECTORY STRUCTURE
******************************************


SF2_DDR_EDAC_DF
    |
    |
    |---DDR_EDAC
    |      |
    |      |--LiberoProject files
    |      
    |
    |---DDR Configuration File
    |      |
    |      |
    |      |---EDAC_DDR3_config
    |
    |     
    |
    |---GUI Executable
    |	   
    |
    |---Programming File
    |      |
    |      |--EDAC_DDR3.stp
    |
    |---Readme.txt
    




DDR Configuration File
==================================
This folder consists the DDR configuration files to import the register configurations for the MDDR for accessing the DDR3 at 333 MHz 

DDR_EDAC
==================================
LiberoProject files

For reference, the final Libero SoC Verilog project of this demo is given under this folder. 
The designs are created for SmartFusion2 M2S150 Advanced development Board.

GUI Executable
==================================
This folder consists the Host PC application to run the design.


Programming Files
============================
This folder consists the programming file along with the embedded application client.





