
########			REPORT FOR HIGH FANOUT NETS			########

CLOCK GLOBAL THRESHOLD - 2
ASYNC GLOBAL THRESHOLD - 12
GLOBAL THRESHOLD - 5000

NET NAME                                                      CLOCK LOADS     ASYNC RST LOADS     DATA LOADS     TOTAL FANOUT     GLOBAL BUFFER PRESENT
-------------------------------------------------------------------------------------------------------------------------------------------------------
SERDES_EPCS_0_EPCS_2_RX_CLK                                   2065            0                   0              2065             YES                  
SERDES_EPCS_0_EPCS_2_TX_CLK_0                                 595             0                   0              595              YES                  
SF2_JESD204B_DEMO_sb_0_INIT_APB_S_PCLK                        109             0                   0              109              YES                  
CLKINT_0_Y                                                    93              0                   0              93               YES                  
SF2_JESD204B_DEMO_sb_0.FABOSC_0_RCOSC_25_50MHZ_O2F            30              0                   0              30               YES                  
CoreJESD204BRX_0.lane_syncd_rst_n_arst                        0               682                 0              682              YES                  
CoreJESD204BTX_0.lane_syncd_rst_n_arst                        0               314                 0              314              YES                  
EPCS_2_RX_RESET_N_arst                                        0               119                 0              119              YES                  
SF2_JESD204B_DEMO_sb_0.FIC_2_APB_M_PRESET_N_arst              0               110                 0              110              YES                  
EPCS_2_TX_RESET_N_arst                                        0               100                 0              100              YES                  
CoreJESD204BRX_0.epcs_rxclk_rxvalid_sync_f2_arst0             0               46                  0              46               YES                  
CoreJESD204BTX_0.epcs_txclk_txstbl_sync_f2[0]                 0               44                  0              44               YES                  
SF2_JESD204B_DEMO_sb_0.CORERESETP_0.sm0_areset_n_clk_base     0               25                  0              25               YES                  
SF2_JESD204B_DEMO_sb_0.CORERESETP_0.sm0_areset_n_arst         0               14                  0              14               YES                  
SF2_JESD204B_DEMO_sb_0.CORERESETP_0.sdif0_areset_n_rcosc      0               14                  0              14               YES                  
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