Microsemi Corporation - Microsemi Libero Software Release v12.6 (Version 12.900.20.24)

Date      :  Sun Mar 28 21:01:18 2021
Project   :  C:\JUNK\m2s_dg0611_liberov11p8_df\liberodesign\Libero_Project
Component :  top
Family    :  SmartFusion2


HDL source files for all Synthesis and Simulation tools:
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/ADJ_BUF.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/ADJ_CTRL.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/CGS.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/CLOCK_GEN_RX.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/RESET_SYNC.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/CoreJESD204BRX.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/DEC_DATA.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/DEC_ERR.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/DEC_WA.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/DESCRAMBLER.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/EB_CTRL.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/FADM_OR.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/FL_AMC.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/IFS_POS.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/ILA_FSM.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/JESD204BRX_LANE.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/LABDM.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/LINK_COMP.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/RX_CTRL.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/SYNC_ENC.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/SYNC_FSM.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/WORD_ALIGNER.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/DECODER_L.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/DECODER_U.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/DEC_RD_L.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/DEC_RD_U.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/DATA_SYNC_BUF.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/WORD_SHIFT.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/coreparameters.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/DATA_CAPTURE.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BRX/3.3.104/rtl/vlog/core/EB_RAM_RTL.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/CLOCK_GEN_TX.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/RESET_SYNC.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/CoreJESD204BTX.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/ENC_D.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/ENC_FLIP.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/ENC_K.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/JESD204BTX_LANE.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/MUX4X1.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/MUX32X1.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/MUX32X6.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/PHASE_CHECK.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/SCRAMBLER.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/SYNC_DEC.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/TX_ACG.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/TX_CTRL.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/TX_ILA.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/BUF_DATA.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/DATA_SYNC_BUF_TX.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/ENCODER_L.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/ENCODER_N.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/ENCODER_U.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/ENCODER_64B80B.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/coreparameters.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreJESD204BTX/3.1.105/rtl/vlog/core/DATA_CAPTURE.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/top/TPSRAM_0/top_TPSRAM_0_TPSRAM.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/top/TPSRAM_1/top_TPSRAM_1_TPSRAM.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/top/top.v

Stimulus files for all Simulation tools:
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/top/subsystem.bfm
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/top/subsystem.bfm

