Microsemi Corporation - Microsemi Libero Software Release v12.6 (Version 12.900.20.24)

Date      :  Sun Mar 28 20:59:28 2021
Project   :  C:\JUNK\m2s_dg0611_liberov11p8_df\liberodesign\Libero_Project
Component :  SF2_JESD204B_DEMO_sb
Family    :  SmartFusion2


HDL source files for all Synthesis and Simulation tools:
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb/SF2_JESD204B_DEMO_sb.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb/SF2_JESD204B_DEMO_sb.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb/CCC_0/SF2_JESD204B_DEMO_sb_CCC_0_FCCC.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreAPB3/4.1.100/rtl/vlog/core/coreapb3.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreAPB3/4.1.100/rtl/vlog/core/coreapb3_muxptob3.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreAPB3/4.1.100/rtl/vlog/core/coreapb3_iaddr_reg.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreConfigP/7.1.100/rtl/vlog/core/coreconfigp.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreResetP/7.1.100/rtl/vlog/core/coreresetp.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/DirectCore/CoreResetP/7.1.100/rtl/vlog/core/coreresetp_pcie_hotreset.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb/FABOSC_0/SF2_JESD204B_DEMO_sb_FABOSC_0_OSC.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb/SF2_JESD204B_DEMO_sb.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb_MSS/SF2_JESD204B_DEMO_sb_MSS.v

HDL source files for Synopsys SynplifyPro Synthesis tool:
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/SgCore/OSC/2.0.101/osc_comps.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb_MSS/SF2_JESD204B_DEMO_sb_MSS_syn.v

HDL source files for Mentor Precision Synthesis tool:
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/SgCore/OSC/2.0.101/osc_comps_pre.v
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb_MSS/SF2_JESD204B_DEMO_sb_MSS_pre.v

Stimulus files for all Simulation tools:
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb_MSS/CM3_compile_bfm.tcl
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb_MSS/user.bfm
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb_MSS/test.bfm
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/Actel/SmartFusion2MSS/MSS/1.1.500/peripheral_init.bfm

Firmware files for all Software IDE tools:
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb_MSS/sys_config_mss_clocks.h

Configuration files to be used for Programming:
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb_MSS/ENVM.cfg

Configuration files to be used for all Simulation tools:
    C:/JUNK/m2s_dg0611_liberov11p8_df/liberodesign/Libero_Project/component/work/SF2_JESD204B_DEMO_sb_MSS/ENVM.cfg

