@N|Running in 64-bit mode
@N|Running in 64-bit mode
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\hdl\AHB_IF.v":21:7:21:12|Synthesizing module AHB_IF
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\hdl\AXI_MASTER_TO_SLAVE1.v":21:7:21:26|Synthesizing module AXI_MASTER_TO_SLAVE1
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\hdl\AXI_Slave.v":22:7:22:15|Synthesizing module AXI_Slave
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\hdl\Debounce.v":20:8:20:15|Synthesizing module DEBOUNCE
@N: CG179 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\hdl\Debounce.v":81:18:81:26|Removing redundant assignment
@N: CG364 :"D:\Libero_SoC_11_7\Synplify\lib\generic\smartfusion2.v":362:7:362:12|Synthesizing module CLKINT
@N: CG364 :"D:\Libero_SoC_11_7\Synplify\lib\generic\smartfusion2.v":376:7:376:9|Synthesizing module VCC
@N: CG364 :"D:\Libero_SoC_11_7\Synplify\lib\generic\smartfusion2.v":372:7:372:9|Synthesizing module GND
@N: CG364 :"D:\Libero_SoC_11_7\Synplify\lib\generic\smartfusion2.v":727:7:727:9|Synthesizing module CCC
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\work\PCIe_HPDMA_SMCFIC\CCC_0\PCIe_HPDMA_SMCFIC_CCC_0_FCCC.v":5:7:5:34|Synthesizing module PCIe_HPDMA_SMCFIC_CCC_0_FCCC
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreConfigP\7.0.105\rtl\vlog\core\coreconfigp.v":22:7:22:17|Synthesizing module CoreConfigP
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":23:7:23:16|Synthesizing module CoreResetP
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp_pcie_hotreset.v":31:7:31:30|Synthesizing module coreresetp_pcie_hotreset
@N: CL177 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1388:4:1388:9|Sharing sequential element M3_RESET_N_int.
@N: CL177 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif2_spll_lock_q1.
@N: CL177 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif1_spll_lock_q1.
@N: CL177 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element fpll_lock_q1.
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\SgCore\OSC\2.0.101\osc_comps.v":51:7:51:24|Synthesizing module RCOSC_25_50MHZ_FAB
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\SgCore\OSC\2.0.101\osc_comps.v":11:7:11:20|Synthesizing module RCOSC_25_50MHZ
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\work\PCIe_HPDMA_SMCFIC\FABOSC_0\PCIe_HPDMA_SMCFIC_FABOSC_0_OSC.v":5:7:5:36|Synthesizing module PCIe_HPDMA_SMCFIC_FABOSC_0_OSC
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\work\PCIe_HPDMA_SMCFIC_MSS\PCIe_HPDMA_SMCFIC_MSS_syn.v":5:7:5:13|Synthesizing module MSS_120
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\work\PCIe_HPDMA_SMCFIC_MSS\PCIe_HPDMA_SMCFIC_MSS.v":9:7:9:27|Synthesizing module PCIe_HPDMA_SMCFIC_MSS
@N: CG364 :"D:\Libero_SoC_11_7\Synplify\lib\generic\smartfusion2.v":718:7:718:14|Synthesizing module SYSRESET
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\work\PCIe_HPDMA_SMCFIC\PCIe_HPDMA_SMCFIC.v":9:7:9:23|Synthesizing module PCIe_HPDMA_SMCFIC
@N: CG364 :"D:\Libero_SoC_11_7\Synplify\lib\generic\smartfusion2.v":320:7:320:16|Synthesizing module INBUF_DIFF
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\work\PCIe_HPDMA_SMCFIC_top\SERDES_IF_0\PCIe_HPDMA_SMCFIC_top_SERDES_IF_0_SERDES_IF_syn.v":5:7:5:20|Synthesizing module SERDESIF_120_0
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\work\PCIe_HPDMA_SMCFIC_top\SERDES_IF_0\PCIe_HPDMA_SMCFIC_top_SERDES_IF_0_SERDES_IF.v":5:7:5:49|Synthesizing module PCIe_HPDMA_SMCFIC_top_SERDES_IF_0_SERDES_IF
@N: CG364 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\work\PCIe_HPDMA_SMCFIC_top\PCIe_HPDMA_SMCFIC_top.v":9:7:9:27|Synthesizing module PCIe_HPDMA_SMCFIC_top
@N: CL201 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp_pcie_hotreset.v":179:4:179:9|Trying to extract state machine for register state
@N: CL177 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif1_spll_lock_q2.
@N: CL177 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif2_spll_lock_q2.
@N: CL177 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element fpll_lock_q2.
@N: CL201 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1365:4:1365:9|Trying to extract state machine for register sdif3_state
@N: CL201 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1300:4:1300:9|Trying to extract state machine for register sdif2_state
@N: CL201 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1235:4:1235:9|Trying to extract state machine for register sdif1_state
@N: CL201 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1170:4:1170:9|Trying to extract state machine for register sdif0_state
@N: CL201 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Trying to extract state machine for register sm0_state
@N: CL201 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\component\Actel\DirectCore\CoreConfigP\7.0.105\rtl\vlog\core\coreconfigp.v":447:4:447:9|Trying to extract state machine for register state
@N: CL201 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\hdl\AXI_Slave.v":174:0:174:5|Trying to extract state machine for register rstate
@N: CL201 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\hdl\AXI_Slave.v":82:0:82:5|Trying to extract state machine for register wstate
@N: CL201 :"D:\Libero_11_7_publish\dg0535\PCIe_HPDMA_SMC_FIC\hdl\AHB_IF.v":85:0:85:5|Trying to extract state machine for register ahb_fsm_current_state
@N|Running in 64-bit mode

