@N: MF248 |Running in 64-bit mode.
@N: MF667 |Clock conversion disabled. (Command "set_option -fix_gated_and_generated_clocks 0" in the project file.)
@N: MO111 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\work\mddr_demo_sb\coreaxi_0\rtl\vlog\core\coreaxi.v":1991:33:1991:42|Tristate driver RREADY_S16 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) on net RREADY_S16 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\work\mddr_demo_sb\coreaxi_0\rtl\vlog\core\coreaxi.v":1983:33:1983:43|Tristate driver ARVALID_S16 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) on net ARVALID_S16 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\work\mddr_demo_sb\coreaxi_0\rtl\vlog\core\coreaxi.v":1982:33:1982:42|Tristate driver ARPROT_S16_1 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) on net ARPROT_S16_1 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\work\mddr_demo_sb\coreaxi_0\rtl\vlog\core\coreaxi.v":1982:33:1982:42|Tristate driver ARPROT_S16_2 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) on net ARPROT_S16_2 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\work\mddr_demo_sb\coreaxi_0\rtl\vlog\core\coreaxi.v":1982:33:1982:42|Tristate driver ARPROT_S16_3 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) on net ARPROT_S16_3 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\work\mddr_demo_sb\coreaxi_0\rtl\vlog\core\coreaxi.v":1981:33:1981:43|Tristate driver ARCACHE_S16_1 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) on net ARCACHE_S16_1 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\work\mddr_demo_sb\coreaxi_0\rtl\vlog\core\coreaxi.v":1981:33:1981:43|Tristate driver ARCACHE_S16_2 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) on net ARCACHE_S16_2 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\work\mddr_demo_sb\coreaxi_0\rtl\vlog\core\coreaxi.v":1981:33:1981:43|Tristate driver ARCACHE_S16_3 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) on net ARCACHE_S16_3 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\work\mddr_demo_sb\coreaxi_0\rtl\vlog\core\coreaxi.v":1981:33:1981:43|Tristate driver ARCACHE_S16_4 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) on net ARCACHE_S16_4 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) has its enable tied to GND.
@N: MO111 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\work\mddr_demo_sb\coreaxi_0\rtl\vlog\core\coreaxi.v":1980:33:1980:42|Tristate driver ARLOCK_S16_1 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) on net ARLOCK_S16_1 (in view: work.MDDR_Demo_sb_COREAXI_0_COREAXI_Z3(verilog)) has its enable tied to GND.
@N: MO231 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\hdl\axi_if.v":95:0:95:5|Found counter in view:work.AXI_IF_0s_1s_2s_3s_2s_3s_4294967292s_4294967292s_4294967293s_Z1(verilog) instance WDATA_int[63:0] 
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[16] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[17] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[18] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[19] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[20] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[21] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[22] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[23] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[24] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[25] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[26] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[27] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[28] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[29] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[30] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance pwdata[31] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance paddr[11] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreconfigp\7.1.100\rtl\vlog\core\coreconfigp.v":255:4:255:9|Removing sequential instance paddr[14] (in view: work.CoreConfigP_Z5(verilog)) of type view:PrimLib.dffr(prim) because it does not drive other instances.
@N: MO231 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":1613:4:1613:9|Found counter in view:work.CoreResetP_Z6(verilog) instance count_ddr[13:0] 
@N: MO225 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\hdl\data_handle_fsm.v":110:0:110:5|There are no possible illegal states for state machine fsm[3:0] (in view: work.DATAHANDLE_FSM_32s_32s(verilog)); safe FSM implementation is not required.
@N: MO231 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\hdl\uart_if_fsm.v":102:0:102:5|Found counter in view:work.UART_IF_FSM(verilog) instance RAM_WADDR[7:0] 
@N: MO231 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\hdl\uart_if_fsm.v":102:0:102:5|Found counter in view:work.UART_IF_FSM(verilog) instance cnt_1k[9:0] 
@N: BN362 :"c:\users\athuldeep.n\desktop\urgent_sar_fix\68492_sf2_lpddr\m2s_dg0568_liberov11p8_sp1_df\sf2_mddr_demo_df\libero_project\sf2_mddr_demo\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance MDDR_Demo_top_0.MDDR_Demo_0.MDDR_Demo_sb_0.CORERESETP_0.DDR_READY_int (in view: work.SF2_MDDR_Demo(verilog)) because it does not drive other instances.
@N: FP130 |Promoting Net INIT_DONE_c on CLKINT  I_261 
@N: FP130 |Promoting Net MDDR_Demo_top_0.MDDR_Demo_0.MDDR_Demo_sb_0.CORECONFIGP_0_APB_S_PRESET_N on CLKINT  I_262 
@N: FP130 |Promoting Net MDDR_Demo_top_0.MDDR_Demo_0.MDDR_Demo_sb_0.CORECONFIGP_0_APB_S_PCLK on CLKINT  I_263 
@N: FP130 |Promoting Net MDDR_Demo_top_0.MDDR_Demo_0.MDDR_Demo_sb_0.CORERESETP_0.sm0_areset_n_clk_base on CLKINT  I_264 
@N: FP130 |Promoting Net MDDR_Demo_top_0.MDDR_Demo_0.MDDR_Demo_sb_0.CORERESETP_0.sm0_areset_n_rcosc on CLKINT  I_265 
@N: FX1056 |Writing EDF file: C:\Users\athuldeep.n\Desktop\URGENT_SAR_FIX\68492_SF2_LPDDR\m2s_dg0568_liberov11p8_sp1_df\SF2_MDDR_Demo_DF\Libero_project\SF2_MDDR_Demo\synthesis\SF2_MDDR_Demo.edn
@N: BW103 |The default time unit for the Synopsys Constraint File (SDC or FDC) is 1ns.
@N: BW107 |Synopsys Constraint File capacitance units using default value of 1pF 
@N: MT615 |Found clock MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/MDDR_Demo_sb_MSS_0/CLK_CONFIG_APB with period 25.00ns 
@N: MT615 |Found clock MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT with period 20.00ns 
@N: MT615 |Found clock MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/CCC_0/GL0 with period 25.00ns 
@N: MT615 |Found clock MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/CCC_0/GL2 with period 6.25ns 
@N: MT320 |This timing report is an estimate of place and route data. For final timing results, use the FPGA vendor place and route report.
@N: MT322 |Clock constraints include only register-to-register paths associated with each individual clock.
