"MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/CCC_0/GL0",25,"MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0","MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL0"
"MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/CCC_0/GL2",6.25,"MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2","MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/CCC_0/CCC_INST/INST_CCC_IP:GL2"
"MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT",20,"MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT","MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT"
"MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/MDDR_Demo_sb_MSS_0/CLK_CONFIG_APB",25,"MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/MDDR_Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB","MDDR_Demo_top_0/MDDR_Demo_0/MDDR_Demo_sb_0/MDDR_Demo_sb_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP:CLK_CONFIG_APB"
