`timescale 1 ns/100 ps
// Version: v11.7 11.7.0.119


module PCIE_HPDMA_top_SERDES_IF2_0_SERDES_IF2(
       RXD0_P,
       RXD0_N,
       RXD1_P,
       RXD1_N,
       RXD2_P,
       RXD2_N,
       RXD3_P,
       RXD3_N,
       TXD0_P,
       TXD0_N,
       TXD1_P,
       TXD1_N,
       TXD2_P,
       TXD2_N,
       TXD3_P,
       TXD3_N,
       APB_S_PRDATA,
       APB_S_PREADY,
       APB_S_PSLVERR,
       APB_S_PADDR,
       APB_S_PENABLE,
       APB_S_PSEL,
       APB_S_PWDATA,
       APB_S_PWRITE,
       APB_S_PCLK,
       APB_S_PRESET_N,
       PHY_RESET_N,
       CLK_BASE,
       SPLL_LOCK,
       PLL_LOCK_INT,
       PLL_LOCKLOST_INT,
       PCIE_0_CORE_RESET_N,
       PCIE_0_INTERRUPT,
       PCIE_0_SYSTEM_INT,
       PCIE_0_EV_1US,
       PCIE_0_L2P2_ACTIVE,
       PCIE_0_RESET_PHASE,
       PCIE_0_PERST_N,
       PCIE_0_LTSSM,
       REFCLK0_P,
       REFCLK0_N,
       REFCLK0_OUT,
       AHB_0_M_HADDR,
       AHB_0_M_HBURST,
       AHB_0_M_HSIZE,
       AHB_0_M_HTRANS,
       AHB_0_M_HWRITE,
       AHB_0_M_HWDATA,
       AHB_0_M_HREADY,
       AHB_0_M_HRESP,
       AHB_0_M_HRDATA,
       AHB_0_S_HSEL,
       AHB_0_S_HADDR,
       AHB_0_S_HBURST,
       AHB_0_S_HSIZE,
       AHB_0_S_HTRANS,
       AHB_0_S_HWRITE,
       AHB_0_S_HWDATA,
       AHB_0_S_HREADYOUT,
       AHB_0_S_HRESP,
       AHB_0_S_HREADY,
       AHB_0_S_HRDATA
    );
input  RXD0_P;
input  RXD0_N;
input  RXD1_P;
input  RXD1_N;
input  RXD2_P;
input  RXD2_N;
input  RXD3_P;
input  RXD3_N;
output TXD0_P;
output TXD0_N;
output TXD1_P;
output TXD1_N;
output TXD2_P;
output TXD2_N;
output TXD3_P;
output TXD3_N;
output [31:0] APB_S_PRDATA;
output APB_S_PREADY;
output APB_S_PSLVERR;
input  [14:2] APB_S_PADDR;
input  APB_S_PENABLE;
input  APB_S_PSEL;
input  [31:0] APB_S_PWDATA;
input  APB_S_PWRITE;
input  APB_S_PCLK;
input  APB_S_PRESET_N;
input  PHY_RESET_N;
input  CLK_BASE;
output SPLL_LOCK;
output PLL_LOCK_INT;
output PLL_LOCKLOST_INT;
input  PCIE_0_CORE_RESET_N;
input  [3:0] PCIE_0_INTERRUPT;
output PCIE_0_SYSTEM_INT;
output PCIE_0_EV_1US;
output PCIE_0_L2P2_ACTIVE;
output PCIE_0_RESET_PHASE;
input  PCIE_0_PERST_N;
output [5:0] PCIE_0_LTSSM;
input  REFCLK0_P;
input  REFCLK0_N;
output REFCLK0_OUT;
output [31:0] AHB_0_M_HADDR;
output [2:0] AHB_0_M_HBURST;
output [1:0] AHB_0_M_HSIZE;
output [1:0] AHB_0_M_HTRANS;
output AHB_0_M_HWRITE;
output [31:0] AHB_0_M_HWDATA;
input  AHB_0_M_HREADY;
input  AHB_0_M_HRESP;
input  [31:0] AHB_0_M_HRDATA;
input  AHB_0_S_HSEL;
input  [31:0] AHB_0_S_HADDR;
input  [2:0] AHB_0_S_HBURST;
input  [1:0] AHB_0_S_HSIZE;
input  [1:0] AHB_0_S_HTRANS;
input  AHB_0_S_HWRITE;
input  [31:0] AHB_0_S_HWDATA;
output AHB_0_S_HREADYOUT;
output AHB_0_S_HRESP;
input  AHB_0_S_HREADY;
output [31:0] AHB_0_S_HRDATA;

    wire gnd_net, vcc_net;
    
    INBUF_DIFF refclk0_inbuf_diff (.PADP(REFCLK0_P), .PADN(REFCLK0_N), 
        .Y(REFCLK0_OUT));
    VCC vcc_inst (.Y(vcc_net));
    GND gnd_inst (.Y(gnd_net));
    SERDESIF_075 #( .INIT(1100'h080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007C0002700000000000000000000000000000000000000000000000000000007E0000000000000110A8580000000000008D508D508D52278E7FF83800000000039E1FC4590C0107FFFFFBFFFFFFFFFFFFFFDFFFFFFFFFFF)
        , .ACT_CONFIG("SERDESIF_0"), .ACT_SIM(1) )  SERDESIF_INST (
        .APB_PRDATA({APB_S_PRDATA[31], APB_S_PRDATA[30], 
        APB_S_PRDATA[29], APB_S_PRDATA[28], APB_S_PRDATA[27], 
        APB_S_PRDATA[26], APB_S_PRDATA[25], APB_S_PRDATA[24], 
        APB_S_PRDATA[23], APB_S_PRDATA[22], APB_S_PRDATA[21], 
        APB_S_PRDATA[20], APB_S_PRDATA[19], APB_S_PRDATA[18], 
        APB_S_PRDATA[17], APB_S_PRDATA[16], APB_S_PRDATA[15], 
        APB_S_PRDATA[14], APB_S_PRDATA[13], APB_S_PRDATA[12], 
        APB_S_PRDATA[11], APB_S_PRDATA[10], APB_S_PRDATA[9], 
        APB_S_PRDATA[8], APB_S_PRDATA[7], APB_S_PRDATA[6], 
        APB_S_PRDATA[5], APB_S_PRDATA[4], APB_S_PRDATA[3], 
        APB_S_PRDATA[2], APB_S_PRDATA[1], APB_S_PRDATA[0]}), 
        .APB_PREADY(APB_S_PREADY), .APB_PSLVERR(APB_S_PSLVERR), 
        .ATXCLKSTABLE({nc0, nc1}), .EPCS_READY({nc2, nc3}), 
        .EPCS_RXCLK({nc4, nc5}), .EPCS_RXCLK_0(PCIE_0_L2P2_ACTIVE), 
        .EPCS_RXCLK_1(PCIE_0_RESET_PHASE), .EPCS_RXDATA({nc6, nc7, nc8, 
        nc9, nc10, nc11, nc12, nc13, nc14, nc15, nc16, nc17, nc18, 
        nc19, nc20, nc21, nc22, nc23, nc24, nc25, nc26, nc27, nc28, 
        nc29, nc30, nc31, nc32, nc33, nc34, nc35, nc36, nc37, nc38, 
        nc39, nc40, nc41, nc42, nc43, nc44, nc45}), .EPCS_RXIDLE({nc46, 
        nc47}), .EPCS_RXRSTN({nc48, nc49}), .EPCS_RXVAL({nc50, nc51}), 
        .EPCS_TXCLK({nc52, nc53}), .EPCS_TXCLK_0(PCIE_0_EV_1US), 
        .EPCS_TXCLK_1(), .EPCS_TXRSTN({nc54, nc55}), .FATC_RESET_N(), 
        .H2FCALIB0(), .H2FCALIB1(), .M2_ARADDR({nc56, nc57, nc58, nc59, 
        nc60, nc61, nc62, nc63, nc64, nc65, nc66, nc67, nc68, nc69, 
        nc70, nc71, nc72, nc73, nc74, nc75, nc76, nc77, nc78, nc79, 
        nc80, nc81, nc82, nc83, nc84, nc85, nc86, nc87}), .M2_ARBURST({
        nc88, nc89}), .M2_ARID({nc90, nc91, nc92, nc93}), .M2_ARLEN({
        nc94, nc95, nc96, nc97}), .M2_ARSIZE({nc98, nc99}), 
        .M2_ARVALID(), .M2_AWADDR_HADDR({nc100, nc101, nc102, nc103, 
        nc104, nc105, nc106, nc107, nc108, nc109, nc110, nc111, nc112, 
        nc113, nc114, nc115, nc116, nc117, nc118, nc119, nc120, nc121, 
        nc122, nc123, nc124, nc125, nc126, nc127, nc128, nc129, nc130, 
        nc131}), .M2_AWBURST_HTRANS({nc132, nc133}), .M2_AWID({nc134, 
        nc135, nc136, nc137}), .M2_AWLEN_HBURST({nc138, nc139, nc140, 
        nc141}), .M2_AWSIZE_HSIZE({nc142, nc143}), .M2_AWVALID_HWRITE()
        , .M2_BREADY(), .M2_RREADY(), .M2_WDATA_HWDATA({nc144, nc145, 
        nc146, nc147, nc148, nc149, nc150, nc151, nc152, nc153, nc154, 
        nc155, nc156, nc157, nc158, nc159, nc160, nc161, nc162, nc163, 
        nc164, nc165, nc166, nc167, nc168, nc169, nc170, nc171, nc172, 
        nc173, nc174, nc175, nc176, nc177, nc178, nc179, nc180, nc181, 
        nc182, nc183, nc184, nc185, nc186, nc187, nc188, nc189, nc190, 
        nc191, nc192, nc193, nc194, nc195, nc196, nc197, nc198, nc199, 
        nc200, nc201, nc202, nc203, nc204, nc205, nc206, nc207}), 
        .M2_WID({nc208, nc209, nc210, nc211}), .M2_WLAST(), .M2_WSTRB({
        nc212, nc213, nc214, nc215, nc216, nc217, nc218, nc219}), 
        .M2_WVALID(), .M_ARADDR({nc220, nc221, nc222, nc223, nc224, 
        nc225, nc226, nc227, nc228, nc229, nc230, nc231, nc232, nc233, 
        nc234, nc235, nc236, nc237, nc238, nc239, nc240, nc241, nc242, 
        nc243, nc244, nc245, nc246, nc247, nc248, nc249, nc250, nc251})
        , .M_ARBURST({nc252, nc253}), .M_ARID({nc254, nc255, nc256, 
        nc257}), .M_ARLEN({nc258, nc259, nc260, nc261}), .M_ARSIZE({
        nc262, nc263}), .M_ARVALID(), .M_AWADDR_HADDR({
        AHB_0_M_HADDR[31], AHB_0_M_HADDR[30], AHB_0_M_HADDR[29], 
        AHB_0_M_HADDR[28], AHB_0_M_HADDR[27], AHB_0_M_HADDR[26], 
        AHB_0_M_HADDR[25], AHB_0_M_HADDR[24], AHB_0_M_HADDR[23], 
        AHB_0_M_HADDR[22], AHB_0_M_HADDR[21], AHB_0_M_HADDR[20], 
        AHB_0_M_HADDR[19], AHB_0_M_HADDR[18], AHB_0_M_HADDR[17], 
        AHB_0_M_HADDR[16], AHB_0_M_HADDR[15], AHB_0_M_HADDR[14], 
        AHB_0_M_HADDR[13], AHB_0_M_HADDR[12], AHB_0_M_HADDR[11], 
        AHB_0_M_HADDR[10], AHB_0_M_HADDR[9], AHB_0_M_HADDR[8], 
        AHB_0_M_HADDR[7], AHB_0_M_HADDR[6], AHB_0_M_HADDR[5], 
        AHB_0_M_HADDR[4], AHB_0_M_HADDR[3], AHB_0_M_HADDR[2], 
        AHB_0_M_HADDR[1], AHB_0_M_HADDR[0]}), .M_AWBURST_HTRANS({
        AHB_0_M_HTRANS[1], AHB_0_M_HTRANS[0]}), .M_AWID({nc264, nc265, 
        nc266, nc267}), .M_AWLEN_HBURST({nc268, AHB_0_M_HBURST[2], 
        AHB_0_M_HBURST[1], AHB_0_M_HBURST[0]}), .M_AWSIZE_HSIZE({
        AHB_0_M_HSIZE[1], AHB_0_M_HSIZE[0]}), .M_AWVALID_HWRITE(
        AHB_0_M_HWRITE), .M_BREADY(), .M_RREADY(), .M_WDATA_HWDATA({
        nc269, nc270, nc271, nc272, nc273, nc274, nc275, nc276, nc277, 
        nc278, nc279, nc280, nc281, nc282, nc283, nc284, nc285, nc286, 
        nc287, nc288, nc289, nc290, nc291, nc292, nc293, nc294, nc295, 
        nc296, nc297, nc298, nc299, nc300, AHB_0_M_HWDATA[31], 
        AHB_0_M_HWDATA[30], AHB_0_M_HWDATA[29], AHB_0_M_HWDATA[28], 
        AHB_0_M_HWDATA[27], AHB_0_M_HWDATA[26], AHB_0_M_HWDATA[25], 
        AHB_0_M_HWDATA[24], AHB_0_M_HWDATA[23], AHB_0_M_HWDATA[22], 
        AHB_0_M_HWDATA[21], AHB_0_M_HWDATA[20], AHB_0_M_HWDATA[19], 
        AHB_0_M_HWDATA[18], AHB_0_M_HWDATA[17], AHB_0_M_HWDATA[16], 
        AHB_0_M_HWDATA[15], AHB_0_M_HWDATA[14], AHB_0_M_HWDATA[13], 
        AHB_0_M_HWDATA[12], AHB_0_M_HWDATA[11], AHB_0_M_HWDATA[10], 
        AHB_0_M_HWDATA[9], AHB_0_M_HWDATA[8], AHB_0_M_HWDATA[7], 
        AHB_0_M_HWDATA[6], AHB_0_M_HWDATA[5], AHB_0_M_HWDATA[4], 
        AHB_0_M_HWDATA[3], AHB_0_M_HWDATA[2], AHB_0_M_HWDATA[1], 
        AHB_0_M_HWDATA[0]}), .M_WID({nc301, nc302, nc303, nc304}), 
        .M_WLAST(), .M_WSTRB({nc305, nc306, nc307, nc308, nc309, nc310, 
        nc311, nc312}), .M_WVALID(), .PCIE2_LTSSM({nc313, nc314, nc315, 
        nc316, nc317, nc318}), .PCIE2_SYSTEM_INT(), .PCIE2_WAKE_N(), 
        .PCIE_LTSSM({PCIE_0_LTSSM[5], PCIE_0_LTSSM[4], PCIE_0_LTSSM[3], 
        PCIE_0_LTSSM[2], PCIE_0_LTSSM[1], PCIE_0_LTSSM[0]}), 
        .PCIE_SYSTEM_INT(PCIE_0_SYSTEM_INT), .PLL_LOCK_INT(
        PLL_LOCK_INT), .PLL_LOCKLOST_INT(PLL_LOCKLOST_INT), 
        .S2_ARREADY(), .S2_AWREADY(), .S2_BID({nc319, nc320, nc321, 
        nc322}), .S2_BRESP_HRESP({nc323, nc324}), .S2_BVALID(), 
        .S2_RDATA_HRDATA({nc325, nc326, nc327, nc328, nc329, nc330, 
        nc331, nc332, nc333, nc334, nc335, nc336, nc337, nc338, nc339, 
        nc340, nc341, nc342, nc343, nc344, nc345, nc346, nc347, nc348, 
        nc349, nc350, nc351, nc352, nc353, nc354, nc355, nc356, nc357, 
        nc358, nc359, nc360, nc361, nc362, nc363, nc364, nc365, nc366, 
        nc367, nc368, nc369, nc370, nc371, nc372, nc373, nc374, nc375, 
        nc376, nc377, nc378, nc379, nc380, nc381, nc382, nc383, nc384, 
        nc385, nc386, nc387, nc388}), .S2_RID({nc389, nc390, nc391, 
        nc392}), .S2_RLAST(), .S2_RRESP({nc393, nc394}), .S2_RVALID(), 
        .S2_WREADY_HREADYOUT(), .S_ARREADY(), .S_AWREADY(), .S_BID({
        nc395, nc396, nc397, nc398}), .S_BRESP_HRESP({nc399, 
        AHB_0_S_HRESP}), .S_BVALID(), .S_RDATA_HRDATA({nc400, nc401, 
        nc402, nc403, nc404, nc405, nc406, nc407, nc408, nc409, nc410, 
        nc411, nc412, nc413, nc414, nc415, nc416, nc417, nc418, nc419, 
        nc420, nc421, nc422, nc423, nc424, nc425, nc426, nc427, nc428, 
        nc429, nc430, nc431, AHB_0_S_HRDATA[31], AHB_0_S_HRDATA[30], 
        AHB_0_S_HRDATA[29], AHB_0_S_HRDATA[28], AHB_0_S_HRDATA[27], 
        AHB_0_S_HRDATA[26], AHB_0_S_HRDATA[25], AHB_0_S_HRDATA[24], 
        AHB_0_S_HRDATA[23], AHB_0_S_HRDATA[22], AHB_0_S_HRDATA[21], 
        AHB_0_S_HRDATA[20], AHB_0_S_HRDATA[19], AHB_0_S_HRDATA[18], 
        AHB_0_S_HRDATA[17], AHB_0_S_HRDATA[16], AHB_0_S_HRDATA[15], 
        AHB_0_S_HRDATA[14], AHB_0_S_HRDATA[13], AHB_0_S_HRDATA[12], 
        AHB_0_S_HRDATA[11], AHB_0_S_HRDATA[10], AHB_0_S_HRDATA[9], 
        AHB_0_S_HRDATA[8], AHB_0_S_HRDATA[7], AHB_0_S_HRDATA[6], 
        AHB_0_S_HRDATA[5], AHB_0_S_HRDATA[4], AHB_0_S_HRDATA[3], 
        AHB_0_S_HRDATA[2], AHB_0_S_HRDATA[1], AHB_0_S_HRDATA[0]}), 
        .S_RID({nc432, nc433, nc434, nc435}), .S_RLAST(), .S_RRESP({
        nc436, nc437}), .S_RVALID(), .S_WREADY_HREADYOUT(
        AHB_0_S_HREADYOUT), .SPLL_LOCK(SPLL_LOCK), .WAKE_N(), 
        .XAUI_OUT_CLK(), .APB_CLK(APB_S_PCLK), .APB_PADDR({
        APB_S_PADDR[14], APB_S_PADDR[13], APB_S_PADDR[12], 
        APB_S_PADDR[11], APB_S_PADDR[10], APB_S_PADDR[9], 
        APB_S_PADDR[8], APB_S_PADDR[7], APB_S_PADDR[6], APB_S_PADDR[5], 
        APB_S_PADDR[4], APB_S_PADDR[3], APB_S_PADDR[2]}), .APB_PENABLE(
        APB_S_PENABLE), .APB_PSEL(APB_S_PSEL), .APB_PWDATA({
        APB_S_PWDATA[31], APB_S_PWDATA[30], APB_S_PWDATA[29], 
        APB_S_PWDATA[28], APB_S_PWDATA[27], APB_S_PWDATA[26], 
        APB_S_PWDATA[25], APB_S_PWDATA[24], APB_S_PWDATA[23], 
        APB_S_PWDATA[22], APB_S_PWDATA[21], APB_S_PWDATA[20], 
        APB_S_PWDATA[19], APB_S_PWDATA[18], APB_S_PWDATA[17], 
        APB_S_PWDATA[16], APB_S_PWDATA[15], APB_S_PWDATA[14], 
        APB_S_PWDATA[13], APB_S_PWDATA[12], APB_S_PWDATA[11], 
        APB_S_PWDATA[10], APB_S_PWDATA[9], APB_S_PWDATA[8], 
        APB_S_PWDATA[7], APB_S_PWDATA[6], APB_S_PWDATA[5], 
        APB_S_PWDATA[4], APB_S_PWDATA[3], APB_S_PWDATA[2], 
        APB_S_PWDATA[1], APB_S_PWDATA[0]}), .APB_PWRITE(APB_S_PWRITE), 
        .APB_RSTN(APB_S_PRESET_N), .CLK_BASE(CLK_BASE), .EPCS_PWRDN({
        vcc_net, vcc_net}), .EPCS_RSTN({gnd_net, gnd_net}), 
        .EPCS_RXERR({vcc_net, vcc_net}), .EPCS_TXDATA({gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net}), .EPCS_TXOOB({vcc_net, 
        vcc_net}), .EPCS_TXVAL({vcc_net, vcc_net}), .F2HCALIB0(vcc_net)
        , .F2HCALIB1(vcc_net), .FAB_PLL_LOCK(gnd_net), .FAB_REF_CLK(
        vcc_net), .M2_ARREADY(gnd_net), .M2_AWREADY(gnd_net), .M2_BID({
        vcc_net, vcc_net, vcc_net, vcc_net}), .M2_BRESP_HRESP({gnd_net, 
        gnd_net}), .M2_BVALID(gnd_net), .M2_RDATA_HRDATA({gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net})
        , .M2_RID({gnd_net, gnd_net, gnd_net, gnd_net}), .M2_RLAST(
        gnd_net), .M2_RRESP({gnd_net, gnd_net}), .M2_RVALID(gnd_net), 
        .M2_WREADY_HREADY(gnd_net), .M_ARREADY(gnd_net), .M_AWREADY(
        gnd_net), .M_BID({vcc_net, vcc_net, vcc_net, vcc_net}), 
        .M_BRESP_HRESP({gnd_net, AHB_0_M_HRESP}), .M_BVALID(gnd_net), 
        .M_RDATA_HRDATA({gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        AHB_0_M_HRDATA[31], AHB_0_M_HRDATA[30], AHB_0_M_HRDATA[29], 
        AHB_0_M_HRDATA[28], AHB_0_M_HRDATA[27], AHB_0_M_HRDATA[26], 
        AHB_0_M_HRDATA[25], AHB_0_M_HRDATA[24], AHB_0_M_HRDATA[23], 
        AHB_0_M_HRDATA[22], AHB_0_M_HRDATA[21], AHB_0_M_HRDATA[20], 
        AHB_0_M_HRDATA[19], AHB_0_M_HRDATA[18], AHB_0_M_HRDATA[17], 
        AHB_0_M_HRDATA[16], AHB_0_M_HRDATA[15], AHB_0_M_HRDATA[14], 
        AHB_0_M_HRDATA[13], AHB_0_M_HRDATA[12], AHB_0_M_HRDATA[11], 
        AHB_0_M_HRDATA[10], AHB_0_M_HRDATA[9], AHB_0_M_HRDATA[8], 
        AHB_0_M_HRDATA[7], AHB_0_M_HRDATA[6], AHB_0_M_HRDATA[5], 
        AHB_0_M_HRDATA[4], AHB_0_M_HRDATA[3], AHB_0_M_HRDATA[2], 
        AHB_0_M_HRDATA[1], AHB_0_M_HRDATA[0]}), .M_RID({gnd_net, 
        gnd_net, gnd_net, gnd_net}), .M_RLAST(gnd_net), .M_RRESP({
        gnd_net, gnd_net}), .M_RVALID(gnd_net), .M_WREADY_HREADY(
        AHB_0_M_HREADY), .PCIE2_INTERRUPT({gnd_net, gnd_net, gnd_net, 
        gnd_net}), .PCIE2_PERST_N(gnd_net), 
        .PCIE2_SERDESIF_CORE_RESET_N(gnd_net), .PCIE2_WAKE_REQ(vcc_net)
        , .PCIE_INTERRUPT({PCIE_0_INTERRUPT[3], PCIE_0_INTERRUPT[2], 
        PCIE_0_INTERRUPT[1], PCIE_0_INTERRUPT[0]}), .PERST_N(
        PCIE_0_PERST_N), .S2_ARADDR({gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net}), .S2_ARBURST({gnd_net, gnd_net}), .S2_ARID({gnd_net, 
        gnd_net, gnd_net, gnd_net}), .S2_ARLEN({gnd_net, gnd_net, 
        gnd_net, gnd_net}), .S2_ARLOCK({gnd_net, gnd_net}), .S2_ARSIZE({
        gnd_net, gnd_net}), .S2_ARVALID(gnd_net), .S2_AWADDR_HADDR({
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net}), .S2_AWBURST_HTRANS({
        gnd_net, gnd_net}), .S2_AWID_HSEL({gnd_net, gnd_net, gnd_net, 
        gnd_net}), .S2_AWLEN_HBURST({gnd_net, gnd_net, gnd_net, 
        gnd_net}), .S2_AWLOCK({gnd_net, gnd_net}), .S2_AWSIZE_HSIZE({
        gnd_net, gnd_net}), .S2_AWVALID_HWRITE(gnd_net), 
        .S2_BREADY_HREADY(gnd_net), .S2_RREADY(gnd_net), 
        .S2_WDATA_HWDATA({gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net}), .S2_WID({gnd_net, gnd_net, 
        gnd_net, gnd_net}), .S2_WLAST(gnd_net), .S2_WSTRB({gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net})
        , .S2_WVALID(gnd_net), .S_ARADDR({gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net}), .S_ARBURST({gnd_net, gnd_net}), .S_ARID({gnd_net, 
        gnd_net, gnd_net, gnd_net}), .S_ARLEN({gnd_net, gnd_net, 
        gnd_net, gnd_net}), .S_ARLOCK({gnd_net, gnd_net}), .S_ARSIZE({
        gnd_net, gnd_net}), .S_ARVALID(gnd_net), .S_AWADDR_HADDR({
        AHB_0_S_HADDR[31], AHB_0_S_HADDR[30], AHB_0_S_HADDR[29], 
        AHB_0_S_HADDR[28], AHB_0_S_HADDR[27], AHB_0_S_HADDR[26], 
        AHB_0_S_HADDR[25], AHB_0_S_HADDR[24], AHB_0_S_HADDR[23], 
        AHB_0_S_HADDR[22], AHB_0_S_HADDR[21], AHB_0_S_HADDR[20], 
        AHB_0_S_HADDR[19], AHB_0_S_HADDR[18], AHB_0_S_HADDR[17], 
        AHB_0_S_HADDR[16], AHB_0_S_HADDR[15], AHB_0_S_HADDR[14], 
        AHB_0_S_HADDR[13], AHB_0_S_HADDR[12], AHB_0_S_HADDR[11], 
        AHB_0_S_HADDR[10], AHB_0_S_HADDR[9], AHB_0_S_HADDR[8], 
        AHB_0_S_HADDR[7], AHB_0_S_HADDR[6], AHB_0_S_HADDR[5], 
        AHB_0_S_HADDR[4], AHB_0_S_HADDR[3], AHB_0_S_HADDR[2], 
        AHB_0_S_HADDR[1], AHB_0_S_HADDR[0]}), .S_AWBURST_HTRANS({
        AHB_0_S_HTRANS[1], AHB_0_S_HTRANS[0]}), .S_AWID_HSEL({gnd_net, 
        gnd_net, gnd_net, AHB_0_S_HSEL}), .S_AWLEN_HBURST({gnd_net, 
        AHB_0_S_HBURST[2], AHB_0_S_HBURST[1], AHB_0_S_HBURST[0]}), 
        .S_AWLOCK({gnd_net, gnd_net}), .S_AWSIZE_HSIZE({
        AHB_0_S_HSIZE[1], AHB_0_S_HSIZE[0]}), .S_AWVALID_HWRITE(
        AHB_0_S_HWRITE), .S_BREADY_HREADY(AHB_0_S_HREADY), .S_RREADY(
        gnd_net), .S_WDATA_HWDATA({gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        AHB_0_S_HWDATA[31], AHB_0_S_HWDATA[30], AHB_0_S_HWDATA[29], 
        AHB_0_S_HWDATA[28], AHB_0_S_HWDATA[27], AHB_0_S_HWDATA[26], 
        AHB_0_S_HWDATA[25], AHB_0_S_HWDATA[24], AHB_0_S_HWDATA[23], 
        AHB_0_S_HWDATA[22], AHB_0_S_HWDATA[21], AHB_0_S_HWDATA[20], 
        AHB_0_S_HWDATA[19], AHB_0_S_HWDATA[18], AHB_0_S_HWDATA[17], 
        AHB_0_S_HWDATA[16], AHB_0_S_HWDATA[15], AHB_0_S_HWDATA[14], 
        AHB_0_S_HWDATA[13], AHB_0_S_HWDATA[12], AHB_0_S_HWDATA[11], 
        AHB_0_S_HWDATA[10], AHB_0_S_HWDATA[9], AHB_0_S_HWDATA[8], 
        AHB_0_S_HWDATA[7], AHB_0_S_HWDATA[6], AHB_0_S_HWDATA[5], 
        AHB_0_S_HWDATA[4], AHB_0_S_HWDATA[3], AHB_0_S_HWDATA[2], 
        AHB_0_S_HWDATA[1], AHB_0_S_HWDATA[0]}), .S_WID({gnd_net, 
        gnd_net, gnd_net, gnd_net}), .S_WLAST(gnd_net), .S_WSTRB({
        gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, gnd_net, 
        gnd_net}), .S_WVALID(gnd_net), .SERDESIF_CORE_RESET_N(
        PCIE_0_CORE_RESET_N), .SERDESIF_PHY_RESET_N(PHY_RESET_N), 
        .WAKE_REQ(vcc_net), .XAUI_FB_CLK(vcc_net), .RXD3_P(RXD3_P), 
        .RXD2_P(RXD2_P), .RXD1_P(RXD1_P), .RXD0_P(RXD0_P), .RXD3_N(
        RXD3_N), .RXD2_N(RXD2_N), .RXD1_N(RXD1_N), .RXD0_N(RXD0_N), 
        .TXD3_P(TXD3_P), .TXD2_P(TXD2_P), .TXD1_P(TXD1_P), .TXD0_P(
        TXD0_P), .TXD3_N(TXD3_N), .TXD2_N(TXD2_N), .TXD1_N(TXD1_N), 
        .TXD0_N(TXD0_N), .REFCLK0(REFCLK0_OUT), .REFCLK1(vcc_net));
    
endmodule
