Project Settings
Project Name | top_syn | Device Name | synthesis: Microchip SmartFusion2 : M2S090TS
Implementation Name | synthesis | Top Module | top
Retiming | 0 | Resource Sharing | 1
Fanout Guide | 10000 | Disable I/O Insertion | 0
Disable Sequential Optimizations | 0 | FSM Compiler | 1
Run Status
Job Name | Status |  |  |  | CPU Time | Real Time | Memory | Date/Time
(compiler) | Complete | 61 | 39 | 0 | - | 00m:04s | - | 4/20/2021 6:41:42 PM
(premap) | Complete | 34 | 19 | 0 | 0m:02s | 0m:01s | 169MB | 4/20/2021 6:41:46 PM
(fpga_mapper) | Complete | 59 | 12 | 0 | 0m:03s | 0m:03s | 169MB | 4/20/2021 6:41:50 PM
Multi-srs Generator | Complete |  |  |  |  |  |  | 4/20/2021 6:41:43 PM
Area Summary
Sequential Cells | 0 | DSP Blocks (dsp_used) | 0
I/O Cells | 20 | Global Clock Buffers | 1
LUTs (total_luts) | 0 |  |
Timing Summary
Clock Name | Req Freq | Est Freq | Slack
--- | --- | --- | ---
demo_0/CCC_0/GL0 | 100.0 MHz | NA | NA
demo_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT | 50.0 MHz | NA | NA
Optimizations Summary
Combined Clock Conversion | 0 / 1 |  |