# Microsemi Corp.
# Date: 2017-Sep-11 18:58:15
# This file was generated based on the following SDC source files:
#   D:/test/Adaptive_FIR_filter_Demo/constraint/Adaptive_FIR_top_derived_constraints.sdc
#

create_clock -name {Adaptive_FIR_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT} -period 20 [ get_pins { Adaptive_FIR_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT } ]
create_generated_clock -name {Adaptive_FIR_0/CCC_0/GL0} -multiply_by 4 -divide_by 2 -source [ get_pins { Adaptive_FIR_0/CCC_0/CCC_INST/RCOSC_25_50MHZ } ] -phase 0 [ get_pins { Adaptive_FIR_0/CCC_0/CCC_INST/GL0 } ]
set_false_path -through [ get_pins { Adaptive_FIR_0/Adaptive_FIR_MSS_0/MSS_ADLIB_INST/CONFIG_PRESET_N } ]
set_false_path -through [ get_nets { Adaptive_FIR_0/CORERESETP_0/ddr_settled Adaptive_FIR_0/CORERESETP_0/count_ddr_enable Adaptive_FIR_0/CORERESETP_0/release_sdif*_core Adaptive_FIR_0/CORERESETP_0/count_sdif*_enable } ]
set_false_path -from [ get_cells { Adaptive_FIR_0/CORERESETP_0/MSS_HPMS_READY_int } ] -to [ get_cells { Adaptive_FIR_0/CORERESETP_0/sm0_areset_n_rcosc Adaptive_FIR_0/CORERESETP_0/sm0_areset_n_rcosc_q1 } ]
set_false_path -from [ get_cells { Adaptive_FIR_0/CORERESETP_0/MSS_HPMS_READY_int Adaptive_FIR_0/CORERESETP_0/SDIF*_PERST_N_re } ] -to [ get_cells { Adaptive_FIR_0/CORERESETP_0/sdif*_areset_n_rcosc* } ]
set_false_path -through [ get_nets { Adaptive_FIR_0/CORERESETP_0/CONFIG1_DONE Adaptive_FIR_0/CORERESETP_0/CONFIG2_DONE Adaptive_FIR_0/CORERESETP_0/SDIF*_PERST_N Adaptive_FIR_0/CORERESETP_0/SDIF*_PSEL Adaptive_FIR_0/CORERESETP_0/SDIF*_PWRITE Adaptive_FIR_0/CORERESETP_0/SDIF*_PRDATA[*] Adaptive_FIR_0/CORERESETP_0/SOFT_EXT_RESET_OUT Adaptive_FIR_0/CORERESETP_0/SOFT_RESET_F2M Adaptive_FIR_0/CORERESETP_0/SOFT_M3_RESET Adaptive_FIR_0/CORERESETP_0/SOFT_MDDR_DDR_AXI_S_CORE_RESET Adaptive_FIR_0/CORERESETP_0/SOFT_FDDR_CORE_RESET Adaptive_FIR_0/CORERESETP_0/SOFT_SDIF*_PHY_RESET Adaptive_FIR_0/CORERESETP_0/SOFT_SDIF*_CORE_RESET Adaptive_FIR_0/CORERESETP_0/SOFT_SDIF0_0_CORE_RESET Adaptive_FIR_0/CORERESETP_0/SOFT_SDIF0_1_CORE_RESET } ]
set_false_path -through [ get_pins { Adaptive_FIR_0/SYSRESET_POR/POWER_ON_RESET_N } ]
