set_device -family {SmartFusion2} -die {M2S090TS}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR\CCC_0\Adaptive_FIR_CCC_0_FCCC.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR\FABOSC_0\Adaptive_FIR_FABOSC_0_OSC.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_MSS\Adaptive_FIR_MSS.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\Actel\DirectCore\CoreResetP\7.1.100\rtl\vlog\core\coreresetp_pcie_hotreset.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\Actel\DirectCore\CoreResetP\7.1.100\rtl\vlog\core\coreresetp.v}
read_verilog -mode verilog_2k -lib COREAPB3_LIB {D:\test\Adaptive_FIR_filter_Demo\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vlog\core\coreapb3_muxptob3.v}
read_verilog -mode verilog_2k -lib COREAPB3_LIB {D:\test\Adaptive_FIR_filter_Demo\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vlog\core\coreapb3_iaddr_reg.v}
read_verilog -mode verilog_2k -lib COREAPB3_LIB {D:\test\Adaptive_FIR_filter_Demo\component\Actel\DirectCore\CoreAPB3\4.1.100\rtl\vlog\core\coreapb3.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR\Adaptive_FIR.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_top\TPSRAM_0\Adaptive_FIR_top_TPSRAM_0_TPSRAM.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_top\TPSRAM_1\Adaptive_FIR_top_TPSRAM_1_TPSRAM.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_top\TPSRAM_2\Adaptive_FIR_top_TPSRAM_2_TPSRAM.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_top\TPSRAM_3\Adaptive_FIR_top_TPSRAM_3_TPSRAM.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\hdl\DATAHANDLE_FSM.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\hdl\FILTERCONTROL_FSM.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\hdl\LMS_ALGO.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\hdl\LMS_CONTROL_FSM.v}
read_verilog -mode verilog_2k -lib COREFIR_LIB {D:\test\Adaptive_FIR_filter_Demo\component\work\LMS_FIR_TOP\COREFIR_0\rtl\vlog\core\enum_SmFu4\mac_lib.v}
read_verilog -mode verilog_2k -lib COREFIR_LIB {D:\test\Adaptive_FIR_filter_Demo\component\work\LMS_FIR_TOP\COREFIR_0\rtl\vlog\core\enum_SmFu4\mac.v}
read_verilog -mode verilog_2k -lib COREFIR_LIB {D:\test\Adaptive_FIR_filter_Demo\component\Actel\DirectCore\COREFIR\8.6.101\rtl\vlog\core\kit.v}
 add_include_path  {D:\test\Adaptive_FIR_filter_Demo\component\work\LMS_FIR_TOP\COREFIR_0\rtl\vlog\core\enum_SmFu4}
read_verilog -mode verilog_2k -lib COREFIR_LIB {D:\test\Adaptive_FIR_filter_Demo\component\work\LMS_FIR_TOP\COREFIR_0\rtl\vlog\core\enum_SmFu4\coef_store.v}
read_verilog -mode verilog_2k -lib COREFIR_LIB {D:\test\Adaptive_FIR_filter_Demo\component\work\LMS_FIR_TOP\COREFIR_0\rtl\vlog\core\enum_SmFu4\enum_fir.v}
read_verilog -mode verilog_2k -lib COREFIR_LIB {D:\test\Adaptive_FIR_filter_Demo\component\work\LMS_FIR_TOP\COREFIR_0\rtl\vlog\core\enum_SmFu4\enum_COREFIR.v}
read_verilog -mode verilog_2k -lib COREFIR_LIB {D:\test\Adaptive_FIR_filter_Demo\component\work\LMS_FIR_TOP\COREFIR_0\rtl\vlog\core\top\COREFIR.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\work\LMS_FIR_TOP\LMS_FIR_TOP.v}
read_verilog -mode verilog_2k -lib COREFFT_LIB {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_top\COREFFT_0\rtl\in_place\vlog\core\Adaptive_FIR_top_COREFFT_0_ram_smGen.v}
read_verilog -mode verilog_2k -lib COREFFT_LIB {D:\test\Adaptive_FIR_filter_Demo\component\Actel\DirectCore\COREFFT\7.0.104\rtl\in_place\vlog\core\kit.v}
read_verilog -mode verilog_2k -lib COREFFT_LIB {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_top\COREFFT_0\rtl\in_place\vlog\core\fftDp.v}
read_verilog -mode verilog_2k -lib COREFFT_LIB {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_top\COREFFT_0\twiddle32.v}
read_verilog -mode verilog_2k -lib COREFFT_LIB {D:\test\Adaptive_FIR_filter_Demo\component\Actel\DirectCore\COREFFT\7.0.104\rtl\in_place\vlog\core\mac_lib.v}
read_verilog -mode verilog_2k -lib COREFFT_LIB {D:\test\Adaptive_FIR_filter_Demo\component\Actel\DirectCore\COREFFT\7.0.104\rtl\in_place\vlog\core\cmplx.v}
read_verilog -mode verilog_2k -lib COREFFT_LIB {D:\test\Adaptive_FIR_filter_Demo\component\Actel\DirectCore\COREFFT\7.0.104\rtl\in_place\vlog\core\fftSm.v}
read_verilog -mode verilog_2k -lib COREFFT_LIB {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_top\COREFFT_0\rtl\in_place\vlog\core\COREFFT.v}
read_verilog -mode verilog_2k -lib COREFFT_LIB {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_top\COREFFT_0\rtl\in_place\vlog\core\COREFFT_TOP.v}
read_verilog -mode verilog_2k {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_top\Adaptive_FIR_top.v}
set_top_level {Adaptive_FIR_top}
read_sdc -component {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR\CCC_0\Adaptive_FIR_CCC_0_FCCC.sdc}
read_sdc -component {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR\FABOSC_0\Adaptive_FIR_FABOSC_0_OSC.sdc}
read_sdc -component {D:\test\Adaptive_FIR_filter_Demo\component\work\Adaptive_FIR_MSS\Adaptive_FIR_MSS.sdc}
derive_constraints
write_sdc {D:\test\Adaptive_FIR_filter_Demo\constraint\Adaptive_FIR_top_derived_constraints.sdc}
write_pdc {D:\test\Adaptive_FIR_filter_Demo\constraint\fp\Adaptive_FIR_top_derived_constraints.pdc}
