@W: BN309 |One or more non-fatal issues found in constraints; Please run Constraint Check for analysis
@W: BN132 :"d:\libero11.8\m2s_dg0440_liberov11p7sp2_df\sf2_modbus_tcp_ref_design_df\libero\sf2_modbus_tcp\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":963:4:963:9|Removing sequential instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif3_spll_lock_q1 because it is equivalent to instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif2_spll_lock_q1. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"d:\libero11.8\m2s_dg0440_liberov11p7sp2_df\sf2_modbus_tcp_ref_design_df\libero\sf2_modbus_tcp\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":963:4:963:9|Removing sequential instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif3_spll_lock_q2 because it is equivalent to instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif2_spll_lock_q2. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"d:\libero11.8\m2s_dg0440_liberov11p7sp2_df\sf2_modbus_tcp_ref_design_df\libero\sf2_modbus_tcp\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":884:4:884:9|Removing sequential instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif1_areset_n_rcosc_q1 because it is equivalent to instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif0_areset_n_rcosc_q1. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"d:\libero11.8\m2s_dg0440_liberov11p7sp2_df\sf2_modbus_tcp_ref_design_df\libero\sf2_modbus_tcp\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":912:4:912:9|Removing sequential instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif3_areset_n_rcosc_q1 because it is equivalent to instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif0_areset_n_rcosc_q1. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"d:\libero11.8\m2s_dg0440_liberov11p7sp2_df\sf2_modbus_tcp_ref_design_df\libero\sf2_modbus_tcp\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":898:4:898:9|Removing sequential instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif2_areset_n_rcosc_q1 because it is equivalent to instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif0_areset_n_rcosc_q1. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"d:\libero11.8\m2s_dg0440_liberov11p7sp2_df\sf2_modbus_tcp_ref_design_df\libero\sf2_modbus_tcp\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":755:4:755:9|Removing sequential instance Modbus_TCP_top_sb_0.CORERESETP_0.sm0_areset_n_q1 because it is equivalent to instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif3_areset_n_q1. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"d:\libero11.8\m2s_dg0440_liberov11p7sp2_df\sf2_modbus_tcp_ref_design_df\libero\sf2_modbus_tcp\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":912:4:912:9|Removing sequential instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif3_areset_n_rcosc because it is equivalent to instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif2_areset_n_rcosc. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"d:\libero11.8\m2s_dg0440_liberov11p7sp2_df\sf2_modbus_tcp_ref_design_df\libero\sf2_modbus_tcp\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":898:4:898:9|Removing sequential instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif2_areset_n_rcosc because it is equivalent to instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif1_areset_n_rcosc. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"d:\libero11.8\m2s_dg0440_liberov11p7sp2_df\sf2_modbus_tcp_ref_design_df\libero\sf2_modbus_tcp\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":884:4:884:9|Removing sequential instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif1_areset_n_rcosc because it is equivalent to instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif0_areset_n_rcosc. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: BN132 :"d:\libero11.8\m2s_dg0440_liberov11p7sp2_df\sf2_modbus_tcp_ref_design_df\libero\sf2_modbus_tcp\component\actel\directcore\coreresetp\7.1.100\rtl\vlog\core\coreresetp.v":839:4:839:9|Removing sequential instance Modbus_TCP_top_sb_0.CORERESETP_0.sdif3_areset_n_clk_base because it is equivalent to instance Modbus_TCP_top_sb_0.CORERESETP_0.sm0_areset_n_clk_base. To keep the instance, apply constraint syn_preserve=1 on the instance.
@W: MT246 :"d:\libero11.8\m2s_dg0440_liberov11p7sp2_df\sf2_modbus_tcp_ref_design_df\libero\sf2_modbus_tcp\component\work\modbus_tcp_top_sb\ccc_0\modbus_tcp_top_sb_ccc_0_fccc.v":23:36:23:43|Blackbox CCC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT420 |Found inferred clock Modbus_TCP_top_SERDES_IF_0_SERDES_IF|REFCLK1_OUT_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:SERDES_IF_0.REFCLK1_OUT"
@W: MT447 :"d:/libero11.8/m2s_dg0440_liberov11p7sp2_df/sf2_modbus_tcp_ref_design_df/libero/sf2_modbus_tcp/designer/modbus_tcp_top/synthesis.fdc":20:0:20:0|Timing constraint (from [get_cells { Modbus_TCP_top_sb_0.CORERESETP_0.MSS_HPMS_READY_int }] to [get_cells { Modbus_TCP_top_sb_0.CORERESETP_0.sm0_areset_n_rcosc Modbus_TCP_top_sb_0.CORERESETP_0.sm0_areset_n_rcosc_q1 }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design 
@W: MT447 :"d:/libero11.8/m2s_dg0440_liberov11p7sp2_df/sf2_modbus_tcp_ref_design_df/libero/sf2_modbus_tcp/designer/modbus_tcp_top/synthesis.fdc":21:0:21:0|Timing constraint (from [get_cells { Modbus_TCP_top_sb_0.CORERESETP_0.MSS_HPMS_READY_int Modbus_TCP_top_sb_0.CORERESETP_0.SDIF*_PERST_N_re }] to [get_cells { Modbus_TCP_top_sb_0.CORERESETP_0.sdif*_areset_n_rcosc* }]) (false path) was not applied to the design because none of the paths specified by the constraint exist in the design 
@W: MT447 :"d:/libero11.8/m2s_dg0440_liberov11p7sp2_df/sf2_modbus_tcp_ref_design_df/libero/sf2_modbus_tcp/designer/modbus_tcp_top/synthesis.fdc":22:0:22:0|Timing constraint (through [get_nets { Modbus_TCP_top_sb_0.CORERESETP_0.*sdif*_phr.hot_reset_n Modbus_TCP_top_sb_0.CORERESETP_0.*sdif*_phr.sdif_core_reset_n_0 }]) (false path) was not applied to the design because none of the '-through' objects specified by the constraint exist in the design 
@W: MT447 :"d:/libero11.8/m2s_dg0440_liberov11p7sp2_df/sf2_modbus_tcp_ref_design_df/libero/sf2_modbus_tcp/designer/modbus_tcp_top/synthesis.fdc":23:0:23:0|Timing constraint (to [get_cells { Modbus_TCP_top_sb_0.CORERESETP_0.*sdif*_phr.ltssm_q1[*] Modbus_TCP_top_sb_0.CORERESETP_0.*sdif*_phr.psel_q1 Modbus_TCP_top_sb_0.CORERESETP_0.*sdif*_phr.pwrite_q1 }]) (false path) was not applied to the design because none of the '-to' objects specified by the constraint exist in the design 
@W: MT443 :"d:/libero11.8/m2s_dg0440_liberov11p7sp2_df/sf2_modbus_tcp_ref_design_df/libero/sf2_modbus_tcp/designer/modbus_tcp_top/synthesis.fdc":25:0:25:0|Timing constraint (through [get_nets { Modbus_TCP_top_sb_0.CORECONFIGP_0.FIC_2_APB_M_PSEL Modbus_TCP_top_sb_0.CORECONFIGP_0.FIC_2_APB_M_PENABLE }] to [get_cells { Modbus_TCP_top_sb_0.CORECONFIGP_0.FIC_2_APB_M_PREADY* Modbus_TCP_top_sb_0.CORECONFIGP_0.state[0] }]) (max delay 0.000000) was not applied to the design because none of the paths specified by the constraint exist in the design 
