@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefft_0\rtl\in_place\vlog\core\corefft_top.v":78:39:78:49|Tristate driver OVFLOW_FLAG on net OVFLOW_FLAG has its enable tied to GND (module FIR_FILTER_top_COREFFT_0_COREFFT_Z1) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefft_0\rtl\in_place\vlog\core\corefft_top.v":78:34:78:36|Tristate driver RFS on net RFS has its enable tied to GND (module FIR_FILTER_top_COREFFT_0_COREFFT_Z1) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_1 on net DATAO_1 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_2 on net DATAO_2 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_3 on net DATAO_3 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_4 on net DATAO_4 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_5 on net DATAO_5 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_6 on net DATAO_6 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_7 on net DATAO_7 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_8 on net DATAO_8 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_9 on net DATAO_9 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_10 on net DATAO_10 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_11 on net DATAO_11 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_12 on net DATAO_12 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_13 on net DATAO_13 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_14 on net DATAO_14 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_15 on net DATAO_15 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_16 on net DATAO_16 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_17 on net DATAO_17 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_18 on net DATAO_18 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_19 on net DATAO_19 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_20 on net DATAO_20 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_21 on net DATAO_21 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_22 on net DATAO_22 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_23 on net DATAO_23 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_24 on net DATAO_24 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_25 on net DATAO_25 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_26 on net DATAO_26 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_27 on net DATAO_27 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_28 on net DATAO_28 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_29 on net DATAO_29 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_30 on net DATAO_30 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_31 on net DATAO_31 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_32 on net DATAO_32 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_33 on net DATAO_33 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_34 on net DATAO_34 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_35 on net DATAO_35 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefir_0\rtl\vlog\core\top\corefir.v":96:62:96:66|Tristate driver DATAO_36 on net DATAO_36 has its enable tied to GND (module FIR_FILTER_top_COREFIR_0_COREFIR_Z3) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter\fabosc_0\fir_filter_fabosc_0_osc.v":20:7:20:16|Tristate driver XTLOSC_O2F on net XTLOSC_O2F has its enable tied to GND (module FIR_FILTER_FABOSC_0_OSC) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter\fabosc_0\fir_filter_fabosc_0_osc.v":19:7:19:16|Tristate driver XTLOSC_CCC on net XTLOSC_CCC has its enable tied to GND (module FIR_FILTER_FABOSC_0_OSC) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter\fabosc_0\fir_filter_fabosc_0_osc.v":18:7:18:20|Tristate driver RCOSC_1MHZ_O2F on net RCOSC_1MHZ_O2F has its enable tied to GND (module FIR_FILTER_FABOSC_0_OSC) 
@W: MO111 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter\fabosc_0\fir_filter_fabosc_0_osc.v":17:7:17:20|Tristate driver RCOSC_1MHZ_CCC on net RCOSC_1MHZ_CCC has its enable tied to GND (module FIR_FILTER_FABOSC_0_OSC) 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":676:4:676:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF0_PERST_N_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":695:4:695:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF1_PERST_N_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":714:4:714:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF2_PERST_N_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":733:4:733:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF3_PERST_N_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":676:4:676:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF0_PERST_N_q2 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":695:4:695:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF1_PERST_N_q2 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":714:4:714:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF2_PERST_N_q2 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":733:4:733:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF3_PERST_N_q2 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":676:4:676:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF0_PERST_N_q3 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":695:4:695:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF1_PERST_N_q3 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":714:4:714:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF2_PERST_N_q3 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":733:4:733:9|Sequential instance FIR_FILTER_0.CORERESETP_0.SDIF3_PERST_N_q3 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":769:4:769:9|Sequential instance FIR_FILTER_0.CORERESETP_0.sm1_areset_n_q1 reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":769:4:769:9|Sequential instance FIR_FILTER_0.CORERESETP_0.sm1_areset_n_clk_base reduced to a combinational gate by constant propagation 
@W: MO171 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1388:4:1388:9|Sequential instance FIR_FILTER_0.CORERESETP_0.RESET_N_F2M_int reduced to a combinational gate by constant propagation 
@W: BN132 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance COREFFT_0.genblk1.DUT_INPLACE.bfly_0.cmplx_0.genblk1.cmplx18_0.half_1.genblk1.dly_d.genblk1.delayLine_0_[15:0],  because it is equivalent to instance COREFFT_0.genblk1.DUT_INPLACE.bfly_0.cmplx_0.genblk1.cmplx18_0.half_0.genblk1.dly_d.genblk1.delayLine_0_[15:0]
@W: BN132 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":55:6:55:11|Removing sequential instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.taps.tap[6].a_tap.symm_tap.symm_add_balance_0.genblk1.delayLine_0_,  because it is equivalent to instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.odd_tap.last_tap.symm_add_balance_0.genblk1.delayLine_0_
@W: BN132 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":55:6:55:11|Removing sequential instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.taps.tap[0].a_tap.symm_tap.symm_add_balance_0.genblk1.delayLine_0_,  because it is equivalent to instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.odd_tap.last_tap.symm_add_balance_0.genblk1.delayLine_0_
@W: BN132 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":55:6:55:11|Removing sequential instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.taps.tap[7].a_tap.symm_tap.symm_add_balance_0.genblk1.delayLine_0_,  because it is equivalent to instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.odd_tap.last_tap.symm_add_balance_0.genblk1.delayLine_0_
@W: BN132 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":55:6:55:11|Removing sequential instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.taps.tap[14].a_tap.symm_tap.symm_add_balance_0.genblk1.delayLine_0_,  because it is equivalent to instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.odd_tap.last_tap.symm_add_balance_0.genblk1.delayLine_0_
@W: BN132 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":55:6:55:11|Removing sequential instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.taps.tap[12].a_tap.symm_tap.symm_add_balance_0.genblk1.delayLine_0_,  because it is equivalent to instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.odd_tap.last_tap.symm_add_balance_0.genblk1.delayLine_0_
@W: BN132 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":55:6:55:11|Removing sequential instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.taps.tap[3].a_tap.symm_tap.symm_add_balance_0.genblk1.delayLine_0_,  because it is equivalent to instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.odd_tap.last_tap.symm_add_balance_0.genblk1.delayLine_0_
@W: BN132 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":55:6:55:11|Removing sequential instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.taps.tap[10].a_tap.symm_tap.symm_add_balance_0.genblk1.delayLine_0_,  because it is equivalent to instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.odd_tap.last_tap.symm_add_balance_0.genblk1.delayLine_0_
@W: BN132 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":55:6:55:11|Removing sequential instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.taps.tap[8].a_tap.symm_tap.symm_add_balance_0.genblk1.delayLine_0_,  because it is equivalent to instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.odd_tap.last_tap.symm_add_balance_0.genblk1.delayLine_0_
@W: BN132 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":55:6:55:11|Removing sequential instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.taps.tap[11].a_tap.symm_tap.symm_add_balance_0.genblk1.delayLine_0_,  because it is equivalent to instance COREFIR_0.enum_g4.enum_fir_g4.fir_enum_g4_0.odd_tap.last_tap.symm_add_balance_0.genblk1.delayLine_0_
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:121:33|Net DATAHANDLE_FSM_0.FIR_RADDR6 appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:116:33|Net DATAHANDLE_FSM_0.FIR_RADDR5 appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:111:28|Net DATAHANDLE_FSM_0.FIR_RADDR4 appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:121:33|Net DATAHANDLE_FSM_0.un1_FIR_ENABLE_2 appears to be an unidentified clock source. Assuming default frequency. 
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap6ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap6ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap0ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap0ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap7ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap7ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap14ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap14ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap12ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap12ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap3ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap3ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap10ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap10ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap8ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap8ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap11ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap11ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap5ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap5ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap9ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap9ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap1ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap1ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap2ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap2ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap13ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap13ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: FX665 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefir\8.6.101\rtl\vlog\core\kit.v":90:6:90:11|Removing instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap4ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[17] because it is equivalent to instance COREFIR_0.enum_g4enum_fir_g4.fir_enum_g4_0.tapstap4ݮa_tap.symm_tappipe_reg_0.genblk1delayLine_0_[16]
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:121:33|Net DATAHANDLE_FSM_0.un1_FIR_ENABLE_2 appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:111:28|Net DATAHANDLE_FSM_0.FIR_RADDR4 appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:121:33|Net DATAHANDLE_FSM_0.FIR_RADDR6 appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:116:33|Net DATAHANDLE_FSM_0.FIR_RADDR5 appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:121:33|Net DATAHANDLE_FSM_0.un1_FIR_ENABLE_2 appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:111:28|Net DATAHANDLE_FSM_0.FIR_RADDR4 appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:121:33|Net DATAHANDLE_FSM_0.FIR_RADDR6 appears to be an unidentified clock source. Assuming default frequency. 
@W: MT462 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":111:9:116:33|Net DATAHANDLE_FSM_0.FIR_RADDR5 appears to be an unidentified clock source. Assuming default frequency. 
@W: MT246 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter\ccc_0\fir_filter_ccc_0_fccc.v":20:36:20:43|Blackbox CCC is missing a user supplied timing model. This may have a negative effect on timing analysis and optimizations (Quality of Results) 
@W: MT420 |Found inferred clock FIR_FILTER_FABOSC_0_OSC|RCOSC_25_50MHZ_CCC_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:FIR_FILTER_0.FABOSC_0.RCOSC_25_50MHZ_CCC"
@W: MT420 |Found inferred clock FIR_FILTER_CCC_0_FCCC|GL0_net_inferred_clock with period 10.00ns. Please declare a user-defined clock on object "n:FIR_FILTER_0.CCC_0.GL0_net"
@W: MT420 |Found inferred clock fft_inpl_slowClock|divider_inferred_clock[2] with period 10.00ns. Please declare a user-defined clock on object "n:COREFFT_0.genblk1\.DUT_INPLACE.slowClock_0.divider[2]"
