@N: MF248 |Running in 64-bit mode.
@N: MF667 |Clock conversion disabled 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rStage_dly2.genblk1\.delayLine_1_[3] of view:PrimLib.dffr(prim) in hierarchy view:COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rStage_dly2.genblk1\.delayLine_1_[4] of view:PrimLib.dffr(prim) in hierarchy view:COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine_1_[7] of view:PrimLib.dffr(prim) in hierarchy view:COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine_1_[8] of view:PrimLib.dffr(prim) in hierarchy view:COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine_1_[9] of view:PrimLib.dffr(prim) in hierarchy view:COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rStage_dly2.genblk1\.delayLine_0_[3] of view:PrimLib.dffr(prim) in hierarchy view:COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rStage_dly2.genblk1\.delayLine_0_[4] of view:PrimLib.dffr(prim) in hierarchy view:COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine_0_[7] of view:PrimLib.dffr(prim) in hierarchy view:COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine_0_[8] of view:PrimLib.dffr(prim) in hierarchy view:COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\kit.v":244:6:244:11|Removing sequential instance rTimer_dly2.genblk1\.delayLine_0_[9] of view:PrimLib.dffr(prim) in hierarchy view:COREFFT_LIB.fft_inpl_sm_top_256s_128s_8_3_10s_1s(verilog) because there are no references to its outputs 
@N: FX404 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\fftsm.v":671:19:671:68|Found addmux in view:COREFFT_LIB.fft_inpl_inBuf_fftA_pipe_8_3_1(verilog) inst bflyA_w[6:0] from un1_bflyA_w[6:0] 
@N: FX404 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\fftsm.v":671:19:671:68|Found addmux in view:COREFFT_LIB.fft_inpl_inBuf_fftA_pipe_8_3_0(verilog) inst bflyA_w[6:0] from un1_bflyA_w[6:0] 
@N: MO225 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\hdl\data_handle_fsm.v":128:0:128:5|No possible illegal states for state machine fsm[3:0],safe FSM implementation is disabled
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\fftsm.v":439:2:439:7|Removing sequential instance sm_0.rdFFTtimer_0.rStage_r[3] in hierarchy view:COREFFT_LIB.FIR_FILTER_top_COREFFT_0_COREFFT_INPLC_Z2(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\corefft\6.4.105\rtl\in_place\vlog\core\fftsm.v":439:2:439:7|Removing sequential instance sm_0.rdFFTtimer_0.rStage_r[4] in hierarchy view:COREFFT_LIB.FIR_FILTER_top_COREFFT_0_COREFFT_INPLC_Z2(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.INIT_DONE_int in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sm0_state[6] in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1613:4:1613:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.ddr_settled in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1646:4:1646:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.ddr_settled_q1 in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sdif3_spll_lock_q2 in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":929:4:929:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.CONFIG1_DONE_q1 in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":870:4:870:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sdif0_areset_n_rcosc in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":856:4:856:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sm0_areset_n_rcosc_q1 in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":755:4:755:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sm0_areset_n_q1 in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":755:4:755:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sm0_areset_n_clk_base in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1646:4:1646:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.ddr_settled_clk_base in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sm0_state[5] in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sm0_state[4] in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sm0_state[3] in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sm0_state[2] in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sm0_state[1] in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: BN362 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance FIR_FILTER_0.CORERESETP_0.sm0_state[0] in hierarchy view:work.FIR_FILTER_top(verilog) because there are no references to its outputs 
@N: MO106 :"e:\libero_11p7_updates\downloaded\sf2_eval_fir_filter_demo_df\design files\fir_filter_demo\component\work\fir_filter_top\corefft_0\twiddle32.v":35:4:35:7|Found ROM, 'COREFFT_0.genblk1\.DUT_INPLACE.lut_0.T_1[31:0]', 128 words by 32 bits 
@N: FP130 |Promoting Net FIR_FILTER_0_MSS_READY on CLKINT  I_241 
@N: FP130 |Promoting Net COREFFT_0.genblk1\.DUT_INPLACE.slowClock_0.divider_i_1[2] on CLKINT  I_242 
@N: BW103 |Synopsys Constraint File time units using default value of 1ns 
@N: BW107 |Synopsys Constraint File capacitance units using default value of 1pF 
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.
@N: MT322 |Clock constraints cover only FF-to-FF paths associated with the clock.
@N: MT582 |Estimated period and frequency not reported for given clock unless the clock has at least one timing path which is not a false or a max delay path and that does not have excessive slack
@N: MT320 |Timing report estimates place and route data. Please look at the place and route timing report for final timing.
@N: MT322 |Clock constraints cover only FF-to-FF paths associated with the clock.
@N: MT582 |Estimated period and frequency not reported for given clock unless the clock has at least one timing path which is not a false or a max delay path and that does not have excessive slack
