#### START OF AREA REPORT #####[
Part: M2S090TSFBGA484-1 (Microchip)
Click here to go to specific block report:
top
top_Coef_Buffer_TPSRAM
top_COREFFT_0_COREFFT_Z1
top_COREFFT_0_COREFFT_INPLC_Z2
fft_inpl_slowClock
fft_inpl_sm_top_256s_128s_8_3_10s_1s
fft_inpl_rdFFTtimer_128s_8_3_10s_1s
fft_inpl_counter_w_10_137s
fft_inpl_kitDelay_bit_reg_3s_0
fft_inpl_counter_5_7
fft_inpl_kitDelay_bit_reg_2s_5
fft_inpl_kitDelay_bit_reg_2s_5_0
fft_inpl_kitDelay_bit_reg_2s_5_1
fft_inpl_kitDelay_bit_reg_2s_5_2
fft_inpl_kitDelay_bit_reg_2s_5_3
fft_inpl_kitDelay_reg_10_2s
fft_inpl_kitDelay_reg_5_2s
fft_inpl_kitCountS_7_127s_0s
fft_inpl_inBuf_ldA_256s_8
fft_inpl_counter_8_255s
fft_inpl_inBuf_fftA_pipe_8_3_1
fft_inpl_twid_rA_8_3
fft_inpl_twid_wA_gen_8_3
fft_inpl_kitSync_ngrst_1s
fft_inpl_kitDelay_bit_reg_4s
fft_inpl_bcounter_7
fft_inpl_kitEdge_0s_0
fft_inpl_inBuf_fftA_pipe_8_3_0
fft_inpl_outBufA_256s_8_1s
fft_inpl_counter_8_255s_1
fft_inpl_kitDelay_bit_reg_3s_2
fft_inpl_kitDelay_bit_reg_1s_0
fft_inpl_kitDelay_reg_1s_10s
fft_inpl_kitDelay_reg_7_2s
fft_inpl_kitDelay_bit_reg_2s
fft_inpl_kitDelay_bit_reg_1s_1
fft_inpl_kitDelay_bit_reg_2s_0
top_COREFFT_0_inPlace_8_32s_1s_0s_19s
top_COREFFT_0_inBuffer_8_32s_1s_0s_19s
top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s
top_COREFFT_0_ram_smGen
top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_0
top_COREFFT_0_ram_smGen_0
top_COREFFT_0_inBuffer_8_32s_1s_0s_19s_0
top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_1
top_COREFFT_0_ram_smGen_1
top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_3
top_COREFFT_0_ram_smGen_2
fft_inpl_switch_32s_1
fft_inpl_bfly2_16s_16s_32s_32s_3s_19s
fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s
fft_inpl_cmplx_18_16s_0s_19s_44s
fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s
fft_inpl_kitDelay_reg_16s_1s
fft_inpl_kitDelay_reg_16s_1s_0
fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s
fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_0
fft_inpl_half_cmplx_18_16s_0s_0s_19s_44s_0_0s
fft_inpl_kitDelay_reg_16s_1s_1
fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_1
fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_2
fft_inpl_kitRndUp_16s_1s
fft_inpl_kitRndUp_16s_1s_0
fft_inpl_kitDelay_reg_16s_4s
fft_inpl_kitDelay_reg_16s_4s_0
fft_inpl_kitDelay_reg_2s_5s
top_COREFFT_0_twiddle_32s_8
top_COREFFT_0_twidLUT_8_32s_0s_19s
top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_2
top_COREFFT_0_ram_smGen_3
fft_inpl_switch_32s_0
top_COREFFT_0_outBuff_8_32s_0s_19s
top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_4
top_COREFFT_0_ram_smGen_4
top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_5
top_COREFFT_0_ram_smGen_5
fft_inpl_autoScale_0s_0s_4_1s
fft_inpl_kitEdge_0s_1
top_COREFIR_0_COREFIR_Z3
top_COREFIR_0_COREENUMFIR_G4_Z5
enum_kitDelay_reg_16s_2s
enum_kitDelay_reg_16s_2s_0
top_COREFIR_0_fir_enum_g4_Z4
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s
enum_kitDelay_reg_18s_1s
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1
top_COREFIR_0_add2_g4
top_COREFIR_0_mac18x18_enum_g4
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_0
enum_kitDelay_reg_18s_1s_0
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_0
top_COREFIR_0_add2_g4_0
top_COREFIR_0_mac18x18_enum_g4_0
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_2
enum_kitDelay_reg_18s_1s_1
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_1
top_COREFIR_0_add2_g4_1
top_COREFIR_0_mac18x18_enum_g4_1
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_3
enum_kitDelay_reg_18s_1s_2
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_2
top_COREFIR_0_add2_g4_2
top_COREFIR_0_mac18x18_enum_g4_2
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_4
enum_kitDelay_reg_18s_1s_3
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_3
top_COREFIR_0_add2_g4_3
top_COREFIR_0_mac18x18_enum_g4_3
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_5
enum_kitDelay_reg_18s_1s_4
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_4
top_COREFIR_0_add2_g4_4
top_COREFIR_0_mac18x18_enum_g4_4
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_6
enum_kitDelay_reg_18s_1s_5
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_5
top_COREFIR_0_add2_g4_5
top_COREFIR_0_mac18x18_enum_g4_5
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_7
enum_kitDelay_reg_18s_1s_6
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_6
top_COREFIR_0_add2_g4_6
top_COREFIR_0_mac18x18_enum_g4_6
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_8
enum_kitDelay_reg_18s_1s_7
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_7
top_COREFIR_0_add2_g4_7
top_COREFIR_0_mac18x18_enum_g4_7
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_9
enum_kitDelay_reg_18s_1s_8
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_8
top_COREFIR_0_add2_g4_8
top_COREFIR_0_mac18x18_enum_g4_8
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_10
enum_kitDelay_reg_18s_1s_9
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_9
top_COREFIR_0_add2_g4_9
top_COREFIR_0_mac18x18_enum_g4_9
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_11
enum_kitDelay_reg_18s_1s_10
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_10
top_COREFIR_0_add2_g4_10
top_COREFIR_0_mac18x18_enum_g4_10
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_12
enum_kitDelay_reg_18s_1s_11
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_11
top_COREFIR_0_add2_g4_11
top_COREFIR_0_mac18x18_enum_g4_11
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_1
enum_kitDelay_reg_18s_1s_12
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_14
top_COREFIR_0_add2_g4_1_12
top_COREFIR_0_mac18x18_enum_g4_1_12
top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_13
enum_kitDelay_reg_18s_1s_13
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_12
top_COREFIR_0_add2_g4_12
top_COREFIR_0_mac18x18_enum_g4_12
top_COREFIR_0_odd_symmetry_tap_enum_g4_16s_0s_16s_0s_44_4s
enum_kitDelay_reg_16s_1s
top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_16
top_COREFIR_0_add2_g4_1_14
top_COREFIR_0_mac18x18_enum_g4_1_14
enum_kitDelay_bit_reg_1s_14
enum_kitSync_ngrst_1s
enum_kitDelay_bit_reg_4s
top_COREFIR_0_wide_coef_16s_16s_1s_1s
enum_coef_sr_16s_16s
enum_kitDelay_bit_reg_45
enum_kitDelay_bit_reg_3s
enum_kitDelay_bit_reg_2s
enum_kitDelay_bit_reg_2s_0
enum_kitDelay_bit_reg_2s_1
DATAHANDLE_FSM_16s_16s
top_FFT_IM_Buffer_TPSRAM
top_FFT_RE_Buffer_TPSRAM
FILTERCONTROL_FSM
FIR_FILTER
FIR_FILTER_CCC_0_FCCC
CoreAPB3_Z6
CoreResetP_Z7
FIR_FILTER_FABOSC_0_OSC
FIR_FILTER_MSS
top_FIR_IN_Buffer_TPSRAM
top_FIR_OUT_Buffer_TPSRAM
-------------------------------------------------------------------
######## Utilization report for Top level view: top ########
===================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2231 100 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top: 2231 (54.06 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 998 100 %
ARI1 483 100 %
BLACK BOX 4 100 %
======================================================
Total COMBINATIONAL LOGIC in the block top: 1485 (35.98 % Utilization)
Top
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 20 100 %
=================================================
Total DSP in the block top: 20 (0.48 % Utilization)
Top
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 12 100 %
====================================================
Total MEMORY ELEMENTS in the block top: 12 (0.29 % Utilization)
Top
GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 7 100 %
===================================================
Total GLOBAL BUFFERS in the block top: 7 (0.17 % Utilization)
Top
IO PADS
Name Total elements Utilization Notes
-------------------------------------------------
IO 2 100 %
=================================================
Total IO PADS in the block top: 2 (0.05 % Utilization)
Top
----------------------------------------------------------------------------
######## Utilization report for cell: DATAHANDLE_FSM_16s_16s ########
Instance path: top.DATAHANDLE_FSM_16s_16s
============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 52 2.33 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top.DATAHANDLE_FSM_16s_16s: 52 (1.26 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 50 5.01 %
=================================================
Total COMBINATIONAL LOGIC in the block top.DATAHANDLE_FSM_16s_16s: 50 (1.21 % Utilization)
Top
GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 4 57.1 %
===================================================
Total GLOBAL BUFFERS in the block top.DATAHANDLE_FSM_16s_16s: 4 (0.10 % Utilization)
Top
-----------------------------------------------------------------------
######## Utilization report for cell: FILTERCONTROL_FSM ########
Instance path: top.FILTERCONTROL_FSM
=======================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 34 1.52 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top.FILTERCONTROL_FSM: 34 (0.82 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 22 2.2 %
ARI1 29 6 %
=================================================
Total COMBINATIONAL LOGIC in the block top.FILTERCONTROL_FSM: 51 (1.24 % Utilization)
Top
----------------------------------------------------------------
######## Utilization report for cell: FIR_FILTER ########
Instance path: top.FIR_FILTER
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 10 0.4480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top.FIR_FILTER: 10 (0.24 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 20 2 %
BLACK BOX 4 100 %
======================================================
Total COMBINATIONAL LOGIC in the block top.FIR_FILTER: 24 (0.58 % Utilization)
Top
GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 2 28.6 %
===================================================
Total GLOBAL BUFFERS in the block top.FIR_FILTER: 2 (0.05 % Utilization)
Top
IO PADS
Name Total elements Utilization Notes
-------------------------------------------------
IO 2 100 %
=================================================
Total IO PADS in the block top.FIR_FILTER: 2 (0.05 % Utilization)
Top
-----------------------------------------------------------------
######## Utilization report for cell: CoreAPB3_Z6 ########
Instance path: FIR_FILTER.CoreAPB3_Z6
=================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 2 0.20 %
=================================================
Total COMBINATIONAL LOGIC in the block FIR_FILTER.CoreAPB3_Z6: 2 (0.05 % Utilization)
Top
-------------------------------------------------------------------
######## Utilization report for cell: CoreResetP_Z7 ########
Instance path: FIR_FILTER.CoreResetP_Z7
===================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 10 0.4480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block FIR_FILTER.CoreResetP_Z7: 10 (0.24 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 2 0.20 %
=================================================
Total COMBINATIONAL LOGIC in the block FIR_FILTER.CoreResetP_Z7: 2 (0.05 % Utilization)
Top
GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 1 14.3 %
===================================================
Total GLOBAL BUFFERS in the block FIR_FILTER.CoreResetP_Z7: 1 (0.02 % Utilization)
Top
---------------------------------------------------------------------------
######## Utilization report for cell: FIR_FILTER_CCC_0_FCCC ########
Instance path: FIR_FILTER.FIR_FILTER_CCC_0_FCCC
===========================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 1 25 %
======================================================
Total COMBINATIONAL LOGIC in the block FIR_FILTER.FIR_FILTER_CCC_0_FCCC: 1 (0.02 % Utilization)
Top
GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 1 14.3 %
===================================================
Total GLOBAL BUFFERS in the block FIR_FILTER.FIR_FILTER_CCC_0_FCCC: 1 (0.02 % Utilization)
Top
-----------------------------------------------------------------------------
######## Utilization report for cell: FIR_FILTER_FABOSC_0_OSC ########
Instance path: FIR_FILTER.FIR_FILTER_FABOSC_0_OSC
=============================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 1 25 %
======================================================
Total COMBINATIONAL LOGIC in the block FIR_FILTER.FIR_FILTER_FABOSC_0_OSC: 1 (0.02 % Utilization)
Top
--------------------------------------------------------------------
######## Utilization report for cell: FIR_FILTER_MSS ########
Instance path: FIR_FILTER.FIR_FILTER_MSS
====================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 16 1.6 %
BLACK BOX 1 25 %
======================================================
Total COMBINATIONAL LOGIC in the block FIR_FILTER.FIR_FILTER_MSS: 17 (0.41 % Utilization)
Top
IO PADS
Name Total elements Utilization Notes
-------------------------------------------------
IO 2 100 %
=================================================
Total IO PADS in the block FIR_FILTER.FIR_FILTER_MSS: 2 (0.05 % Utilization)
Top
------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_COREFFT_Z1 ########
Instance path: top.top_COREFFT_0_COREFFT_Z1
==============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1004 45 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top.top_COREFFT_0_COREFFT_Z1: 1004 (24.33 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 856 85.8 %
ARI1 199 41.2 %
=================================================
Total COMBINATIONAL LOGIC in the block top.top_COREFFT_0_COREFFT_Z1: 1055 (25.56 % Utilization)
Top
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 4 20 %
=================================================
Total DSP in the block top.top_COREFFT_0_COREFFT_Z1: 4 (0.10 % Utilization)
Top
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 7 58.3 %
====================================================
Total MEMORY ELEMENTS in the block top.top_COREFFT_0_COREFFT_Z1: 7 (0.17 % Utilization)
Top
GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 1 14.3 %
===================================================
Total GLOBAL BUFFERS in the block top.top_COREFFT_0_COREFFT_Z1: 1 (0.02 % Utilization)
Top
------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_COREFFT_INPLC_Z2 ########
Instance path: top_COREFFT_0_COREFFT_Z1.top_COREFFT_0_COREFFT_INPLC_Z2
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1004 45 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_COREFFT_Z1.top_COREFFT_0_COREFFT_INPLC_Z2: 1004 (24.33 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 856 85.8 %
ARI1 199 41.2 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_COREFFT_Z1.top_COREFFT_0_COREFFT_INPLC_Z2: 1055 (25.56 % Utilization)
Top
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 4 20 %
=================================================
Total DSP in the block top_COREFFT_0_COREFFT_Z1.top_COREFFT_0_COREFFT_INPLC_Z2: 4 (0.10 % Utilization)
Top
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 7 58.3 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_COREFFT_Z1.top_COREFFT_0_COREFFT_INPLC_Z2: 7 (0.17 % Utilization)
Top
GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 1 14.3 %
===================================================
Total GLOBAL BUFFERS in the block top_COREFFT_0_COREFFT_Z1.top_COREFFT_0_COREFFT_INPLC_Z2: 1 (0.02 % Utilization)
Top
-----------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_autoScale_0s_0s_4_1s ########
Instance path: top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_autoScale_0s_0s_4_1s
===================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 4 0.1790 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_autoScale_0s_0s_4_1s: 4 (0.10 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 6 0.6010 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_autoScale_0s_0s_4_1s: 6 (0.15 % Utilization)
Top
---------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitEdge_0s_1 ########
Instance path: fft_inpl_autoScale_0s_0s_4_1s.fft_inpl_kitEdge_0s_1
===========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1 0.04480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_autoScale_0s_0s_4_1s.fft_inpl_kitEdge_0s_1: 1 (0.02 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 0.10 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_autoScale_0s_0s_4_1s.fft_inpl_kitEdge_0s_1: 1 (0.02 % Utilization)
Top
-------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_bfly2_16s_16s_32s_32s_3s_19s ########
Instance path: top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_bfly2_16s_16s_32s_32s_3s_19s
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 281 12.6 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_bfly2_16s_16s_32s_32s_3s_19s: 281 (6.81 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 63 6.31 %
ARI1 98 20.3 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_bfly2_16s_16s_32s_32s_3s_19s: 161 (3.90 % Utilization)
Top
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 4 20 %
=================================================
Total DSP in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_bfly2_16s_16s_32s_32s_3s_19s: 4 (0.10 % Utilization)
Top
-------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s ########
Instance path: fft_inpl_bfly2_16s_16s_32s_32s_3s_19s.fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 80 3.59 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_bfly2_16s_16s_32s_32s_3s_19s.fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s: 80 (1.94 % Utilization)
Top
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 34 7.04 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_bfly2_16s_16s_32s_32s_3s_19s.fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s: 34 (0.82 % Utilization)
Top
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 4 20 %
=================================================
Total DSP in the block fft_inpl_bfly2_16s_16s_32s_32s_3s_19s.fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s: 4 (0.10 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_cmplx_18_16s_0s_19s_44s ########
Instance path: fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s.fft_inpl_cmplx_18_16s_0s_19s_44s
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 48 2.15 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s.fft_inpl_cmplx_18_16s_0s_19s_44s: 48 (1.16 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 4 20 %
=================================================
Total DSP in the block fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s.fft_inpl_cmplx_18_16s_0s_19s_44s: 4 (0.10 % Utilization)
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---------------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_half_cmplx_18_16s_0s_0s_19s_44s_0_0s ########
Instance path: fft_inpl_cmplx_18_16s_0s_19s_44s.fft_inpl_half_cmplx_18_16s_0s_0s_19s_44s_0_0s
===================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.7170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_cmplx_18_16s_0s_19s_44s.fft_inpl_half_cmplx_18_16s_0s_0s_19s_44s_0_0s: 16 (0.39 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 2 10 %
=================================================
Total DSP in the block fft_inpl_cmplx_18_16s_0s_19s_44s.fft_inpl_half_cmplx_18_16s_0s_0s_19s_44s_0_0s: 2 (0.05 % Utilization)
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---------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_reg_16s_1s_1 ########
Instance path: fft_inpl_half_cmplx_18_16s_0s_0s_19s_44s_0_0s.fft_inpl_kitDelay_reg_16s_1s_1
=============================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.7170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_half_cmplx_18_16s_0s_0s_19s_44s_0_0s.fft_inpl_kitDelay_reg_16s_1s_1: 16 (0.39 % Utilization)
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-------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_1 ########
Instance path: fft_inpl_half_cmplx_18_16s_0s_0s_19s_44s_0_0s.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_1
===================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block fft_inpl_half_cmplx_18_16s_0s_0s_19s_44s_0_0s.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_1: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_2 ########
Instance path: fft_inpl_half_cmplx_18_16s_0s_0s_19s_44s_0_0s.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_2
===================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block fft_inpl_half_cmplx_18_16s_0s_0s_19s_44s_0_0s.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_2: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s ########
Instance path: fft_inpl_cmplx_18_16s_0s_19s_44s.fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s
===================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 32 1.43 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_cmplx_18_16s_0s_19s_44s.fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s: 32 (0.78 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 2 10 %
=================================================
Total DSP in the block fft_inpl_cmplx_18_16s_0s_19s_44s.fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s: 2 (0.05 % Utilization)
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-------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_reg_16s_1s ########
Instance path: fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s.fft_inpl_kitDelay_reg_16s_1s
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.7170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s.fft_inpl_kitDelay_reg_16s_1s: 16 (0.39 % Utilization)
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---------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_reg_16s_1s_0 ########
Instance path: fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s.fft_inpl_kitDelay_reg_16s_1s_0
=============================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.7170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s.fft_inpl_kitDelay_reg_16s_1s_0: 16 (0.39 % Utilization)
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-----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s ########
Instance path: fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s
=================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_0 ########
Instance path: fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_0
===================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block fft_inpl_half_cmplx_18_16s_1s_0s_19s_44s_1_0s.fft_inpl_mac18x18mx_16s_16s_0s_0s_0s_19s_0_0_0_44s_0: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitRndUp_16s_1s ########
Instance path: fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s.fft_inpl_kitRndUp_16s_1s
==============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.7170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s.fft_inpl_kitRndUp_16s_1s: 16 (0.39 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s.fft_inpl_kitRndUp_16s_1s: 17 (0.41 % Utilization)
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--------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitRndUp_16s_1s_0 ########
Instance path: fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s.fft_inpl_kitRndUp_16s_1s_0
================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.7170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s.fft_inpl_kitRndUp_16s_1s_0: 16 (0.39 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_cmplx_rnd_16s_0s_19s_1s_44s.fft_inpl_kitRndUp_16s_1s_0: 17 (0.41 % Utilization)
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-----------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_reg_16s_4s ########
Instance path: fft_inpl_bfly2_16s_16s_32s_32s_3s_19s.fft_inpl_kitDelay_reg_16s_4s
===================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 64 2.87 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_bfly2_16s_16s_32s_32s_3s_19s.fft_inpl_kitDelay_reg_16s_4s: 64 (1.55 % Utilization)
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-------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_reg_16s_4s_0 ########
Instance path: fft_inpl_bfly2_16s_16s_32s_32s_3s_19s.fft_inpl_kitDelay_reg_16s_4s_0
=====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 64 2.87 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_bfly2_16s_16s_32s_32s_3s_19s.fft_inpl_kitDelay_reg_16s_4s_0: 64 (1.55 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_reg_2s_5s ########
Instance path: fft_inpl_bfly2_16s_16s_32s_32s_3s_19s.fft_inpl_kitDelay_reg_2s_5s
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 10 0.4480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_bfly2_16s_16s_32s_32s_3s_19s.fft_inpl_kitDelay_reg_2s_5s: 10 (0.24 % Utilization)
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------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_slowClock ########
Instance path: top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_slowClock
========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 3 0.1340 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_slowClock: 3 (0.07 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 4 0.4010 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_slowClock: 4 (0.10 % Utilization)
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GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 1 14.3 %
===================================================
Total GLOBAL BUFFERS in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_slowClock: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_sm_top_256s_128s_8_3_10s_1s ########
Instance path: top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_sm_top_256s_128s_8_3_10s_1s
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 275 12.3 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_sm_top_256s_128s_8_3_10s_1s: 275 (6.66 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 177 17.7 %
ARI1 59 12.2 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_sm_top_256s_128s_8_3_10s_1s: 236 (5.72 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_inBuf_fftA_pipe_8_3_0 ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_inBuf_fftA_pipe_8_3_0
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 48 2.15 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_inBuf_fftA_pipe_8_3_0: 48 (1.16 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 25 2.51 %
ARI1 7 1.45 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_inBuf_fftA_pipe_8_3_0: 32 (0.78 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_inBuf_fftA_pipe_8_3_1 ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_inBuf_fftA_pipe_8_3_1
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 49 2.2 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_inBuf_fftA_pipe_8_3_1: 49 (1.19 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 25 2.51 %
ARI1 7 1.45 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_inBuf_fftA_pipe_8_3_1: 32 (0.78 % Utilization)
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-------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_inBuf_ldA_256s_8 ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_inBuf_ldA_256s_8
===============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 11 0.4930 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_inBuf_ldA_256s_8: 11 (0.27 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 10 1 %
ARI1 9 1.86 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_inBuf_ldA_256s_8: 19 (0.46 % Utilization)
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-----------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_counter_8_255s ########
Instance path: fft_inpl_inBuf_ldA_256s_8.fft_inpl_counter_8_255s
=============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 9 0.4030 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_inBuf_ldA_256s_8.fft_inpl_counter_8_255s: 9 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 6 0.6010 %
ARI1 9 1.86 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_inBuf_ldA_256s_8.fft_inpl_counter_8_255s: 15 (0.36 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitCountS_7_127s_0s ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitCountS_7_127s_0s
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 7 0.3140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitCountS_7_127s_0s: 7 (0.17 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 8 1.66 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitCountS_7_127s_0s: 8 (0.19 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_1s_1 ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_1s_1
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1 0.04480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_1s_1: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_2s ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 0.08960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s: 2 (0.05 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_2s_0 ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_0
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 0.08960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_0: 2 (0.05 % Utilization)
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---------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_reg_10_2s ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_reg_10_2s
=================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.6280 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_reg_10_2s: 14 (0.34 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_reg_1s_10s ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_reg_1s_10s
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 10 0.4480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_reg_1s_10s: 10 (0.24 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 9 0.9020 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_reg_1s_10s: 9 (0.22 % Utilization)
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--------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_reg_5_2s ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_reg_5_2s
================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 6 0.2690 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_reg_5_2s: 6 (0.15 % Utilization)
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--------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_reg_7_2s ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_reg_7_2s
================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.6280 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitDelay_reg_7_2s: 14 (0.34 % Utilization)
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---------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitEdge_0s_0 ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitEdge_0s_0
===========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1 0.04480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitEdge_0s_0: 1 (0.02 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 0.10 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_kitEdge_0s_0: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_outBufA_256s_8_1s ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_outBufA_256s_8_1s
================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 22 0.9860 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_outBufA_256s_8_1s: 22 (0.53 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 13 1.3 %
ARI1 9 1.86 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_outBufA_256s_8_1s: 22 (0.53 % Utilization)
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-------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_counter_8_255s_1 ########
Instance path: fft_inpl_outBufA_256s_8_1s.fft_inpl_counter_8_255s_1
===============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 9 0.4030 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_outBufA_256s_8_1s.fft_inpl_counter_8_255s_1: 9 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 5 0.5010 %
ARI1 9 1.86 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_outBufA_256s_8_1s.fft_inpl_counter_8_255s_1: 14 (0.34 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_1s_0 ########
Instance path: fft_inpl_outBufA_256s_8_1s.fft_inpl_kitDelay_bit_reg_1s_0
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1 0.04480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_outBufA_256s_8_1s.fft_inpl_kitDelay_bit_reg_1s_0: 1 (0.02 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 0.10 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_outBufA_256s_8_1s.fft_inpl_kitDelay_bit_reg_1s_0: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_3s_2 ########
Instance path: fft_inpl_outBufA_256s_8_1s.fft_inpl_kitDelay_bit_reg_3s_2
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 3 0.1340 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_outBufA_256s_8_1s.fft_inpl_kitDelay_bit_reg_3s_2: 3 (0.07 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 3 0.3010 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_outBufA_256s_8_1s.fft_inpl_kitDelay_bit_reg_3s_2: 3 (0.07 % Utilization)
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-----------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_rdFFTtimer_128s_8_3_10s_1s ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_rdFFTtimer_128s_8_3_10s_1s
=========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 37 1.66 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_rdFFTtimer_128s_8_3_10s_1s: 37 (0.90 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 38 3.81 %
ARI1 11 2.28 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_rdFFTtimer_128s_8_3_10s_1s: 49 (1.19 % Utilization)
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--------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_counter_5_7 ########
Instance path: fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_counter_5_7
==========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 6 0.2690 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_counter_5_7: 6 (0.15 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 10 1 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_counter_5_7: 10 (0.24 % Utilization)
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--------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_counter_w_10_137s ########
Instance path: fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_counter_w_10_137s
================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 12 0.5380 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_counter_w_10_137s: 12 (0.29 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 7 0.7010 %
ARI1 11 2.28 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_counter_w_10_137s: 18 (0.44 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_2s_5 ########
Instance path: fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 0.08960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5: 2 (0.05 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 0.10 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_2s_5_0 ########
Instance path: fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_0
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 0.08960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_0: 2 (0.05 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 2 0.20 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_0: 2 (0.05 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_2s_5_1 ########
Instance path: fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_1
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 0.08960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_1: 2 (0.05 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 2 0.20 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_1: 2 (0.05 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_2s_5_2 ########
Instance path: fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_2
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 0.08960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_2: 2 (0.05 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 2 0.20 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_2: 2 (0.05 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_2s_5_3 ########
Instance path: fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_3
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 0.08960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_3: 2 (0.05 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 2 0.20 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_2s_5_3: 2 (0.05 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_3s_0 ########
Instance path: fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_3s_0
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 3 0.1340 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_rdFFTtimer_128s_8_3_10s_1s.fft_inpl_kitDelay_bit_reg_3s_0: 3 (0.07 % Utilization)
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--------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_twid_rA_8_3 ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_twid_rA_8_3
==========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 20 0.8960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_twid_rA_8_3: 20 (0.48 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 18 1.8 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_twid_rA_8_3: 18 (0.44 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_twid_wA_gen_8_3 ########
Instance path: fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_twid_wA_gen_8_3
==============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.7170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_twid_wA_gen_8_3: 16 (0.39 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 6 0.6010 %
ARI1 8 1.66 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_sm_top_256s_128s_8_3_10s_1s.fft_inpl_twid_wA_gen_8_3: 14 (0.34 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_bcounter_7 ########
Instance path: fft_inpl_twid_wA_gen_8_3.fft_inpl_bcounter_7
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 7 0.3140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_twid_wA_gen_8_3.fft_inpl_bcounter_7: 7 (0.17 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 8 1.66 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_twid_wA_gen_8_3.fft_inpl_bcounter_7: 8 (0.19 % Utilization)
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-------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitSync_ngrst_1s ########
Instance path: fft_inpl_twid_wA_gen_8_3.fft_inpl_kitSync_ngrst_1s
===============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 6 0.2690 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_twid_wA_gen_8_3.fft_inpl_kitSync_ngrst_1s: 6 (0.15 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 0.10 %
=================================================
Total COMBINATIONAL LOGIC in the block fft_inpl_twid_wA_gen_8_3.fft_inpl_kitSync_ngrst_1s: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_kitDelay_bit_reg_4s ########
Instance path: fft_inpl_kitSync_ngrst_1s.fft_inpl_kitDelay_bit_reg_4s
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 4 0.1790 %
=================================================
Total SEQUENTIAL ELEMENTS in the block fft_inpl_kitSync_ngrst_1s.fft_inpl_kitDelay_bit_reg_4s: 4 (0.10 % Utilization)
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---------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_switch_32s_0 ########
Instance path: top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_switch_32s_0
===========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 128 5.74 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_switch_32s_0: 128 (3.10 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 64 6.41 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_switch_32s_0: 64 (1.55 % Utilization)
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---------------------------------------------------------------------------
######## Utilization report for cell: fft_inpl_switch_32s_1 ########
Instance path: top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_switch_32s_1
===========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 130 5.83 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_switch_32s_1: 130 (3.15 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 64 6.41 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_COREFFT_INPLC_Z2.fft_inpl_switch_32s_1: 64 (1.55 % Utilization)
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-------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_inPlace_8_32s_1s_0s_19s ########
Instance path: top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_inPlace_8_32s_1s_0s_19s
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 20 0.8960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_inPlace_8_32s_1s_0s_19s: 20 (0.48 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 210 21 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_inPlace_8_32s_1s_0s_19s: 210 (5.09 % Utilization)
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MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 4 33.3 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_inPlace_8_32s_1s_0s_19s: 4 (0.10 % Utilization)
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---------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_inBuffer_8_32s_1s_0s_19s ########
Instance path: top_COREFFT_0_inPlace_8_32s_1s_0s_19s.top_COREFFT_0_inBuffer_8_32s_1s_0s_19s
=============================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 10 0.4480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_inPlace_8_32s_1s_0s_19s.top_COREFFT_0_inBuffer_8_32s_1s_0s_19s: 10 (0.24 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 73 7.31 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_inPlace_8_32s_1s_0s_19s.top_COREFFT_0_inBuffer_8_32s_1s_0s_19s: 73 (1.77 % Utilization)
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MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 2 16.7 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_inPlace_8_32s_1s_0s_19s.top_COREFFT_0_inBuffer_8_32s_1s_0s_19s: 2 (0.05 % Utilization)
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--------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s ########
Instance path: top_COREFFT_0_inBuffer_8_32s_1s_0s_19s.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s
==================================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_inBuffer_8_32s_1s_0s_19s.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_ram_smGen ########
Instance path: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s.top_COREFFT_0_ram_smGen
===================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s.top_COREFFT_0_ram_smGen: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_0 ########
Instance path: top_COREFFT_0_inBuffer_8_32s_1s_0s_19s.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_0
====================================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_inBuffer_8_32s_1s_0s_19s.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_0: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_ram_smGen_0 ########
Instance path: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_0.top_COREFFT_0_ram_smGen_0
=======================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_0.top_COREFFT_0_ram_smGen_0: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_inBuffer_8_32s_1s_0s_19s_0 ########
Instance path: top_COREFFT_0_inPlace_8_32s_1s_0s_19s.top_COREFFT_0_inBuffer_8_32s_1s_0s_19s_0
===============================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 10 0.4480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_inPlace_8_32s_1s_0s_19s.top_COREFFT_0_inBuffer_8_32s_1s_0s_19s_0: 10 (0.24 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 73 7.31 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_inPlace_8_32s_1s_0s_19s.top_COREFFT_0_inBuffer_8_32s_1s_0s_19s_0: 73 (1.77 % Utilization)
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MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 2 16.7 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_inPlace_8_32s_1s_0s_19s.top_COREFFT_0_inBuffer_8_32s_1s_0s_19s_0: 2 (0.05 % Utilization)
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------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_1 ########
Instance path: top_COREFFT_0_inBuffer_8_32s_1s_0s_19s_0.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_1
======================================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_inBuffer_8_32s_1s_0s_19s_0.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_1: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_ram_smGen_1 ########
Instance path: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_1.top_COREFFT_0_ram_smGen_1
=======================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_1.top_COREFFT_0_ram_smGen_1: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_3 ########
Instance path: top_COREFFT_0_inBuffer_8_32s_1s_0s_19s_0.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_3
======================================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_inBuffer_8_32s_1s_0s_19s_0.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_3: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_ram_smGen_2 ########
Instance path: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_3.top_COREFFT_0_ram_smGen_2
=======================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_3.top_COREFFT_0_ram_smGen_2: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_outBuff_8_32s_0s_19s ########
Instance path: top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_outBuff_8_32s_0s_19s
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 106 4.75 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_outBuff_8_32s_0s_19s: 106 (2.57 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 32 3.21 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_outBuff_8_32s_0s_19s: 32 (0.78 % Utilization)
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MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 2 16.7 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_outBuff_8_32s_0s_19s: 2 (0.05 % Utilization)
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--------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_4 ########
Instance path: top_COREFFT_0_outBuff_8_32s_0s_19s.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_4
==================================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_outBuff_8_32s_0s_19s.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_4: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_ram_smGen_4 ########
Instance path: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_4.top_COREFFT_0_ram_smGen_4
=======================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_4.top_COREFFT_0_ram_smGen_4: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_5 ########
Instance path: top_COREFFT_0_outBuff_8_32s_0s_19s.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_5
==================================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_outBuff_8_32s_0s_19s.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_5: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_ram_smGen_5 ########
Instance path: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_5.top_COREFFT_0_ram_smGen_5
=======================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_5.top_COREFFT_0_ram_smGen_5: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_twidLUT_8_32s_0s_19s ########
Instance path: top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_twidLUT_8_32s_0s_19s
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 7 0.3140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_twidLUT_8_32s_0s_19s: 7 (0.17 % Utilization)
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MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_twidLUT_8_32s_0s_19s: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_2 ########
Instance path: top_COREFFT_0_twidLUT_8_32s_0s_19s.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_2
==================================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_twidLUT_8_32s_0s_19s.top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_2: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_ram_smGen_3 ########
Instance path: top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_2.top_COREFFT_0_ram_smGen_3
=======================================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top_COREFFT_0_wrapRam_8_32s_19s_0s_128s_1s_2.top_COREFFT_0_ram_smGen_3: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFFT_0_twiddle_32s_8 ########
Instance path: top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_twiddle_32s_8
=================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 236 23.6 %
ARI1 42 8.7 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFFT_0_COREFFT_INPLC_Z2.top_COREFFT_0_twiddle_32s_8: 278 (6.74 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_COREFIR_Z3 ########
Instance path: top.top_COREFIR_0_COREFIR_Z3
==============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1131 50.7 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top.top_COREFIR_0_COREFIR_Z3: 1131 (27.40 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 50 5.01 %
ARI1 255 52.8 %
=================================================
Total COMBINATIONAL LOGIC in the block top.top_COREFIR_0_COREFIR_Z3: 305 (7.39 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 16 80 %
=================================================
Total DSP in the block top.top_COREFIR_0_COREFIR_Z3: 16 (0.39 % Utilization)
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-------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_COREENUMFIR_G4_Z5 ########
Instance path: top_COREFIR_0_COREFIR_Z3.top_COREFIR_0_COREENUMFIR_G4_Z5
=====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1131 50.7 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_COREFIR_Z3.top_COREFIR_0_COREENUMFIR_G4_Z5: 1131 (27.40 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 50 5.01 %
ARI1 255 52.8 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_COREFIR_Z3.top_COREFIR_0_COREENUMFIR_G4_Z5: 305 (7.39 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 16 80 %
=================================================
Total DSP in the block top_COREFIR_0_COREFIR_Z3.top_COREFIR_0_COREENUMFIR_G4_Z5: 16 (0.39 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_bit_reg_2s ########
Instance path: top_COREFIR_0_COREENUMFIR_G4_Z5.enum_kitDelay_bit_reg_2s
==============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 0.08960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_COREENUMFIR_G4_Z5.enum_kitDelay_bit_reg_2s: 2 (0.05 % Utilization)
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--------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_bit_reg_2s_0 ########
Instance path: top_COREFIR_0_COREENUMFIR_G4_Z5.enum_kitDelay_bit_reg_2s_0
================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 0.08960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_COREENUMFIR_G4_Z5.enum_kitDelay_bit_reg_2s_0: 2 (0.05 % Utilization)
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--------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_bit_reg_2s_1 ########
Instance path: top_COREFIR_0_COREENUMFIR_G4_Z5.enum_kitDelay_bit_reg_2s_1
================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 0.08960 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_COREENUMFIR_G4_Z5.enum_kitDelay_bit_reg_2s_1: 2 (0.05 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_16s_2s ########
Instance path: top_COREFIR_0_COREENUMFIR_G4_Z5.enum_kitDelay_reg_16s_2s
==============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 32 1.43 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_COREENUMFIR_G4_Z5.enum_kitDelay_reg_16s_2s: 32 (0.78 % Utilization)
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--------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_16s_2s_0 ########
Instance path: top_COREFIR_0_COREENUMFIR_G4_Z5.enum_kitDelay_reg_16s_2s_0
================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 32 1.43 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_COREENUMFIR_G4_Z5.enum_kitDelay_reg_16s_2s_0: 32 (0.78 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_fir_enum_g4_Z4 ########
Instance path: top_COREFIR_0_COREENUMFIR_G4_Z5.top_COREFIR_0_fir_enum_g4_Z4
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1061 47.6 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_COREENUMFIR_G4_Z5.top_COREFIR_0_fir_enum_g4_Z4: 1061 (25.71 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 50 5.01 %
ARI1 255 52.8 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_COREENUMFIR_G4_Z5.top_COREFIR_0_fir_enum_g4_Z4: 305 (7.39 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 16 80 %
=================================================
Total DSP in the block top_COREFIR_0_COREENUMFIR_G4_Z5.top_COREFIR_0_fir_enum_g4_Z4: 16 (0.39 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_bit_reg_3s ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.enum_kitDelay_bit_reg_3s
==============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 3 0.1340 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.enum_kitDelay_bit_reg_3s: 3 (0.07 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 3 0.3010 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.enum_kitDelay_bit_reg_3s: 3 (0.07 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_bit_reg_45 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.enum_kitDelay_bit_reg_45
==============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 45 2.02 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.enum_kitDelay_bit_reg_45: 45 (1.09 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 46 4.61 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.enum_kitDelay_bit_reg_45: 46 (1.11 % Utilization)
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---------------------------------------------------------------------------
######## Utilization report for cell: enum_kitSync_ngrst_1s ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.enum_kitSync_ngrst_1s
===========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 4 0.1790 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.enum_kitSync_ngrst_1s: 4 (0.10 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_bit_reg_4s ########
Instance path: enum_kitSync_ngrst_1s.enum_kitDelay_bit_reg_4s
==============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 4 0.1790 %
=================================================
Total SEQUENTIAL ELEMENTS in the block enum_kitSync_ngrst_1s.enum_kitDelay_bit_reg_4s: 4 (0.10 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_odd_symmetry_tap_enum_g4_16s_0s_16s_0s_44_4s ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_odd_symmetry_tap_enum_g4_16s_0s_16s_0s_44_4s
================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_odd_symmetry_tap_enum_g4_16s_0s_16s_0s_44_4s: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_odd_symmetry_tap_enum_g4_16s_0s_16s_0s_44_4s: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_bit_reg_1s_14 ########
Instance path: top_COREFIR_0_odd_symmetry_tap_enum_g4_16s_0s_16s_0s_44_4s.enum_kitDelay_bit_reg_1s_14
=======================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1 0.04480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_odd_symmetry_tap_enum_g4_16s_0s_16s_0s_44_4s.enum_kitDelay_bit_reg_1s_14: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_16s_1s ########
Instance path: top_COREFIR_0_odd_symmetry_tap_enum_g4_16s_0s_16s_0s_44_4s.enum_kitDelay_reg_16s_1s
====================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.7170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_odd_symmetry_tap_enum_g4_16s_0s_16s_0s_44_4s.enum_kitDelay_reg_16s_1s: 16 (0.39 % Utilization)
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----------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_16 ########
Instance path: top_COREFIR_0_odd_symmetry_tap_enum_g4_16s_0s_16s_0s_44_4s.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_16
======================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_odd_symmetry_tap_enum_g4_16s_0s_16s_0s_44_4s.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_16: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_1_14 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_16.top_COREFIR_0_add2_g4_1_14
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_16.top_COREFIR_0_add2_g4_1_14: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_1_14 ########
Instance path: top_COREFIR_0_add2_g4_1_14.top_COREFIR_0_mac18x18_enum_g4_1_14
=========================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_1_14.top_COREFIR_0_mac18x18_enum_g4_1_14: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s
=========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s.enum_kitDelay_reg_18s_1s
=============================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s.enum_kitDelay_reg_18s_1s: 17 (0.41 % Utilization)
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------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1
============================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1.top_COREFIR_0_add2_g4
==============================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1.top_COREFIR_0_add2_g4: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4 ########
Instance path: top_COREFIR_0_add2_g4.top_COREFIR_0_mac18x18_enum_g4
====================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4.top_COREFIR_0_mac18x18_enum_g4: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_0 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_0
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_0: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_0: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_0: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_0 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_0.enum_kitDelay_reg_18s_1s_0
=================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_0.enum_kitDelay_reg_18s_1s_0: 17 (0.41 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_0 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_0.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_0
================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_0.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_0: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_0 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_0.top_COREFIR_0_add2_g4_0
==================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_0.top_COREFIR_0_add2_g4_0: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_0 ########
Instance path: top_COREFIR_0_add2_g4_0.top_COREFIR_0_mac18x18_enum_g4_0
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_0.top_COREFIR_0_mac18x18_enum_g4_0: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_1 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_1
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_1: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_1: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_1: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_12 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_1.enum_kitDelay_reg_18s_1s_12
==================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_1.enum_kitDelay_reg_18s_1s_12: 17 (0.41 % Utilization)
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-----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_14 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_1.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_14
=================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_1.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_14: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_1_12 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_14.top_COREFIR_0_add2_g4_1_12
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_14.top_COREFIR_0_add2_g4_1_12: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_1_12 ########
Instance path: top_COREFIR_0_add2_g4_1_12.top_COREFIR_0_mac18x18_enum_g4_1_12
=========================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_1_12.top_COREFIR_0_mac18x18_enum_g4_1_12: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_10 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_10
============================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_10: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_10: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_10: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_9 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_10.enum_kitDelay_reg_18s_1s_9
==================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_10.enum_kitDelay_reg_18s_1s_9: 17 (0.41 % Utilization)
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-----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_9 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_10.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_9
=================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_10.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_9: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_9 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_9.top_COREFIR_0_add2_g4_9
==================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_9.top_COREFIR_0_add2_g4_9: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_9 ########
Instance path: top_COREFIR_0_add2_g4_9.top_COREFIR_0_mac18x18_enum_g4_9
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_9.top_COREFIR_0_mac18x18_enum_g4_9: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_11 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_11
============================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_11: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_11: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_11: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_10 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_11.enum_kitDelay_reg_18s_1s_10
===================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_11.enum_kitDelay_reg_18s_1s_10: 17 (0.41 % Utilization)
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------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_10 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_11.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_10
==================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_11.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_10: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_10 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_10.top_COREFIR_0_add2_g4_10
====================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_10.top_COREFIR_0_add2_g4_10: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_10 ########
Instance path: top_COREFIR_0_add2_g4_10.top_COREFIR_0_mac18x18_enum_g4_10
=======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_10.top_COREFIR_0_mac18x18_enum_g4_10: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_12 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_12
============================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_12: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_12: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_12: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_11 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_12.enum_kitDelay_reg_18s_1s_11
===================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_12.enum_kitDelay_reg_18s_1s_11: 17 (0.41 % Utilization)
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------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_11 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_12.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_11
==================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_12.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_11: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_11 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_11.top_COREFIR_0_add2_g4_11
====================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_11.top_COREFIR_0_add2_g4_11: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_11 ########
Instance path: top_COREFIR_0_add2_g4_11.top_COREFIR_0_mac18x18_enum_g4_11
=======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_11.top_COREFIR_0_mac18x18_enum_g4_11: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_13 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_13
============================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_13: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_13: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_13: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_13 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_13.enum_kitDelay_reg_18s_1s_13
===================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_13.enum_kitDelay_reg_18s_1s_13: 17 (0.41 % Utilization)
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------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_12 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_13.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_12
==================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_13.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_12: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_12 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_12.top_COREFIR_0_add2_g4_12
====================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_12.top_COREFIR_0_add2_g4_12: 1 (0.02 % Utilization)
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---------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_12 ########
Instance path: top_COREFIR_0_add2_g4_12.top_COREFIR_0_mac18x18_enum_g4_12
=======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_12.top_COREFIR_0_mac18x18_enum_g4_12: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_2 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_2
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_2: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_2: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_2: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_1 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_2.enum_kitDelay_reg_18s_1s_1
=================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_2.enum_kitDelay_reg_18s_1s_1: 17 (0.41 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_1 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_2.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_1
================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_2.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_1: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_1 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_1.top_COREFIR_0_add2_g4_1
==================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_1.top_COREFIR_0_add2_g4_1: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_1 ########
Instance path: top_COREFIR_0_add2_g4_1.top_COREFIR_0_mac18x18_enum_g4_1
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_1.top_COREFIR_0_mac18x18_enum_g4_1: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_3 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_3
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_3: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_3: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_3: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_2 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_3.enum_kitDelay_reg_18s_1s_2
=================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_3.enum_kitDelay_reg_18s_1s_2: 17 (0.41 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_2 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_3.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_2
================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_3.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_2: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_2 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_2.top_COREFIR_0_add2_g4_2
==================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_2.top_COREFIR_0_add2_g4_2: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_2 ########
Instance path: top_COREFIR_0_add2_g4_2.top_COREFIR_0_mac18x18_enum_g4_2
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_2.top_COREFIR_0_mac18x18_enum_g4_2: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_4 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_4
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_4: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_4: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_4: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_3 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_4.enum_kitDelay_reg_18s_1s_3
=================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_4.enum_kitDelay_reg_18s_1s_3: 17 (0.41 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_3 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_4.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_3
================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_4.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_3: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_3 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_3.top_COREFIR_0_add2_g4_3
==================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_3.top_COREFIR_0_add2_g4_3: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_3 ########
Instance path: top_COREFIR_0_add2_g4_3.top_COREFIR_0_mac18x18_enum_g4_3
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_3.top_COREFIR_0_mac18x18_enum_g4_3: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_5 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_5
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_5: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_5: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_5: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_4 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_5.enum_kitDelay_reg_18s_1s_4
=================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_5.enum_kitDelay_reg_18s_1s_4: 17 (0.41 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_4 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_5.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_4
================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_5.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_4: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_4 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_4.top_COREFIR_0_add2_g4_4
==================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_4.top_COREFIR_0_add2_g4_4: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_4 ########
Instance path: top_COREFIR_0_add2_g4_4.top_COREFIR_0_mac18x18_enum_g4_4
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_4.top_COREFIR_0_mac18x18_enum_g4_4: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_6 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_6
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_6: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_6: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_6: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_5 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_6.enum_kitDelay_reg_18s_1s_5
=================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_6.enum_kitDelay_reg_18s_1s_5: 17 (0.41 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_5 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_6.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_5
================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_6.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_5: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_5 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_5.top_COREFIR_0_add2_g4_5
==================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_5.top_COREFIR_0_add2_g4_5: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_5 ########
Instance path: top_COREFIR_0_add2_g4_5.top_COREFIR_0_mac18x18_enum_g4_5
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_5.top_COREFIR_0_mac18x18_enum_g4_5: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_7 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_7
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_7: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_7: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_7: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_6 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_7.enum_kitDelay_reg_18s_1s_6
=================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_7.enum_kitDelay_reg_18s_1s_6: 17 (0.41 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_6 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_7.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_6
================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_7.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_6: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_6 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_6.top_COREFIR_0_add2_g4_6
==================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_6.top_COREFIR_0_add2_g4_6: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_6 ########
Instance path: top_COREFIR_0_add2_g4_6.top_COREFIR_0_mac18x18_enum_g4_6
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_6.top_COREFIR_0_mac18x18_enum_g4_6: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_8 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_8
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_8: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_8: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_8: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_7 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_8.enum_kitDelay_reg_18s_1s_7
=================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_8.enum_kitDelay_reg_18s_1s_7: 17 (0.41 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_7 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_8.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_7
================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_8.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_7: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_7 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_7.top_COREFIR_0_add2_g4_7
==================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_7.top_COREFIR_0_add2_g4_7: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_7 ########
Instance path: top_COREFIR_0_add2_g4_7.top_COREFIR_0_mac18x18_enum_g4_7
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_7.top_COREFIR_0_mac18x18_enum_g4_7: 1 (0.02 % Utilization)
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-----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_9 ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_9
===========================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_9: 17 (0.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 3.52 %
=================================================
Total COMBINATIONAL LOGIC in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_9: 17 (0.41 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_9: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------------
######## Utilization report for cell: enum_kitDelay_reg_18s_1s_8 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_9.enum_kitDelay_reg_18s_1s_8
=================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.7620 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_9.enum_kitDelay_reg_18s_1s_8: 17 (0.41 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_8 ########
Instance path: top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_9.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_8
================================================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_tap_enum_g4_1s_16s_0s_16s_0s_44_0s_4s_9.top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_8: 1 (0.02 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_add2_g4_8 ########
Instance path: top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_8.top_COREFIR_0_add2_g4_8
==================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_mac_enum_g4_44_0s_4s_0s_1_8.top_COREFIR_0_add2_g4_8: 1 (0.02 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_mac18x18_enum_g4_8 ########
Instance path: top_COREFIR_0_add2_g4_8.top_COREFIR_0_mac18x18_enum_g4_8
======================================================================================
DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 1 5 %
=================================================
Total DSP in the block top_COREFIR_0_add2_g4_8.top_COREFIR_0_mac18x18_enum_g4_8: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------------------
######## Utilization report for cell: top_COREFIR_0_wide_coef_16s_16s_1s_1s ########
Instance path: top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_wide_coef_16s_16s_1s_1s
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 256 11.5 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_fir_enum_g4_Z4.top_COREFIR_0_wide_coef_16s_16s_1s_1s: 256 (6.20 % Utilization)
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---------------------------------------------------------------------------
######## Utilization report for cell: enum_coef_sr_16s_16s ########
Instance path: top_COREFIR_0_wide_coef_16s_16s_1s_1s.enum_coef_sr_16s_16s
===========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 256 11.5 %
=================================================
Total SEQUENTIAL ELEMENTS in the block top_COREFIR_0_wide_coef_16s_16s_1s_1s.enum_coef_sr_16s_16s: 256 (6.20 % Utilization)
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----------------------------------------------------------------------------
######## Utilization report for cell: top_Coef_Buffer_TPSRAM ########
Instance path: top.top_Coef_Buffer_TPSRAM
============================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top.top_Coef_Buffer_TPSRAM: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: top_FFT_IM_Buffer_TPSRAM ########
Instance path: top.top_FFT_IM_Buffer_TPSRAM
==============================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top.top_FFT_IM_Buffer_TPSRAM: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: top_FFT_RE_Buffer_TPSRAM ########
Instance path: top.top_FFT_RE_Buffer_TPSRAM
==============================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top.top_FFT_RE_Buffer_TPSRAM: 1 (0.02 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: top_FIR_IN_Buffer_TPSRAM ########
Instance path: top.top_FIR_IN_Buffer_TPSRAM
==============================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top.top_FIR_IN_Buffer_TPSRAM: 1 (0.02 % Utilization)
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-------------------------------------------------------------------------------
######## Utilization report for cell: top_FIR_OUT_Buffer_TPSRAM ########
Instance path: top.top_FIR_OUT_Buffer_TPSRAM
===============================================================================
MEMORY ELEMENTS
Name Total elements Utilization Notes
----------------------------------------------------
RAM1K18 1 8.33 %
====================================================
Total MEMORY ELEMENTS in the block top.top_FIR_OUT_Buffer_TPSRAM: 1 (0.02 % Utilization)
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##### END OF AREA REPORT #####]