# Global Net Report

Microsemi Corporation - Microsemi Libero Software Release v2021.1 (Version 2021.1.0.17)

Date: Sun May 30 19:06:19 2021

## Global Nets Information

| From | GB Location | Net Name | Fanout
--- | --- | --- | --- | ---
1 | GB[7] | (513, 132) | FIR_FILTER_0/CCC_0/GL0_INST/U0_YWn | 2383
2 | GB[1] | (507, 132) | FIR_FILTER_0/CORERESETP_0/MSS_HPMS_READY_int_rep_RNIA38B/U0_YWn | 968
3 | GB[2] | (508, 132) | COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider_inferred_clock_RNI6AME_0[2]/U0_YWn_GEast | 17
4 | GB[6] | (512, 132) | DATAHANDLE_FSM_0/un1_FIR_ENABLE_2_RNIJFBE/U0_YWn_GEast | 16
5 | GB[3] | (509, 132) | DATAHANDLE_FSM_0/FIR_RADDR5_RNIAITB/U0_YWn_GEast | 10
6 | GB[4] | (510, 132) | DATAHANDLE_FSM_0/FIR_RADDR4_RNI9ITB/U0_YWn_GEast | 10
7 | GB[5] | (511, 132) | DATAHANDLE_FSM_0/FIR_RADDR3_RNI8ITB/U0_YWn_GEast | 10

## I/O to GB Connections

(none)

## Fabric to GB Connections

| From | From Location | To | Net Name | Net Type | Fanout
--- | --- | --- | --- | --- | --- | ---
1 | FIR_FILTER_0/CORERESETP_0/MSS_HPMS_READY_int_rep:Q | (473, 199) | GB[1] | FIR_FILTER_0/CORERESETP_0/MSS_HPMS_READY_int_rep | ROUTED | 17
2 | COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider_inferred_clock_RNI6AME[2]:Y | (977, 183) | GB[2] | COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider_inferred_clock_RNI6AME[2] | ROUTED | 1
3 | DATAHANDLE_FSM_0/un1_FIR_ENABLE_2:Y | (977, 201) | GB[6] | DATAHANDLE_FSM_0/un1_FIR_ENABLE_2 | ROUTED | 1
4 | DATAHANDLE_FSM_0/FIR_RADDR5:Y | (982, 210) | GB[3] | DATAHANDLE_FSM_0/FIR_RADDR5_0 | ROUTED | 1
5 | DATAHANDLE_FSM_0/FIR_RADDR4:Y | (981, 201) | GB[4] | DATAHANDLE_FSM_0/FIR_RADDR4_0 | ROUTED | 1
6 | DATAHANDLE_FSM_0/FIR_RADDR3:Y | (1022, 204) | GB[5] | DATAHANDLE_FSM_0/FIR_RADDR3_0 | ROUTED | 1

## CCC to GB Connections

| From | From Location | Pin Swapped for Back Annotation Only | To | Net Name | Net Type | Fanout
--- | --- | --- | --- | --- | --- | --- | ---
1 | FIR_FILTER_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 | CCC-NW1 (18, 254) | GL0 => GL3 | GB[7] | FIR_FILTER_0/CCC_0/GL0_net | HARDWIRED | 1

## CCC Input Connections

| From | From Location | To (Pin Swapped for Back Annotation Only) | CCC Location | Net Name | Net Type | Fanout
--- | --- | --- | --- | --- | --- | --- | ---
1 | FIR_FILTER_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT | (24, 254) | FIR_FILTER_0/CCC_0/CCC_INST/INST_CCC_IP:RCOSC_25_50MHZ | CCC-NW1 (18, 254) | FIR_FILTER_0/FABOSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC | HARDWIRED | 1

## Local Nets to RGB Connections

(none)

## Global Nets to RGB Connections

| From | From Location | Net Name | Fanout |  | RGB Location | RGB Fanout
--- | --- | --- | --- | --- | --- | --- | ---
1 | GB[7] | (513, 132) | FIR_FILTER_0/CCC_0/GL0_INST/U0_YWn | 2383 | 1 | (254, 216) | 5
|  |  |  |  | 2 | (255, 198) | 14
|  |  |  |  | 3 | (255, 201) | 30
|  |  |  |  | 4 | (255, 204) | 63
|  |  |  |  | 5 | (255, 207) | 78
|  |  |  |  | 6 | (255, 210) | 21
|  |  |  |  | 7 | (255, 213) | 19
2 | GB[1] | (507, 132) | FIR_FILTER_0/CORERESETP_0/MSS_HPMS_READY_int_rep_RNIA38B/U0_YWn | 968 | 1 | (254, 198) | 6
|  |  |  |  | 2 | (254, 201) | 30
|  |  |  |  | 3 | (254, 204) | 56
|  |  |  |  | 4 | (254, 207) | 78
|  |  |  |  | 5 | (254, 210) | 21
|  |  |  |  | 6 | (254, 213) | 17
3 | GB[2] | (508, 132) | COREFFT_0/genblk1.DUT_INPLACE/slowClock_0/divider_inferred_clock_RNI6AME_0[2]/U0_YWn_GEast | 17 | 1 | (770, 168) | 1
|  |  |  |  | 2 | (771, 177) | 16
4 | GB[6] | (512, 132) | DATAHANDLE_FSM_0/un1_FIR_ENABLE_2_RNIJFBE/U0_YWn_GEast | 16 | 1 | (770, 201) | 6
|  |  |  |  | 2 | (770, 207) | 7
|  |  |  |  | 3 | (770, 210) | 3
5 | GB[3] | (509, 132) | DATAHANDLE_FSM_0/FIR_RADDR5_RNIAITB/U0_YWn_GEast | 10 | 1 | (770, 174) | 1
|  |  |  |  | 2 | (770, 177) | 3
|  |  |  |  | 3 | (771, 165) | 2
|  |  |  |  | 4 | (771, 171) | 4
6 | GB[4] | (510, 132) | DATAHANDLE_FSM_0/FIR_RADDR4_RNI9ITB/U0_YWn_GEast | 10 | 1 | (770, 165) | 5
|  |  |  |  | 2 | (770, 171) | 5
7 | GB[5] | (511, 132) | DATAHANDLE_FSM_0/FIR_RADDR3_RNI8ITB/U0_YWn_GEast | 10 | 1 | (770, 249) | 7
|  |  |  |  | 2 | (772, 246) | 3