
*******************************************
       Libero SoC, MSS and IP Core VERSIONS
*******************************************

This design was tested with the following: 
	Libero SoC Version: v12.6
	MSS Version: 1.1.500
        SoftConsole Version : v6.5


******************************************
     DESIGN FILE DIRECTORY STRUCTURE
******************************************


m2s_dg0388_df
    |
    |
    |---Libero_Project
    |      |
    |      |--eSRAM0
    |      |
    |      |--eSRAM1
    |
    |
    |      
    |
    |---GUI Executable
    |	   
    |
    |---Programming_Job
    |      |
    |      |--eSRAM0.job
    |      |     
    |      |
    |      |--eSRAM1.job
    |            
    |
    |---Readme.txt
    

Libero_Project
==================================

For reference, the final Libero SoC Verilog project of this demo is given under this folder. This contians separate design files for eSRAM0 and eSRAM1. 
The designs are created for SmartFusion2 M2S090 Evaluation Kit Board Rev D or Later.

GUI Executable
==================================
This folder consists the Host PC application to run the design.


Programming_Job
============================
This folder consists the programming file along with the embedded application client.
This contians separate programming files for eSRAM0 and eSRAM1.






