top_syn (synthesis)
Synthesis -
Compiler Report
Compiler Constraint Applicator
Pre-mapping Report
Clock Summary
Mapper Report
Clock Conversion
Timing Report
Performance Summary
Clock Relationships
Interface Information
Detailed Report for Clocks
Clock: EDAC_0/CCC_0/GL0
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: EDAC_0/EDAC_MSS_0/CLK_CONFIG_APB
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: EDAC_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
DSP Report (19:25 19-Mar)
RAM Report (19:25 19-Mar)
Fanout Report (19:25 19-Mar)
Resource Utilization
Constraint Checker Report (19:25 19-Mar)
Hierarchical Area Report(top) (19:25 19-Mar)