| Project Settings |
|---|
| Project Name | top_syn | Device Name | synthesis: Microchip SmartFusion2 : M2S090TS |
| Implementation Name | synthesis | Top Module | top |
| Retiming | 0 | Resource Sharing | 1 |
| Fanout Guide | 10000 | Disable I/O Insertion | 0 |
| Disable Sequential Optimizations | 0 | FSM Compiler | 1 |
| Run Status |
|---|
| Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
| (compiler) | Complete |
52 |
36 |
0 |
- |
00m:09s |
- |
19-03-2021
19:25:27 |
| (premap) | Complete |
37 |
19 |
0 |
0m:03s |
0m:03s |
171MB |
19-03-2021
19:25:34 |
| (fpga_mapper) | Complete |
39 |
21 |
0 |
0m:04s |
0m:05s |
172MB |
19-03-2021
19:25:39 |
| Multi-srs Generator |
Complete | | | | 00m:02s | | | 19-03-2021
19:25:29 |
| Area Summary |
|---|
| |
| Carry Cells | 14 |
Sequential Cells | 141 |
| DSP Blocks
(dsp_used) | 0 |
I/O Cells | 59 |
| Global Clock Buffers | 7 |
LUTs
(total_luts) | 79 |
| Timing Summary |
|---|
|
| Clock Name | Req Freq | Est Freq | Slack |
|---|
| EDAC_0/CCC_0/GL0 | 100.0 MHz | 522.4 MHz | 8.086 |
| EDAC_0/EDAC_MSS_0/CLK_CONFIG_APB | 27.8 MHz | 127.4 MHz | 14.094 |
| EDAC_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT | 50.0 MHz | 502.7 MHz | 18.011 |
| Optimizations Summary |
|---|
| Combined Clock Conversion | 2 / 1 |
| |
|