| Project Settings |
|---|
| Project Name | CodeShadowing_Fabric_syn | Implementation Name | synthesis |
| Top Module | CodeShadowing_Fabric | Retiming | 0 |
| Resource Sharing | 1 | Fanout Guide | 10000 |
| Disable I/O Insertion | 0 | FSM Compiler | 1 |
| Run Status |
|---|
| Job Name |
Status |
|
|
|
CPU Time |
Real Time |
Memory |
Date/Time |
| (compiler) | Complete |
67 |
303 |
0 |
- |
0m:04s |
- |
16-Mar-16
2:19:19 PM |
| (premap) | Complete |
109 |
16 |
0 |
0m:01s |
0m:01s |
151MB |
16-Mar-16
2:19:23 PM |
| (fpga_mapper) | Complete |
146 |
85 |
0 |
0m:04s |
0m:04s |
171MB |
16-Mar-16
2:19:27 PM |
| Multi-srs Generator |
Complete | | | | 0m:01s | | | 16-Mar-16
2:19:21 PM |
| Area Summary |
|---|
| |
| Carry Cells | 169 |
Sequential Cells | 535 |
| DSP Blocks (MACC)
(dsp_used) | 0 |
I/O Cells | 66 |
| Global Clock Buffers | 4 |
Block Rams (RAM1K18)
(v_ram) | 8 |
| LUTs
(total_luts) | 666 |
| |
| Timing Summary |
|---|
|
| Clock Name | Req Freq | Est Freq | Slack |
|---|
| CodeShadowing_Fabric_CCC_0_FCCC|GL0_net_inferred_clock | 100.0 MHz | 162.8 MHz | 3.859 |
| CodeShadowing_Fabric_MSS|FIC_2_APB_M_PCLK_inferred_clock | 100.0 MHz | 169.3 MHz | 2.665 |
| System | 100.0 MHz | 1029.4 MHz | 9.029 |
| Optimizations Summary |
|---|
| Combined Clock Conversion | 1 / 1 |
| |
|