@N|Running in 64-bit mode
@N|Running in 64-bit mode
@N: CG364 :"C:\Microsemi\Libero_SoC_v11.7\Synplify\lib\generic\smartfusion2.v":376:7:376:9|Synthesizing module VCC
@N: CG364 :"C:\Microsemi\Libero_SoC_v11.7\Synplify\lib\generic\smartfusion2.v":372:7:372:9|Synthesizing module GND
@N: CG364 :"C:\Microsemi\Libero_SoC_v11.7\Synplify\lib\generic\smartfusion2.v":362:7:362:12|Synthesizing module CLKINT
@N: CG364 :"C:\Microsemi\Libero_SoC_v11.7\Synplify\lib\generic\smartfusion2.v":727:7:727:9|Synthesizing module CCC
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\work\Disp_sb\CCC_0\Disp_sb_CCC_0_FCCC.v":5:7:5:24|Synthesizing module Disp_sb_CCC_0_FCCC
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_addrdec.v":20:7:20:25|Synthesizing module COREAHBLITE_ADDRDEC
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_defaultslavesm.v":20:7:20:32|Synthesizing module COREAHBLITE_DEFAULTSLAVESM
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":22:7:22:29|Synthesizing module COREAHBLITE_MASTERSTAGE
@N: CL177 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":625:0:625:5|Sharing sequential element addrRegSMCurrentState.
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_addrdec.v":20:7:20:25|Synthesizing module COREAHBLITE_ADDRDEC
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":22:7:22:29|Synthesizing module COREAHBLITE_MASTERSTAGE
@N: CL177 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":625:0:625:5|Sharing sequential element addrRegSMCurrentState.
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":20:7:20:30|Synthesizing module COREAHBLITE_SLAVEARBITER
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v":22:7:22:28|Synthesizing module COREAHBLITE_SLAVESTAGE
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_matrix4x16.v":23:7:23:28|Synthesizing module COREAHBLITE_MATRIX4X16
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite.v":23:7:23:17|Synthesizing module CoreAHBLite
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\COREAHBLSRAM\2.0.113\rtl\vlog\core\AHBLSramIf.v":29:7:29:16|Synthesizing module AHBLSramIf
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\work\Disp_sb\COREAHBLSRAM_0_0\rtl\vlog\core\SramCtrlIf.v":29:7:29:41|Synthesizing module Disp_sb_COREAHBLSRAM_0_0_SramCtrlIf
@N: CG364 :"C:\Microsemi\Libero_SoC_v11.7\Synplify\lib\generic\smartfusion2.v":382:7:382:13|Synthesizing module RAM1K18
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\work\Disp_sb\COREAHBLSRAM_0_0\rtl\vlog\core\lsram_2048to139264x8.v":28:7:28:51|Synthesizing module Disp_sb_COREAHBLSRAM_0_0_lsram_2048to139264x8
@N: CG179 :"E:\ftdi_disp\display_demo_src\libero\display\component\work\Disp_sb\COREAHBLSRAM_0_0\rtl\vlog\core\SramCtrlIf.v":381:26:381:38|Removing redundant assignment
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\work\Disp_sb\COREAHBLSRAM_0_0\rtl\vlog\core\CoreAHBLSRAM.v":29:7:29:43|Synthesizing module Disp_sb_COREAHBLSRAM_0_0_COREAHBLSRAM
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreConfigP\7.0.105\rtl\vlog\core\coreconfigp.v":22:7:22:17|Synthesizing module CoreConfigP
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":23:7:23:16|Synthesizing module CoreResetP
@N: CL177 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1388:4:1388:9|Sharing sequential element M3_RESET_N_int.
@N: CL177 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif2_spll_lock_q1.
@N: CL177 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif1_spll_lock_q1.
@N: CL177 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif0_spll_lock_q1.
@N: CL177 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element fpll_lock_q1.
@N: CG364 :"C:\Microsemi\Libero_SoC_v11.7\Synplify\lib\generic\smartfusion2.v":286:7:286:11|Synthesizing module BIBUF
@N: CG364 :"C:\Microsemi\Libero_SoC_v11.7\Synplify\lib\generic\smartfusion2.v":274:7:274:12|Synthesizing module OUTBUF
@N: CG364 :"C:\Microsemi\Libero_SoC_v11.7\Synplify\lib\generic\smartfusion2.v":326:7:326:17|Synthesizing module OUTBUF_DIFF
@N: CG364 :"C:\Microsemi\Libero_SoC_v11.7\Synplify\lib\generic\smartfusion2.v":268:7:268:11|Synthesizing module INBUF
@N: CG364 :"C:\Microsemi\Libero_SoC_v11.7\Synplify\lib\generic\smartfusion2.v":280:7:280:13|Synthesizing module TRIBUFF
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\work\Disp_sb_MSS\Disp_sb_MSS_syn.v":5:7:5:13|Synthesizing module MSS_075
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\work\Disp_sb_MSS\Disp_sb_MSS.v":9:7:9:17|Synthesizing module Disp_sb_MSS
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\SgCore\OSC\2.0.101\osc_comps.v":51:7:51:24|Synthesizing module RCOSC_25_50MHZ_FAB
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\SgCore\OSC\2.0.101\osc_comps.v":11:7:11:20|Synthesizing module RCOSC_25_50MHZ
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\work\Disp_sb\FABOSC_0\Disp_sb_FABOSC_0_OSC.v":5:7:5:26|Synthesizing module Disp_sb_FABOSC_0_OSC
@N: CG364 :"C:\Microsemi\Libero_SoC_v11.7\Synplify\lib\generic\smartfusion2.v":718:7:718:14|Synthesizing module SYSRESET
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\work\Disp_sb\Disp_sb.v":9:7:9:13|Synthesizing module Disp_sb
@N: CG364 :"E:\ftdi_disp\display_demo_src\libero\display\component\work\Disp\Disp.v":9:7:9:10|Synthesizing module Disp
@N: CL177 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif0_spll_lock_q2.
@N: CL177 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif1_spll_lock_q2.
@N: CL177 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif2_spll_lock_q2.
@N: CL177 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element fpll_lock_q2.
@N: CL201 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1365:4:1365:9|Trying to extract state machine for register sdif3_state
@N: CL201 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1300:4:1300:9|Trying to extract state machine for register sdif2_state
@N: CL201 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1235:4:1235:9|Trying to extract state machine for register sdif1_state
@N: CL201 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1170:4:1170:9|Trying to extract state machine for register sdif0_state
@N: CL201 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Trying to extract state machine for register sm0_state
@N: CL201 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreConfigP\7.0.105\rtl\vlog\core\coreconfigp.v":447:4:447:9|Trying to extract state machine for register state
@N: CL201 :"E:\ftdi_disp\display_demo_src\libero\display\component\work\Disp_sb\COREAHBLSRAM_0_0\rtl\vlog\core\SramCtrlIf.v":127:3:127:8|Trying to extract state machine for register sramcurr_state
@N: CL201 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\COREAHBLSRAM\2.0.113\rtl\vlog\core\AHBLSramIf.v":185:3:185:8|Trying to extract state machine for register ahbcurr_state
@N: CL201 :"E:\ftdi_disp\display_demo_src\libero\display\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Trying to extract state machine for register arbRegSMCurrentState
@N|Running in 64-bit mode

