@N: MF248 |Running in 64-bit mode.
@N: MF667 |Clock conversion disabled 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance DDR_READY_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance SDIF_READY_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance SDIF_RELEASED_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Removing sequential instance FDDR_CORE_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1170:4:1170:9|Removing sequential instance SDIF0_PHY_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1170:4:1170:9|Removing sequential instance SDIF0_CORE_RESET_N_0 of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1235:4:1235:9|Removing sequential instance SDIF1_PHY_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1235:4:1235:9|Removing sequential instance SDIF1_CORE_RESET_N_0 of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1300:4:1300:9|Removing sequential instance SDIF2_PHY_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1300:4:1300:9|Removing sequential instance SDIF2_CORE_RESET_N_0 of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1365:4:1365:9|Removing sequential instance SDIF3_PHY_RESET_N_int of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1365:4:1365:9|Removing sequential instance SDIF3_CORE_RESET_N_0 of view:PrimLib.dffre(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1170:4:1170:9|Removing sequential instance sdif0_state[3:0] of view:PrimLib.statemachine(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1235:4:1235:9|Removing sequential instance sdif1_state[3:0] of view:PrimLib.statemachine(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1300:4:1300:9|Removing sequential instance sdif2_state[3:0] of view:PrimLib.statemachine(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":1365:4:1365:9|Removing sequential instance sdif3_state[3:0] of view:PrimLib.statemachine(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":797:4:797:9|Removing sequential instance sdif0_areset_n_clk_base of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":811:4:811:9|Removing sequential instance sdif1_areset_n_clk_base of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":825:4:825:9|Removing sequential instance sdif2_areset_n_clk_base of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":839:4:839:9|Removing sequential instance sdif3_areset_n_clk_base of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":797:4:797:9|Removing sequential instance sdif0_areset_n_q1 of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":811:4:811:9|Removing sequential instance sdif1_areset_n_q1 of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":825:4:825:9|Removing sequential instance sdif2_areset_n_q1 of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN362 :"f:\m2s_i2c_df\libero_project\i2c_multi_master_slave\component\actel\directcore\coreresetp\7.0.104\rtl\vlog\core\coreresetp.v":839:4:839:9|Removing sequential instance sdif3_areset_n_q1 of view:PrimLib.dffr(prim) in hierarchy view:work.CoreResetP_Z4(verilog) because there are no references to its outputs 
@N: BN225 |Writing default property annotation file F:\M2S_I2C_DF\Libero_Project\I2C_Multi_Master_Slave\synthesis\I2C_Multi_Master_Slave_top.sap.
