data DESIGN MDDR_TA_top
data HPATH 'D:/Libero 11.6 migration/Libero designs/M2S_AC422_11p5_DF/Board_Test/MDDR_TA/designer/MDDR_TA_top'
data FPCPATH 'D:/Libero 11.6 migration/Libero designs/M2S_AC422_11p5_DF/Board_Test/MDDR_TA/constraint/fp'
data IOCPATH 'D:/Libero 11.6 migration/Libero designs/M2S_AC422_11p5_DF/Board_Test/MDDR_TA/constraint/io'
data FAM SmartFusion2
data DIE PA4M5000
data PACKAGE fg896
data IO_DEFT_STD LVCMOS25
data RESTRICTPROBEPINS 1
data HYDRA_EXPORT_DATA 1
data HYDRA_PRESERVE_DATA_FILES 1
data ENABLE_AUTO_VERCHK 2
data ALICUTIL_BD 42
data RECORD_QUALIFIED_PATHS 0
data ORPHAN_HYDRA_TOOL HYDRA_chipedit
data VCCI_1.2_VOLTR COM
data VCCI_1.5_VOLTR COM
data VCCI_1.8_VOLTR COM
data VCCI_2.5_VOLTR COM
data VCCI_3.3_VOLTR COM
data BLOCK_INSTANTIATION 1

