project -load D:/Libero_11.6_migration/Libero_designs/M2S_AC422_150KIT/Board_Test/MDDR_TA/synthesis/MDDR_TA_top_syn.prj
puts "Generating SRS instrumenttion to file D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\synthesis\synthesis_1\instr_sources\syn_dics.v"
 if { [catch {write instrumentation} err] } {
    puts stderr "write instrumentation failed $err"
    exit 9
}
