@N|Running in 64-bit mode
@N|Running in 64-bit mode
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AHB_IF.v":20:7:20:12|Synthesizing module AHB_IF
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\vlog\hypermods.v":9:7:9:22|Synthesizing module syn_hyper_source
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":29:7:29:12|Synthesizing module AXI_IF
@N: CG179 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":442:17:442:25|Removing redundant assignment
@N: CG179 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":450:17:450:25|Removing redundant assignment
@N: CG179 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":498:17:498:25|Removing redundant assignment
@N: CG179 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":506:17:506:25|Removing redundant assignment
@N: CG179 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":598:24:598:29|Removing redundant assignment
@N: CL134 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":396:0:396:5|Found RAM Rdata_mem, depth=512, width=64
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\CMD_Decode.v":18:7:18:16|Synthesizing module CMD_Decode
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\generic\smartfusion2.v":376:7:376:9|Synthesizing module VCC
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\generic\smartfusion2.v":372:7:372:9|Synthesizing module GND
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\generic\smartfusion2.v":362:7:362:12|Synthesizing module CLKINT
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\generic\smartfusion2.v":727:7:727:9|Synthesizing module CCC
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\work\MDDR_TA\CCC_0\MDDR_TA_CCC_0_FCCC.v":5:7:5:24|Synthesizing module MDDR_TA_CCC_0_FCCC
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_addrdec.v":20:7:20:25|Synthesizing module COREAHBLITE_ADDRDEC
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_defaultslavesm.v":20:7:20:32|Synthesizing module COREAHBLITE_DEFAULTSLAVESM
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":22:7:22:29|Synthesizing module COREAHBLITE_MASTERSTAGE
@N: CL177 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":625:0:625:5|Sharing sequential element addrRegSMCurrentState.
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_addrdec.v":20:7:20:25|Synthesizing module COREAHBLITE_ADDRDEC
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":22:7:22:29|Synthesizing module COREAHBLITE_MASTERSTAGE
@N: CL177 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_masterstage.v":625:0:625:5|Sharing sequential element addrRegSMCurrentState.
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":20:7:20:30|Synthesizing module COREAHBLITE_SLAVEARBITER
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_slavestage.v":22:7:22:28|Synthesizing module COREAHBLITE_SLAVESTAGE
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_matrix4x16.v":23:7:23:28|Synthesizing module COREAHBLITE_MATRIX4X16
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite.v":23:7:23:17|Synthesizing module CoreAHBLite
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\work\MDDR_TA\COREAXI_0\rtl\vlog\core\coreaxi.v":29:7:29:31|Synthesizing module MDDR_TA_COREAXI_0_COREAXI
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\COREAXI\3.1.100\rtl\vlog\core\axi_feedthrough.v":30:7:30:21|Synthesizing module axi_feedthrough
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreConfigP\7.0.105\rtl\vlog\core\coreconfigp.v":22:7:22:17|Synthesizing module CoreConfigP
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":23:7:23:16|Synthesizing module CoreResetP
@N: CL177 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1388:4:1388:9|Sharing sequential element M3_RESET_N_int.
@N: CL177 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif2_spll_lock_q1.
@N: CL177 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif1_spll_lock_q1.
@N: CL177 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif0_spll_lock_q1.
@N: CL177 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element fpll_lock_q1.
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\SgCore\OSC\1.0.105\osc_comps.v":51:7:51:24|Synthesizing module RCOSC_25_50MHZ_FAB
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\SgCore\OSC\1.0.105\osc_comps.v":11:7:11:20|Synthesizing module RCOSC_25_50MHZ
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\work\MDDR_TA\FABOSC_0\MDDR_TA_FABOSC_0_OSC.v":5:7:5:26|Synthesizing module MDDR_TA_FABOSC_0_OSC
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\generic\smartfusion2.v":274:7:274:12|Synthesizing module OUTBUF
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\generic\smartfusion2.v":326:7:326:17|Synthesizing module OUTBUF_DIFF
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\generic\smartfusion2.v":286:7:286:11|Synthesizing module BIBUF
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\generic\smartfusion2.v":338:7:338:16|Synthesizing module BIBUF_DIFF
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\generic\smartfusion2.v":268:7:268:11|Synthesizing module INBUF
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\generic\smartfusion2.v":280:7:280:13|Synthesizing module TRIBUFF
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\work\MDDR_TA_MSS\MDDR_TA_MSS_syn.v":5:7:5:13|Synthesizing module MSS_120
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\work\MDDR_TA_MSS\MDDR_TA_MSS.v":9:7:9:17|Synthesizing module MDDR_TA_MSS
@N: CG364 :"\\idm\tools\releases\production\Synopsys\Synplify\pc\synplify_J201503M-3\lib\generic\smartfusion2.v":718:7:718:14|Synthesizing module SYSRESET
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\work\MDDR_TA\MDDR_TA.v":9:7:9:13|Synthesizing module MDDR_TA
@N: CG364 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\work\MDDR_TA_top\MDDR_TA_top.v":9:7:9:17|Synthesizing module MDDR_TA_top
@N: CL177 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif0_spll_lock_q2.
@N: CL177 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif1_spll_lock_q2.
@N: CL177 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element sdif2_spll_lock_q2.
@N: CL177 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":963:4:963:9|Sharing sequential element fpll_lock_q2.
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1365:4:1365:9|Trying to extract state machine for register sdif3_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1300:4:1300:9|Trying to extract state machine for register sdif2_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1235:4:1235:9|Trying to extract state machine for register sdif1_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1170:4:1170:9|Trying to extract state machine for register sdif0_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vlog\core\coreresetp.v":1089:4:1089:9|Trying to extract state machine for register sm0_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreConfigP\7.0.105\rtl\vlog\core\coreconfigp.v":447:4:447:9|Trying to extract state machine for register state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\component\Actel\DirectCore\CoreAHBLite\5.2.100\rtl\vlog\core\coreahblite_slavearbiter.v":449:4:449:9|Trying to extract state machine for register arbRegSMCurrentState
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":639:0:639:5|Trying to extract state machine for register axi_fsm_read1_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":577:0:577:5|Trying to extract state machine for register axi_fsm_read_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":522:0:522:5|Trying to extract state machine for register ahb_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":466:0:466:5|Trying to extract state machine for register rt_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":407:0:407:5|Trying to extract state machine for register wt_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":300:0:300:5|Trying to extract state machine for register axi_fsm_current_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":259:0:259:5|Trying to extract state machine for register r_loop_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AXI_IF.v":218:0:218:5|Trying to extract state machine for register w_loop_state
@N: CL201 :"D:\Libero_11.6_migration\Libero_designs\M2S_AC422_150KIT\Board_Test\MDDR_TA\hdl\AHB_IF.v":71:0:71:5|Trying to extract state machine for register ahb_fsm_current_state
@N|Running in 64-bit mode

