# Register Lock Bits Configuration File for MSS, SERDES(s) and Fabric DDR
# Microsemi Corporation - Microsemi Libero Software Release v2021.1 (Version 2021.1.0.17)
# Date: Thu Jun  3 13:19:49 2021

# Lock Value = 0, disables modification of the Register field.


# ENVM_INIT_M3_0/ENVM_INIT_M3_MSS_0/MSS_ADLIB_INST/INST_MSS_075_IP
 MSS_ESRAM_CONFIG_LOCK                               1  
 MSS_ESRAM_MAX_LAT_LOCK                              1  
 MSS_DDR_CONFIG_LOCK                                 1  
 MSS_ENVM_CONFIG_LOCK                                1  
 MSS_ENVM_REMAP_BASE_LOCK                            1  
 MSS_ENVM_FAB_REMAP_LOCK                             1  
 MSS_CC_CONFIG_LOCK                                  1  
 MSS_CC_CACHEREGION_LOCK                             1  
 MSS_CC_LOCKBASEADDR_LOCK                            1  
 MSS_CC_FLUSHINDX_LOCK                               1  
 MSS_DDRB_BUF_TIMER_LOCK                             1  
 MSS_DDRB_NB_ADR_LOCK                                1  
 MSS_DDRB_NB_SIZE_LOCK                               1  
 MSS_DDRB_CONFIG_LOCK                                1  
 MSS_EDAC_ENABLE_LOCK                                1  
 MSS_MASTER_WEIGHT_CONFIG0_LOCK                      1  
 MSS_MASTER_WEIGHT_CONFIG1_LOCK                      1  
 MSS_SOFT_INTERRUPT_LOCK                             1  
 MSS_SOFTRESET_ENVM0_SOFTRESET_LOCK                  1  
 MSS_SOFTRESET_ENVM1_SOFTRESET_LOCK                  1  
 MSS_SOFTRESET_ESRAM0_SOFTRESET_LOCK                 1  
 MSS_SOFTRESET_ESRAM1_SOFTRESET_LOCK                 1  
 MSS_SOFTRESET_MAC_SOFTRESET_LOCK                    1  
 MSS_SOFTRESET_PDMA_SOFTRESET_LOCK                   1  
 MSS_SOFTRESET_TIMER_SOFTRESET_LOCK                  1  
 MSS_SOFTRESET_MMUART0_SOFTRESET_LOCK                1  
 MSS_SOFTRESET_MMUART1_SOFTRESET_LOCK                1  
 MSS_SOFTRESET_G4SPI0_SOFTRESET_LOCK                 1  
 MSS_SOFTRESET_G4SPI1_SOFTRESET_LOCK                 1  
 MSS_SOFTRESET_I2C0_SOFTRESET_LOCK                   1  
 MSS_SOFTRESET_I2C1_SOFTRESET_LOCK                   1  
 MSS_SOFTRESET_CAN_SOFTRESET_LOCK                    1  
 MSS_SOFTRESET_USB_SOFTRESET_LOCK                    1  
 MSS_SOFTRESET_COMBLK_SOFTRESET_LOCK                 1  
 MSS_SOFTRESET_FPGA_SOFTRESET_LOCK                   1  
 MSS_SOFTRESET_HPDMA_SOFTRESET_LOCK                  1  
 MSS_SOFTRESET_FIC32_0_SOFTRESET_LOCK                1  
 MSS_SOFTRESET_FIC32_1_SOFTRESET_LOCK                1  
 MSS_SOFTRESET_MSS_GPIO_SOFTRESET_LOCK               1  
 MSS_SOFTRESET_MSS_GPOUT_7_0_SOFT_RESET_LOCK         1  
 MSS_SOFTRESET_MSS_GPOUT_15_8_SOFT_RESET_LOCK        1  
 MSS_SOFTRESET_MSS_GPOUT_23_16_SOFT_RESET_LOCK       1  
 MSS_SOFTRESET_MSS_GPOUT_31_24_SOFT_RESET_LOCK       1  
 MSS_SOFTRESET_MDDR_CTLR_SOFTRESET_LOCK              1  
 MSS_SOFTRESET_MDDR_FIC64_SOFTRESET_LOCK             1  
 MSS_M3_CONFIG_LOCK                                  1  
 MSS_FAB_IF_LOCK                                     1  
 MSS_LOOPBACK_CTRL_LOCK                              1  
 MSS_GPIO_SYSRESET_SEL_LOCK                          1  
 MSS_GPIN_SRC_SEL_LOCK                               1  
 MSS_MDDR_CONFIG_LOCK                                1  
 MSS_USB_IO_INPUT_SEL_LOCK                           1  
 MSS_PERIPH_CLOCK_MUX_SEL_LOCK                       1  
 MSS_WDOGCONFIG_LOCK                                 1  
 MSS_MDDR_IO_CALIB_LOCK                              1  
 MSS_SPARE_OUT_LOCK                                  1  
 MSS_EDAC_INT_ENABLE_LOCK                            1  
 MSS_USB_CONFIG_LOCK                                 1  
 MSS_ESRAM_PIPELINE_CONFIG_LOCK                      1  
 MSS_MSS_INTERRUPT_ENABLE_LOCK                       1  
 MSS_RTC_WAKEUP_CONFIG_LOCK                          1  
 MSS_MAC_CONFIG_LOCK                                 1  
 MSS_MSSDDR_PLL_STATUS_LOW_LOCK                      1  
 MSS_MSSDDR_PLL_STATUS_HIGH_LOCK                     1  
 MSS_MSSDDR_FACC_CONFIG_1_DIVISOR_A_LOCK             1  
 MSS_MSSDDR_FACC_CONFIG_1_APB0_DIVISOR_LOCK          1  
 MSS_MSSDDR_FACC_CONFIG_1_APB1_DIVISOR_LOCK          1  
 MSS_MSSDDR_FACC_CONFIG_1_DDR_CLK_EN_LOCK            1  
 MSS_MSSDDR_FACC_CONFIG_1_FCLK_DIVISOR_LOCK          1  
 MSS_MSSDDR_FACC_CONFIG_1_FACC_GLMUX_SEL_LOCK        1  
 MSS_MSSDDR_FACC_CONFIG_1_FIC32_0_DIVISOR_LOCK       1  
 MSS_MSSDDR_FACC_CONFIG_1_FIC32_1_DIVISOR_LOCK       1  
 MSS_MSSDDR_FACC_CONFIG_1_FIC64_DIVISOR_LOCK         1  
 MSS_MSSDDR_FACC_CONFIG_1_BASE_DIVISOR_LOCK          1  
 MSS_MSSDDR_FACC_CONFIG_1_PERSIST_CC_LOCK            1  
 MSS_MSSDDR_FACC_CONFIG_1_CONTROLLER_PLL_INIT_LOCK   1  
 MSS_MSSDDR_FACC_CONFIG_1_FACC_FAB_REF_SEL_LOCK      1  
 MSS_MSSDDR_FACC_CONFIG_2_RTC_CLK_SEL_LOCK           1  
 MSS_MSSDDR_FACC_CONFIG_2_FACC_SRC_SEL_LOCK          1  
 MSS_MSSDDR_FACC_CONFIG_2_FACC_PRE_SRC_SEL_LOCK      1  
 MSS_MSSDDR_FACC_CONFIG_2_FACC_STANDBY_SEL_LOCK      1  
 MSS_MSSDDR_FACC_CONFIG_2_MSS_25_50MHZ_EN_LOCK       1  
 MSS_MSSDDR_FACC_CONFIG_2_MSS_1MHZ_EN_LOCK           1  
 MSS_MSSDDR_FACC_CONFIG_2_MSS_CLK_ENVM_EN_LOCK       1  
 MSS_MSSDDR_FACC_CONFIG_2_MSS_XTAL_EN_LOCK           1  
 MSS_MSSDDR_FACC_CONFIG_2_MSS_XTAL_RTC_EN_LOCK       1  
 MSS_PLL_LOCK_EN_LOCK                                1  
 MSS_MSSDDR_CLK_CALIB_CONFIG_LOCK                    1  
 MSS_PLL_DELAY_LINE_SEL_LOCK                         1  
 MSS_MAC_STAT_CLRONRD_LOCK                           1  
 MSS_IOMUXCELL_0_CONFIG_LOCK                         1  
 MSS_IOMUXCELL_1_CONFIG_LOCK                         1  
 MSS_IOMUXCELL_2_CONFIG_LOCK                         1  
 MSS_IOMUXCELL_3_CONFIG_LOCK                         1  
 MSS_IOMUXCELL_4_CONFIG_LOCK                         1  
 MSS_IOMUXCELL_5_CONFIG_LOCK                         1  
 MSS_IOMUXCELL_6_CONFIG_LOCK                         1  
 MSS_IOMUXCELL_7_CONFIG_LOCK                         1  
 MSS_IOMUXCELL_8_CONFIG_LOCK                         1  
 MSS_IOMUXCELL_9_CONFIG_LOCK                         1  
 MSS_IOMUXCELL_10_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_11_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_12_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_13_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_14_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_15_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_16_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_17_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_18_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_19_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_20_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_21_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_22_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_23_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_24_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_25_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_26_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_27_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_28_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_29_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_30_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_31_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_32_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_33_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_34_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_35_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_36_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_37_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_38_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_39_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_40_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_41_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_42_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_43_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_44_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_45_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_46_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_47_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_48_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_49_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_50_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_51_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_52_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_53_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_54_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_55_CONFIG_LOCK                        1  
 MSS_IOMUXCELL_56_CONFIG_LOCK                        1  

# SERDES_IF2 ( Unused )
 SERDES_IF2_SER_PLL_CONFIG_LOW_PLL_REF_DIVISOR_LOCK               1  
 SERDES_IF2_SER_PLL_CONFIG_LOW_PLL_FEEDBACK_DIVISOR_LOCK          1  
 SERDES_IF2_SER_PLL_CONFIG_LOW_PLL_OUTPUT_DIVISOR_LOCK            1  
 SERDES_IF2_SER_PLL_CONFIG_HIGH_PLL_FILTER_RANGE_LOCK             1  
 SERDES_IF2_SER_PLL_CONFIG_HIGH_PLL_LOCKWIN_LOCK                  1  
 SERDES_IF2_SER_PLL_CONFIG_HIGH_PLL_LOCKCNT_LOCK                  1  
 SERDES_IF2_SER_PLL_CONFIG_HIGH_PLL_RESET_LOCK                    1  
 SERDES_IF2_SER_PLL_CONFIG_HIGH_PLL_BYPASS_LOCK                   1  
 SERDES_IF2_SER_PLL_CONFIG_HIGH_PLL_MODE_1V2_LOCK                 1  
 SERDES_IF2_SER_PLL_CONFIG_HIGH_PLL_MODE_3V3_LOCK                 1  
 SERDES_IF2_SER_PLL_CONFIG_HIGH_PLL_FSE_LOCK                      1  
 SERDES_IF2_SER_PLL_CONFIG_HIGH_PLL_PD_LOCK                       1  
 SERDES_IF2_SERDESIF_SOFT_RESET_PCIE_CTLR_SOFTRESET_LOCK          1  
 SERDES_IF2_SERDESIF_SOFT_RESET_XAUI_CTRL_SOFTRESET_LOCK          1  
 SERDES_IF2_SERDESIF_SOFT_RESET_SERDES_LANE0_SOFTRESET_LOCK       1  
 SERDES_IF2_SERDESIF_SOFT_RESET_SERDES_LANE1_SOFTRESET_LOCK       1  
 SERDES_IF2_SERDESIF_SOFT_RESET_SERDES_LANE2_SOFTRESET_LOCK       1  
 SERDES_IF2_SERDESIF_SOFT_RESET_SERDES_LANE3_SOFTRESET_LOCK       1  
 SERDES_IF2_SERDESIF_SOFT_RESET_PCIE2_CTLR_SOFTRESET_LOCK         1  
 SERDES_IF2_SERDESIF_SOFT_RESET_PCIE_CTRL_CFGRESET_LOCK           1  
 SERDES_IF2_SERDESIF_SOFT_RESET_PCIE2_CTRL_CFGRESET_LOCK          1  
 SERDES_IF2_SERDESIF_SOFT_RESET_AXI_SOFTRESET_LOCK                1  
 SERDES_IF2_SERDESIF_SOFT_RESET_AXI2_SOFTRESET_LOCK               1  
 SERDES_IF2_SER_INTERRUPT_ENABLE_LOCK                             1  
 SERDES_IF2_CONFIG_AXI_AHB_BRIDGE_CFGR_AXI_AHB_MASTER_LOCK        1  
 SERDES_IF2_CONFIG_AXI_AHB_BRIDGE_CFGR_AXI_AHB_SLAVE_LOCK         1  
 SERDES_IF2_CONFIG_ECC_INTR_ENABLE_CFGR_PCIE_ECC_EN_LOCK          1  
 SERDES_IF2_CONFIG_ECC_INTR_ENABLE_CFGR_PCIE_ECC_INTR_EN_LOCK     1  
 SERDES_IF2_CONFIG_TEST_IN_CONFIG_TEST_IN_LOCK                    1  
 SERDES_IF2_TEST_OUT_READ_ADDR_TEST_OUT_READ_ADDR_LOCK            1  
 SERDES_IF2_CONFIG_PCIE_PM_CFGR_SLOT_CONFIG_LOCK                  1  
 SERDES_IF2_CONFIG_PCIE_PM_CFGR_PM_AUX_PWR_LOCK                   1  
 SERDES_IF2_CONFIG_PCIE_PM_CFGR_L2_P2_ENABLE_LOCK                 1  
 SERDES_IF2_CONFIG_PCIE_PM_CFGR_TX_SWING_LOCK                     1  
 SERDES_IF2_CONFIG_PHY_MODE_0_CONFIG_PHY_MODE_LOCK                1  
 SERDES_IF2_CONFIG_PHY_MODE_1_CONFIG_EPCS_SEL_LOCK                1  
 SERDES_IF2_CONFIG_PHY_MODE_1_CONFIG_LINKK2LANE_LOCK              1  
 SERDES_IF2_CONFIG_PHY_MODE_1_CONFIG_REG_LANE_SEL_LOCK            1  
 SERDES_IF2_CONFIG_PHY_MODE_2_CONFIG_REXT_SEL_LOCK                1  
 SERDES_IF2_CONFIG_PCIE_0_PCIE_VENDOR_ID_LOCK                     1  
 SERDES_IF2_CONFIG_PCIE_0_PCIE_DEVICE_ID_LOCK                     1  
 SERDES_IF2_CONFIG_PCIE_1_PCIE_SUB_VENDOR_ID_LOCK                 1  
 SERDES_IF2_CONFIG_PCIE_1_PCIE_SUB_DEVICE_ID_LOCK                 1  
 SERDES_IF2_CONFIG_PCIE_2_PCIE_REV_ID_LOCK                        1  
 SERDES_IF2_CONFIG_PCIE_2_PCIE_CLASS_CODE_LOCK                    1  
 SERDES_IF2_CONFIG_PCIE_3_K_BRIDGE_SPEED_LOCK                     1  
 SERDES_IF2_CONFIG_PCIE_3_K_BRIDGE_EMPH_LOCK                      1  
 SERDES_IF2_CONFIG_PCIE_3_K_BRIDGE_SPEC_REV_LOCK                  1  
 SERDES_IF2_CONFIG_BAR_SIZE_0_1_CONFIG_BAR_CONTROL_0_LOCK         1  
 SERDES_IF2_CONFIG_BAR_SIZE_0_1_CONFIG_BAR_SIZE_0_LOCK            1  
 SERDES_IF2_CONFIG_BAR_SIZE_0_1_CONFIG_BAR_CONTROL_1_LOCK         1  
 SERDES_IF2_CONFIG_BAR_SIZE_0_1_CONFIG_BAR_SIZE_1_LOCK            1  
 SERDES_IF2_CONFIG_BAR_SIZE_2_3_CONFIG_BAR_CONTROL_2_LOCK         1  
 SERDES_IF2_CONFIG_BAR_SIZE_2_3_CONFIG_BAR_SIZE_2_LOCK            1  
 SERDES_IF2_CONFIG_BAR_SIZE_2_3_CONFIG_BAR_CONTROL_3_LOCK         1  
 SERDES_IF2_CONFIG_BAR_SIZE_2_3_CONFIG_BAR_SIZE_3_LOCK            1  
 SERDES_IF2_CONFIG_BAR_SIZE_3_4_CONFIG_BAR_CONTROL_4_LOCK         1  
 SERDES_IF2_CONFIG_BAR_SIZE_3_4_CONFIG_BAR_SIZE_4_LOCK            1  
 SERDES_IF2_CONFIG_BAR_SIZE_3_4_CONFIG_BAR_CONTROL_5_LOCK         1  
 SERDES_IF2_CONFIG_BAR_SIZE_3_4_CONFIG_BAR_SIZE_5_LOCK            1  
 SERDES_IF2_REFCLK_SEL_LANE01_REFCLK_SEL_LOCK                     1  
 SERDES_IF2_REFCLK_SEL_LANE23_REFCLK_SEL_LOCK                     1  
 SERDES_IF2_REFCLK_SEL_LANE1_REFCLK_SEL_LOCK                      1  
 SERDES_IF2_REFCLK_SEL_LANE3_REFCLK_SEL_LOCK                      1  
 SERDES_IF2_PCLK_SEL_PCIE_CORECLK_SEL_LOCK                        1  
 SERDES_IF2_PCLK_SEL_PIPE_PCLKIN_LANE01_SEL_LOCK                  1  
 SERDES_IF2_PCLK_SEL_PIPE_PCLKIN_LANE23_SEL_LOCK                  1  
 SERDES_IF2_PCLK_SEL_PCIE2_CORECLK_SEL_LOCK                       1  
 SERDES_IF2_PCLK_SEL_PIPE_PCLKIN_LANE1_SEL_LOCK                   1  
 SERDES_IF2_PCLK_SEL_PIPE_PCLKIN_LANE3_SEL_LOCK                   1  
 SERDES_IF2_PMAREG_RESET_PMAREG_RSTN_LOCK                         1  
 SERDES_IF2_SERDES_FATC_RESET_FATC_RESET_LOCK                     1  
 SERDES_IF2_RC_OSC_SPLL_REFCLK_SEL_RC_OSC_REFCLK_SEL_LOCK         1  
 SERDES_IF2_SPREAD_SPECTRUM_CLK_PLL_SERDESIF_SSE_LOCK             1  
 SERDES_IF2_SPREAD_SPECTRUM_CLK_PLL_SERDESIF_SSMD_LOCK            1  
 SERDES_IF2_SPREAD_SPECTRUM_CLK_PLL_SERDESIF_SSMF_LOCK            1  
 SERDES_IF2_CONF_AXI_MSTR_WNDW_0_CONF_AXI_MSTR_WNDW_0_LOCK        1  
 SERDES_IF2_CONF_AXI_MSTR_WNDW_1_CONF_AXI_MSTR_WNDW_1_LOCK        1  
 SERDES_IF2_CONF_AXI_MSTR_WNDW_2_CONF_AXI_MSTR_WNDW_2_LOCK        1  
 SERDES_IF2_CONF_AXI_MSTR_WNDW_3_CONF_AXI_MSTR_WNDW_3_LOCK        1  
 SERDES_IF2_CONF_AXI_SLV_WNDW_0_CONF_AXI_SLV_WNDW_0_LOCK          1  
 SERDES_IF2_CONF_AXI_SLV_WNDW_1_CONF_AXI_SLV_WNDW_1_LOCK          1  
 SERDES_IF2_CONF_AXI_SLV_WNDW_2_CONF_AXI_SLV_WNDW_2_LOCK          1  
 SERDES_IF2_CONF_AXI_SLV_WNDW_3_CONF_AXI_SLV_WNDW_3_LOCK          1  
 SERDES_IF2_DESKEW_CONFIG_DESKEW_PLL_REF_CLK_LOCK                 1  
 SERDES_IF2_DESKEW_CONFIG_DESKEW_PLL_FDB_CLK_LOCK                 1  
 SERDES_IF2_DEBUG_MODE_KEY_LOCK                                   1  
 SERDES_IF2_IDDQ_IDDQ_LOCK                                        1  
 SERDES_IF2_ADVCONFIG_LOCK                                        1  
 SERDES_IF2_ENHANCEMENT_LOCK                                      1  
 SERDES_IF2_CONFIG2_AXI_AHB_BRIDGE_CFGR2_AXI_AHB_MASTER_LOCK      1  
 SERDES_IF2_CONFIG2_AXI_AHB_BRIDGE_CFGR2_AXI_AHB_SLAVE_LOCK       1  
 SERDES_IF2_CONFIG2_ECC_INTR_ENABLE_CFGR2_PCIE_ECC_EN_LOCK        1  
 SERDES_IF2_CONFIG2_ECC_INTR_ENABLE_CFGR2_PCIE_ECC_INTR_EN_LOCK   1  
 SERDES_IF2_CONFIG2_TEST_IN_CONFIG2_TEST_IN_LOCK                  1  
 SERDES_IF2_TEST2_OUT_READ_ADDR_TEST2_OUT_READ_ADDR_LOCK          1  
 SERDES_IF2_CONFIG2_PCIE_PM_CFGR2_SLOT_CONFIG_LOCK                1  
 SERDES_IF2_CONFIG2_PCIE_PM_CFGR2_PM_AUX_PWR_LOCK                 1  
 SERDES_IF2_CONFIG2_PCIE_PM_CFGR2_L2_P2_ENABLE_LOCK               1  
 SERDES_IF2_CONFIG2_PCIE_PM_CFGR2_TX_SWING_LOCK                   1  
 SERDES_IF2_CONFIG2_PCIE_0_PCIE2_VENDOR_ID_LOCK                   1  
 SERDES_IF2_CONFIG2_PCIE_0_PCIE2_DEVICE_ID_LOCK                   1  
 SERDES_IF2_CONFIG2_PCIE_1_PCIE2_SUB_VENDOR_ID_LOCK               1  
 SERDES_IF2_CONFIG2_PCIE_1_PCIE2_SUB_DEVICE_ID_LOCK               1  
 SERDES_IF2_CONFIG2_PCIE_2_PCIE2_REV_ID_LOCK                      1  
 SERDES_IF2_CONFIG2_PCIE_2_PCIE2_CLASS_CODE_LOCK                  1  
 SERDES_IF2_CONFIG2_PCIE_3_K2_BRIDGE_SPEED_LOCK                   1  
 SERDES_IF2_CONFIG2_PCIE_3_K2_BRIDGE_EMPH_LOCK                    1  
 SERDES_IF2_CONFIG2_PCIE_3_K2_BRIDGE_SPEC_REV_LOCK                1  
 SERDES_IF2_CONFIG2_BAR_SIZE_0_1_CONFIG2_BAR_CONTROL_0_LOCK       1  
 SERDES_IF2_CONFIG2_BAR_SIZE_0_1_CONFIG2_BAR_SIZE_0_LOCK          1  
 SERDES_IF2_CONFIG2_BAR_SIZE_0_1_CONFIG2_BAR_CONTROL_1_LOCK       1  
 SERDES_IF2_CONFIG2_BAR_SIZE_0_1_CONFIG2_BAR_SIZE_1_LOCK          1  
 SERDES_IF2_CONFIG2_BAR_SIZE_2_3_CONFIG2_BAR_CONTROL_2_LOCK       1  
 SERDES_IF2_CONFIG2_BAR_SIZE_2_3_CONFIG2_BAR_SIZE_2_LOCK          1  
 SERDES_IF2_CONFIG2_BAR_SIZE_2_3_CONFIG2_BAR_CONTROL_3_LOCK       1  
 SERDES_IF2_CONFIG2_BAR_SIZE_2_3_CONFIG2_BAR_SIZE_3_LOCK          1  
 SERDES_IF2_CONFIG2_BAR_SIZE_3_4_CONFIG2_BAR_CONTROL_4_LOCK       1  
 SERDES_IF2_CONFIG2_BAR_SIZE_3_4_CONFIG2_BAR_SIZE_4_LOCK          1  
 SERDES_IF2_CONFIG2_BAR_SIZE_3_4_CONFIG2_BAR_CONTROL_5_LOCK       1  
 SERDES_IF2_CONFIG2_BAR_SIZE_3_4_CONFIG2_BAR_SIZE_5_LOCK          1  
 SERDES_IF2_CONF2_AXI_MSTR_WNDW_0_CONF2_AXI_MSTR_WNDW_0_LOCK      1  
 SERDES_IF2_CONF2_AXI_MSTR_WNDW_1_CONF2_AXI_MSTR_WNDW_1_LOCK      1  
 SERDES_IF2_CONF2_AXI_MSTR_WNDW_2_CONF2_AXI_MSTR_WNDW_2_LOCK      1  
 SERDES_IF2_CONF2_AXI_MSTR_WNDW_3_CONF2_AXI_MSTR_WNDW_3_LOCK      1  
 SERDES_IF2_CONF2_AXI_SLV_WNDW_0_CONF2_AXI_SLV_WNDW_0_LOCK        1  
 SERDES_IF2_CONF2_AXI_SLV_WNDW_1_CONF2_AXI_SLV_WNDW_1_LOCK        1  
 SERDES_IF2_CONF2_AXI_SLV_WNDW_2_CONF2_AXI_SLV_WNDW_2_LOCK        1  
 SERDES_IF2_CONF2_AXI_SLV_WNDW_3_CONF2_AXI_SLV_WNDW_3_LOCK        1  
 SERDES_IF2_ADVCONFIG2_LOCK                                       1  

