SmartTime Version 2021.1.0.17
Microsemi Corporation - Microsemi Libero Software Release v2021.1 (Version 2021.1.0.17)
Date: Sun May 23 12:11:01 2021
| Design | top |
| Family | SmartFusion2 |
| Die | M2S150TS |
| Package | 1152 FC |
| Temperature Range | 0 - 85 C |
| Voltage Range | 1.14 - 1.26 V |
| Speed Grade | -1 |
| Design State | Post-Layout |
| Data source | Production |
| Multi Corner Report Operating Conditions | BEST, TYPICAL, WORST |
| Scenario for Timing Analysis | timing_analysis |
| Clock Domain | Required Period (ns) | Required Frequency (MHz) | Worst Slack (ns) | Operating Conditions |
|---|---|---|---|---|
| Remapping_Appnote_0/CCC_0/GL0 | 10.000 | 100.000 | 5.220 | WORST |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT | 20.000 | 50.000 | 8.060 | WORST |
| Remapping_Appnote_MSS|FIC_2_APB_M_PCLK_inferred_clock | 36.036 | 27.750 | 2.854 | BEST |
| Worst Slack (ns) | Operating Conditions | |
|---|---|---|
| Input to Output |
Info: The maximum frequency of this clock domain is limited by the period of pin Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_BASE
| From | To | Delay (ns) | Slack (ns) | Arrival (ns) | Required (ns) | Setup (ns) | Minimum Period (ns) | Operating Conditions | |
|---|---|---|---|---|---|---|---|---|---|
| Path 1 | Remapping_Appnote_0/CORERESETP_0/RESET_N_M2F_clk_base:CLK | Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:D | 3.085 | 6.638 | 8.019 | 14.657 | 0.254 | 3.362 | WORST |
| Path 2 | Remapping_Appnote_0/CORERESETP_0/FIC_2_APB_M_PRESET_N_clk_base:CLK | Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:D | 2.887 | 6.813 | 7.844 | 14.657 | 0.254 | 3.187 | WORST |
| Path 3 | Remapping_Appnote_0/CORERESETP_0/mss_ready_select:CLK | Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:D | 2.732 | 6.978 | 7.679 | 14.657 | 0.254 | 3.022 | WORST |
| Path 4 | Remapping_Appnote_0/CORERESETP_0/CONFIG2_DONE_clk_base:CLK | Remapping_Appnote_0/CORERESETP_0/sm0_state[6]:EN | 1.430 | 8.236 | 6.401 | 14.637 | 0.308 | 1.764 | WORST |
| Path 5 | Remapping_Appnote_0/CORERESETP_0/release_sdif3_core_clk_base:CLK | Remapping_Appnote_0/CORERESETP_0/sm0_state[4]:D | 1.455 | 8.270 | 6.418 | 14.688 | 0.254 | 1.730 | WORST |
| Pin Name | Type | Net Name | Cell Name | Op | Delay (ns) | Total (ns) | Fanout | Edge |
|---|---|---|---|---|---|---|---|---|
| From: Remapping_Appnote_0/CORERESETP_0/RESET_N_M2F_clk_base:CLK | ||||||||
| To: Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:D | ||||||||
| data required time | 14.657 | |||||||
| data arrival time | - | 8.019 | ||||||
| slack | 6.638 | |||||||
| Data arrival time calculation | ||||||||
| Remapping_Appnote_0/CCC_0/GL0 | 0.000 | 0.000 | ||||||
| Remapping_Appnote_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 | Clock source | + | 0.000 | 0.000 | r | |||
| Clock generation | + | 2.815 | 2.815 | |||||
| Remapping_Appnote_0/CCC_0/GL0_INST:An | net | Remapping_Appnote_0/CCC_0/GL0_net | + | 0.537 | 3.352 | r | ||
| Remapping_Appnote_0/CCC_0/GL0_INST:YEn | cell | ADLIB:GBM | + | 0.143 | 3.495 | 8 | f | |
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB2:An | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_YWn_GEast | + | 0.599 | 4.094 | f | ||
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB2:YR | cell | ADLIB:RGB | + | 0.316 | 4.410 | 3 | r | |
| Remapping_Appnote_0/CORERESETP_0/RESET_N_M2F_clk_base:CLK | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB2_rgbr_net_1 | + | 0.524 | 4.934 | r | ||
| Remapping_Appnote_0/CORERESETP_0/RESET_N_M2F_clk_base:Q | cell | ADLIB:SLE | + | 0.087 | 5.021 | 2 | r | |
| Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int_4:B | net | Remapping_Appnote_0/CORERESETP_0/RESET_N_M2F_clk_base_Z | + | 0.710 | 5.731 | r | ||
| Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int_4:Y | cell | ADLIB:CFG3 | + | 0.158 | 5.889 | 1 | r | |
| Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:D | net | Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int_4_Z | + | 2.130 | 8.019 | r | ||
| data arrival time | 8.019 | |||||||
| Data required time calculation | ||||||||
| Remapping_Appnote_0/CCC_0/GL0 | Clock Constraint | 10.000 | 10.000 | |||||
| Remapping_Appnote_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 | Clock source | + | 0.000 | 10.000 | r | |||
| Clock generation | + | 2.815 | 12.815 | |||||
| Remapping_Appnote_0/CCC_0/GL0_INST:An | net | Remapping_Appnote_0/CCC_0/GL0_net | + | 0.537 | 13.352 | r | ||
| Remapping_Appnote_0/CCC_0/GL0_INST:YEn | cell | ADLIB:GBM | + | 0.143 | 13.495 | 8 | f | |
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB6:An | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_YWn_GEast | + | 0.593 | 14.088 | f | ||
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB6:YL | cell | ADLIB:RGB | + | 0.317 | 14.405 | 1 | r | |
| Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:CLK | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB6_rgbl_net_1 | + | 0.506 | 14.911 | r | ||
| Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:D | Library setup time | ADLIB:SLE | - | 0.254 | 14.657 | |||
| data required time | 14.657 | |||||||
| Operating Conditions | WORST |
No Path
| From | To | Delay (ns) | Slack (ns) | Arrival (ns) | Required (ns) | Clock to Out (ns) | Operating Conditions | |
|---|---|---|---|---|---|---|---|---|
| Path 1 | Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_BASE | GPIO_6_M2F | 10.028 | 15.411 | 15.411 | WORST | ||
| Path 2 | Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_BASE | GPIO_4_M2F | 9.955 | 15.338 | 15.338 | WORST | ||
| Path 3 | Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_BASE | GPIO_7_M2F | 9.905 | 15.288 | 15.288 | WORST | ||
| Path 4 | Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_BASE | GPIO_5_M2F | 9.887 | 15.270 | 15.270 | WORST | ||
| Path 5 | Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_BASE | GPIO_0_M2F | 9.706 | 15.089 | 15.089 | WORST |
| Pin Name | Type | Net Name | Cell Name | Op | Delay (ns) | Total (ns) | Fanout | Edge |
|---|---|---|---|---|---|---|---|---|
| From: Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_BASE | ||||||||
| To: GPIO_6_M2F | ||||||||
| data required time | N/C | |||||||
| data arrival time | - | 15.411 | ||||||
| slack | N/C | |||||||
| Data arrival time calculation | ||||||||
| Remapping_Appnote_0/CCC_0/GL0 | 0.000 | 0.000 | ||||||
| Remapping_Appnote_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 | Clock source | + | 0.000 | 0.000 | r | |||
| Clock generation | + | 2.815 | 2.815 | |||||
| Remapping_Appnote_0/CCC_0/GL0_INST:An | net | Remapping_Appnote_0/CCC_0/GL0_net | + | 0.537 | 3.352 | r | ||
| Remapping_Appnote_0/CCC_0/GL0_INST:YEn | cell | ADLIB:GBM | + | 0.143 | 3.495 | 8 | f | |
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1:An | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_YWn_GEast | + | 0.605 | 4.100 | f | ||
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1:YR | cell | ADLIB:RGB | + | 0.316 | 4.416 | 1 | r | |
| Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_198:B | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_YR | + | 0.448 | 4.864 | r | ||
| Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/IP_INTERFACE_198:IPB | cell | ADLIB:IP_INTERFACE | + | 0.209 | 5.073 | 1 | r | |
| Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_BASE | net | Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/CLK_BASE_net | + | 0.310 | 5.383 | r | ||
| Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:SPI0_SDO_MGPIO6A_H2F_B | cell | ADLIB:MSS_120_IP | + | 1.466 | 6.849 | 1 | f | |
| GPIO_6_M2F_obuf/U0/U_IOOUTFF:A | net | GPIO_6_M2F_c | + | 5.197 | 12.046 | f | ||
| GPIO_6_M2F_obuf/U0/U_IOOUTFF:Y | cell | ADLIB:IOOUTFF_BYPASS | + | 0.330 | 12.376 | 1 | f | |
| GPIO_6_M2F_obuf/U0/U_IOPAD:D | net | GPIO_6_M2F_obuf/U0/DOUT | + | 0.080 | 12.456 | f | ||
| GPIO_6_M2F_obuf/U0/U_IOPAD:PAD | cell | ADLIB:IOPAD_TRI | + | 2.955 | 15.411 | 0 | f | |
| GPIO_6_M2F | net | GPIO_6_M2F | + | 0.000 | 15.411 | f | ||
| data arrival time | 15.411 | |||||||
| Data required time calculation | ||||||||
| Remapping_Appnote_0/CCC_0/GL0 | N/C | N/C | ||||||
| Remapping_Appnote_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 | Clock source | + | 0.000 | N/C | r | |||
| Clock generation | + | 2.815 | N/C | |||||
| GPIO_6_M2F | N/C | f | ||||||
| Operating Conditions | WORST |
| From | To | Delay (ns) | Slack (ns) | Arrival (ns) | Required (ns) | Recovery (ns) | Minimum Period (ns) | Skew (ns) | Operating Conditions | |
|---|---|---|---|---|---|---|---|---|---|---|
| Path 1 | Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:CLK | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_q1:ALn | 4.434 | 5.232 | 9.361 | 14.593 | 0.353 | 4.768 | -0.019 | WORST |
| Path 2 | Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:CLK | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_clk_base:ALn | 4.434 | 5.232 | 9.361 | 14.593 | 0.353 | 4.768 | -0.019 | WORST |
| Path 3 | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_clk_base:CLK | Remapping_Appnote_0/CORERESETP_0/sm0_state[4]:ALn | 2.970 | 6.657 | 7.932 | 14.589 | 0.353 | 3.343 | 0.020 | WORST |
| Path 4 | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_clk_base:CLK | Remapping_Appnote_0/CORERESETP_0/sm0_state[3]:ALn | 2.970 | 6.657 | 7.932 | 14.589 | 0.353 | 3.343 | 0.020 | WORST |
| Path 5 | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_clk_base:CLK | Remapping_Appnote_0/CORERESETP_0/CONFIG2_DONE_q1:ALn | 2.970 | 6.657 | 7.932 | 14.589 | 0.353 | 3.343 | 0.020 | WORST |
| Pin Name | Type | Net Name | Cell Name | Op | Delay (ns) | Total (ns) | Fanout | Edge |
|---|---|---|---|---|---|---|---|---|
| From: Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:CLK | ||||||||
| To: Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_q1:ALn | ||||||||
| data required time | 14.593 | |||||||
| data arrival time | - | 9.361 | ||||||
| slack | 5.232 | |||||||
| Data arrival time calculation | ||||||||
| Remapping_Appnote_0/CCC_0/GL0 | 0.000 | 0.000 | ||||||
| Remapping_Appnote_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 | Clock source | + | 0.000 | 0.000 | r | |||
| Clock generation | + | 2.815 | 2.815 | |||||
| Remapping_Appnote_0/CCC_0/GL0_INST:An | net | Remapping_Appnote_0/CCC_0/GL0_net | + | 0.537 | 3.352 | r | ||
| Remapping_Appnote_0/CCC_0/GL0_INST:YEn | cell | ADLIB:GBM | + | 0.143 | 3.495 | 8 | f | |
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB6:An | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_YWn_GEast | + | 0.593 | 4.088 | f | ||
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB6:YL | cell | ADLIB:RGB | + | 0.317 | 4.405 | 1 | r | |
| Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:CLK | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB6_rgbl_net_1 | + | 0.522 | 4.927 | r | ||
| Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int:Q | cell | ADLIB:SLE | + | 0.087 | 5.014 | 1 | r | |
| Remapping_Appnote_0/CORERESETP_0/sdif0_areset_n:A | net | Remapping_Appnote_0/CORERESETP_0/MSS_HPMS_READY_int_Z | + | 0.317 | 5.331 | r | ||
| Remapping_Appnote_0/CORERESETP_0/sdif0_areset_n:Y | cell | ADLIB:CFG2 | + | 0.074 | 5.405 | 1 | r | |
| Remapping_Appnote_0/CORERESETP_0/sdif0_areset_n_RNILQ38:An | net | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n | + | 2.122 | 7.527 | f | ||
| Remapping_Appnote_0/CORERESETP_0/sdif0_areset_n_RNILQ38:YWn | cell | ADLIB:GBM | + | 0.357 | 7.884 | 1 | f | |
| Remapping_Appnote_0/CORERESETP_0/sdif0_areset_n_RNILQ38/U0_RGB1_RGB0:An | net | Remapping_Appnote_0/CORERESETP_0/sdif0_areset_n_RNILQ38/U0_YWn | + | 0.612 | 8.496 | f | ||
| Remapping_Appnote_0/CORERESETP_0/sdif0_areset_n_RNILQ38/U0_RGB1_RGB0:YR | cell | ADLIB:RGB | + | 0.316 | 8.812 | 2 | r | |
| Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_q1:ALn | net | Remapping_Appnote_0/CORERESETP_0/sdif0_areset_n_RNILQ38/U0_RGB1_RGB0_rgbr_net_1 | + | 0.549 | 9.361 | r | ||
| data arrival time | 9.361 | |||||||
| Data required time calculation | ||||||||
| Remapping_Appnote_0/CCC_0/GL0 | Clock Constraint | 10.000 | 10.000 | |||||
| Remapping_Appnote_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 | Clock source | + | 0.000 | 10.000 | r | |||
| Clock generation | + | 2.815 | 12.815 | |||||
| Remapping_Appnote_0/CCC_0/GL0_INST:An | net | Remapping_Appnote_0/CCC_0/GL0_net | + | 0.537 | 13.352 | r | ||
| Remapping_Appnote_0/CCC_0/GL0_INST:YWn | cell | ADLIB:GBM | + | 0.143 | 13.495 | 1 | f | |
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB7:An | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_YWn | + | 0.613 | 14.108 | f | ||
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB7:YR | cell | ADLIB:RGB | + | 0.316 | 14.424 | 2 | r | |
| Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_q1:CLK | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB7_rgbr_net_1 | + | 0.522 | 14.946 | r | ||
| Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_q1:ALn | Library recovery time | ADLIB:SLE | - | 0.353 | 14.593 | |||
| data required time | 14.593 | |||||||
| Operating Conditions | WORST |
No Path
No Path
| From | To | Delay (ns) | Slack (ns) | Arrival (ns) | Required (ns) | Setup (ns) | Operating Conditions | |
|---|---|---|---|---|---|---|---|---|
| Path 1 | Remapping_Appnote_0/CORERESETP_0/ddr_settled:CLK | Remapping_Appnote_0/CORERESETP_0/ddr_settled_q1:D | 0.468 | 5.220 | 9.439 | 14.659 | 0.254 | WORST |
| Path 2 | Remapping_Appnote_0/CORERESETP_0/release_sdif2_core:CLK | Remapping_Appnote_0/CORERESETP_0/release_sdif2_core_q1:D | 0.466 | 5.239 | 9.421 | 14.660 | 0.254 | WORST |
| Path 3 | Remapping_Appnote_0/CORERESETP_0/release_sdif1_core:CLK | Remapping_Appnote_0/CORERESETP_0/release_sdif1_core_q1:D | 0.465 | 5.242 | 9.423 | 14.665 | 0.254 | WORST |
| Path 4 | Remapping_Appnote_0/CORERESETP_0/release_sdif3_core:CLK | Remapping_Appnote_0/CORERESETP_0/release_sdif3_core_q1:D | 0.478 | 5.251 | 9.431 | 14.682 | 0.254 | WORST |
| Path 5 | Remapping_Appnote_0/CORERESETP_0/release_sdif0_core:CLK | Remapping_Appnote_0/CORERESETP_0/release_sdif0_core_q1:D | 0.466 | 5.268 | 9.420 | 14.688 | 0.254 | WORST |
| Pin Name | Type | Net Name | Cell Name | Op | Delay (ns) | Total (ns) | Fanout | Edge |
|---|---|---|---|---|---|---|---|---|
| From: Remapping_Appnote_0/CORERESETP_0/ddr_settled:CLK | ||||||||
| To: Remapping_Appnote_0/CORERESETP_0/ddr_settled_q1:D | ||||||||
| data required time | 14.659 | |||||||
| data arrival time | - | 9.439 | ||||||
| slack | 5.220 | |||||||
| Data arrival time calculation | ||||||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT | 0.000 | 0.000 | ||||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT | Clock source | + | 0.000 | 0.000 | r | |||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:A | net | Remapping_Appnote_0/FABOSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC | + | 2.058 | 2.058 | r | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT | cell | ADLIB:RCOSC_25_50MHZ_FAB | + | 0.152 | 2.210 | 1 | r | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An | net | Remapping_Appnote_0/FABOSC_0/N_RCOSC_25_50MHZ_CLKINT | + | 4.946 | 7.156 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn | cell | ADLIB:GBM | + | 0.357 | 7.513 | 3 | f | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An | net | Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast | + | 0.592 | 8.105 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YL | cell | ADLIB:RGB | + | 0.317 | 8.422 | 18 | r | |
| Remapping_Appnote_0/CORERESETP_0/ddr_settled:CLK | net | Remapping_Appnote_0/FABOSC_0_RCOSC_25_50MHZ_O2F | + | 0.549 | 8.971 | r | ||
| Remapping_Appnote_0/CORERESETP_0/ddr_settled:Q | cell | ADLIB:SLE | + | 0.087 | 9.058 | 1 | r | |
| Remapping_Appnote_0/CORERESETP_0/ddr_settled_q1:D | net | Remapping_Appnote_0/CORERESETP_0/ddr_settled_Z | + | 0.381 | 9.439 | r | ||
| data arrival time | 9.439 | |||||||
| Data required time calculation | ||||||||
| Remapping_Appnote_0/CCC_0/GL0 | Clock Constraint | 10.000 | 10.000 | |||||
| Remapping_Appnote_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 | Clock source | + | 0.000 | 10.000 | r | |||
| Clock generation | + | 2.815 | 12.815 | |||||
| Remapping_Appnote_0/CCC_0/GL0_INST:An | net | Remapping_Appnote_0/CCC_0/GL0_net | + | 0.537 | 13.352 | r | ||
| Remapping_Appnote_0/CCC_0/GL0_INST:YEn | cell | ADLIB:GBM | + | 0.143 | 13.495 | 8 | f | |
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB3:An | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_YWn_GEast | + | 0.582 | 14.077 | f | ||
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB3:YL | cell | ADLIB:RGB | + | 0.317 | 14.394 | 4 | r | |
| Remapping_Appnote_0/CORERESETP_0/ddr_settled_q1:CLK | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB3_rgbl_net_1 | + | 0.519 | 14.913 | r | ||
| Remapping_Appnote_0/CORERESETP_0/ddr_settled_q1:D | Library setup time | ADLIB:SLE | - | 0.254 | 14.659 | |||
| data required time | 14.659 | |||||||
| Operating Conditions | WORST |
No Path
| From | To | Delay (ns) | Slack (ns) | Arrival (ns) | Required (ns) | Setup (ns) | Minimum Period (ns) | Operating Conditions | |
|---|---|---|---|---|---|---|---|---|---|
| Path 1 | Remapping_Appnote_0/CORERESETP_0/count_ddr[8]:CLK | Remapping_Appnote_0/CORERESETP_0/ddr_settled:EN | 2.618 | 17.040 | 11.607 | 28.647 | 0.308 | 2.960 | WORST |
| Path 2 | Remapping_Appnote_0/CORERESETP_0/count_ddr[5]:CLK | Remapping_Appnote_0/CORERESETP_0/ddr_settled:EN | 2.460 | 17.185 | 11.462 | 28.647 | 0.308 | 2.815 | WORST |
| Path 3 | Remapping_Appnote_0/CORERESETP_0/count_ddr[0]:CLK | Remapping_Appnote_0/CORERESETP_0/ddr_settled:EN | 2.458 | 17.227 | 11.420 | 28.647 | 0.308 | 2.773 | WORST |
| Path 4 | Remapping_Appnote_0/CORERESETP_0/count_ddr[6]:CLK | Remapping_Appnote_0/CORERESETP_0/ddr_settled:EN | 2.384 | 17.274 | 11.373 | 28.647 | 0.308 | 2.726 | WORST |
| Path 5 | Remapping_Appnote_0/CORERESETP_0/count_ddr[10]:CLK | Remapping_Appnote_0/CORERESETP_0/ddr_settled:EN | 2.380 | 17.278 | 11.369 | 28.647 | 0.308 | 2.722 | WORST |
| Pin Name | Type | Net Name | Cell Name | Op | Delay (ns) | Total (ns) | Fanout | Edge |
|---|---|---|---|---|---|---|---|---|
| From: Remapping_Appnote_0/CORERESETP_0/count_ddr[8]:CLK | ||||||||
| To: Remapping_Appnote_0/CORERESETP_0/ddr_settled:EN | ||||||||
| data required time | 28.647 | |||||||
| data arrival time | - | 11.607 | ||||||
| slack | 17.040 | |||||||
| Data arrival time calculation | ||||||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT | 0.000 | 0.000 | ||||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT | Clock source | + | 0.000 | 0.000 | r | |||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:A | net | Remapping_Appnote_0/FABOSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC | + | 2.058 | 2.058 | r | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT | cell | ADLIB:RCOSC_25_50MHZ_FAB | + | 0.152 | 2.210 | 1 | r | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An | net | Remapping_Appnote_0/FABOSC_0/N_RCOSC_25_50MHZ_CLKINT | + | 4.946 | 7.156 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn | cell | ADLIB:GBM | + | 0.357 | 7.513 | 3 | f | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An | net | Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast | + | 0.592 | 8.105 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YL | cell | ADLIB:RGB | + | 0.317 | 8.422 | 18 | r | |
| Remapping_Appnote_0/CORERESETP_0/count_ddr[8]:CLK | net | Remapping_Appnote_0/FABOSC_0_RCOSC_25_50MHZ_O2F | + | 0.567 | 8.989 | r | ||
| Remapping_Appnote_0/CORERESETP_0/count_ddr[8]:Q | cell | ADLIB:SLE | + | 0.108 | 9.097 | 2 | f | |
| Remapping_Appnote_0/CORERESETP_0/ddr_settled6_7:C | net | Remapping_Appnote_0/CORERESETP_0/count_ddr_Z[8] | + | 0.724 | 9.821 | f | ||
| Remapping_Appnote_0/CORERESETP_0/ddr_settled6_7:Y | cell | ADLIB:CFG4 | + | 0.287 | 10.108 | 1 | f | |
| Remapping_Appnote_0/CORERESETP_0/ddr_settled6:B | net | Remapping_Appnote_0/CORERESETP_0/ddr_settled6_7_Z | + | 0.223 | 10.331 | f | ||
| Remapping_Appnote_0/CORERESETP_0/ddr_settled6:Y | cell | ADLIB:CFG4 | + | 0.164 | 10.495 | 1 | f | |
| Remapping_Appnote_0/CORERESETP_0/ddr_settled:EN | net | Remapping_Appnote_0/CORERESETP_0/ddr_settled6_Z | + | 1.112 | 11.607 | f | ||
| data arrival time | 11.607 | |||||||
| Data required time calculation | ||||||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT | Clock Constraint | 20.000 | 20.000 | |||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT | Clock source | + | 0.000 | 20.000 | r | |||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:A | net | Remapping_Appnote_0/FABOSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC | + | 2.058 | 22.058 | r | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT | cell | ADLIB:RCOSC_25_50MHZ_FAB | + | 0.152 | 22.210 | 1 | r | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An | net | Remapping_Appnote_0/FABOSC_0/N_RCOSC_25_50MHZ_CLKINT | + | 4.946 | 27.156 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn | cell | ADLIB:GBM | + | 0.357 | 27.513 | 3 | f | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An | net | Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast | + | 0.592 | 28.105 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YL | cell | ADLIB:RGB | + | 0.317 | 28.422 | 18 | r | |
| Remapping_Appnote_0/CORERESETP_0/ddr_settled:CLK | net | Remapping_Appnote_0/FABOSC_0_RCOSC_25_50MHZ_O2F | + | 0.533 | 28.955 | r | ||
| Remapping_Appnote_0/CORERESETP_0/ddr_settled:EN | Library setup time | ADLIB:SLE | - | 0.308 | 28.647 | |||
| data required time | 28.647 | |||||||
| Operating Conditions | WORST |
No Path
No Path
| From | To | Delay (ns) | Slack (ns) | Arrival (ns) | Required (ns) | Recovery (ns) | Minimum Period (ns) | Skew (ns) | Operating Conditions | |
|---|---|---|---|---|---|---|---|---|---|---|
| Path 1 | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc:CLK | Remapping_Appnote_0/CORERESETP_0/count_ddr[8]:ALn | 4.101 | 15.529 | 13.090 | 28.619 | 0.353 | 4.471 | 0.017 | WORST |
| Path 2 | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc:CLK | Remapping_Appnote_0/CORERESETP_0/count_ddr[6]:ALn | 4.101 | 15.529 | 13.090 | 28.619 | 0.353 | 4.471 | 0.017 | WORST |
| Path 3 | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc:CLK | Remapping_Appnote_0/CORERESETP_0/count_ddr[4]:ALn | 4.101 | 15.529 | 13.090 | 28.619 | 0.353 | 4.471 | 0.017 | WORST |
| Path 4 | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc:CLK | Remapping_Appnote_0/CORERESETP_0/count_ddr[2]:ALn | 4.101 | 15.529 | 13.090 | 28.619 | 0.353 | 4.471 | 0.017 | WORST |
| Path 5 | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc:CLK | Remapping_Appnote_0/CORERESETP_0/count_ddr[10]:ALn | 4.101 | 15.529 | 13.090 | 28.619 | 0.353 | 4.471 | 0.017 | WORST |
| Pin Name | Type | Net Name | Cell Name | Op | Delay (ns) | Total (ns) | Fanout | Edge |
|---|---|---|---|---|---|---|---|---|
| From: Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc:CLK | ||||||||
| To: Remapping_Appnote_0/CORERESETP_0/count_ddr[8]:ALn | ||||||||
| data required time | 28.619 | |||||||
| data arrival time | - | 13.090 | ||||||
| slack | 15.529 | |||||||
| Data arrival time calculation | ||||||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT | 0.000 | 0.000 | ||||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT | Clock source | + | 0.000 | 0.000 | r | |||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:A | net | Remapping_Appnote_0/FABOSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC | + | 2.058 | 2.058 | r | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT | cell | ADLIB:RCOSC_25_50MHZ_FAB | + | 0.152 | 2.210 | 1 | r | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An | net | Remapping_Appnote_0/FABOSC_0/N_RCOSC_25_50MHZ_CLKINT | + | 4.946 | 7.156 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn | cell | ADLIB:GBM | + | 0.357 | 7.513 | 3 | f | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_RGB1:An | net | Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast | + | 0.586 | 8.099 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_RGB1:YL | cell | ADLIB:RGB | + | 0.317 | 8.416 | 11 | r | |
| Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc:CLK | net | Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1_RGB1_rgbl_net_1 | + | 0.573 | 8.989 | r | ||
| Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc:Q | cell | ADLIB:SLE | + | 0.092 | 9.081 | 1 | r | |
| Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc_RNI8ED9:An | net | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc_0 | + | 2.149 | 11.230 | f | ||
| Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc_RNI8ED9:YEn | cell | ADLIB:GBM | + | 0.357 | 11.587 | 1 | f | |
| Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc_RNI8ED9/U0_RGB1:An | net | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc_RNI8ED9/U0_YWn_GEast | + | 0.579 | 12.166 | f | ||
| Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc_RNI8ED9/U0_RGB1:YL | cell | ADLIB:RGB | + | 0.317 | 12.483 | 17 | r | |
| Remapping_Appnote_0/CORERESETP_0/count_ddr[8]:ALn | net | Remapping_Appnote_0/CORERESETP_0/sm0_areset_n_rcosc_Z | + | 0.607 | 13.090 | r | ||
| data arrival time | 13.090 | |||||||
| Data required time calculation | ||||||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT | Clock Constraint | 20.000 | 20.000 | |||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT | Clock source | + | 0.000 | 20.000 | r | |||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:A | net | Remapping_Appnote_0/FABOSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC | + | 2.058 | 22.058 | r | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT | cell | ADLIB:RCOSC_25_50MHZ_FAB | + | 0.152 | 22.210 | 1 | r | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An | net | Remapping_Appnote_0/FABOSC_0/N_RCOSC_25_50MHZ_CLKINT | + | 4.946 | 27.156 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn | cell | ADLIB:GBM | + | 0.357 | 27.513 | 3 | f | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An | net | Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast | + | 0.592 | 28.105 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YL | cell | ADLIB:RGB | + | 0.317 | 28.422 | 18 | r | |
| Remapping_Appnote_0/CORERESETP_0/count_ddr[8]:CLK | net | Remapping_Appnote_0/FABOSC_0_RCOSC_25_50MHZ_O2F | + | 0.550 | 28.972 | r | ||
| Remapping_Appnote_0/CORERESETP_0/count_ddr[8]:ALn | Library recovery time | ADLIB:SLE | - | 0.353 | 28.619 | |||
| data required time | 28.619 | |||||||
| Operating Conditions | WORST |
No Path
No Path
| From | To | Delay (ns) | Slack (ns) | Arrival (ns) | Required (ns) | Setup (ns) | Operating Conditions | |
|---|---|---|---|---|---|---|---|---|
| Path 1 | Remapping_Appnote_0/CORERESETP_0/count_ddr_enable:CLK | Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1:D | 5.750 | 8.060 | 10.721 | 18.781 | 0.174 | WORST |
| Pin Name | Type | Net Name | Cell Name | Op | Delay (ns) | Total (ns) | Fanout | Edge |
|---|---|---|---|---|---|---|---|---|
| From: Remapping_Appnote_0/CORERESETP_0/count_ddr_enable:CLK | ||||||||
| To: Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1:D | ||||||||
| data required time | 18.781 | |||||||
| data arrival time | - | 10.721 | ||||||
| slack | 8.060 | |||||||
| Data arrival time calculation | ||||||||
| Remapping_Appnote_0/CCC_0/GL0 | 0.000 | 0.000 | ||||||
| Remapping_Appnote_0/CCC_0/CCC_INST/INST_CCC_IP:GL0 | Clock source | + | 0.000 | 0.000 | r | |||
| Clock generation | + | 2.815 | 2.815 | |||||
| Remapping_Appnote_0/CCC_0/GL0_INST:An | net | Remapping_Appnote_0/CCC_0/GL0_net | + | 0.537 | 3.352 | r | ||
| Remapping_Appnote_0/CCC_0/GL0_INST:YEn | cell | ADLIB:GBM | + | 0.143 | 3.495 | 8 | f | |
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB4:An | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_YWn_GEast | + | 0.580 | 4.075 | f | ||
| Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB4:YL | cell | ADLIB:RGB | + | 0.317 | 4.392 | 20 | r | |
| Remapping_Appnote_0/CORERESETP_0/count_ddr_enable:CLK | net | Remapping_Appnote_0/CCC_0/GL0_INST/U0_RGB1_RGB4_rgbl_net_1 | + | 0.579 | 4.971 | r | ||
| Remapping_Appnote_0/CORERESETP_0/count_ddr_enable:Q | cell | ADLIB:SLE | + | 0.108 | 5.079 | 1 | f | |
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1C_TEST:A | net | Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_Z | + | 0.440 | 5.519 | f | ||
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1C_TEST:Y | cell | ADLIB:CFG1C_TEST | + | 0.209 | 5.728 | 1 | f | |
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST5:A | net | mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1C_TEST_net | + | 0.205 | 5.933 | f | ||
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST5:Y | cell | ADLIB:CFG1D_TEST | + | 0.372 | 6.305 | 1 | f | |
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST4:A | net | mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST_net5 | + | 0.301 | 6.606 | f | ||
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST4:Y | cell | ADLIB:CFG1D_TEST | + | 0.372 | 6.978 | 1 | f | |
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST3:A | net | mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST_net4 | + | 0.205 | 7.183 | f | ||
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST3:Y | cell | ADLIB:CFG1D_TEST | + | 0.372 | 7.555 | 1 | f | |
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST2:A | net | mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST_net3 | + | 0.301 | 7.856 | f | ||
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST2:Y | cell | ADLIB:CFG1D_TEST | + | 0.372 | 8.228 | 1 | f | |
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST1:A | net | mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST_net2 | + | 0.205 | 8.433 | f | ||
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST1:Y | cell | ADLIB:CFG1D_TEST | + | 0.372 | 8.805 | 1 | f | |
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST0:A | net | mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST_net1 | + | 0.302 | 9.107 | f | ||
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST0:Y | cell | ADLIB:CFG1D_TEST | + | 0.372 | 9.479 | 1 | f | |
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST:A | net | mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST_net0 | + | 0.205 | 9.684 | f | ||
| mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST:Y | cell | ADLIB:CFG1D_TEST | + | 0.372 | 10.056 | 1 | f | |
| Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1:D | net | mdr_Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1_CFG1D_TEST_net | + | 0.665 | 10.721 | f | ||
| data arrival time | 10.721 | |||||||
| Data required time calculation | ||||||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ/CLKOUT | Clock Constraint | 10.000 | 10.000 | |||||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ:CLKOUT | Clock source | + | 0.000 | 10.000 | r | |||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:A | net | Remapping_Appnote_0/FABOSC_0_RCOSC_25_50MHZ_CCC_OUT_RCOSC_25_50MHZ_CCC | + | 2.058 | 12.058 | r | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB:CLKOUT | cell | ADLIB:RCOSC_25_50MHZ_FAB | + | 0.152 | 12.210 | 1 | r | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:An | net | Remapping_Appnote_0/FABOSC_0/N_RCOSC_25_50MHZ_CLKINT | + | 4.946 | 17.156 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT:YEn | cell | ADLIB:GBM | + | 0.357 | 17.513 | 3 | f | |
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:An | net | Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_YWn_GEast | + | 0.592 | 18.105 | f | ||
| Remapping_Appnote_0/FABOSC_0/I_RCOSC_25_50MHZ_FAB_CLKINT/U0_RGB1:YL | cell | ADLIB:RGB | + | 0.317 | 18.422 | 18 | r | |
| Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1:CLK | net | Remapping_Appnote_0/FABOSC_0_RCOSC_25_50MHZ_O2F | + | 0.533 | 18.955 | r | ||
| Remapping_Appnote_0/CORERESETP_0/count_ddr_enable_q1:D | Library setup time | ADLIB:SLE | - | 0.174 | 18.781 | |||
| data required time | 18.781 | |||||||
| Operating Conditions | WORST |
| From | To | Delay (ns) | Slack (ns) | Arrival (ns) | Required (ns) | Setup (ns) | Minimum Period (ns) | Operating Conditions | |
|---|---|---|---|---|---|---|---|---|---|
| Path 1 | Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_CONFIG_APB | Remapping_Appnote_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:EN | 1.496 | 2.854 | 1.496 | 4.350 | 0.245 | -2.854 | BEST |
| Path 2 | Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_CONFIG_APB | Remapping_Appnote_0/CORECONFIGP_0/state[0]:D | 0.928 | 3.471 | 0.928 | 4.399 | 0.202 | -3.471 | BEST |
| Path 3 | Remapping_Appnote_0/CORECONFIGP_0/psel:CLK | Remapping_Appnote_0/CORECONFIGP_0/soft_reset_reg[4]:EN | 3.181 | 14.215 | 10.151 | 24.366 | 0.308 | 7.606 | WORST |
| Path 4 | Remapping_Appnote_0/CORECONFIGP_0/psel:CLK | Remapping_Appnote_0/CORECONFIGP_0/soft_reset_reg[2]:EN | 3.181 | 14.215 | 10.151 | 24.366 | 0.308 | 7.606 | WORST |
| Path 5 | Remapping_Appnote_0/CORECONFIGP_0/psel:CLK | Remapping_Appnote_0/CORECONFIGP_0/soft_reset_reg[13]:EN | 3.181 | 14.215 | 10.151 | 24.366 | 0.308 | 7.606 | WORST |
| Pin Name | Type | Net Name | Cell Name | Op | Delay (ns) | Total (ns) | Fanout | Edge |
|---|---|---|---|---|---|---|---|---|
| From: Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_CONFIG_APB | ||||||||
| To: Remapping_Appnote_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:EN | ||||||||
| data required time | 4.350 | |||||||
| data arrival time | - | 1.496 | ||||||
| slack | 2.854 | |||||||
| Data arrival time calculation | ||||||||
| Remapping_Appnote_MSS|FIC_2_APB_M_PCLK_inferred_clock | 0.000 | 0.000 | ||||||
| Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_CONFIG_APB | Clock source | + | 0.000 | 0.000 | r | |||
| Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:PER2_FABRIC_PENABLE | cell | ADLIB:MSS_120_IP | + | 0.215 | 0.215 | 3 | r | |
| Remapping_Appnote_0/CORECONFIGP_0/next_state5:A | net | Remapping_Appnote_0/Remapping_Appnote_MSS_TMP_0_FIC_2_APB_MASTER_PENABLE | + | 0.489 | 0.704 | r | ||
| Remapping_Appnote_0/CORECONFIGP_0/next_state5:Y | cell | ADLIB:CFG2 | + | 0.092 | 0.796 | 1 | f | |
| Remapping_Appnote_0/CORECONFIGP_0/state_ns_0_a3[0]:A | net | Remapping_Appnote_0/CORECONFIGP_0/next_state5_Z | + | 0.059 | 0.855 | f | ||
| Remapping_Appnote_0/CORECONFIGP_0/state_ns_0_a3[0]:Y | cell | ADLIB:CFG3 | + | 0.057 | 0.912 | 2 | f | |
| Remapping_Appnote_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0:A | net | Remapping_Appnote_0/CORECONFIGP_0/state_ns[0] | + | 0.151 | 1.063 | f | ||
| Remapping_Appnote_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0:Y | cell | ADLIB:CFG3 | + | 0.057 | 1.120 | 1 | f | |
| Remapping_Appnote_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:EN | net | Remapping_Appnote_0/CORECONFIGP_0/un1_next_FIC_2_APB_M_PREADY_0_sqmuxa_0_Z | + | 0.376 | 1.496 | f | ||
| data arrival time | 1.496 | |||||||
| Data required time calculation | ||||||||
| Remapping_Appnote_MSS|FIC_2_APB_M_PCLK_inferred_clock | Max Delay Constraint | 0.000 | 0.000 | |||||
| Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST/INST_MSS_120_IP:CLK_CONFIG_APB | Clock source | + | 0.000 | 0.000 | r | |||
| Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST_RNI9P9D:An | net | Remapping_Appnote_0/Remapping_Appnote_MSS_0/CLK_CONFIG_APB | + | 3.345 | 3.345 | f | ||
| Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST_RNI9P9D:YEn | cell | ADLIB:GBM | + | 0.245 | 3.590 | 5 | f | |
| Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST_RNI9P9D/U0_RGB1_RGB3:An | net | Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST_RNI9P9D/U0_YWn_GEast | + | 0.404 | 3.994 | f | ||
| Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST_RNI9P9D/U0_RGB1_RGB3:YR | cell | ADLIB:RGB | + | 0.218 | 4.212 | 22 | r | |
| Remapping_Appnote_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:CLK | net | Remapping_Appnote_0/Remapping_Appnote_MSS_0/MSS_ADLIB_INST_RNI9P9D/U0_RGB1_RGB3_rgbr_net_1 | + | 0.383 | 4.595 | r | ||
| Remapping_Appnote_0/CORECONFIGP_0/FIC_2_APB_M_PREADY:EN | Library setup time | ADLIB:SLE | - | 0.245 | 4.350 | |||
| data required time | 4.350 | |||||||
| Operating Conditions | BEST |
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