@W: CG296 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master2.vhd":171:0:171:6|Incomplete sensitivity list - assuming completeness
@W: CG290 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master2.vhd":177:6:177:15|Referenced variable ahb_states is not in sensitivity list
@W: CD638 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master2.vhd":74:9:74:18|Signal hready_int is undriven 
@W: CD638 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master2.vhd":88:9:88:18|Signal cout_clear is undriven 
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master2.vhd":106:2:106:3|Pruning register HREADY_Int1_2  
@W: CG296 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master1.vhd":161:0:161:6|Incomplete sensitivity list - assuming completeness
@W: CG290 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master1.vhd":167:6:167:15|Referenced variable ahb_states is not in sensitivity list
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master1.vhd":100:2:100:3|Pruning register HREADY_Int1_2  
@W: CL240 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\work\AHB_Bus_Matrix_sb\FABOSC_0\AHB_Bus_Matrix_sb_FABOSC_0_OSC.vhd":16:10:16:19|XTLOSC_O2F is not assigned a value (floating) -- simulation mismatch possible. 
@W: CL240 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\work\AHB_Bus_Matrix_sb\FABOSC_0\AHB_Bus_Matrix_sb_FABOSC_0_OSC.vhd":15:10:15:19|XTLOSC_CCC is not assigned a value (floating) -- simulation mismatch possible. 
@W: CL240 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\work\AHB_Bus_Matrix_sb\FABOSC_0\AHB_Bus_Matrix_sb_FABOSC_0_OSC.vhd":14:10:14:23|RCOSC_1MHZ_O2F is not assigned a value (floating) -- simulation mismatch possible. 
@W: CL240 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\work\AHB_Bus_Matrix_sb\FABOSC_0\AHB_Bus_Matrix_sb_FABOSC_0_OSC.vhd":13:10:13:23|RCOSC_1MHZ_CCC is not assigned a value (floating) -- simulation mismatch possible. 
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":477:8:477:25|Signal soft_ext_reset_out in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":478:8:478:21|Signal soft_reset_f2m in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":479:8:479:20|Signal soft_m3_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":480:8:480:37|Signal soft_mddr_ddr_axi_s_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":481:8:481:27|Signal soft_fddr_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":482:8:482:27|Signal soft_sdif0_phy_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":483:8:483:28|Signal soft_sdif0_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":484:8:484:27|Signal soft_sdif1_phy_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":485:8:485:28|Signal soft_sdif1_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":486:8:486:27|Signal soft_sdif2_phy_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":487:8:487:28|Signal soft_sdif2_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":488:8:488:27|Signal soft_sdif3_phy_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":489:8:489:28|Signal soft_sdif3_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":490:8:490:30|Signal soft_sdif0_0_core_reset in the sensitivity list is not used in the process
@W: CD434 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":491:8:491:30|Signal soft_sdif0_1_core_reset in the sensitivity list is not used in the process
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1519:8:1519:9|Pruning register count_ddr_2(13 downto 0)  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1495:8:1495:9|Pruning register count_sdif3_2(12 downto 0)  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1471:8:1471:9|Pruning register count_sdif2_2(12 downto 0)  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1447:8:1447:9|Pruning register count_sdif1_2(12 downto 0)  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1423:8:1423:9|Pruning register count_sdif0_2(12 downto 0)  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_ddr_enable_rcosc_2  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_ddr_enable_q1_2  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif3_enable_rcosc_2  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif2_enable_rcosc_2  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif1_enable_rcosc_2  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif0_enable_rcosc_2  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif3_enable_q1_2  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif2_enable_q1_2  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif1_enable_q1_2  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1395:8:1395:9|Pruning register count_sdif0_enable_q1_2  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1311:8:1311:9|Pruning register count_sdif3_enable_3  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1252:8:1252:9|Pruning register count_sdif2_enable_3  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1193:8:1193:9|Pruning register count_sdif1_enable_3  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1134:8:1134:9|Pruning register count_sdif0_enable_3  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1059:8:1059:9|Pruning register count_ddr_enable_3  
@W: CL190 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1376:8:1376:9|Optimizing register bit EXT_RESET_OUT_int to a constant 0
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1059:8:1059:9|Pruning register release_ext_reset  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1376:8:1376:9|Pruning register EXT_RESET_OUT_int  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":1376:8:1376:9|Pruning register sm2_state(2 downto 0)  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":792:8:792:9|Pruning register sm2_areset_n_q1  
@W: CL169 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":792:8:792:9|Pruning register sm2_areset_n_clk_base  
@W: CL247 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\work\AHB_Bus_Matrix_sb_MSS\AHB_Bus_Matrix_sb_MSS.vhd":26:8:26:25|Input port bit 0 of fic_0_ahb_s_htrans(1 downto 0) is unused 
@W: CL247 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\work\AHB_Bus_Matrix_sb_MSS\AHB_Bus_Matrix_sb_MSS.vhd":34:8:34:25|Input port bit 0 of fic_1_ahb_s_htrans(1 downto 0) is unused 
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":96:4:96:12|Input CLK_LTSSM is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":123:4:123:12|Input FPLL_LOCK is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":126:4:126:18|Input SDIF0_SPLL_LOCK is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":135:4:135:18|Input SDIF1_SPLL_LOCK is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":139:4:139:18|Input SDIF2_SPLL_LOCK is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":143:4:143:18|Input SDIF3_SPLL_LOCK is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":157:4:157:13|Input SDIF0_PSEL is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":158:4:158:15|Input SDIF0_PWRITE is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":159:4:159:15|Input SDIF0_PRDATA is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":160:4:160:13|Input SDIF1_PSEL is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":161:4:161:15|Input SDIF1_PWRITE is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":162:4:162:15|Input SDIF1_PRDATA is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":163:4:163:13|Input SDIF2_PSEL is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":164:4:164:15|Input SDIF2_PWRITE is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":165:4:165:15|Input SDIF2_PRDATA is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":166:4:166:13|Input SDIF3_PSEL is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":167:4:167:15|Input SDIF3_PWRITE is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":168:4:168:15|Input SDIF3_PRDATA is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":174:4:174:21|Input SOFT_EXT_RESET_OUT is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":175:4:175:17|Input SOFT_RESET_F2M is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":176:4:176:16|Input SOFT_M3_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":177:4:177:33|Input SOFT_MDDR_DDR_AXI_S_CORE_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":178:4:178:23|Input SOFT_FDDR_CORE_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":179:4:179:23|Input SOFT_SDIF0_PHY_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":180:4:180:24|Input SOFT_SDIF0_CORE_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":181:4:181:23|Input SOFT_SDIF1_PHY_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":182:4:182:24|Input SOFT_SDIF1_CORE_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":183:4:183:23|Input SOFT_SDIF2_PHY_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":184:4:184:24|Input SOFT_SDIF2_CORE_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":185:4:185:23|Input SOFT_SDIF3_PHY_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":186:4:186:24|Input SOFT_SDIF3_CORE_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":190:4:190:26|Input SOFT_SDIF0_0_CORE_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\Actel\DirectCore\CoreResetP\7.0.104\rtl\vhdl\core\coreresetp.vhd":191:4:191:26|Input SOFT_SDIF0_1_CORE_RESET is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\component\work\AHB_Bus_Matrix_sb\FABOSC_0\AHB_Bus_Matrix_sb_FABOSC_0_OSC.vhd":10:10:10:12|Input XTL is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master1.vhd":40:8:40:12|Input HRESP is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master1.vhd":41:8:41:13|Input HRDATA is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master2.vhd":41:8:41:12|Input HRESP is unused
@W: CL159 :"D:\Libero11.7\AC388\M2S_AC388_DF\AHB_Bus_Matrix\hdl\Fabric_Master2.vhd":42:8:42:13|Input HRDATA is unused

