#### START OF AREA REPORT #####[
Part: M2GL050TFBGA896STD (Microsemi)
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ddc
DDS
DDS_SinCos
synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s
synBusSatRnd_Z1
synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s_0
synBusSatRnd_Z1_0
synDelayWithEnable_1s_17s_1s
singleDelayWithEnableGeneric_17s
synDelayWithEnable_1s_17s_1s_1
singleDelayWithEnableGeneric_17s_1
synDelayWithEnable_1s_12s_1s
singleDelayWithEnableGeneric_12s
DDS_SinCos_CORDIC_SinCos
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage
synDelayWithEnable_1s_1s_10s
synDelayWithEnableGeneric_Z3
synNegate_18s
synNegate_18s_0
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9
synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s
synBusSatRnd_Z4
synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s_0
synBusSatRnd_Z4_0
synDelayWithEnable_1s_17s_1s_0
singleDelayWithEnableGeneric_17s_0
synDelayWithEnable_1s_17s_1s_0_0
singleDelayWithEnableGeneric_17s_0_1
synDelayWithEnable_1s_15s_1s
singleDelayWithEnableGeneric_15s
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8
synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s
synBusSatRnd_Z7
synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s_0
synBusSatRnd_Z7_0
synDelayWithEnable_1s_17s_1s_0_1
singleDelayWithEnableGeneric_17s_0_2
synDelayWithEnable_1s_17s_1s_0_2
singleDelayWithEnableGeneric_17s_0_3
synDelayWithEnable_1s_15s_1s_0
singleDelayWithEnableGeneric_15s_0
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7
synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s
synBusSatRnd_Z8
synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s_0
synBusSatRnd_Z8_0
synDelayWithEnable_1s_17s_1s_0_3
singleDelayWithEnableGeneric_17s_0_4
synDelayWithEnable_1s_17s_1s_0_4
singleDelayWithEnableGeneric_17s_0_5
synDelayWithEnable_1s_15s_1s_1
singleDelayWithEnableGeneric_15s_1
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6
synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s
synBusSatRnd_Z9
synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s_0
synBusSatRnd_Z9_0
synDelayWithEnable_1s_17s_1s_0_5
singleDelayWithEnableGeneric_17s_0_6
synDelayWithEnable_1s_17s_1s_0_6
singleDelayWithEnableGeneric_17s_0_7
synDelayWithEnable_1s_15s_1s_2
singleDelayWithEnableGeneric_15s_2
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5
synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s
synBusSatRnd_Z10
synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s_0
synBusSatRnd_Z10_0
synDelayWithEnable_1s_17s_1s_0_7
singleDelayWithEnableGeneric_17s_0_8
synDelayWithEnable_1s_17s_1s_0_8
singleDelayWithEnableGeneric_17s_0_9
synDelayWithEnable_1s_15s_1s_3
singleDelayWithEnableGeneric_15s_3
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4
synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s
synBusSatRnd_Z11
synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s_0
synBusSatRnd_Z11_0
synDelayWithEnable_1s_17s_1s_0_9
singleDelayWithEnableGeneric_17s_0_10
synDelayWithEnable_1s_17s_1s_0_10
singleDelayWithEnableGeneric_17s_0_11
synDelayWithEnable_1s_15s_1s_4
singleDelayWithEnableGeneric_15s_4
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3
synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s
synBusSatRnd_Z12
synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s_0
synBusSatRnd_Z12_0
synDelayWithEnable_1s_17s_1s_0_11
singleDelayWithEnableGeneric_17s_0_12
synDelayWithEnable_1s_17s_1s_0_12
singleDelayWithEnableGeneric_17s_0_13
synDelayWithEnable_1s_15s_1s_5
singleDelayWithEnableGeneric_15s_5
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2
synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s
synBusSatRnd_Z13
synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s_0
synBusSatRnd_Z13_0
synDelayWithEnable_1s_17s_1s_0_13
singleDelayWithEnableGeneric_17s_0_14
synDelayWithEnable_1s_17s_1s_0_14
singleDelayWithEnableGeneric_17s_0_15
synDelayWithEnable_1s_15s_1s_6
singleDelayWithEnableGeneric_15s_6
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg12
synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s
synBusSatRnd_Z14
synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s_0
synBusSatRnd_Z14_0
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg11
synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s
synBusSatRnd_Z15
synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s_0
synBusSatRnd_Z15_0
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10
synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s
synBusSatRnd_Z16
synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s_0
synBusSatRnd_Z16_0
synDelayWithEnable_1s_17s_1s_0_15
singleDelayWithEnableGeneric_17s_0_16
synDelayWithEnable_1s_17s_1s_0_16
singleDelayWithEnableGeneric_17s_0_17
synDelayWithEnable_1s_15s_1s_7
singleDelayWithEnableGeneric_15s_7
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1
synDelayWithEnable_1s_17s_1s_0_17
singleDelayWithEnableGeneric_17s_0_18
synDelayWithEnable_1s_17s_1s_0_18
singleDelayWithEnableGeneric_17s_0_19
synDelayWithEnable_1s_15s_1s_8
singleDelayWithEnableGeneric_15s_8
DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg13
synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s
synBusSatRnd_Z17
synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s_0
synBusSatRnd_Z17_0
DDS_PhaseGenerator
synAccumulator_33s_signed_incr
synDDS_PhaseGenerator_shrp1
synDelayWithEnable_1s_33s_1s
singleDelayWithEnableGeneric_33s
synDDS_PhaseGenerator_shrp2
synDelayWithEnable_1s_32s_1s
singleDelayWithEnableGeneric_32s
CIC_I
synDelayWithEnable_1s_44s_1s
singleDelayWithEnableGeneric_44s
synDelayWithEnable_1s_14s_1s
singleDelayWithEnableGeneric_14s
CIC_I_I1
synCIC_I_I1_Delay
synDelayWithEnable_1s_44s_1s_1
singleDelayWithEnableGeneric_44s_2
CIC_I_I1_1
synCIC_I_I1_Delay_0
synDelayWithEnable_1s_44s_1s_2
singleDelayWithEnableGeneric_44s_3
CIC_I_I1_2
synCIC_I_I1_Delay_1
synDelayWithEnable_1s_44s_1s_3
singleDelayWithEnableGeneric_44s_4
CIC_I_I1_3
synCIC_I_I1_Delay_2
synDelayWithEnable_1s_44s_1s_4
singleDelayWithEnableGeneric_44s_5
CIC_I_I1_4
synCIC_I_I1_Delay_3
synDelayWithEnable_1s_44s_1s_5
singleDelayWithEnableGeneric_44s_6
CIC_I_C1
synCIC_I_C1_Delay
synDelayWithEnable_1s_44s_1s_0
singleDelayWithEnableGeneric_44s_1
CIC_I_C1_0
synCIC_I_C1_Delay_0
synDelayWithEnable_1s_44s_1s_0_0
singleDelayWithEnableGeneric_44s_1_0
CIC_I_C1_0_0
synCIC_I_C1_Delay_1
synDelayWithEnable_1s_44s_1s_0_1
singleDelayWithEnableGeneric_44s_1_1
CIC_I_C1_0_1
synCIC_I_C1_Delay_2
synDelayWithEnable_1s_44s_1s_0_2
singleDelayWithEnableGeneric_44s_1_2
CIC_I_C1_0_2
synCIC_I_C1_Delay_3
synDelayWithEnable_1s_44s_1s_0_3
singleDelayWithEnableGeneric_44s_1_3
CIC_I_0
synDelayWithEnable_1s_44s_1s_6
singleDelayWithEnableGeneric_44s_7
synDelayWithEnable_1s_14s_1s_0
singleDelayWithEnableGeneric_14s_1
CIC_I_I1_5
synCIC_I_I1_Delay_4
synDelayWithEnable_1s_44s_1s_7
singleDelayWithEnableGeneric_44s_8
CIC_I_I1_6
synCIC_I_I1_Delay_5
synDelayWithEnable_1s_44s_1s_8
singleDelayWithEnableGeneric_44s_9
CIC_I_I1_7
synCIC_I_I1_Delay_6
synDelayWithEnable_1s_44s_1s_9
singleDelayWithEnableGeneric_44s_10
CIC_I_I1_8
synCIC_I_I1_Delay_7
synDelayWithEnable_1s_44s_1s_10
singleDelayWithEnableGeneric_44s_11
CIC_I_I1_9
synCIC_I_I1_Delay_8
synDelayWithEnable_1s_44s_1s_11
singleDelayWithEnableGeneric_44s_12
CIC_I_C1_1
synCIC_I_C1_Delay_4
synDelayWithEnable_1s_44s_1s_0_4
singleDelayWithEnableGeneric_44s_1_4
CIC_I_C1_0_3
synCIC_I_C1_Delay_5
synDelayWithEnable_1s_44s_1s_0_5
singleDelayWithEnableGeneric_44s_1_5
CIC_I_C1_0_4
synCIC_I_C1_Delay_6
synDelayWithEnable_1s_44s_1s_0_6
singleDelayWithEnableGeneric_44s_1_6
CIC_I_C1_0_5
synCIC_I_C1_Delay_7
synDelayWithEnable_1s_44s_1s_0_7
singleDelayWithEnableGeneric_44s_1_7
CIC_I_C1_0_6
synCIC_I_C1_Delay_8
synDelayWithEnable_1s_44s_1s_0_8
singleDelayWithEnableGeneric_44s_1_8
CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s
synDownsampleSimple_14s
CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s
synDelayWithEnable_1s_14s_1s_1
singleDelayWithEnableGeneric_14s_2
CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s_0
synDownsampleSimple_14s_0
CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s_0
synDelayWithEnable_1s_14s_1s_2
singleDelayWithEnableGeneric_14s_3
-------------------------------------------------------------------
######## Utilization report for Top level view: ddc ########
===================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2916 100 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc: 2916 (42.18 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 66 100 %
ARI1 3334 100 %
BLACK BOX 247 100 %
======================================================
Total COMBINATIONAL LOGIC in the block ddc: 3647 (52.75 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 22 100 %
=================================================
Total DSP in the block ddc: 22 (0.32 % Utilization)
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GLOBAL BUFFERS
Name Total elements Utilization Notes
---------------------------------------------------
GLOBAL 4 100 %
===================================================
Total GLOBAL BUFFERS in the block ddc: 4 (0.06 % Utilization)
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IO PADS
Name Total elements Utilization Notes
-------------------------------------------------
IO 74 100 %
=================================================
Total IO PADS in the block ddc: 74 (1.07 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s ########
Instance path: ddc.CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s
================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 312 10.7 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc.CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s: 312 (4.51 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
ARI1 326 9.78 %
BLACK BOX 16 6.48 %
======================================================
Total COMBINATIONAL LOGIC in the block ddc.CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s: 342 (4.95 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 6 27.3 %
=================================================
Total DSP in the block ddc.CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s: 6 (0.09 % Utilization)
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------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s_0 ########
Instance path: ddc.CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s_0
==================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 312 10.7 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc.CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s_0: 312 (4.51 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
ARI1 326 9.78 %
BLACK BOX 16 6.48 %
======================================================
Total COMBINATIONAL LOGIC in the block ddc.CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s_0: 342 (4.95 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 6 27.3 %
=================================================
Total DSP in the block ddc.CFIR_I_PolyphaseFIR_0_14s_13s_9s_8s_15s_13s_15s_25s_0s_10s_0: 6 (0.09 % Utilization)
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----------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s ########
Instance path: ddc.CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s
================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 305 10.5 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc.CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s: 305 (4.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
ARI1 318 9.54 %
BLACK BOX 17 6.88 %
======================================================
Total COMBINATIONAL LOGIC in the block ddc.CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s: 335 (4.85 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 4 18.2 %
=================================================
Total DSP in the block ddc.CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s: 4 (0.06 % Utilization)
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------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s_0 ########
Instance path: ddc.CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s_0
==================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 305 10.5 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc.CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s_0: 305 (4.41 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
ARI1 318 9.54 %
BLACK BOX 17 6.88 %
======================================================
Total COMBINATIONAL LOGIC in the block ddc.CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s_0: 335 (4.85 % Utilization)
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DSP
Name Total elements Utilization Notes
-------------------------------------------------
MACC 4 18.2 %
=================================================
Total DSP in the block ddc.CFIR_I_PolyphaseFIR_1_14s_13s_9s_8s_15s_13s_15s_24s_0s_10s_0: 4 (0.06 % Utilization)
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-----------------------------------------------------------
######## Utilization report for cell: CIC_I ########
Instance path: ddc.CIC_I
===========================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 492 16.9 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc.CIC_I: 492 (7.12 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 9 13.6 %
ARI1 436 13.1 %
BLACK BOX 12 4.86 %
======================================================
Total COMBINATIONAL LOGIC in the block ddc.CIC_I: 457 (6.61 % Utilization)
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--------------------------------------------------------------
######## Utilization report for cell: CIC_I_C1 ########
Instance path: CIC_I.CIC_I_C1
==============================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.CIC_I_C1: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
ARI1 42 1.26 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I.CIC_I_C1: 45 (0.65 % Utilization)
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-----------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_C1_Delay ########
Instance path: CIC_I_C1.synCIC_I_C1_Delay
=======================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_C1.synCIC_I_C1_Delay: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_C1.synCIC_I_C1_Delay: 3 (0.04 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_0 ########
Instance path: synCIC_I_C1_Delay.synDelayWithEnable_1s_44s_1s_0
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_C1_Delay.synDelayWithEnable_1s_44s_1s_0: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synCIC_I_C1_Delay.synDelayWithEnable_1s_44s_1s_0: 3 (0.04 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_1 ########
Instance path: synDelayWithEnable_1s_44s_1s_0.singleDelayWithEnableGeneric_44s_1
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_0.singleDelayWithEnableGeneric_44s_1: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s_0.singleDelayWithEnableGeneric_44s_1: 3 (0.04 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: CIC_I_C1_0 ########
Instance path: CIC_I.CIC_I_C1_0
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.CIC_I_C1_0: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 2 3.03 %
ARI1 42 1.26 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I.CIC_I_C1_0: 46 (0.67 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_C1_Delay_0 ########
Instance path: CIC_I_C1_0.synCIC_I_C1_Delay_0
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_C1_0.synCIC_I_C1_Delay_0: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_C1_0.synCIC_I_C1_Delay_0: 3 (0.04 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_0_0 ########
Instance path: synCIC_I_C1_Delay_0.synDelayWithEnable_1s_44s_1s_0_0
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_C1_Delay_0.synDelayWithEnable_1s_44s_1s_0_0: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synCIC_I_C1_Delay_0.synDelayWithEnable_1s_44s_1s_0_0: 3 (0.04 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_1_0 ########
Instance path: synDelayWithEnable_1s_44s_1s_0_0.singleDelayWithEnableGeneric_44s_1_0
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_0_0.singleDelayWithEnableGeneric_44s_1_0: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s_0_0.singleDelayWithEnableGeneric_44s_1_0: 3 (0.04 % Utilization)
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------------------------------------------------------------------
######## Utilization report for cell: CIC_I_C1_0_0 ########
Instance path: CIC_I.CIC_I_C1_0_0
==================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.CIC_I_C1_0_0: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 2 3.03 %
ARI1 42 1.26 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I.CIC_I_C1_0_0: 46 (0.67 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_C1_Delay_1 ########
Instance path: CIC_I_C1_0_0.synCIC_I_C1_Delay_1
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_C1_0_0.synCIC_I_C1_Delay_1: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_C1_0_0.synCIC_I_C1_Delay_1: 3 (0.04 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_0_1 ########
Instance path: synCIC_I_C1_Delay_1.synDelayWithEnable_1s_44s_1s_0_1
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_C1_Delay_1.synDelayWithEnable_1s_44s_1s_0_1: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synCIC_I_C1_Delay_1.synDelayWithEnable_1s_44s_1s_0_1: 3 (0.04 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_1_1 ########
Instance path: synDelayWithEnable_1s_44s_1s_0_1.singleDelayWithEnableGeneric_44s_1_1
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_0_1.singleDelayWithEnableGeneric_44s_1_1: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s_0_1.singleDelayWithEnableGeneric_44s_1_1: 3 (0.04 % Utilization)
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------------------------------------------------------------------
######## Utilization report for cell: CIC_I_C1_0_1 ########
Instance path: CIC_I.CIC_I_C1_0_1
==================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.CIC_I_C1_0_1: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 2 3.03 %
ARI1 42 1.26 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I.CIC_I_C1_0_1: 46 (0.67 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_C1_Delay_2 ########
Instance path: CIC_I_C1_0_1.synCIC_I_C1_Delay_2
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_C1_0_1.synCIC_I_C1_Delay_2: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_C1_0_1.synCIC_I_C1_Delay_2: 3 (0.04 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_0_2 ########
Instance path: synCIC_I_C1_Delay_2.synDelayWithEnable_1s_44s_1s_0_2
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_C1_Delay_2.synDelayWithEnable_1s_44s_1s_0_2: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synCIC_I_C1_Delay_2.synDelayWithEnable_1s_44s_1s_0_2: 3 (0.04 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_1_2 ########
Instance path: synDelayWithEnable_1s_44s_1s_0_2.singleDelayWithEnableGeneric_44s_1_2
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_0_2.singleDelayWithEnableGeneric_44s_1_2: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s_0_2.singleDelayWithEnableGeneric_44s_1_2: 3 (0.04 % Utilization)
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------------------------------------------------------------------
######## Utilization report for cell: CIC_I_C1_0_2 ########
Instance path: CIC_I.CIC_I_C1_0_2
==================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.CIC_I_C1_0_2: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
ARI1 42 1.26 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I.CIC_I_C1_0_2: 45 (0.65 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_C1_Delay_3 ########
Instance path: CIC_I_C1_0_2.synCIC_I_C1_Delay_3
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_C1_0_2.synCIC_I_C1_Delay_3: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_C1_0_2.synCIC_I_C1_Delay_3: 2 (0.03 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_0_3 ########
Instance path: synCIC_I_C1_Delay_3.synDelayWithEnable_1s_44s_1s_0_3
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_C1_Delay_3.synDelayWithEnable_1s_44s_1s_0_3: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synCIC_I_C1_Delay_3.synDelayWithEnable_1s_44s_1s_0_3: 2 (0.03 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_1_3 ########
Instance path: synDelayWithEnable_1s_44s_1s_0_3.singleDelayWithEnableGeneric_44s_1_3
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_0_3.singleDelayWithEnableGeneric_44s_1_3: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s_0_3.singleDelayWithEnableGeneric_44s_1_3: 2 (0.03 % Utilization)
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--------------------------------------------------------------
######## Utilization report for cell: CIC_I_I1 ########
Instance path: CIC_I.CIC_I_I1
==============================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.CIC_I_I1: 44 (0.64 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 44 1.32 %
=================================================
Total COMBINATIONAL LOGIC in the block CIC_I.CIC_I_I1: 44 (0.64 % Utilization)
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-----------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_I1_Delay ########
Instance path: CIC_I_I1.synCIC_I_I1_Delay
=======================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_I1.synCIC_I_I1_Delay: 44 (0.64 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_1 ########
Instance path: synCIC_I_I1_Delay.synDelayWithEnable_1s_44s_1s_1
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_I1_Delay.synDelayWithEnable_1s_44s_1s_1: 44 (0.64 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_2 ########
Instance path: synDelayWithEnable_1s_44s_1s_1.singleDelayWithEnableGeneric_44s_2
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_1.singleDelayWithEnableGeneric_44s_2: 44 (0.64 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: CIC_I_I1_1 ########
Instance path: CIC_I.CIC_I_I1_1
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.CIC_I_I1_1: 44 (0.64 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 44 1.32 %
=================================================
Total COMBINATIONAL LOGIC in the block CIC_I.CIC_I_I1_1: 44 (0.64 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_I1_Delay_0 ########
Instance path: CIC_I_I1_1.synCIC_I_I1_Delay_0
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_I1_1.synCIC_I_I1_Delay_0: 44 (0.64 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_2 ########
Instance path: synCIC_I_I1_Delay_0.synDelayWithEnable_1s_44s_1s_2
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_I1_Delay_0.synDelayWithEnable_1s_44s_1s_2: 44 (0.64 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_3 ########
Instance path: synDelayWithEnable_1s_44s_1s_2.singleDelayWithEnableGeneric_44s_3
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_2.singleDelayWithEnableGeneric_44s_3: 44 (0.64 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: CIC_I_I1_2 ########
Instance path: CIC_I.CIC_I_I1_2
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.CIC_I_I1_2: 44 (0.64 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 44 1.32 %
=================================================
Total COMBINATIONAL LOGIC in the block CIC_I.CIC_I_I1_2: 44 (0.64 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_I1_Delay_1 ########
Instance path: CIC_I_I1_2.synCIC_I_I1_Delay_1
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_I1_2.synCIC_I_I1_Delay_1: 44 (0.64 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_3 ########
Instance path: synCIC_I_I1_Delay_1.synDelayWithEnable_1s_44s_1s_3
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_I1_Delay_1.synDelayWithEnable_1s_44s_1s_3: 44 (0.64 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_4 ########
Instance path: synDelayWithEnable_1s_44s_1s_3.singleDelayWithEnableGeneric_44s_4
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_3.singleDelayWithEnableGeneric_44s_4: 44 (0.64 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: CIC_I_I1_3 ########
Instance path: CIC_I.CIC_I_I1_3
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.CIC_I_I1_3: 44 (0.64 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 44 1.32 %
=================================================
Total COMBINATIONAL LOGIC in the block CIC_I.CIC_I_I1_3: 44 (0.64 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_I1_Delay_2 ########
Instance path: CIC_I_I1_3.synCIC_I_I1_Delay_2
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_I1_3.synCIC_I_I1_Delay_2: 44 (0.64 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_4 ########
Instance path: synCIC_I_I1_Delay_2.synDelayWithEnable_1s_44s_1s_4
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_I1_Delay_2.synDelayWithEnable_1s_44s_1s_4: 44 (0.64 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_5 ########
Instance path: synDelayWithEnable_1s_44s_1s_4.singleDelayWithEnableGeneric_44s_5
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_4.singleDelayWithEnableGeneric_44s_5: 44 (0.64 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: CIC_I_I1_4 ########
Instance path: CIC_I.CIC_I_I1_4
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.CIC_I_I1_4: 44 (0.64 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 44 1.32 %
=================================================
Total COMBINATIONAL LOGIC in the block CIC_I.CIC_I_I1_4: 44 (0.64 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_I1_Delay_3 ########
Instance path: CIC_I_I1_4.synCIC_I_I1_Delay_3
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_I1_4.synCIC_I_I1_Delay_3: 44 (0.64 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_5 ########
Instance path: synCIC_I_I1_Delay_3.synDelayWithEnable_1s_44s_1s_5
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_I1_Delay_3.synDelayWithEnable_1s_44s_1s_5: 44 (0.64 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_6 ########
Instance path: synDelayWithEnable_1s_44s_1s_5.singleDelayWithEnableGeneric_44s_6
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_5.singleDelayWithEnableGeneric_44s_6: 44 (0.64 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_14s_1s ########
Instance path: CIC_I.synDelayWithEnable_1s_14s_1s
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.synDelayWithEnable_1s_14s_1s: 14 (0.20 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_14s ########
Instance path: synDelayWithEnable_1s_14s_1s.singleDelayWithEnableGeneric_14s
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_14s_1s.singleDelayWithEnableGeneric_14s: 14 (0.20 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s ########
Instance path: CIC_I.synDelayWithEnable_1s_44s_1s
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I.synDelayWithEnable_1s_44s_1s: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I.synDelayWithEnable_1s_44s_1s: 2 (0.03 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s ########
Instance path: synDelayWithEnable_1s_44s_1s.singleDelayWithEnableGeneric_44s
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s.singleDelayWithEnableGeneric_44s: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s.singleDelayWithEnableGeneric_44s: 2 (0.03 % Utilization)
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-------------------------------------------------------------
######## Utilization report for cell: CIC_I_0 ########
Instance path: ddc.CIC_I_0
=============================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 486 16.7 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc.CIC_I_0: 486 (7.03 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 10 15.2 %
ARI1 430 12.9 %
BLACK BOX 12 4.86 %
======================================================
Total COMBINATIONAL LOGIC in the block ddc.CIC_I_0: 452 (6.54 % Utilization)
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------------------------------------------------------------------
######## Utilization report for cell: CIC_I_C1_0_3 ########
Instance path: CIC_I_0.CIC_I_C1_0_3
==================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.CIC_I_C1_0_3: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 2 3.03 %
ARI1 42 1.26 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_0.CIC_I_C1_0_3: 46 (0.67 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_C1_Delay_5 ########
Instance path: CIC_I_C1_0_3.synCIC_I_C1_Delay_5
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_C1_0_3.synCIC_I_C1_Delay_5: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_C1_0_3.synCIC_I_C1_Delay_5: 3 (0.04 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_0_5 ########
Instance path: synCIC_I_C1_Delay_5.synDelayWithEnable_1s_44s_1s_0_5
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_C1_Delay_5.synDelayWithEnable_1s_44s_1s_0_5: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synCIC_I_C1_Delay_5.synDelayWithEnable_1s_44s_1s_0_5: 3 (0.04 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_1_5 ########
Instance path: synDelayWithEnable_1s_44s_1s_0_5.singleDelayWithEnableGeneric_44s_1_5
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_0_5.singleDelayWithEnableGeneric_44s_1_5: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s_0_5.singleDelayWithEnableGeneric_44s_1_5: 3 (0.04 % Utilization)
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------------------------------------------------------------------
######## Utilization report for cell: CIC_I_C1_0_4 ########
Instance path: CIC_I_0.CIC_I_C1_0_4
==================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.CIC_I_C1_0_4: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 2 3.03 %
ARI1 42 1.26 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_0.CIC_I_C1_0_4: 46 (0.67 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_C1_Delay_6 ########
Instance path: CIC_I_C1_0_4.synCIC_I_C1_Delay_6
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_C1_0_4.synCIC_I_C1_Delay_6: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_C1_0_4.synCIC_I_C1_Delay_6: 3 (0.04 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_0_6 ########
Instance path: synCIC_I_C1_Delay_6.synDelayWithEnable_1s_44s_1s_0_6
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_C1_Delay_6.synDelayWithEnable_1s_44s_1s_0_6: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synCIC_I_C1_Delay_6.synDelayWithEnable_1s_44s_1s_0_6: 3 (0.04 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_1_6 ########
Instance path: synDelayWithEnable_1s_44s_1s_0_6.singleDelayWithEnableGeneric_44s_1_6
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_0_6.singleDelayWithEnableGeneric_44s_1_6: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s_0_6.singleDelayWithEnableGeneric_44s_1_6: 3 (0.04 % Utilization)
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------------------------------------------------------------------
######## Utilization report for cell: CIC_I_C1_0_5 ########
Instance path: CIC_I_0.CIC_I_C1_0_5
==================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.CIC_I_C1_0_5: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 2 3.03 %
ARI1 42 1.26 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_0.CIC_I_C1_0_5: 46 (0.67 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_C1_Delay_7 ########
Instance path: CIC_I_C1_0_5.synCIC_I_C1_Delay_7
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_C1_0_5.synCIC_I_C1_Delay_7: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_C1_0_5.synCIC_I_C1_Delay_7: 3 (0.04 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_0_7 ########
Instance path: synCIC_I_C1_Delay_7.synDelayWithEnable_1s_44s_1s_0_7
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_C1_Delay_7.synDelayWithEnable_1s_44s_1s_0_7: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synCIC_I_C1_Delay_7.synDelayWithEnable_1s_44s_1s_0_7: 3 (0.04 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_1_7 ########
Instance path: synDelayWithEnable_1s_44s_1s_0_7.singleDelayWithEnableGeneric_44s_1_7
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_0_7.singleDelayWithEnableGeneric_44s_1_7: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s_0_7.singleDelayWithEnableGeneric_44s_1_7: 3 (0.04 % Utilization)
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------------------------------------------------------------------
######## Utilization report for cell: CIC_I_C1_0_6 ########
Instance path: CIC_I_0.CIC_I_C1_0_6
==================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.CIC_I_C1_0_6: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
ARI1 42 1.26 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_0.CIC_I_C1_0_6: 45 (0.65 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_C1_Delay_8 ########
Instance path: CIC_I_C1_0_6.synCIC_I_C1_Delay_8
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_C1_0_6.synCIC_I_C1_Delay_8: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_C1_0_6.synCIC_I_C1_Delay_8: 2 (0.03 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_0_8 ########
Instance path: synCIC_I_C1_Delay_8.synDelayWithEnable_1s_44s_1s_0_8
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_C1_Delay_8.synDelayWithEnable_1s_44s_1s_0_8: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synCIC_I_C1_Delay_8.synDelayWithEnable_1s_44s_1s_0_8: 2 (0.03 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_1_8 ########
Instance path: synDelayWithEnable_1s_44s_1s_0_8.singleDelayWithEnableGeneric_44s_1_8
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_0_8.singleDelayWithEnableGeneric_44s_1_8: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s_0_8.singleDelayWithEnableGeneric_44s_1_8: 2 (0.03 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: CIC_I_C1_1 ########
Instance path: CIC_I_0.CIC_I_C1_1
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.CIC_I_C1_1: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
ARI1 42 1.26 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_0.CIC_I_C1_1: 45 (0.65 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_C1_Delay_4 ########
Instance path: CIC_I_C1_1.synCIC_I_C1_Delay_4
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_C1_1.synCIC_I_C1_Delay_4: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_C1_1.synCIC_I_C1_Delay_4: 3 (0.04 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_0_4 ########
Instance path: synCIC_I_C1_Delay_4.synDelayWithEnable_1s_44s_1s_0_4
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_C1_Delay_4.synDelayWithEnable_1s_44s_1s_0_4: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synCIC_I_C1_Delay_4.synDelayWithEnable_1s_44s_1s_0_4: 3 (0.04 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_1_4 ########
Instance path: synDelayWithEnable_1s_44s_1s_0_4.singleDelayWithEnableGeneric_44s_1_4
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_0_4.singleDelayWithEnableGeneric_44s_1_4: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 1 1.52 %
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s_0_4.singleDelayWithEnableGeneric_44s_1_4: 3 (0.04 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: CIC_I_I1_5 ########
Instance path: CIC_I_0.CIC_I_I1_5
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.CIC_I_I1_5: 44 (0.64 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 44 1.32 %
=================================================
Total COMBINATIONAL LOGIC in the block CIC_I_0.CIC_I_I1_5: 44 (0.64 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_I1_Delay_4 ########
Instance path: CIC_I_I1_5.synCIC_I_I1_Delay_4
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_I1_5.synCIC_I_I1_Delay_4: 44 (0.64 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_7 ########
Instance path: synCIC_I_I1_Delay_4.synDelayWithEnable_1s_44s_1s_7
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_I1_Delay_4.synDelayWithEnable_1s_44s_1s_7: 44 (0.64 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_8 ########
Instance path: synDelayWithEnable_1s_44s_1s_7.singleDelayWithEnableGeneric_44s_8
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_7.singleDelayWithEnableGeneric_44s_8: 44 (0.64 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: CIC_I_I1_6 ########
Instance path: CIC_I_0.CIC_I_I1_6
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.CIC_I_I1_6: 44 (0.64 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 44 1.32 %
=================================================
Total COMBINATIONAL LOGIC in the block CIC_I_0.CIC_I_I1_6: 44 (0.64 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_I1_Delay_5 ########
Instance path: CIC_I_I1_6.synCIC_I_I1_Delay_5
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_I1_6.synCIC_I_I1_Delay_5: 44 (0.64 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_8 ########
Instance path: synCIC_I_I1_Delay_5.synDelayWithEnable_1s_44s_1s_8
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_I1_Delay_5.synDelayWithEnable_1s_44s_1s_8: 44 (0.64 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_9 ########
Instance path: synDelayWithEnable_1s_44s_1s_8.singleDelayWithEnableGeneric_44s_9
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_8.singleDelayWithEnableGeneric_44s_9: 44 (0.64 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: CIC_I_I1_7 ########
Instance path: CIC_I_0.CIC_I_I1_7
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.CIC_I_I1_7: 44 (0.64 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 44 1.32 %
=================================================
Total COMBINATIONAL LOGIC in the block CIC_I_0.CIC_I_I1_7: 44 (0.64 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_I1_Delay_6 ########
Instance path: CIC_I_I1_7.synCIC_I_I1_Delay_6
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_I1_7.synCIC_I_I1_Delay_6: 44 (0.64 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_9 ########
Instance path: synCIC_I_I1_Delay_6.synDelayWithEnable_1s_44s_1s_9
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_I1_Delay_6.synDelayWithEnable_1s_44s_1s_9: 44 (0.64 % Utilization)
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-----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_10 ########
Instance path: synDelayWithEnable_1s_44s_1s_9.singleDelayWithEnableGeneric_44s_10
=========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_9.singleDelayWithEnableGeneric_44s_10: 44 (0.64 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: CIC_I_I1_8 ########
Instance path: CIC_I_0.CIC_I_I1_8
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.CIC_I_I1_8: 44 (0.64 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 44 1.32 %
=================================================
Total COMBINATIONAL LOGIC in the block CIC_I_0.CIC_I_I1_8: 44 (0.64 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_I1_Delay_7 ########
Instance path: CIC_I_I1_8.synCIC_I_I1_Delay_7
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_I1_8.synCIC_I_I1_Delay_7: 44 (0.64 % Utilization)
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-------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_10 ########
Instance path: synCIC_I_I1_Delay_7.synDelayWithEnable_1s_44s_1s_10
=====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_I1_Delay_7.synDelayWithEnable_1s_44s_1s_10: 44 (0.64 % Utilization)
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-----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_11 ########
Instance path: synDelayWithEnable_1s_44s_1s_10.singleDelayWithEnableGeneric_44s_11
=========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_10.singleDelayWithEnableGeneric_44s_11: 44 (0.64 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: CIC_I_I1_9 ########
Instance path: CIC_I_0.CIC_I_I1_9
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.CIC_I_I1_9: 44 (0.64 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 44 1.32 %
=================================================
Total COMBINATIONAL LOGIC in the block CIC_I_0.CIC_I_I1_9: 44 (0.64 % Utilization)
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-------------------------------------------------------------------------
######## Utilization report for cell: synCIC_I_I1_Delay_8 ########
Instance path: CIC_I_I1_9.synCIC_I_I1_Delay_8
=========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_I1_9.synCIC_I_I1_Delay_8: 44 (0.64 % Utilization)
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-------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_11 ########
Instance path: synCIC_I_I1_Delay_8.synDelayWithEnable_1s_44s_1s_11
=====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synCIC_I_I1_Delay_8.synDelayWithEnable_1s_44s_1s_11: 44 (0.64 % Utilization)
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-----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_12 ########
Instance path: synDelayWithEnable_1s_44s_1s_11.singleDelayWithEnableGeneric_44s_12
=========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 44 1.51 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_11.singleDelayWithEnableGeneric_44s_12: 44 (0.64 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_14s_1s_0 ########
Instance path: CIC_I_0.synDelayWithEnable_1s_14s_1s_0
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.synDelayWithEnable_1s_14s_1s_0: 14 (0.20 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_14s_1 ########
Instance path: synDelayWithEnable_1s_14s_1s_0.singleDelayWithEnableGeneric_14s_1
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_14s_1s_0.singleDelayWithEnableGeneric_14s_1: 14 (0.20 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_44s_1s_6 ########
Instance path: CIC_I_0.synDelayWithEnable_1s_44s_1s_6
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block CIC_I_0.synDelayWithEnable_1s_44s_1s_6: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block CIC_I_0.synDelayWithEnable_1s_44s_1s_6: 2 (0.03 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_44s_7 ########
Instance path: synDelayWithEnable_1s_44s_1s_6.singleDelayWithEnableGeneric_44s_7
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 42 1.44 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_44s_1s_6.singleDelayWithEnableGeneric_44s_7: 42 (0.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 2 0.810 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_44s_1s_6.singleDelayWithEnableGeneric_44s_7: 2 (0.03 % Utilization)
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---------------------------------------------------------
######## Utilization report for cell: DDS ########
Instance path: ddc.DDS
=========================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 587 20.1 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc.DDS: 587 (8.49 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 45 68.2 %
ARI1 1096 32.9 %
BLACK BOX 33 13.4 %
======================================================
Total COMBINATIONAL LOGIC in the block ddc.DDS: 1174 (16.98 % Utilization)
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------------------------------------------------------------------------
######## Utilization report for cell: DDS_PhaseGenerator ########
Instance path: DDS.DDS_PhaseGenerator
========================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 76 2.61 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS.DDS_PhaseGenerator: 76 (1.10 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
ARI1 32 0.960 %
BLACK BOX 22 8.91 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS.DDS_PhaseGenerator: 54 (0.78 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synAccumulator_33s_signed_incr ########
Instance path: DDS_PhaseGenerator.synAccumulator_33s_signed_incr
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 32 1.1 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_PhaseGenerator.synAccumulator_33s_signed_incr: 32 (0.46 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
ARI1 32 0.960 %
BLACK BOX 1 0.4050 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS_PhaseGenerator.synAccumulator_33s_signed_incr: 33 (0.48 % Utilization)
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---------------------------------------------------------------------------------
######## Utilization report for cell: synDDS_PhaseGenerator_shrp1 ########
Instance path: DDS_PhaseGenerator.synDDS_PhaseGenerator_shrp1
=================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 32 1.1 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_PhaseGenerator.synDDS_PhaseGenerator_shrp1: 32 (0.46 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 1 0.4050 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS_PhaseGenerator.synDDS_PhaseGenerator_shrp1: 1 (0.01 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_33s_1s ########
Instance path: synDDS_PhaseGenerator_shrp1.synDelayWithEnable_1s_33s_1s
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 32 1.1 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDDS_PhaseGenerator_shrp1.synDelayWithEnable_1s_33s_1s: 32 (0.46 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 1 0.4050 %
======================================================
Total COMBINATIONAL LOGIC in the block synDDS_PhaseGenerator_shrp1.synDelayWithEnable_1s_33s_1s: 1 (0.01 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_33s ########
Instance path: synDelayWithEnable_1s_33s_1s.singleDelayWithEnableGeneric_33s
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 32 1.1 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_33s_1s.singleDelayWithEnableGeneric_33s: 32 (0.46 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 1 0.4050 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_33s_1s.singleDelayWithEnableGeneric_33s: 1 (0.01 % Utilization)
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---------------------------------------------------------------------------------
######## Utilization report for cell: synDDS_PhaseGenerator_shrp2 ########
Instance path: DDS_PhaseGenerator.synDDS_PhaseGenerator_shrp2
=================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 12 0.4120 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_PhaseGenerator.synDDS_PhaseGenerator_shrp2: 12 (0.17 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 20 8.1 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS_PhaseGenerator.synDDS_PhaseGenerator_shrp2: 20 (0.29 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_32s_1s ########
Instance path: synDDS_PhaseGenerator_shrp2.synDelayWithEnable_1s_32s_1s
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 12 0.4120 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDDS_PhaseGenerator_shrp2.synDelayWithEnable_1s_32s_1s: 12 (0.17 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 20 8.1 %
======================================================
Total COMBINATIONAL LOGIC in the block synDDS_PhaseGenerator_shrp2.synDelayWithEnable_1s_32s_1s: 20 (0.29 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_32s ########
Instance path: synDelayWithEnable_1s_32s_1s.singleDelayWithEnableGeneric_32s
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 12 0.4120 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_32s_1s.singleDelayWithEnableGeneric_32s: 12 (0.17 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 20 8.1 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_32s_1s.singleDelayWithEnableGeneric_32s: 20 (0.29 % Utilization)
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----------------------------------------------------------------
######## Utilization report for cell: DDS_SinCos ########
Instance path: DDS.DDS_SinCos
================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 511 17.5 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS.DDS_SinCos: 511 (7.39 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 45 68.2 %
ARI1 1064 31.9 %
BLACK BOX 11 4.45 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS.DDS_SinCos: 1120 (16.20 % Utilization)
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------------------------------------------------------------------------------
######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos ########
Instance path: DDS_SinCos.DDS_SinCos_CORDIC_SinCos
==============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 467 16. %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos.DDS_SinCos_CORDIC_SinCos: 467 (6.75 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 43 65.2 %
ARI1 1034 31. %
BLACK BOX 9 3.64 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos.DDS_SinCos_CORDIC_SinCos: 1086 (15.71 % Utilization)
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######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage ########
Instance path: DDS_SinCos_CORDIC_SinCos.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage
============================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 467 16. %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage: 467 (6.75 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 43 65.2 %
ARI1 1034 31. %
BLACK BOX 9 3.64 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage: 1086 (15.71 % Utilization)
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######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1
==================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 457 15.7 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1: 457 (6.61 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 12 18.2 %
ARI1 1000 30. %
BLACK BOX 9 3.64 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1: 1021 (14.77 % Utilization)
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--------------------------------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1
==================================================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 2 3.03 %
BLACK BOX 9 3.64 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1: 11 (0.16 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_15s_1s_8 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1.synDelayWithEnable_1s_15s_1s_8
======================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 12 0.4120 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1.synDelayWithEnable_1s_15s_1s_8: 12 (0.17 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 2 3.03 %
BLACK BOX 1 0.4050 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1.synDelayWithEnable_1s_15s_1s_8: 3 (0.04 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_15s_8 ########
Instance path: synDelayWithEnable_1s_15s_1s_8.singleDelayWithEnableGeneric_15s_8
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 12 0.4120 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_15s_1s_8.singleDelayWithEnableGeneric_15s_8: 12 (0.17 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
CFG 2 3.03 %
BLACK BOX 1 0.4050 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_15s_1s_8.singleDelayWithEnableGeneric_15s_8: 3 (0.04 % Utilization)
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-------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_17 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1.synDelayWithEnable_1s_17s_1s_0_17
=========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1 3.43e-002 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1.synDelayWithEnable_1s_17s_1s_0_17: 1 (0.01 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 8 3.24 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1.synDelayWithEnable_1s_17s_1s_0_17: 8 (0.12 % Utilization)
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-------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_18 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_17.singleDelayWithEnableGeneric_17s_0_18
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 1 3.43e-002 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_17.singleDelayWithEnableGeneric_17s_0_18: 1 (0.01 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 8 3.24 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_17s_1s_0_17.singleDelayWithEnableGeneric_17s_0_18: 8 (0.12 % Utilization)
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-------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_18 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1.synDelayWithEnable_1s_17s_1s_0_18
=========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 6.86e-002 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg1.synDelayWithEnable_1s_17s_1s_0_18: 2 (0.03 % Utilization)
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-------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_19 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_18.singleDelayWithEnableGeneric_17s_0_19
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 2 6.86e-002 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_18.singleDelayWithEnableGeneric_17s_0_19: 2 (0.03 % Utilization)
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---------------------------------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10
===================================================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 51 1.75 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10: 51 (0.74 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
ARI1 86 2.58 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10: 87 (1.26 % Utilization)
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---------------------------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10.synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s
=============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10.synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s: 18 (0.26 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: synBusSatRnd_Z16 ########
Instance path: synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s.synBusSatRnd_Z16
======================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s.synBusSatRnd_Z16: 18 (0.26 % Utilization)
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-----------------------------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10.synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s_0
===============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10.synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s_0: 18 (0.26 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: synBusSatRnd_Z16_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s_0.synBusSatRnd_Z16_0
==========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_22s_13s_5s_0s_SS_22s_0.synBusSatRnd_Z16_0: 18 (0.26 % Utilization)
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-----------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_15s_1s_7 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10.synDelayWithEnable_1s_15s_1s_7
=======================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10.synDelayWithEnable_1s_15s_1s_7: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10.synDelayWithEnable_1s_15s_1s_7: 1 (0.01 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_15s_7 ########
Instance path: synDelayWithEnable_1s_15s_1s_7.singleDelayWithEnableGeneric_15s_7
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_15s_1s_7.singleDelayWithEnableGeneric_15s_7: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_15s_1s_7.singleDelayWithEnableGeneric_15s_7: 1 (0.01 % Utilization)
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--------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_15 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10.synDelayWithEnable_1s_17s_1s_0_15
==========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 18 0.6170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10.synDelayWithEnable_1s_17s_1s_0_15: 18 (0.26 % Utilization)
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-------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_16 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_15.singleDelayWithEnableGeneric_17s_0_16
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 18 0.6170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_15.singleDelayWithEnableGeneric_17s_0_16: 18 (0.26 % Utilization)
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--------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_16 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10.synDelayWithEnable_1s_17s_1s_0_16
==========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 18 0.6170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg10.synDelayWithEnable_1s_17s_1s_0_16: 18 (0.26 % Utilization)
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-------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_17 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_16.singleDelayWithEnableGeneric_17s_0_17
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 18 0.6170 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_16.singleDelayWithEnableGeneric_17s_0_17: 18 (0.26 % Utilization)
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######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg11 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg11
===================================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 86 2.58 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg11: 86 (1.24 % Utilization)
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---------------------------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg11.synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s
=============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg11.synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s: 18 (0.26 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: synBusSatRnd_Z15 ########
Instance path: synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s.synBusSatRnd_Z15
======================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s.synBusSatRnd_Z15: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg11.synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s_0
===============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg11.synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s_0: 18 (0.26 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: synBusSatRnd_Z15_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s_0.synBusSatRnd_Z15_0
==========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_23s_13s_5s_0s_SS_23s_0.synBusSatRnd_Z15_0: 18 (0.26 % Utilization)
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######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg12 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg12
===================================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 86 2.58 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg12: 86 (1.24 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg12.synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s
=============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg12.synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z14 ########
Instance path: synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s.synBusSatRnd_Z14
======================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s.synBusSatRnd_Z14: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg12.synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s_0
===============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 35 1.05 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg12.synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s_0: 35 (0.51 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z14_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s_0.synBusSatRnd_Z14_0
==========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 35 1.05 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_24s_13s_5s_0s_SS_24s_0.synBusSatRnd_Z14_0: 35 (0.51 % Utilization)
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######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg13 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg13
===================================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 72 2.16 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg13: 72 (1.04 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg13.synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s
=============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg13.synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z17 ########
Instance path: synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s.synBusSatRnd_Z17
======================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s.synBusSatRnd_Z17: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg13.synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s_0
===============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 35 1.05 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg13.synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s_0: 35 (0.51 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z17_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s_0.synBusSatRnd_Z17_0
==========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 35 1.05 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_25s_13s_5s_0s_SS_25s_0.synBusSatRnd_Z17_0: 35 (0.51 % Utilization)
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######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2
==================================================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 48 1.65 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2: 48 (0.69 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 2 3.03 %
ARI1 72 2.16 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2: 74 (1.07 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s
============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 34 1.02 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s: 34 (0.49 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z13 ########
Instance path: synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s.synBusSatRnd_Z13
======================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 34 1.02 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s.synBusSatRnd_Z13: 34 (0.49 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s_0
==============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 6 0.180 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s_0: 6 (0.09 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z13_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s_0.synBusSatRnd_Z13_0
==========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 6 0.180 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_14s_13s_5s_0s_SS_17s_0.synBusSatRnd_Z13_0: 6 (0.09 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_15s_1s_6 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synDelayWithEnable_1s_15s_1s_6
======================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synDelayWithEnable_1s_15s_1s_6: 14 (0.20 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 2 3.03 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synDelayWithEnable_1s_15s_1s_6: 2 (0.03 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_15s_6 ########
Instance path: synDelayWithEnable_1s_15s_1s_6.singleDelayWithEnableGeneric_15s_6
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_15s_1s_6.singleDelayWithEnableGeneric_15s_6: 14 (0.20 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 2 3.03 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_15s_1s_6.singleDelayWithEnableGeneric_15s_6: 2 (0.03 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_13 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synDelayWithEnable_1s_17s_1s_0_13
=========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synDelayWithEnable_1s_17s_1s_0_13: 17 (0.25 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 1 3.e-002 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synDelayWithEnable_1s_17s_1s_0_13: 1 (0.01 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_14 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_13.singleDelayWithEnableGeneric_17s_0_14
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_13.singleDelayWithEnableGeneric_17s_0_14: 17 (0.25 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 1 3.e-002 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_17s_1s_0_13.singleDelayWithEnableGeneric_17s_0_14: 1 (0.01 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_14 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synDelayWithEnable_1s_17s_1s_0_14
=========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg2.synDelayWithEnable_1s_17s_1s_0_14: 17 (0.25 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_15 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_14.singleDelayWithEnableGeneric_17s_0_15
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_14.singleDelayWithEnableGeneric_17s_0_15: 17 (0.25 % Utilization)
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######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3
==================================================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 49 1.68 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3: 49 (0.71 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
ARI1 86 2.58 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3: 87 (1.26 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3.synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s
============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3.synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z12 ########
Instance path: synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s.synBusSatRnd_Z12
======================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s.synBusSatRnd_Z12: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3.synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s_0
==============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3.synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s_0: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z12_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s_0.synBusSatRnd_Z12_0
==========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_15s_13s_5s_0s_SS_17s_0.synBusSatRnd_Z12_0: 18 (0.26 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_15s_1s_5 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3.synDelayWithEnable_1s_15s_1s_5
======================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3.synDelayWithEnable_1s_15s_1s_5: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3.synDelayWithEnable_1s_15s_1s_5: 1 (0.01 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_15s_5 ########
Instance path: synDelayWithEnable_1s_15s_1s_5.singleDelayWithEnableGeneric_15s_5
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_15s_1s_5.singleDelayWithEnableGeneric_15s_5: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_15s_1s_5.singleDelayWithEnableGeneric_15s_5: 1 (0.01 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_11 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3.synDelayWithEnable_1s_17s_1s_0_11
=========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3.synDelayWithEnable_1s_17s_1s_0_11: 17 (0.25 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_12 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_11.singleDelayWithEnableGeneric_17s_0_12
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_11.singleDelayWithEnableGeneric_17s_0_12: 17 (0.25 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_12 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3.synDelayWithEnable_1s_17s_1s_0_12
=========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg3.synDelayWithEnable_1s_17s_1s_0_12: 17 (0.25 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_13 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_12.singleDelayWithEnableGeneric_17s_0_13
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_12.singleDelayWithEnableGeneric_17s_0_13: 17 (0.25 % Utilization)
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######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4
==================================================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 49 1.68 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4: 49 (0.71 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
ARI1 85 2.55 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4: 86 (1.24 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s
============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 34 1.02 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s: 34 (0.49 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z11 ########
Instance path: synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s.synBusSatRnd_Z11
======================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 34 1.02 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s.synBusSatRnd_Z11: 34 (0.49 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s_0
==============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s_0: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z11_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s_0.synBusSatRnd_Z11_0
==========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_16s_13s_5s_0s_SS_17s_0.synBusSatRnd_Z11_0: 18 (0.26 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_15s_1s_4 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synDelayWithEnable_1s_15s_1s_4
======================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synDelayWithEnable_1s_15s_1s_4: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synDelayWithEnable_1s_15s_1s_4: 1 (0.01 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_15s_4 ########
Instance path: synDelayWithEnable_1s_15s_1s_4.singleDelayWithEnableGeneric_15s_4
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_15s_1s_4.singleDelayWithEnableGeneric_15s_4: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_15s_1s_4.singleDelayWithEnableGeneric_15s_4: 1 (0.01 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_10 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synDelayWithEnable_1s_17s_1s_0_10
=========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synDelayWithEnable_1s_17s_1s_0_10: 17 (0.25 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_11 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_10.singleDelayWithEnableGeneric_17s_0_11
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_10.singleDelayWithEnableGeneric_17s_0_11: 17 (0.25 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_9 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synDelayWithEnable_1s_17s_1s_0_9
========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synDelayWithEnable_1s_17s_1s_0_9: 17 (0.25 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 1 3.e-002 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg4.synDelayWithEnable_1s_17s_1s_0_9: 1 (0.01 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_10 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_9.singleDelayWithEnableGeneric_17s_0_10
===========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_9.singleDelayWithEnableGeneric_17s_0_10: 17 (0.25 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 1 3.e-002 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_17s_1s_0_9.singleDelayWithEnableGeneric_17s_0_10: 1 (0.01 % Utilization)
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######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5
==================================================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 49 1.68 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5: 49 (0.71 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
ARI1 86 2.58 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5: 87 (1.26 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5.synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s
============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5.synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z10 ########
Instance path: synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s.synBusSatRnd_Z10
======================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s.synBusSatRnd_Z10: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5.synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s_0
==============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5.synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s_0: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z10_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s_0.synBusSatRnd_Z10_0
==========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_17s_13s_5s_0s_SS_17s_0.synBusSatRnd_Z10_0: 18 (0.26 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_15s_1s_3 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5.synDelayWithEnable_1s_15s_1s_3
======================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5.synDelayWithEnable_1s_15s_1s_3: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5.synDelayWithEnable_1s_15s_1s_3: 1 (0.01 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_15s_3 ########
Instance path: synDelayWithEnable_1s_15s_1s_3.singleDelayWithEnableGeneric_15s_3
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_15s_1s_3.singleDelayWithEnableGeneric_15s_3: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_15s_1s_3.singleDelayWithEnableGeneric_15s_3: 1 (0.01 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_7 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5.synDelayWithEnable_1s_17s_1s_0_7
========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5.synDelayWithEnable_1s_17s_1s_0_7: 17 (0.25 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_8 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_7.singleDelayWithEnableGeneric_17s_0_8
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_7.singleDelayWithEnableGeneric_17s_0_8: 17 (0.25 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_8 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5.synDelayWithEnable_1s_17s_1s_0_8
========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg5.synDelayWithEnable_1s_17s_1s_0_8: 17 (0.25 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_9 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_8.singleDelayWithEnableGeneric_17s_0_9
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_8.singleDelayWithEnableGeneric_17s_0_9: 17 (0.25 % Utilization)
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######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6
==================================================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 49 1.68 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6: 49 (0.71 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
ARI1 86 2.58 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6: 87 (1.26 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6.synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s
============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6.synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z9 ########
Instance path: synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s.synBusSatRnd_Z9
=====================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s.synBusSatRnd_Z9: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6.synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s_0
==============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6.synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s_0: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z9_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s_0.synBusSatRnd_Z9_0
=========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_18s_13s_5s_0s_SS_18s_0.synBusSatRnd_Z9_0: 18 (0.26 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_15s_1s_2 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6.synDelayWithEnable_1s_15s_1s_2
======================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6.synDelayWithEnable_1s_15s_1s_2: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6.synDelayWithEnable_1s_15s_1s_2: 1 (0.01 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_15s_2 ########
Instance path: synDelayWithEnable_1s_15s_1s_2.singleDelayWithEnableGeneric_15s_2
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_15s_1s_2.singleDelayWithEnableGeneric_15s_2: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_15s_1s_2.singleDelayWithEnableGeneric_15s_2: 1 (0.01 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_5 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6.synDelayWithEnable_1s_17s_1s_0_5
========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6.synDelayWithEnable_1s_17s_1s_0_5: 17 (0.25 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_6 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_5.singleDelayWithEnableGeneric_17s_0_6
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_5.singleDelayWithEnableGeneric_17s_0_6: 17 (0.25 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_6 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6.synDelayWithEnable_1s_17s_1s_0_6
========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg6.synDelayWithEnable_1s_17s_1s_0_6: 17 (0.25 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_7 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_6.singleDelayWithEnableGeneric_17s_0_7
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_6.singleDelayWithEnableGeneric_17s_0_7: 17 (0.25 % Utilization)
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######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7
==================================================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 49 1.68 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7: 49 (0.71 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
ARI1 84 2.52 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7: 85 (1.23 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s
============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 34 1.02 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s: 34 (0.49 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z8 ########
Instance path: synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s.synBusSatRnd_Z8
=====================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 34 1.02 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s.synBusSatRnd_Z8: 34 (0.49 % Utilization)
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######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s_0
==============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s_0: 18 (0.26 % Utilization)
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######## Utilization report for cell: synBusSatRnd_Z8_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s_0.synBusSatRnd_Z8_0
=========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_19s_13s_5s_0s_SS_19s_0.synBusSatRnd_Z8_0: 18 (0.26 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_15s_1s_1 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synDelayWithEnable_1s_15s_1s_1
======================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synDelayWithEnable_1s_15s_1s_1: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synDelayWithEnable_1s_15s_1s_1: 1 (0.01 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_15s_1 ########
Instance path: synDelayWithEnable_1s_15s_1s_1.singleDelayWithEnableGeneric_15s_1
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_15s_1s_1.singleDelayWithEnableGeneric_15s_1: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_15s_1s_1.singleDelayWithEnableGeneric_15s_1: 1 (0.01 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_3 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synDelayWithEnable_1s_17s_1s_0_3
========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synDelayWithEnable_1s_17s_1s_0_3: 17 (0.25 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 1 3.e-002 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synDelayWithEnable_1s_17s_1s_0_3: 1 (0.01 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_4 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_3.singleDelayWithEnableGeneric_17s_0_4
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_3.singleDelayWithEnableGeneric_17s_0_4: 17 (0.25 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 1 3.e-002 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_17s_1s_0_3.singleDelayWithEnableGeneric_17s_0_4: 1 (0.01 % Utilization)
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------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_4 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synDelayWithEnable_1s_17s_1s_0_4
========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg7.synDelayWithEnable_1s_17s_1s_0_4: 17 (0.25 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_5 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_4.singleDelayWithEnableGeneric_17s_0_5
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_4.singleDelayWithEnableGeneric_17s_0_5: 17 (0.25 % Utilization)
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--------------------------------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8
==================================================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 49 1.68 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8: 49 (0.71 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
ARI1 85 2.55 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8: 86 (1.24 % Utilization)
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--------------------------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s
============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 34 1.02 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s: 34 (0.49 % Utilization)
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-------------------------------------------------------------------------------------
######## Utilization report for cell: synBusSatRnd_Z7 ########
Instance path: synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s.synBusSatRnd_Z7
=====================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 34 1.02 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s.synBusSatRnd_Z7: 34 (0.49 % Utilization)
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----------------------------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s_0
==============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s_0: 18 (0.26 % Utilization)
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-----------------------------------------------------------------------------------------
######## Utilization report for cell: synBusSatRnd_Z7_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s_0.synBusSatRnd_Z7_0
=========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_20s_13s_5s_0s_SS_20s_0.synBusSatRnd_Z7_0: 18 (0.26 % Utilization)
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----------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_15s_1s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synDelayWithEnable_1s_15s_1s_0
======================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synDelayWithEnable_1s_15s_1s_0: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synDelayWithEnable_1s_15s_1s_0: 1 (0.01 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_15s_0 ########
Instance path: synDelayWithEnable_1s_15s_1s_0.singleDelayWithEnableGeneric_15s_0
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_15s_1s_0.singleDelayWithEnableGeneric_15s_0: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_15s_1s_0.singleDelayWithEnableGeneric_15s_0: 1 (0.01 % Utilization)
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------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_1 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synDelayWithEnable_1s_17s_1s_0_1
========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synDelayWithEnable_1s_17s_1s_0_1: 17 (0.25 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 1 3.e-002 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synDelayWithEnable_1s_17s_1s_0_1: 1 (0.01 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_2 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_1.singleDelayWithEnableGeneric_17s_0_2
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_1.singleDelayWithEnableGeneric_17s_0_2: 17 (0.25 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 1 3.e-002 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_17s_1s_0_1.singleDelayWithEnableGeneric_17s_0_2: 1 (0.01 % Utilization)
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------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_2 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synDelayWithEnable_1s_17s_1s_0_2
========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg8.synDelayWithEnable_1s_17s_1s_0_2: 17 (0.25 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_3 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_2.singleDelayWithEnableGeneric_17s_0_3
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_2.singleDelayWithEnableGeneric_17s_0_3: 17 (0.25 % Utilization)
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--------------------------------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9
==================================================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 49 1.68 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9: 49 (0.71 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
ARI1 86 2.58 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1.DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9: 87 (1.26 % Utilization)
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--------------------------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9.synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s
============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9.synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s: 18 (0.26 % Utilization)
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-------------------------------------------------------------------------------------
######## Utilization report for cell: synBusSatRnd_Z4 ########
Instance path: synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s.synBusSatRnd_Z4
=====================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s.synBusSatRnd_Z4: 18 (0.26 % Utilization)
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----------------------------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9.synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s_0
==============================================================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9.synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s_0: 18 (0.26 % Utilization)
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-----------------------------------------------------------------------------------------
######## Utilization report for cell: synBusSatRnd_Z4_0 ########
Instance path: synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s_0.synBusSatRnd_Z4_0
=========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 18 0.540 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_17s_signed_0s_21s_13s_5s_0s_SS_21s_0.synBusSatRnd_Z4_0: 18 (0.26 % Utilization)
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--------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_15s_1s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9.synDelayWithEnable_1s_15s_1s
====================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9.synDelayWithEnable_1s_15s_1s: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9.synDelayWithEnable_1s_15s_1s: 1 (0.01 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_15s ########
Instance path: synDelayWithEnable_1s_15s_1s.singleDelayWithEnableGeneric_15s
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 15 0.5140 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_15s_1s.singleDelayWithEnableGeneric_15s: 15 (0.22 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 1 1.52 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_15s_1s.singleDelayWithEnableGeneric_15s: 1 (0.01 % Utilization)
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----------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9.synDelayWithEnable_1s_17s_1s_0
======================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9.synDelayWithEnable_1s_17s_1s_0: 17 (0.25 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0 ########
Instance path: synDelayWithEnable_1s_17s_1s_0.singleDelayWithEnableGeneric_17s_0
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0.singleDelayWithEnableGeneric_17s_0: 17 (0.25 % Utilization)
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------------------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_0_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9.synDelayWithEnable_1s_17s_1s_0_0
========================================================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage_CORDIC_onequadrant1_CORDIC_stg9.synDelayWithEnable_1s_17s_1s_0_0: 17 (0.25 % Utilization)
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------------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_17s_0_1 ########
Instance path: synDelayWithEnable_1s_17s_1s_0_0.singleDelayWithEnableGeneric_17s_0_1
==========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 17 0.5830 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_0_0.singleDelayWithEnableGeneric_17s_0_1: 17 (0.25 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_1s_10s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage.synDelayWithEnable_1s_1s_10s
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 10 0.3430 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage.synDelayWithEnable_1s_1s_10s: 10 (0.14 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnableGeneric_Z3 ########
Instance path: synDelayWithEnable_1s_1s_10s.synDelayWithEnableGeneric_Z3
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 10 0.3430 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_1s_10s.synDelayWithEnableGeneric_Z3: 10 (0.14 % Utilization)
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---------------------------------------------------------------------
######## Utilization report for cell: synNegate_18s ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage.synNegate_18s
=====================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 0.510 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage.synNegate_18s: 17 (0.25 % Utilization)
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-----------------------------------------------------------------------
######## Utilization report for cell: synNegate_18s_0 ########
Instance path: DDS_SinCos_CORDIC_SinCos_CORDIC2_stage.synNegate_18s_0
=======================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 17 0.510 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos_CORDIC_SinCos_CORDIC2_stage.synNegate_18s_0: 17 (0.25 % Utilization)
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----------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s ########
Instance path: DDS_SinCos.synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s
==========================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 15 0.450 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos.synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s: 15 (0.22 % Utilization)
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-------------------------------------------------------------------------------------
######## Utilization report for cell: synBusSatRnd_Z1 ########
Instance path: synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s.synBusSatRnd_Z1
=====================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 15 0.450 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s.synBusSatRnd_Z1: 15 (0.22 % Utilization)
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------------------------------------------------------------------------------------------------------------
######## Utilization report for cell: synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s_0 ########
Instance path: DDS_SinCos.synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s_0
============================================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 15 0.450 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos.synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s_0: 15 (0.22 % Utilization)
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-----------------------------------------------------------------------------------------
######## Utilization report for cell: synBusSatRnd_Z1_0 ########
Instance path: synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s_0.synBusSatRnd_Z1_0
=========================================================================================
COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
ARI1 15 0.450 %
=================================================
Total COMBINATIONAL LOGIC in the block synBusAdapter_17s_12s_signed_0s_13s_10s_5s_0s_SS_17s_0.synBusSatRnd_Z1_0: 15 (0.22 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_12s_1s ########
Instance path: DDS_SinCos.synDelayWithEnable_1s_12s_1s
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 12 0.4120 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos.synDelayWithEnable_1s_12s_1s: 12 (0.17 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 2 3.03 %
=================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos.synDelayWithEnable_1s_12s_1s: 2 (0.03 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_12s ########
Instance path: synDelayWithEnable_1s_12s_1s.singleDelayWithEnableGeneric_12s
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 12 0.4120 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_12s_1s.singleDelayWithEnableGeneric_12s: 12 (0.17 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
-------------------------------------------------
CFG 2 3.03 %
=================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_12s_1s.singleDelayWithEnableGeneric_12s: 2 (0.03 % Utilization)
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----------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_17s_1s ########
Instance path: DDS_SinCos.synDelayWithEnable_1s_17s_1s
==================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.5490 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos.synDelayWithEnable_1s_17s_1s: 16 (0.23 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 1 0.4050 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos.synDelayWithEnable_1s_17s_1s: 1 (0.01 % Utilization)
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--------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_17s ########
Instance path: synDelayWithEnable_1s_17s_1s.singleDelayWithEnableGeneric_17s
======================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.5490 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s.singleDelayWithEnableGeneric_17s: 16 (0.23 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 1 0.4050 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_17s_1s.singleDelayWithEnableGeneric_17s: 1 (0.01 % Utilization)
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------------------------------------------------------------------------------------
######## Utilization report for cell: synDelayWithEnable_1s_17s_1s_1 ########
Instance path: DDS_SinCos.synDelayWithEnable_1s_17s_1s_1
====================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.5490 %
=================================================
Total SEQUENTIAL ELEMENTS in the block DDS_SinCos.synDelayWithEnable_1s_17s_1s_1: 16 (0.23 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 1 0.4050 %
======================================================
Total COMBINATIONAL LOGIC in the block DDS_SinCos.synDelayWithEnable_1s_17s_1s_1: 1 (0.01 % Utilization)
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----------------------------------------------------------------------------------------
######## Utilization report for cell: singleDelayWithEnableGeneric_17s_1 ########
Instance path: synDelayWithEnable_1s_17s_1s_1.singleDelayWithEnableGeneric_17s_1
========================================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 16 0.5490 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_17s_1s_1.singleDelayWithEnableGeneric_17s_1: 16 (0.23 % Utilization)
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COMBINATIONAL LOGIC
Name Total elements Utilization Notes
------------------------------------------------------
BLACK BOX 1 0.4050 %
======================================================
Total COMBINATIONAL LOGIC in the block synDelayWithEnable_1s_17s_1s_1.singleDelayWithEnableGeneric_17s_1: 1 (0.01 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_14s_1s_1 ########
Instance path: ddc.synDelayWithEnable_1s_14s_1s_1
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SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc.synDelayWithEnable_1s_14s_1s_1: 14 (0.20 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_14s_2 ########
Instance path: synDelayWithEnable_1s_14s_1s_1.singleDelayWithEnableGeneric_14s_2
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SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_14s_1s_1.singleDelayWithEnableGeneric_14s_2: 14 (0.20 % Utilization)
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######## Utilization report for cell: synDelayWithEnable_1s_14s_1s_2 ########
Instance path: ddc.synDelayWithEnable_1s_14s_1s_2
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SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc.synDelayWithEnable_1s_14s_1s_2: 14 (0.20 % Utilization)
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######## Utilization report for cell: singleDelayWithEnableGeneric_14s_3 ########
Instance path: synDelayWithEnable_1s_14s_1s_2.singleDelayWithEnableGeneric_14s_3
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SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block synDelayWithEnable_1s_14s_1s_2.singleDelayWithEnableGeneric_14s_3: 14 (0.20 % Utilization)
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######## Utilization report for cell: synDownsampleSimple_14s ########
Instance path: ddc.synDownsampleSimple_14s
=============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc.synDownsampleSimple_14s: 14 (0.20 % Utilization)
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######## Utilization report for cell: synDownsampleSimple_14s_0 ########
Instance path: ddc.synDownsampleSimple_14s_0
===============================================================================
SEQUENTIAL ELEMENTS
Name Total elements Utilization Notes
-------------------------------------------------
SLE 14 0.480 %
=================================================
Total SEQUENTIAL ELEMENTS in the block ddc.synDownsampleSimple_14s_0: 14 (0.20 % Utilization)
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##### END OF AREA REPORT #####]