PCIE_IAP_syn (synthesis)
Synthesis -
Compiler Report
Compiler Constraint Applicator
Pre-mapping Report
Clock Summary
Mapper Report
Clock Conversion
Timing Report
Performance Summary
Clock Relationships
Interface Information
Detailed Report for Clocks
Clock: PCIE_IAP_sb_CCC_0_FCCC|GL0_net_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: PCIE_IAP_sb_CCC_0_FCCC|GL1_net_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: PCIE_IAP_sb_CCC_0_FCCC|GL2_net_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Clock: PCIE_IAP_sb_FABOSC_0_OSC|RCOSC_25_50MHZ_CCC_inferred_clock
Starting Points with Worst Slack
Ending Points with Worst Slack
Worst Path Information
Resource Utilization
Hierarchical Area Report(PCIE_IAP) (18:33 27-Apr)